Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Red Hat |
| 3 | * Author: Rob Clark <robdclark@gmail.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef __HDMI_CONNECTOR_H__ |
| 19 | #define __HDMI_CONNECTOR_H__ |
| 20 | |
| 21 | #include <linux/i2c.h> |
| 22 | #include <linux/clk.h> |
| 23 | #include <linux/platform_device.h> |
| 24 | #include <linux/regulator/consumer.h> |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 25 | #include <linux/hdmi.h> |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 26 | |
| 27 | #include "msm_drv.h" |
| 28 | #include "hdmi.xml.h" |
| 29 | |
Archit Taneja | dc50f782 | 2016-02-25 11:22:36 +0530 | [diff] [blame^] | 30 | #define HDMI_MAX_NUM_GPIO 6 |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 31 | |
| 32 | struct hdmi_phy; |
Rob Clark | dada25b | 2013-12-01 12:12:54 -0500 | [diff] [blame] | 33 | struct hdmi_platform_config; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 34 | |
Archit Taneja | dc50f782 | 2016-02-25 11:22:36 +0530 | [diff] [blame^] | 35 | struct hdmi_gpio_data { |
| 36 | int num; |
| 37 | bool output; |
| 38 | int value; |
| 39 | const char *label; |
| 40 | }; |
| 41 | |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 42 | struct hdmi_audio { |
| 43 | bool enabled; |
| 44 | struct hdmi_audio_infoframe infoframe; |
| 45 | int rate; |
| 46 | }; |
| 47 | |
jilai wang | c6a57a5 | 2015-04-02 17:49:01 -0400 | [diff] [blame] | 48 | struct hdmi_hdcp_ctrl; |
| 49 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 50 | struct hdmi { |
| 51 | struct drm_device *dev; |
| 52 | struct platform_device *pdev; |
| 53 | |
Rob Clark | dada25b | 2013-12-01 12:12:54 -0500 | [diff] [blame] | 54 | const struct hdmi_platform_config *config; |
| 55 | |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 56 | /* audio state: */ |
| 57 | struct hdmi_audio audio; |
| 58 | |
| 59 | /* video state: */ |
| 60 | bool power_on; |
| 61 | unsigned long int pixclock; |
| 62 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 63 | void __iomem *mmio; |
jilai wang | c6a57a5 | 2015-04-02 17:49:01 -0400 | [diff] [blame] | 64 | void __iomem *qfprom_mmio; |
| 65 | phys_addr_t mmio_phy_addr; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 66 | |
Stephane Viau | 447fa52 | 2015-01-13 14:33:40 -0500 | [diff] [blame] | 67 | struct regulator **hpd_regs; |
| 68 | struct regulator **pwr_regs; |
| 69 | struct clk **hpd_clks; |
| 70 | struct clk **pwr_clks; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 71 | |
| 72 | struct hdmi_phy *phy; |
| 73 | struct i2c_adapter *i2c; |
| 74 | struct drm_connector *connector; |
Rob Clark | a3376e3 | 2013-08-30 13:02:15 -0400 | [diff] [blame] | 75 | struct drm_bridge *bridge; |
| 76 | |
| 77 | /* the encoder we are hooked to (outside of hdmi block) */ |
| 78 | struct drm_encoder *encoder; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 79 | |
| 80 | bool hdmi_mode; /* are we in hdmi mode? */ |
| 81 | |
| 82 | int irq; |
jilai wang | c6a57a5 | 2015-04-02 17:49:01 -0400 | [diff] [blame] | 83 | struct workqueue_struct *workq; |
| 84 | |
| 85 | struct hdmi_hdcp_ctrl *hdcp_ctrl; |
| 86 | |
| 87 | /* |
| 88 | * spinlock to protect registers shared by different execution |
| 89 | * REG_HDMI_CTRL |
| 90 | * REG_HDMI_DDC_ARBITRATION |
| 91 | * REG_HDMI_HDCP_INT_CTRL |
| 92 | * REG_HDMI_HPD_CTRL |
| 93 | */ |
| 94 | spinlock_t reg_lock; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 95 | }; |
| 96 | |
| 97 | /* platform config data (ie. from DT, or pdata) */ |
| 98 | struct hdmi_platform_config { |
| 99 | struct hdmi_phy *(*phy_init)(struct hdmi *hdmi); |
Rob Clark | dada25b | 2013-12-01 12:12:54 -0500 | [diff] [blame] | 100 | const char *mmio_name; |
jilai wang | c6a57a5 | 2015-04-02 17:49:01 -0400 | [diff] [blame] | 101 | const char *qfprom_mmio_name; |
Rob Clark | dada25b | 2013-12-01 12:12:54 -0500 | [diff] [blame] | 102 | |
| 103 | /* regulators that need to be on for hpd: */ |
| 104 | const char **hpd_reg_names; |
| 105 | int hpd_reg_cnt; |
| 106 | |
| 107 | /* regulators that need to be on for screen pwr: */ |
| 108 | const char **pwr_reg_names; |
| 109 | int pwr_reg_cnt; |
| 110 | |
| 111 | /* clks that need to be on for hpd: */ |
| 112 | const char **hpd_clk_names; |
Stephane Viau | b77f47e | 2014-06-06 10:03:32 -0400 | [diff] [blame] | 113 | const long unsigned *hpd_freq; |
Rob Clark | dada25b | 2013-12-01 12:12:54 -0500 | [diff] [blame] | 114 | int hpd_clk_cnt; |
| 115 | |
| 116 | /* clks that need to be on for screen pwr (ie pixel clk): */ |
| 117 | const char **pwr_clk_names; |
| 118 | int pwr_clk_cnt; |
| 119 | |
| 120 | /* gpio's: */ |
Archit Taneja | dc50f782 | 2016-02-25 11:22:36 +0530 | [diff] [blame^] | 121 | struct hdmi_gpio_data gpios[HDMI_MAX_NUM_GPIO]; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 122 | }; |
| 123 | |
| 124 | void hdmi_set_mode(struct hdmi *hdmi, bool power_on); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 125 | |
| 126 | static inline void hdmi_write(struct hdmi *hdmi, u32 reg, u32 data) |
| 127 | { |
| 128 | msm_writel(data, hdmi->mmio + reg); |
| 129 | } |
| 130 | |
| 131 | static inline u32 hdmi_read(struct hdmi *hdmi, u32 reg) |
| 132 | { |
| 133 | return msm_readl(hdmi->mmio + reg); |
| 134 | } |
| 135 | |
jilai wang | c6a57a5 | 2015-04-02 17:49:01 -0400 | [diff] [blame] | 136 | static inline u32 hdmi_qfprom_read(struct hdmi *hdmi, u32 reg) |
| 137 | { |
| 138 | return msm_readl(hdmi->qfprom_mmio + reg); |
| 139 | } |
| 140 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 141 | /* |
| 142 | * The phy appears to be different, for example between 8960 and 8x60, |
| 143 | * so split the phy related functions out and load the correct one at |
| 144 | * runtime: |
| 145 | */ |
| 146 | |
| 147 | struct hdmi_phy_funcs { |
| 148 | void (*destroy)(struct hdmi_phy *phy); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 149 | void (*powerup)(struct hdmi_phy *phy, unsigned long int pixclock); |
| 150 | void (*powerdown)(struct hdmi_phy *phy); |
| 151 | }; |
| 152 | |
| 153 | struct hdmi_phy { |
| 154 | const struct hdmi_phy_funcs *funcs; |
| 155 | }; |
| 156 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 157 | struct hdmi_phy *hdmi_phy_8960_init(struct hdmi *hdmi); |
| 158 | struct hdmi_phy *hdmi_phy_8x60_init(struct hdmi *hdmi); |
Rob Clark | dada25b | 2013-12-01 12:12:54 -0500 | [diff] [blame] | 159 | struct hdmi_phy *hdmi_phy_8x74_init(struct hdmi *hdmi); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 160 | |
| 161 | /* |
Rob Clark | c0c0d9e | 2013-12-11 14:44:02 -0500 | [diff] [blame] | 162 | * audio: |
| 163 | */ |
| 164 | |
| 165 | int hdmi_audio_update(struct hdmi *hdmi); |
| 166 | int hdmi_audio_info_setup(struct hdmi *hdmi, bool enabled, |
| 167 | uint32_t num_of_channels, uint32_t channel_allocation, |
| 168 | uint32_t level_shift, bool down_mix); |
| 169 | void hdmi_audio_set_sample_rate(struct hdmi *hdmi, int rate); |
| 170 | |
| 171 | |
| 172 | /* |
Rob Clark | a3376e3 | 2013-08-30 13:02:15 -0400 | [diff] [blame] | 173 | * hdmi bridge: |
| 174 | */ |
| 175 | |
| 176 | struct drm_bridge *hdmi_bridge_init(struct hdmi *hdmi); |
Ajay Kumar | 3d3f8b1 | 2015-01-20 22:08:44 +0530 | [diff] [blame] | 177 | void hdmi_bridge_destroy(struct drm_bridge *bridge); |
Rob Clark | a3376e3 | 2013-08-30 13:02:15 -0400 | [diff] [blame] | 178 | |
| 179 | /* |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 180 | * hdmi connector: |
| 181 | */ |
| 182 | |
| 183 | void hdmi_connector_irq(struct drm_connector *connector); |
Rob Clark | a3376e3 | 2013-08-30 13:02:15 -0400 | [diff] [blame] | 184 | struct drm_connector *hdmi_connector_init(struct hdmi *hdmi); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 185 | |
| 186 | /* |
| 187 | * i2c adapter for ddc: |
| 188 | */ |
| 189 | |
| 190 | void hdmi_i2c_irq(struct i2c_adapter *i2c); |
| 191 | void hdmi_i2c_destroy(struct i2c_adapter *i2c); |
| 192 | struct i2c_adapter *hdmi_i2c_init(struct hdmi *hdmi); |
| 193 | |
jilai wang | c6a57a5 | 2015-04-02 17:49:01 -0400 | [diff] [blame] | 194 | /* |
| 195 | * hdcp |
| 196 | */ |
| 197 | struct hdmi_hdcp_ctrl *hdmi_hdcp_init(struct hdmi *hdmi); |
| 198 | void hdmi_hdcp_destroy(struct hdmi *hdmi); |
| 199 | void hdmi_hdcp_on(struct hdmi_hdcp_ctrl *hdcp_ctrl); |
| 200 | void hdmi_hdcp_off(struct hdmi_hdcp_ctrl *hdcp_ctrl); |
| 201 | void hdmi_hdcp_irq(struct hdmi_hdcp_ctrl *hdcp_ctrl); |
| 202 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 203 | #endif /* __HDMI_CONNECTOR_H__ */ |