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Uwe Kleine-König58862692007-05-09 07:51:49 +02001/* linux/arch/arm/mach-s3c2410/sleep.S
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 Power Manager (Suspend-To-RAM) support
7 *
8 * Based on PXA/SA1100 sleep code by:
9 * Nicolas Pitre, (c) 2002 Monta Vista Software Inc
10 * Cliff Brake, (c) 2001
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25*/
26
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <linux/linkage.h>
28#include <asm/assembler.h>
29#include <asm/hardware.h>
30#include <asm/arch/map.h>
31
32#include <asm/arch/regs-gpio.h>
33#include <asm/arch/regs-clock.h>
34#include <asm/arch/regs-mem.h>
Ben Dooks531b6172007-07-22 16:05:25 +010035#include <asm/plat-s3c/regs-serial.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Ben Dooksa21765a2007-02-11 18:31:01 +010037 /* s3c2410_cpu_suspend
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 *
Ben Dooksa21765a2007-02-11 18:31:01 +010039 * put the cpu into sleep mode
Linus Torvalds1da177e2005-04-16 15:20:36 -070040 */
41
Ben Dooksa21765a2007-02-11 18:31:01 +010042ENTRY(s3c2410_cpu_suspend)
43 @@ prepare cpu to sleep
Linus Torvalds1da177e2005-04-16 15:20:36 -070044
Ben Dooksa21765a2007-02-11 18:31:01 +010045 ldr r4, =S3C2410_REFRESH
46 ldr r5, =S3C24XX_MISCCR
47 ldr r6, =S3C2410_CLKCON
48 ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB)
49 ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB)
50 ldr r9, [ r6 ] @ get CLKCON (and ensure in TLB)
Linus Torvalds1da177e2005-04-16 15:20:36 -070051
Ben Dooksa21765a2007-02-11 18:31:01 +010052 orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
53 orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
54 orr r9, r9, #S3C2410_CLKCON_POWER @ power down command
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
Ben Dooksa21765a2007-02-11 18:31:01 +010056 teq pc, #0 @ first as a trial-run to load cache
57 bl s3c2410_do_sleep
58 teq r0, r0 @ now do it for real
59 b s3c2410_do_sleep @
Linus Torvalds1da177e2005-04-16 15:20:36 -070060
Ben Dooksa21765a2007-02-11 18:31:01 +010061 @@ align next bit of code to cache line
Matt Reimer4b210fa2007-02-12 21:00:32 +010062 .align 5
Ben Dooksa21765a2007-02-11 18:31:01 +010063s3c2410_do_sleep:
64 streq r7, [ r4 ] @ SDRAM sleep command
65 streq r8, [ r5 ] @ SDRAM power-down config
66 streq r9, [ r6 ] @ CPU sleep
671: beq 1b
68 mov pc, r14