blob: dec27a961120060daff46f2317c60d74f517f866 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef CCISS_H
2#define CCISS_H
3
4#include <linux/genhd.h>
5
6#include "cciss_cmd.h"
7
8
9#define NWD 16
10#define NWD_SHIFT 4
11#define MAX_PART (1 << NWD_SHIFT)
12
13#define IO_OK 0
14#define IO_ERROR 1
15
16#define MAJOR_NR COMPAQ_CISS_MAJOR
17
18struct ctlr_info;
19typedef struct ctlr_info ctlr_info_t;
20
21struct access_method {
22 void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
23 void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
24 unsigned long (*fifo_full)(ctlr_info_t *h);
25 unsigned long (*intr_pending)(ctlr_info_t *h);
26 unsigned long (*command_completed)(ctlr_info_t *h);
27};
28typedef struct _drive_info_struct
29{
30 __u32 LunID;
31 int usage_count;
Mike Millerad2b9312005-07-28 01:07:31 -070032 struct request_queue *queue;
Linus Torvalds1da177e2005-04-16 15:20:36 -070033 sector_t nr_blocks;
34 int block_size;
35 int heads;
36 int sectors;
37 int cylinders;
Mike Millerddd47442005-09-13 01:25:22 -070038 int raid_level; /* set to -1 to indicate that
39 * the drive is not in use/configured
40 */
41 int busy_configuring; /*This is set when the drive is being removed
42 *to prevent it from being opened or it's queue
43 *from being started.
44 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070045} drive_info_struct;
46
47struct ctlr_info
48{
49 int ctlr;
50 char devname[8];
51 char *product_name;
52 char firm_ver[4]; // Firmware version
53 struct pci_dev *pdev;
54 __u32 board_id;
55 void __iomem *vaddr;
56 unsigned long paddr;
57 unsigned long io_mem_addr;
58 unsigned long io_mem_length;
59 CfgTable_struct __iomem *cfgtable;
60 unsigned int intr;
61 int interrupts_enabled;
62 int major;
63 int max_commands;
64 int commands_outstanding;
65 int max_outstanding; /* Debug */
66 int num_luns;
67 int highest_lun;
68 int usage_count; /* number of opens all all minor devices */
69
70 // information about each logical volume
71 drive_info_struct drv[CISS_MAX_LUN];
72
73 struct access_method access;
74
75 /* queue and queue Info */
76 CommandList_struct *reqQ;
77 CommandList_struct *cmpQ;
78 unsigned int Qdepth;
79 unsigned int maxQsinceinit;
80 unsigned int maxSG;
81 spinlock_t lock;
Linus Torvalds1da177e2005-04-16 15:20:36 -070082
83 //* pointers to command and error info pool */
84 CommandList_struct *cmd_pool;
85 dma_addr_t cmd_pool_dhandle;
86 ErrorInfo_struct *errinfo_pool;
87 dma_addr_t errinfo_pool_dhandle;
88 unsigned long *cmd_pool_bits;
89 int nr_allocs;
90 int nr_frees;
91 int busy_configuring;
Mike Miller1f8ef382005-09-13 01:25:21 -070092 int busy_initializing;
Linus Torvalds1da177e2005-04-16 15:20:36 -070093
94 /* This element holds the zero based queue number of the last
95 * queue to be started. It is used for fairness.
96 */
97 int next_to_run;
98
99 // Disk structures we need to pass back
100 struct gendisk *gendisk[NWD];
101#ifdef CONFIG_CISS_SCSI_TAPE
102 void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
103#endif
104};
105
106/* Defining the diffent access_menthods */
107/*
108 * Memory mapped FIFO interface (SMART 53xx cards)
109 */
110#define SA5_DOORBELL 0x20
111#define SA5_REQUEST_PORT_OFFSET 0x40
112#define SA5_REPLY_INTR_MASK_OFFSET 0x34
113#define SA5_REPLY_PORT_OFFSET 0x44
114#define SA5_INTR_STATUS 0x30
115#define SA5_SCRATCHPAD_OFFSET 0xB0
116
117#define SA5_CTCFG_OFFSET 0xB4
118#define SA5_CTMEM_OFFSET 0xB8
119
120#define SA5_INTR_OFF 0x08
121#define SA5B_INTR_OFF 0x04
122#define SA5_INTR_PENDING 0x08
123#define SA5B_INTR_PENDING 0x04
124#define FIFO_EMPTY 0xffffffff
125#define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
126
127#define CISS_ERROR_BIT 0x02
128
129#define CCISS_INTR_ON 1
130#define CCISS_INTR_OFF 0
131/*
132 Send the command to the hardware
133*/
134static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c)
135{
136#ifdef CCISS_DEBUG
137 printk("Sending %x - down to controller\n", c->busaddr );
138#endif /* CCISS_DEBUG */
139 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
140 h->commands_outstanding++;
141 if ( h->commands_outstanding > h->max_outstanding)
142 h->max_outstanding = h->commands_outstanding;
143}
144
145/*
146 * This card is the opposite of the other cards.
147 * 0 turns interrupts on...
148 * 0x08 turns them off...
149 */
150static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
151{
152 if (val)
153 { /* Turn interrupts on */
154 h->interrupts_enabled = 1;
155 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
156 } else /* Turn them off */
157 {
158 h->interrupts_enabled = 0;
159 writel( SA5_INTR_OFF,
160 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
161 }
162}
163/*
164 * This card is the opposite of the other cards.
165 * 0 turns interrupts on...
166 * 0x04 turns them off...
167 */
168static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
169{
170 if (val)
171 { /* Turn interrupts on */
172 h->interrupts_enabled = 1;
173 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
174 } else /* Turn them off */
175 {
176 h->interrupts_enabled = 0;
177 writel( SA5B_INTR_OFF,
178 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
179 }
180}
181/*
182 * Returns true if fifo is full.
183 *
184 */
185static unsigned long SA5_fifo_full(ctlr_info_t *h)
186{
187 if( h->commands_outstanding >= h->max_commands)
188 return(1);
189 else
190 return(0);
191
192}
193/*
194 * returns value read from hardware.
195 * returns FIFO_EMPTY if there is nothing to read
196 */
197static unsigned long SA5_completed(ctlr_info_t *h)
198{
199 unsigned long register_value
200 = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
201 if(register_value != FIFO_EMPTY)
202 {
203 h->commands_outstanding--;
204#ifdef CCISS_DEBUG
205 printk("cciss: Read %lx back from board\n", register_value);
206#endif /* CCISS_DEBUG */
207 }
208#ifdef CCISS_DEBUG
209 else
210 {
211 printk("cciss: FIFO Empty read\n");
212 }
213#endif
214 return ( register_value);
215
216}
217/*
218 * Returns true if an interrupt is pending..
219 */
220static unsigned long SA5_intr_pending(ctlr_info_t *h)
221{
222 unsigned long register_value =
223 readl(h->vaddr + SA5_INTR_STATUS);
224#ifdef CCISS_DEBUG
225 printk("cciss: intr_pending %lx\n", register_value);
226#endif /* CCISS_DEBUG */
227 if( register_value & SA5_INTR_PENDING)
228 return 1;
229 return 0 ;
230}
231
232/*
233 * Returns true if an interrupt is pending..
234 */
235static unsigned long SA5B_intr_pending(ctlr_info_t *h)
236{
237 unsigned long register_value =
238 readl(h->vaddr + SA5_INTR_STATUS);
239#ifdef CCISS_DEBUG
240 printk("cciss: intr_pending %lx\n", register_value);
241#endif /* CCISS_DEBUG */
242 if( register_value & SA5B_INTR_PENDING)
243 return 1;
244 return 0 ;
245}
246
247
248static struct access_method SA5_access = {
249 SA5_submit_command,
250 SA5_intr_mask,
251 SA5_fifo_full,
252 SA5_intr_pending,
253 SA5_completed,
254};
255
256static struct access_method SA5B_access = {
257 SA5_submit_command,
258 SA5B_intr_mask,
259 SA5_fifo_full,
260 SA5B_intr_pending,
261 SA5_completed,
262};
263
264struct board_type {
265 __u32 board_id;
266 char *product_name;
267 struct access_method *access;
268};
269
Mike Millerad2b9312005-07-28 01:07:31 -0700270#define CCISS_LOCK(i) (&hba[i]->lock)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271
272#endif /* CCISS_H */
273