Shreyas B. Prabhu | 7cba160 | 2014-12-10 00:26:52 +0530 | [diff] [blame] | 1 | #ifndef _ASM_POWERPC_CPUIDLE_H |
| 2 | #define _ASM_POWERPC_CPUIDLE_H |
| 3 | |
| 4 | #ifdef CONFIG_PPC_POWERNV |
| 5 | /* Used in powernv idle state management */ |
| 6 | #define PNV_THREAD_RUNNING 0 |
| 7 | #define PNV_THREAD_NAP 1 |
| 8 | #define PNV_THREAD_SLEEP 2 |
| 9 | #define PNV_THREAD_WINKLE 3 |
| 10 | #define PNV_CORE_IDLE_LOCK_BIT 0x100 |
| 11 | #define PNV_CORE_IDLE_THREAD_BITS 0x0FF |
| 12 | |
| 13 | #ifndef __ASSEMBLY__ |
| 14 | extern u32 pnv_fastsleep_workaround_at_entry[]; |
| 15 | extern u32 pnv_fastsleep_workaround_at_exit[]; |
Shreyas B. Prabhu | bcef83a | 2016-07-08 11:50:49 +0530 | [diff] [blame] | 16 | |
| 17 | extern u64 pnv_first_deep_stop_state; |
Shreyas B. Prabhu | 7cba160 | 2014-12-10 00:26:52 +0530 | [diff] [blame] | 18 | #endif |
| 19 | |
| 20 | #endif |
| 21 | |
Mahesh Salgaonkar | 98d8821 | 2016-08-05 17:34:04 +0530 | [diff] [blame] | 22 | /* Idle state entry routines */ |
| 23 | #ifdef CONFIG_PPC_P7_NAP |
| 24 | #define IDLE_STATE_ENTER_SEQ(IDLE_INST) \ |
| 25 | /* Magic NAP/SLEEP/WINKLE mode enter sequence */ \ |
| 26 | std r0,0(r1); \ |
| 27 | ptesync; \ |
| 28 | ld r0,0(r1); \ |
| 29 | 1: cmp cr0,r0,r0; \ |
| 30 | bne 1b; \ |
| 31 | IDLE_INST; \ |
| 32 | b . |
| 33 | #endif /* CONFIG_PPC_P7_NAP */ |
| 34 | |
Shreyas B. Prabhu | 7cba160 | 2014-12-10 00:26:52 +0530 | [diff] [blame] | 35 | #endif |