| Solomon Peachy | 0cdf50a | 2009-08-20 10:19:47 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This interface is used for compatibility with old U-boots *ONLY*. |
| 3 | * Please do not imitate or extend this. |
| 4 | */ |
| 5 | |
| 6 | /* |
| 7 | * Unfortunately, the ESTeem Hotfoot board uses a mangled version of |
| 8 | * ppcboot.h for historical reasons, and in the interest of having a |
| 9 | * mainline kernel boot on the production board+bootloader, this was the |
| 10 | * least-offensive solution. Please direct all flames to: |
| 11 | * |
| 12 | * Solomon Peachy <solomon@linux-wlan.com> |
| 13 | * |
| 14 | * (This header is identical to ppcboot.h except for the |
| 15 | * TARGET_HOTFOOT bits) |
| 16 | */ |
| 17 | |
| 18 | /* |
| 19 | * (C) Copyright 2000, 2001 |
| 20 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 21 | * |
| 22 | * This program is free software; you can redistribute it and/or |
| 23 | * modify it under the terms of the GNU General Public License as |
| 24 | * published by the Free Software Foundation; either version 2 of |
| 25 | * the License, or (at your option) any later version. |
| 26 | * |
| 27 | * This program is distributed in the hope that it will be useful, |
| 28 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 29 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 30 | * GNU General Public License for more details. |
| 31 | * |
| 32 | * You should have received a copy of the GNU General Public License |
| 33 | * along with this program; if not, write to the Free Software |
| 34 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 35 | * MA 02111-1307 USA |
| 36 | */ |
| 37 | |
| 38 | #ifndef __PPCBOOT_H__ |
| 39 | #define __PPCBOOT_H__ |
| 40 | |
| 41 | /* |
| 42 | * Board information passed to kernel from PPCBoot |
| 43 | * |
| 44 | * include/asm-ppc/ppcboot.h |
| 45 | */ |
| 46 | |
| 47 | #include "types.h" |
| 48 | |
| 49 | typedef struct bd_info { |
| 50 | unsigned long bi_memstart; /* start of DRAM memory */ |
| 51 | unsigned long bi_memsize; /* size of DRAM memory in bytes */ |
| 52 | unsigned long bi_flashstart; /* start of FLASH memory */ |
| 53 | unsigned long bi_flashsize; /* size of FLASH memory */ |
| 54 | unsigned long bi_flashoffset; /* reserved area for startup monitor */ |
| 55 | unsigned long bi_sramstart; /* start of SRAM memory */ |
| 56 | unsigned long bi_sramsize; /* size of SRAM memory */ |
| 57 | #if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\ |
| 58 | defined(TARGET_83xx) |
| 59 | unsigned long bi_immr_base; /* base of IMMR register */ |
| 60 | #endif |
| 61 | #if defined(TARGET_PPC_MPC52xx) |
| 62 | unsigned long bi_mbar_base; /* base of internal registers */ |
| 63 | #endif |
| 64 | unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ |
| 65 | unsigned long bi_ip_addr; /* IP Address */ |
| 66 | unsigned char bi_enetaddr[6]; /* Ethernet address */ |
| 67 | #if defined(TARGET_HOTFOOT) |
| 68 | /* second onboard ethernet port */ |
| 69 | unsigned char bi_enet1addr[6]; |
| 70 | #define HAVE_ENET1ADDR |
| 71 | #endif /* TARGET_HOOTFOOT */ |
| 72 | unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ |
| 73 | unsigned long bi_intfreq; /* Internal Freq, in MHz */ |
| 74 | unsigned long bi_busfreq; /* Bus Freq, in MHz */ |
| 75 | #if defined(TARGET_CPM2) |
| 76 | unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ |
| 77 | unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ |
| 78 | unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ |
| 79 | unsigned long bi_vco; /* VCO Out from PLL, in MHz */ |
| 80 | #endif |
| 81 | #if defined(TARGET_PPC_MPC52xx) |
| 82 | unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ |
| 83 | unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ |
| 84 | #endif |
| 85 | unsigned long bi_baudrate; /* Console Baudrate */ |
| 86 | #if defined(TARGET_4xx) |
| 87 | unsigned char bi_s_version[4]; /* Version of this structure */ |
| 88 | unsigned char bi_r_version[32]; /* Version of the ROM (IBM) */ |
| 89 | unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */ |
| 90 | unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */ |
| 91 | unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ |
| 92 | unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ |
| 93 | #endif |
| 94 | #if defined(TARGET_HOTFOOT) |
| 95 | unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */ |
| 96 | #endif |
| 97 | #if defined(TARGET_HYMOD) |
| 98 | hymod_conf_t bi_hymod_conf; /* hymod configuration information */ |
| 99 | #endif |
| 100 | #if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \ |
| 101 | defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1) |
| 102 | /* second onboard ethernet port */ |
| 103 | unsigned char bi_enet1addr[6]; |
| 104 | #define HAVE_ENET1ADDR |
| 105 | #endif |
| 106 | #if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \ |
| 107 | defined(TARGET_85xx) || defined(TARGET_HAS_ETH2) |
| 108 | /* third onboard ethernet ports */ |
| 109 | unsigned char bi_enet2addr[6]; |
| 110 | #define HAVE_ENET2ADDR |
| 111 | #endif |
| 112 | #if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3) |
| 113 | /* fourth onboard ethernet ports */ |
| 114 | unsigned char bi_enet3addr[6]; |
| 115 | #define HAVE_ENET3ADDR |
| 116 | #endif |
| 117 | #if defined(TARGET_HOTFOOT) |
| 118 | int bi_phynum[2]; /* Determines phy mapping */ |
| 119 | int bi_phymode[2]; /* Determines phy mode */ |
| 120 | #endif |
| 121 | #if defined(TARGET_4xx) |
| 122 | unsigned int bi_opbfreq; /* OB clock in Hz */ |
| 123 | int bi_iic_fast[2]; /* Use fast i2c mode */ |
| 124 | #endif |
| 125 | #if defined(TARGET_440GX) |
| 126 | int bi_phynum[4]; /* phy mapping */ |
| 127 | int bi_phymode[4]; /* phy mode */ |
| 128 | #endif |
| 129 | } bd_t; |
| 130 | |
| 131 | #define bi_tbfreq bi_intfreq |
| 132 | |
| 133 | #endif /* __PPCBOOT_H__ */ |