blob: 13403ee716da7fbcf184f30cdabae966c2001d75 [file] [log] [blame]
Vishal Verma5d0f6132013-03-04 18:40:58 -07001/*
2 * NVM Express device driver
Matthew Wilcox8757ad62014-04-11 10:37:39 -04003 * Copyright (c) 2011-2014, Intel Corporation.
Vishal Verma5d0f6132013-03-04 18:40:58 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
Vishal Verma5d0f6132013-03-04 18:40:58 -070013 */
14
15/*
16 * Refer to the SCSI-NVMe Translation spec for details on how
17 * each command is translated.
18 */
19
20#include <linux/nvme.h>
21#include <linux/bio.h>
22#include <linux/bitops.h>
23#include <linux/blkdev.h>
Keith Busch320a3822013-10-23 13:07:34 -060024#include <linux/compat.h>
Vishal Verma5d0f6132013-03-04 18:40:58 -070025#include <linux/delay.h>
26#include <linux/errno.h>
27#include <linux/fs.h>
28#include <linux/genhd.h>
29#include <linux/idr.h>
30#include <linux/init.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/kdev_t.h>
34#include <linux/kthread.h>
35#include <linux/kernel.h>
36#include <linux/mm.h>
37#include <linux/module.h>
38#include <linux/moduleparam.h>
39#include <linux/pci.h>
40#include <linux/poison.h>
41#include <linux/sched.h>
42#include <linux/slab.h>
43#include <linux/types.h>
Vishal Verma5d0f6132013-03-04 18:40:58 -070044#include <scsi/sg.h>
45#include <scsi/scsi.h>
46
47
48static int sg_version_num = 30534; /* 2 digits for each component */
49
50#define SNTI_TRANSLATION_SUCCESS 0
51#define SNTI_INTERNAL_ERROR 1
52
53/* VPD Page Codes */
54#define VPD_SUPPORTED_PAGES 0x00
55#define VPD_SERIAL_NUMBER 0x80
56#define VPD_DEVICE_IDENTIFIERS 0x83
57#define VPD_EXTENDED_INQUIRY 0x86
58#define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
59
60/* CDB offsets */
61#define REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET 6
62#define REPORT_LUNS_SR_OFFSET 2
63#define READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET 10
64#define REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET 4
65#define REQUEST_SENSE_DESC_OFFSET 1
66#define REQUEST_SENSE_DESC_MASK 0x01
67#define DESCRIPTOR_FORMAT_SENSE_DATA_TYPE 1
68#define INQUIRY_EVPD_BYTE_OFFSET 1
69#define INQUIRY_PAGE_CODE_BYTE_OFFSET 2
70#define INQUIRY_EVPD_BIT_MASK 1
71#define INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET 3
72#define START_STOP_UNIT_CDB_IMMED_OFFSET 1
73#define START_STOP_UNIT_CDB_IMMED_MASK 0x1
74#define START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET 3
75#define START_STOP_UNIT_CDB_POWER_COND_MOD_MASK 0xF
76#define START_STOP_UNIT_CDB_POWER_COND_OFFSET 4
77#define START_STOP_UNIT_CDB_POWER_COND_MASK 0xF0
78#define START_STOP_UNIT_CDB_NO_FLUSH_OFFSET 4
79#define START_STOP_UNIT_CDB_NO_FLUSH_MASK 0x4
80#define START_STOP_UNIT_CDB_START_OFFSET 4
81#define START_STOP_UNIT_CDB_START_MASK 0x1
82#define WRITE_BUFFER_CDB_MODE_OFFSET 1
83#define WRITE_BUFFER_CDB_MODE_MASK 0x1F
84#define WRITE_BUFFER_CDB_BUFFER_ID_OFFSET 2
85#define WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET 3
86#define WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET 6
87#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET 1
88#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK 0xC0
89#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT 6
90#define FORMAT_UNIT_CDB_LONG_LIST_OFFSET 1
91#define FORMAT_UNIT_CDB_LONG_LIST_MASK 0x20
92#define FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET 1
93#define FORMAT_UNIT_CDB_FORMAT_DATA_MASK 0x10
94#define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
95#define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
96#define FORMAT_UNIT_PROT_INT_OFFSET 3
97#define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
98#define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
Keith Buschec503732013-04-24 15:44:24 -060099#define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
Vishal Verma5d0f6132013-03-04 18:40:58 -0700100
101/* Misc. defines */
102#define NIBBLE_SHIFT 4
103#define FIXED_SENSE_DATA 0x70
104#define DESC_FORMAT_SENSE_DATA 0x72
105#define FIXED_SENSE_DATA_ADD_LENGTH 10
106#define LUN_ENTRY_SIZE 8
107#define LUN_DATA_HEADER_SIZE 8
108#define ALL_LUNS_RETURNED 0x02
109#define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
110#define RESTRICTED_LUNS_RETURNED 0x00
111#define NVME_POWER_STATE_START_VALID 0x00
112#define NVME_POWER_STATE_ACTIVE 0x01
113#define NVME_POWER_STATE_IDLE 0x02
114#define NVME_POWER_STATE_STANDBY 0x03
115#define NVME_POWER_STATE_LU_CONTROL 0x07
116#define POWER_STATE_0 0
117#define POWER_STATE_1 1
118#define POWER_STATE_2 2
119#define POWER_STATE_3 3
120#define DOWNLOAD_SAVE_ACTIVATE 0x05
121#define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
122#define ACTIVATE_DEFERRED_MICROCODE 0x0F
123#define FORMAT_UNIT_IMMED_MASK 0x2
124#define FORMAT_UNIT_IMMED_OFFSET 1
125#define KELVIN_TEMP_FACTOR 273
126#define FIXED_FMT_SENSE_DATA_SIZE 18
127#define DESC_FMT_SENSE_DATA_SIZE 8
128
129/* SCSI/NVMe defines and bit masks */
130#define INQ_STANDARD_INQUIRY_PAGE 0x00
131#define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
132#define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
133#define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
134#define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
135#define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
136#define INQ_SERIAL_NUMBER_LENGTH 0x14
137#define INQ_NUM_SUPPORTED_VPD_PAGES 5
138#define VERSION_SPC_4 0x06
139#define ACA_UNSUPPORTED 0
140#define STANDARD_INQUIRY_LENGTH 36
141#define ADDITIONAL_STD_INQ_LENGTH 31
142#define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
143#define RESERVED_FIELD 0
144
145/* SCSI READ/WRITE Defines */
146#define IO_CDB_WP_MASK 0xE0
147#define IO_CDB_WP_SHIFT 5
148#define IO_CDB_FUA_MASK 0x8
149#define IO_6_CDB_LBA_OFFSET 0
150#define IO_6_CDB_LBA_MASK 0x001FFFFF
151#define IO_6_CDB_TX_LEN_OFFSET 4
152#define IO_6_DEFAULT_TX_LEN 256
153#define IO_10_CDB_LBA_OFFSET 2
154#define IO_10_CDB_TX_LEN_OFFSET 7
155#define IO_10_CDB_WP_OFFSET 1
156#define IO_10_CDB_FUA_OFFSET 1
157#define IO_12_CDB_LBA_OFFSET 2
158#define IO_12_CDB_TX_LEN_OFFSET 6
159#define IO_12_CDB_WP_OFFSET 1
160#define IO_12_CDB_FUA_OFFSET 1
161#define IO_16_CDB_FUA_OFFSET 1
162#define IO_16_CDB_WP_OFFSET 1
163#define IO_16_CDB_LBA_OFFSET 2
164#define IO_16_CDB_TX_LEN_OFFSET 10
165
166/* Mode Sense/Select defines */
167#define MODE_PAGE_INFO_EXCEP 0x1C
168#define MODE_PAGE_CACHING 0x08
169#define MODE_PAGE_CONTROL 0x0A
170#define MODE_PAGE_POWER_CONDITION 0x1A
171#define MODE_PAGE_RETURN_ALL 0x3F
172#define MODE_PAGE_BLK_DES_LEN 0x08
173#define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
174#define MODE_PAGE_CACHING_LEN 0x14
175#define MODE_PAGE_CONTROL_LEN 0x0C
176#define MODE_PAGE_POW_CND_LEN 0x28
177#define MODE_PAGE_INF_EXC_LEN 0x0C
178#define MODE_PAGE_ALL_LEN 0x54
179#define MODE_SENSE6_MPH_SIZE 4
180#define MODE_SENSE6_ALLOC_LEN_OFFSET 4
181#define MODE_SENSE_PAGE_CONTROL_OFFSET 2
182#define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
183#define MODE_SENSE_PAGE_CODE_OFFSET 2
184#define MODE_SENSE_PAGE_CODE_MASK 0x3F
185#define MODE_SENSE_LLBAA_OFFSET 1
186#define MODE_SENSE_LLBAA_MASK 0x10
187#define MODE_SENSE_LLBAA_SHIFT 4
188#define MODE_SENSE_DBD_OFFSET 1
189#define MODE_SENSE_DBD_MASK 8
190#define MODE_SENSE_DBD_SHIFT 3
191#define MODE_SENSE10_MPH_SIZE 8
192#define MODE_SENSE10_ALLOC_LEN_OFFSET 7
193#define MODE_SELECT_CDB_PAGE_FORMAT_OFFSET 1
194#define MODE_SELECT_CDB_SAVE_PAGES_OFFSET 1
195#define MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET 4
196#define MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET 7
197#define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
198#define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
199#define MODE_SELECT_6_BD_OFFSET 3
200#define MODE_SELECT_10_BD_OFFSET 6
201#define MODE_SELECT_10_LLBAA_OFFSET 4
202#define MODE_SELECT_10_LLBAA_MASK 1
203#define MODE_SELECT_6_MPH_SIZE 4
204#define MODE_SELECT_10_MPH_SIZE 8
205#define CACHING_MODE_PAGE_WCE_MASK 0x04
206#define MODE_SENSE_BLK_DESC_ENABLED 0
207#define MODE_SENSE_BLK_DESC_COUNT 1
208#define MODE_SELECT_PAGE_CODE_MASK 0x3F
209#define SHORT_DESC_BLOCK 8
210#define LONG_DESC_BLOCK 16
211#define MODE_PAGE_POW_CND_LEN_FIELD 0x26
212#define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
213#define MODE_PAGE_CACHING_LEN_FIELD 0x12
214#define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
215#define MODE_SENSE_PC_CURRENT_VALUES 0
216
217/* Log Sense defines */
218#define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
219#define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
220#define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
221#define LOG_PAGE_TEMPERATURE_PAGE 0x0D
222#define LOG_SENSE_CDB_SP_OFFSET 1
223#define LOG_SENSE_CDB_SP_NOT_ENABLED 0
224#define LOG_SENSE_CDB_PC_OFFSET 2
225#define LOG_SENSE_CDB_PC_MASK 0xC0
226#define LOG_SENSE_CDB_PC_SHIFT 6
227#define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
228#define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
229#define LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET 7
230#define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
231#define LOG_INFO_EXCP_PAGE_LENGTH 0xC
232#define REMAINING_TEMP_PAGE_LENGTH 0xC
233#define LOG_TEMP_PAGE_LENGTH 0x10
234#define LOG_TEMP_UNKNOWN 0xFF
235#define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
236
237/* Read Capacity defines */
238#define READ_CAP_10_RESP_SIZE 8
239#define READ_CAP_16_RESP_SIZE 32
240
241/* NVMe Namespace and Command Defines */
242#define NVME_GET_SMART_LOG_PAGE 0x02
Vishal Verma5d0f6132013-03-04 18:40:58 -0700243#define BYTES_TO_DWORDS 4
244#define NVME_MAX_FIRMWARE_SLOT 7
245
246/* Report LUNs defines */
247#define REPORT_LUNS_FIRST_LUN_OFFSET 8
248
249/* SCSI ADDITIONAL SENSE Codes */
250
251#define SCSI_ASC_NO_SENSE 0x00
252#define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
253#define SCSI_ASC_LUN_NOT_READY 0x04
254#define SCSI_ASC_WARNING 0x0B
255#define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
256#define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
257#define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
258#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
259#define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
260#define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
261#define SCSI_ASC_ILLEGAL_COMMAND 0x20
262#define SCSI_ASC_ILLEGAL_BLOCK 0x21
263#define SCSI_ASC_INVALID_CDB 0x24
264#define SCSI_ASC_INVALID_LUN 0x25
265#define SCSI_ASC_INVALID_PARAMETER 0x26
266#define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
267#define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
268
269/* SCSI ADDITIONAL SENSE Code Qualifiers */
270
271#define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
272#define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
273#define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
274#define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
275#define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
276#define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
277#define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
278#define SCSI_ASCQ_INVALID_LUN_ID 0x09
279
280/**
281 * DEVICE_SPECIFIC_PARAMETER in mode parameter header (see sbc2r16) to
282 * enable DPOFUA support type 0x10 value.
283 */
284#define DEVICE_SPECIFIC_PARAMETER 0
285#define VPD_ID_DESCRIPTOR_LENGTH sizeof(VPD_IDENTIFICATION_DESCRIPTOR)
286
287/* MACROs to extract information from CDBs */
288
289#define GET_OPCODE(cdb) cdb[0]
290
291#define GET_U8_FROM_CDB(cdb, index) (cdb[index] << 0)
292
293#define GET_U16_FROM_CDB(cdb, index) ((cdb[index] << 8) | (cdb[index + 1] << 0))
294
295#define GET_U24_FROM_CDB(cdb, index) ((cdb[index] << 16) | \
296(cdb[index + 1] << 8) | \
297(cdb[index + 2] << 0))
298
299#define GET_U32_FROM_CDB(cdb, index) ((cdb[index] << 24) | \
300(cdb[index + 1] << 16) | \
301(cdb[index + 2] << 8) | \
302(cdb[index + 3] << 0))
303
304#define GET_U64_FROM_CDB(cdb, index) ((((u64)cdb[index]) << 56) | \
305(((u64)cdb[index + 1]) << 48) | \
306(((u64)cdb[index + 2]) << 40) | \
307(((u64)cdb[index + 3]) << 32) | \
308(((u64)cdb[index + 4]) << 24) | \
309(((u64)cdb[index + 5]) << 16) | \
310(((u64)cdb[index + 6]) << 8) | \
311(((u64)cdb[index + 7]) << 0))
312
313/* Inquiry Helper Macros */
314#define GET_INQ_EVPD_BIT(cdb) \
315((GET_U8_FROM_CDB(cdb, INQUIRY_EVPD_BYTE_OFFSET) & \
316INQUIRY_EVPD_BIT_MASK) ? 1 : 0)
317
318#define GET_INQ_PAGE_CODE(cdb) \
319(GET_U8_FROM_CDB(cdb, INQUIRY_PAGE_CODE_BYTE_OFFSET))
320
321#define GET_INQ_ALLOC_LENGTH(cdb) \
322(GET_U16_FROM_CDB(cdb, INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET))
323
324/* Report LUNs Helper Macros */
325#define GET_REPORT_LUNS_ALLOC_LENGTH(cdb) \
326(GET_U32_FROM_CDB(cdb, REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET))
327
328/* Read Capacity Helper Macros */
329#define GET_READ_CAP_16_ALLOC_LENGTH(cdb) \
330(GET_U32_FROM_CDB(cdb, READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET))
331
332#define IS_READ_CAP_16(cdb) \
333((cdb[0] == SERVICE_ACTION_IN && cdb[1] == SAI_READ_CAPACITY_16) ? 1 : 0)
334
335/* Request Sense Helper Macros */
336#define GET_REQUEST_SENSE_ALLOC_LENGTH(cdb) \
337(GET_U8_FROM_CDB(cdb, REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET))
338
339/* Mode Sense Helper Macros */
340#define GET_MODE_SENSE_DBD(cdb) \
341((GET_U8_FROM_CDB(cdb, MODE_SENSE_DBD_OFFSET) & MODE_SENSE_DBD_MASK) >> \
342MODE_SENSE_DBD_SHIFT)
343
344#define GET_MODE_SENSE_LLBAA(cdb) \
345((GET_U8_FROM_CDB(cdb, MODE_SENSE_LLBAA_OFFSET) & \
346MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT)
347
348#define GET_MODE_SENSE_MPH_SIZE(cdb10) \
349(cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE)
350
351
352/* Struct to gather data that needs to be extracted from a SCSI CDB.
353 Not conforming to any particular CDB variant, but compatible with all. */
354
355struct nvme_trans_io_cdb {
356 u8 fua;
357 u8 prot_info;
358 u64 lba;
359 u32 xfer_len;
360};
361
362
363/* Internal Helper Functions */
364
365
366/* Copy data to userspace memory */
367
368static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
369 unsigned long n)
370{
371 int res = SNTI_TRANSLATION_SUCCESS;
372 unsigned long not_copied;
373 int i;
374 void *index = from;
375 size_t remaining = n;
376 size_t xfer_len;
377
378 if (hdr->iovec_count > 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600379 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700380
381 for (i = 0; i < hdr->iovec_count; i++) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600382 not_copied = copy_from_user(&sgl, hdr->dxferp +
383 i * sizeof(struct sg_iovec),
384 sizeof(struct sg_iovec));
385 if (not_copied)
386 return -EFAULT;
387 xfer_len = min(remaining, sgl.iov_len);
388 not_copied = copy_to_user(sgl.iov_base, index,
Vishal Verma5d0f6132013-03-04 18:40:58 -0700389 xfer_len);
390 if (not_copied) {
391 res = -EFAULT;
392 break;
393 }
394 index += xfer_len;
395 remaining -= xfer_len;
396 if (remaining == 0)
397 break;
398 }
399 return res;
400 }
Vishal Verma8741ee42013-04-04 17:52:27 -0600401 not_copied = copy_to_user(hdr->dxferp, from, n);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700402 if (not_copied)
403 res = -EFAULT;
404 return res;
405}
406
407/* Copy data from userspace memory */
408
409static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
410 unsigned long n)
411{
412 int res = SNTI_TRANSLATION_SUCCESS;
413 unsigned long not_copied;
414 int i;
415 void *index = to;
416 size_t remaining = n;
417 size_t xfer_len;
418
419 if (hdr->iovec_count > 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600420 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -0700421
422 for (i = 0; i < hdr->iovec_count; i++) {
Vishal Verma8741ee42013-04-04 17:52:27 -0600423 not_copied = copy_from_user(&sgl, hdr->dxferp +
424 i * sizeof(struct sg_iovec),
425 sizeof(struct sg_iovec));
426 if (not_copied)
427 return -EFAULT;
428 xfer_len = min(remaining, sgl.iov_len);
429 not_copied = copy_from_user(index, sgl.iov_base,
430 xfer_len);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700431 if (not_copied) {
432 res = -EFAULT;
433 break;
434 }
435 index += xfer_len;
436 remaining -= xfer_len;
437 if (remaining == 0)
438 break;
439 }
440 return res;
441 }
442
Vishal Verma8741ee42013-04-04 17:52:27 -0600443 not_copied = copy_from_user(to, hdr->dxferp, n);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700444 if (not_copied)
445 res = -EFAULT;
446 return res;
447}
448
449/* Status/Sense Buffer Writeback */
450
451static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
452 u8 asc, u8 ascq)
453{
454 int res = SNTI_TRANSLATION_SUCCESS;
455 u8 xfer_len;
456 u8 resp[DESC_FMT_SENSE_DATA_SIZE];
457
458 if (scsi_status_is_good(status)) {
459 hdr->status = SAM_STAT_GOOD;
460 hdr->masked_status = GOOD;
461 hdr->host_status = DID_OK;
462 hdr->driver_status = DRIVER_OK;
463 hdr->sb_len_wr = 0;
464 } else {
465 hdr->status = status;
466 hdr->masked_status = status >> 1;
467 hdr->host_status = DID_OK;
468 hdr->driver_status = DRIVER_OK;
469
470 memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
471 resp[0] = DESC_FORMAT_SENSE_DATA;
472 resp[1] = sense_key;
473 resp[2] = asc;
474 resp[3] = ascq;
475
476 xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
477 hdr->sb_len_wr = xfer_len;
Vishal Verma8741ee42013-04-04 17:52:27 -0600478 if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
Vishal Verma5d0f6132013-03-04 18:40:58 -0700479 res = -EFAULT;
480 }
481
482 return res;
483}
484
485static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
486{
487 u8 status, sense_key, asc, ascq;
488 int res = SNTI_TRANSLATION_SUCCESS;
489
490 /* For non-nvme (Linux) errors, simply return the error code */
491 if (nvme_sc < 0)
492 return nvme_sc;
493
494 /* Mask DNR, More, and reserved fields */
495 nvme_sc &= 0x7FF;
496
497 switch (nvme_sc) {
498 /* Generic Command Status */
499 case NVME_SC_SUCCESS:
500 status = SAM_STAT_GOOD;
501 sense_key = NO_SENSE;
502 asc = SCSI_ASC_NO_SENSE;
503 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
504 break;
505 case NVME_SC_INVALID_OPCODE:
506 status = SAM_STAT_CHECK_CONDITION;
507 sense_key = ILLEGAL_REQUEST;
508 asc = SCSI_ASC_ILLEGAL_COMMAND;
509 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
510 break;
511 case NVME_SC_INVALID_FIELD:
512 status = SAM_STAT_CHECK_CONDITION;
513 sense_key = ILLEGAL_REQUEST;
514 asc = SCSI_ASC_INVALID_CDB;
515 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
516 break;
517 case NVME_SC_DATA_XFER_ERROR:
518 status = SAM_STAT_CHECK_CONDITION;
519 sense_key = MEDIUM_ERROR;
520 asc = SCSI_ASC_NO_SENSE;
521 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
522 break;
523 case NVME_SC_POWER_LOSS:
524 status = SAM_STAT_TASK_ABORTED;
525 sense_key = ABORTED_COMMAND;
526 asc = SCSI_ASC_WARNING;
527 ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
528 break;
529 case NVME_SC_INTERNAL:
530 status = SAM_STAT_CHECK_CONDITION;
531 sense_key = HARDWARE_ERROR;
532 asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
533 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
534 break;
535 case NVME_SC_ABORT_REQ:
536 status = SAM_STAT_TASK_ABORTED;
537 sense_key = ABORTED_COMMAND;
538 asc = SCSI_ASC_NO_SENSE;
539 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
540 break;
541 case NVME_SC_ABORT_QUEUE:
542 status = SAM_STAT_TASK_ABORTED;
543 sense_key = ABORTED_COMMAND;
544 asc = SCSI_ASC_NO_SENSE;
545 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
546 break;
547 case NVME_SC_FUSED_FAIL:
548 status = SAM_STAT_TASK_ABORTED;
549 sense_key = ABORTED_COMMAND;
550 asc = SCSI_ASC_NO_SENSE;
551 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
552 break;
553 case NVME_SC_FUSED_MISSING:
554 status = SAM_STAT_TASK_ABORTED;
555 sense_key = ABORTED_COMMAND;
556 asc = SCSI_ASC_NO_SENSE;
557 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
558 break;
559 case NVME_SC_INVALID_NS:
560 status = SAM_STAT_CHECK_CONDITION;
561 sense_key = ILLEGAL_REQUEST;
562 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
563 ascq = SCSI_ASCQ_INVALID_LUN_ID;
564 break;
565 case NVME_SC_LBA_RANGE:
566 status = SAM_STAT_CHECK_CONDITION;
567 sense_key = ILLEGAL_REQUEST;
568 asc = SCSI_ASC_ILLEGAL_BLOCK;
569 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
570 break;
571 case NVME_SC_CAP_EXCEEDED:
572 status = SAM_STAT_CHECK_CONDITION;
573 sense_key = MEDIUM_ERROR;
574 asc = SCSI_ASC_NO_SENSE;
575 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
576 break;
577 case NVME_SC_NS_NOT_READY:
578 status = SAM_STAT_CHECK_CONDITION;
579 sense_key = NOT_READY;
580 asc = SCSI_ASC_LUN_NOT_READY;
581 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
582 break;
583
584 /* Command Specific Status */
585 case NVME_SC_INVALID_FORMAT:
586 status = SAM_STAT_CHECK_CONDITION;
587 sense_key = ILLEGAL_REQUEST;
588 asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
589 ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
590 break;
591 case NVME_SC_BAD_ATTRIBUTES:
592 status = SAM_STAT_CHECK_CONDITION;
593 sense_key = ILLEGAL_REQUEST;
594 asc = SCSI_ASC_INVALID_CDB;
595 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
596 break;
597
598 /* Media Errors */
599 case NVME_SC_WRITE_FAULT:
600 status = SAM_STAT_CHECK_CONDITION;
601 sense_key = MEDIUM_ERROR;
602 asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
603 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
604 break;
605 case NVME_SC_READ_ERROR:
606 status = SAM_STAT_CHECK_CONDITION;
607 sense_key = MEDIUM_ERROR;
608 asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
609 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
610 break;
611 case NVME_SC_GUARD_CHECK:
612 status = SAM_STAT_CHECK_CONDITION;
613 sense_key = MEDIUM_ERROR;
614 asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
615 ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
616 break;
617 case NVME_SC_APPTAG_CHECK:
618 status = SAM_STAT_CHECK_CONDITION;
619 sense_key = MEDIUM_ERROR;
620 asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
621 ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
622 break;
623 case NVME_SC_REFTAG_CHECK:
624 status = SAM_STAT_CHECK_CONDITION;
625 sense_key = MEDIUM_ERROR;
626 asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
627 ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
628 break;
629 case NVME_SC_COMPARE_FAILED:
630 status = SAM_STAT_CHECK_CONDITION;
631 sense_key = MISCOMPARE;
632 asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
633 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
634 break;
635 case NVME_SC_ACCESS_DENIED:
636 status = SAM_STAT_CHECK_CONDITION;
637 sense_key = ILLEGAL_REQUEST;
638 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
639 ascq = SCSI_ASCQ_INVALID_LUN_ID;
640 break;
641
642 /* Unspecified/Default */
643 case NVME_SC_CMDID_CONFLICT:
644 case NVME_SC_CMD_SEQ_ERROR:
645 case NVME_SC_CQ_INVALID:
646 case NVME_SC_QID_INVALID:
647 case NVME_SC_QUEUE_SIZE:
648 case NVME_SC_ABORT_LIMIT:
649 case NVME_SC_ABORT_MISSING:
650 case NVME_SC_ASYNC_LIMIT:
651 case NVME_SC_FIRMWARE_SLOT:
652 case NVME_SC_FIRMWARE_IMAGE:
653 case NVME_SC_INVALID_VECTOR:
654 case NVME_SC_INVALID_LOG_PAGE:
655 default:
656 status = SAM_STAT_CHECK_CONDITION;
657 sense_key = ILLEGAL_REQUEST;
658 asc = SCSI_ASC_NO_SENSE;
659 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
660 break;
661 }
662
663 res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
664
665 return res;
666}
667
668/* INQUIRY Helper Functions */
669
670static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
671 struct sg_io_hdr *hdr, u8 *inq_response,
672 int alloc_len)
673{
674 struct nvme_dev *dev = ns->dev;
675 dma_addr_t dma_addr;
676 void *mem;
677 struct nvme_id_ns *id_ns;
678 int res = SNTI_TRANSLATION_SUCCESS;
679 int nvme_sc;
680 int xfer_len;
681 u8 resp_data_format = 0x02;
682 u8 protect;
683 u8 cmdque = 0x01 << 1;
684
685 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
686 &dma_addr, GFP_KERNEL);
687 if (mem == NULL) {
688 res = -ENOMEM;
689 goto out_dma;
690 }
691
692 /* nvme ns identify - use DPS value for PROTECT field */
693 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
694 res = nvme_trans_status_code(hdr, nvme_sc);
695 /*
696 * If nvme_sc was -ve, res will be -ve here.
697 * If nvme_sc was +ve, the status would bace been translated, and res
698 * can only be 0 or -ve.
699 * - If 0 && nvme_sc > 0, then go into next if where res gets nvme_sc
700 * - If -ve, return because its a Linux error.
701 */
702 if (res)
703 goto out_free;
704 if (nvme_sc) {
705 res = nvme_sc;
706 goto out_free;
707 }
708 id_ns = mem;
709 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
710
711 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
712 inq_response[2] = VERSION_SPC_4;
713 inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
714 inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
715 inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
716 inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
717 strncpy(&inq_response[8], "NVMe ", 8);
718 strncpy(&inq_response[16], dev->model, 16);
719 strncpy(&inq_response[32], dev->firmware_rev, 4);
720
721 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
722 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
723
724 out_free:
725 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
726 dma_addr);
727 out_dma:
728 return res;
729}
730
731static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
732 struct sg_io_hdr *hdr, u8 *inq_response,
733 int alloc_len)
734{
735 int res = SNTI_TRANSLATION_SUCCESS;
736 int xfer_len;
737
738 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
739 inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
740 inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
741 inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
742 inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
743 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
744 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
745 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
746
747 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
748 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
749
750 return res;
751}
752
753static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
754 struct sg_io_hdr *hdr, u8 *inq_response,
755 int alloc_len)
756{
757 struct nvme_dev *dev = ns->dev;
758 int res = SNTI_TRANSLATION_SUCCESS;
759 int xfer_len;
760
761 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
762 inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
763 inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
764 strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
765
766 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
767 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
768
769 return res;
770}
771
772static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
773 u8 *inq_response, int alloc_len)
774{
775 struct nvme_dev *dev = ns->dev;
776 dma_addr_t dma_addr;
777 void *mem;
778 struct nvme_id_ctrl *id_ctrl;
779 int res = SNTI_TRANSLATION_SUCCESS;
780 int nvme_sc;
781 u8 ieee[4];
782 int xfer_len;
Vishal Verma8741ee42013-04-04 17:52:27 -0600783 __be32 tmp_id = cpu_to_be32(ns->ns_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700784
785 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
786 &dma_addr, GFP_KERNEL);
787 if (mem == NULL) {
788 res = -ENOMEM;
789 goto out_dma;
790 }
791
792 /* nvme controller identify */
793 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
794 res = nvme_trans_status_code(hdr, nvme_sc);
795 if (res)
796 goto out_free;
797 if (nvme_sc) {
798 res = nvme_sc;
799 goto out_free;
800 }
801 id_ctrl = mem;
802
803 /* Since SCSI tried to save 4 bits... [SPC-4(r34) Table 591] */
804 ieee[0] = id_ctrl->ieee[0] << 4;
805 ieee[1] = id_ctrl->ieee[0] >> 4 | id_ctrl->ieee[1] << 4;
806 ieee[2] = id_ctrl->ieee[1] >> 4 | id_ctrl->ieee[2] << 4;
807 ieee[3] = id_ctrl->ieee[2] >> 4;
808
809 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
810 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
811 inq_response[3] = 20; /* Page Length */
812 /* Designation Descriptor start */
813 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
814 inq_response[5] = 0x03; /* PIV=0b | Asso=00b | Designator Type=3h */
815 inq_response[6] = 0x00; /* Rsvd */
816 inq_response[7] = 16; /* Designator Length */
817 /* Designator start */
818 inq_response[8] = 0x60 | ieee[3]; /* NAA=6h | IEEE ID MSB, High nibble*/
819 inq_response[9] = ieee[2]; /* IEEE ID */
820 inq_response[10] = ieee[1]; /* IEEE ID */
821 inq_response[11] = ieee[0]; /* IEEE ID| Vendor Specific ID... */
822 inq_response[12] = (dev->pci_dev->vendor & 0xFF00) >> 8;
823 inq_response[13] = (dev->pci_dev->vendor & 0x00FF);
824 inq_response[14] = dev->serial[0];
825 inq_response[15] = dev->serial[1];
826 inq_response[16] = dev->model[0];
827 inq_response[17] = dev->model[1];
828 memcpy(&inq_response[18], &tmp_id, sizeof(u32));
829 /* Last 2 bytes are zero */
830
831 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
832 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
833
834 out_free:
835 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
836 dma_addr);
837 out_dma:
838 return res;
839}
840
841static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
842 int alloc_len)
843{
844 u8 *inq_response;
845 int res = SNTI_TRANSLATION_SUCCESS;
846 int nvme_sc;
847 struct nvme_dev *dev = ns->dev;
848 dma_addr_t dma_addr;
849 void *mem;
850 struct nvme_id_ctrl *id_ctrl;
851 struct nvme_id_ns *id_ns;
852 int xfer_len;
853 u8 microcode = 0x80;
854 u8 spt;
855 u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
856 u8 grd_chk, app_chk, ref_chk, protect;
857 u8 uask_sup = 0x20;
858 u8 v_sup;
859 u8 luiclr = 0x01;
860
861 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
862 if (inq_response == NULL) {
863 res = -ENOMEM;
864 goto out_mem;
865 }
866
867 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
868 &dma_addr, GFP_KERNEL);
869 if (mem == NULL) {
870 res = -ENOMEM;
871 goto out_dma;
872 }
873
874 /* nvme ns identify */
875 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
876 res = nvme_trans_status_code(hdr, nvme_sc);
877 if (res)
878 goto out_free;
879 if (nvme_sc) {
880 res = nvme_sc;
881 goto out_free;
882 }
883 id_ns = mem;
884 spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
885 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
886 grd_chk = protect << 2;
887 app_chk = protect << 1;
888 ref_chk = protect;
889
890 /* nvme controller identify */
891 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
892 res = nvme_trans_status_code(hdr, nvme_sc);
893 if (res)
894 goto out_free;
895 if (nvme_sc) {
896 res = nvme_sc;
897 goto out_free;
898 }
899 id_ctrl = mem;
900 v_sup = id_ctrl->vwc;
901
902 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
903 inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
904 inq_response[2] = 0x00; /* Page Length MSB */
905 inq_response[3] = 0x3C; /* Page Length LSB */
906 inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
907 inq_response[5] = uask_sup;
908 inq_response[6] = v_sup;
909 inq_response[7] = luiclr;
910 inq_response[8] = 0;
911 inq_response[9] = 0;
912
913 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
914 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
915
916 out_free:
917 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
918 dma_addr);
919 out_dma:
920 kfree(inq_response);
921 out_mem:
922 return res;
923}
924
925static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
926 int alloc_len)
927{
928 u8 *inq_response;
929 int res = SNTI_TRANSLATION_SUCCESS;
930 int xfer_len;
931
Tushar Behera03ea83e2013-06-10 10:20:55 +0530932 inq_response = kzalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700933 if (inq_response == NULL) {
934 res = -ENOMEM;
935 goto out_mem;
936 }
937
Vishal Verma5d0f6132013-03-04 18:40:58 -0700938 inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
939 inq_response[2] = 0x00; /* Page Length MSB */
940 inq_response[3] = 0x3C; /* Page Length LSB */
941 inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
942 inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
943 inq_response[6] = 0x00; /* Form Factor */
944
945 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
946 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
947
948 kfree(inq_response);
949 out_mem:
950 return res;
951}
952
953/* LOG SENSE Helper Functions */
954
955static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
956 int alloc_len)
957{
958 int res = SNTI_TRANSLATION_SUCCESS;
959 int xfer_len;
960 u8 *log_response;
961
Tushar Behera03ea83e2013-06-10 10:20:55 +0530962 log_response = kzalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700963 if (log_response == NULL) {
964 res = -ENOMEM;
965 goto out_mem;
966 }
Vishal Verma5d0f6132013-03-04 18:40:58 -0700967
968 log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
969 /* Subpage=0x00, Page Length MSB=0 */
970 log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
971 log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
972 log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
973 log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
974
975 xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
976 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
977
978 kfree(log_response);
979 out_mem:
980 return res;
981}
982
983static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
984 struct sg_io_hdr *hdr, int alloc_len)
985{
986 int res = SNTI_TRANSLATION_SUCCESS;
987 int xfer_len;
988 u8 *log_response;
989 struct nvme_command c;
990 struct nvme_dev *dev = ns->dev;
991 struct nvme_smart_log *smart_log;
992 dma_addr_t dma_addr;
993 void *mem;
994 u8 temp_c;
995 u16 temp_k;
996
Tushar Behera03ea83e2013-06-10 10:20:55 +0530997 log_response = kzalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -0700998 if (log_response == NULL) {
999 res = -ENOMEM;
1000 goto out_mem;
1001 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001002
1003 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1004 sizeof(struct nvme_smart_log),
1005 &dma_addr, GFP_KERNEL);
1006 if (mem == NULL) {
1007 res = -ENOMEM;
1008 goto out_dma;
1009 }
1010
1011 /* Get SMART Log Page */
1012 memset(&c, 0, sizeof(c));
1013 c.common.opcode = nvme_admin_get_log_page;
1014 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1015 c.common.prp1 = cpu_to_le64(dma_addr);
Indraneel Mukherjee4131f2f2014-05-29 12:02:03 +05301016 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
1017 BYTES_TO_DWORDS) - 1) << 16) | NVME_GET_SMART_LOG_PAGE);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001018 res = nvme_submit_admin_cmd(dev, &c, NULL);
1019 if (res != NVME_SC_SUCCESS) {
1020 temp_c = LOG_TEMP_UNKNOWN;
1021 } else {
1022 smart_log = mem;
1023 temp_k = (smart_log->temperature[1] << 8) +
1024 (smart_log->temperature[0]);
1025 temp_c = temp_k - KELVIN_TEMP_FACTOR;
1026 }
1027
1028 log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
1029 /* Subpage=0x00, Page Length MSB=0 */
1030 log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
1031 /* Informational Exceptions Log Parameter 1 Start */
1032 /* Parameter Code=0x0000 bytes 4,5 */
1033 log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
1034 log_response[7] = 0x04; /* PARAMETER LENGTH */
1035 /* Add sense Code and qualifier = 0x00 each */
1036 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1037 log_response[10] = temp_c;
1038
1039 xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
1040 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1041
1042 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1043 mem, dma_addr);
1044 out_dma:
1045 kfree(log_response);
1046 out_mem:
1047 return res;
1048}
1049
1050static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1051 int alloc_len)
1052{
1053 int res = SNTI_TRANSLATION_SUCCESS;
1054 int xfer_len;
1055 u8 *log_response;
1056 struct nvme_command c;
1057 struct nvme_dev *dev = ns->dev;
1058 struct nvme_smart_log *smart_log;
1059 dma_addr_t dma_addr;
1060 void *mem;
1061 u32 feature_resp;
1062 u8 temp_c_cur, temp_c_thresh;
1063 u16 temp_k;
1064
Tushar Behera03ea83e2013-06-10 10:20:55 +05301065 log_response = kzalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001066 if (log_response == NULL) {
1067 res = -ENOMEM;
1068 goto out_mem;
1069 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001070
1071 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1072 sizeof(struct nvme_smart_log),
1073 &dma_addr, GFP_KERNEL);
1074 if (mem == NULL) {
1075 res = -ENOMEM;
1076 goto out_dma;
1077 }
1078
1079 /* Get SMART Log Page */
1080 memset(&c, 0, sizeof(c));
1081 c.common.opcode = nvme_admin_get_log_page;
1082 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1083 c.common.prp1 = cpu_to_le64(dma_addr);
Indraneel Mukherjee4131f2f2014-05-29 12:02:03 +05301084 c.common.cdw10[0] = cpu_to_le32((((sizeof(struct nvme_smart_log) /
1085 BYTES_TO_DWORDS) - 1) << 16) | NVME_GET_SMART_LOG_PAGE);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001086 res = nvme_submit_admin_cmd(dev, &c, NULL);
1087 if (res != NVME_SC_SUCCESS) {
1088 temp_c_cur = LOG_TEMP_UNKNOWN;
1089 } else {
1090 smart_log = mem;
1091 temp_k = (smart_log->temperature[1] << 8) +
1092 (smart_log->temperature[0]);
1093 temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
1094 }
1095
1096 /* Get Features for Temp Threshold */
1097 res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
1098 &feature_resp);
1099 if (res != NVME_SC_SUCCESS)
1100 temp_c_thresh = LOG_TEMP_UNKNOWN;
1101 else
1102 temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
1103
1104 log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
1105 /* Subpage=0x00, Page Length MSB=0 */
1106 log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
1107 /* Temperature Log Parameter 1 (Temperature) Start */
1108 /* Parameter Code = 0x0000 */
1109 log_response[6] = 0x01; /* Format and Linking = 01b */
1110 log_response[7] = 0x02; /* Parameter Length */
1111 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1112 log_response[9] = temp_c_cur;
1113 /* Temperature Log Parameter 2 (Reference Temperature) Start */
1114 log_response[11] = 0x01; /* Parameter Code = 0x0001 */
1115 log_response[12] = 0x01; /* Format and Linking = 01b */
1116 log_response[13] = 0x02; /* Parameter Length */
1117 /* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
1118 log_response[15] = temp_c_thresh;
1119
1120 xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
1121 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1122
1123 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1124 mem, dma_addr);
1125 out_dma:
1126 kfree(log_response);
1127 out_mem:
1128 return res;
1129}
1130
1131/* MODE SENSE Helper Functions */
1132
1133static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
1134 u16 mode_data_length, u16 blk_desc_len)
1135{
1136 /* Quick check to make sure I don't stomp on my own memory... */
1137 if ((cdb10 && len < 8) || (!cdb10 && len < 4))
1138 return SNTI_INTERNAL_ERROR;
1139
1140 if (cdb10) {
1141 resp[0] = (mode_data_length & 0xFF00) >> 8;
1142 resp[1] = (mode_data_length & 0x00FF);
1143 /* resp[2] and [3] are zero */
1144 resp[4] = llbaa;
1145 resp[5] = RESERVED_FIELD;
1146 resp[6] = (blk_desc_len & 0xFF00) >> 8;
1147 resp[7] = (blk_desc_len & 0x00FF);
1148 } else {
1149 resp[0] = (mode_data_length & 0x00FF);
1150 /* resp[1] and [2] are zero */
1151 resp[3] = (blk_desc_len & 0x00FF);
1152 }
1153
1154 return SNTI_TRANSLATION_SUCCESS;
1155}
1156
1157static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1158 u8 *resp, int len, u8 llbaa)
1159{
1160 int res = SNTI_TRANSLATION_SUCCESS;
1161 int nvme_sc;
1162 struct nvme_dev *dev = ns->dev;
1163 dma_addr_t dma_addr;
1164 void *mem;
1165 struct nvme_id_ns *id_ns;
1166 u8 flbas;
1167 u32 lba_length;
1168
1169 if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
1170 return SNTI_INTERNAL_ERROR;
1171 else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
1172 return SNTI_INTERNAL_ERROR;
1173
1174 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1175 &dma_addr, GFP_KERNEL);
1176 if (mem == NULL) {
1177 res = -ENOMEM;
1178 goto out;
1179 }
1180
1181 /* nvme ns identify */
1182 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1183 res = nvme_trans_status_code(hdr, nvme_sc);
1184 if (res)
1185 goto out_dma;
1186 if (nvme_sc) {
1187 res = nvme_sc;
1188 goto out_dma;
1189 }
1190 id_ns = mem;
1191 flbas = (id_ns->flbas) & 0x0F;
1192 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1193
1194 if (llbaa == 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -06001195 __be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
Vishal Verma5d0f6132013-03-04 18:40:58 -07001196 /* Byte 4 is reserved */
Vishal Verma8741ee42013-04-04 17:52:27 -06001197 __be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001198
1199 memcpy(resp, &tmp_cap, sizeof(u32));
1200 memcpy(&resp[4], &tmp_len, sizeof(u32));
1201 } else {
Vishal Verma8741ee42013-04-04 17:52:27 -06001202 __be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
1203 __be32 tmp_len = cpu_to_be32(lba_length);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001204
1205 memcpy(resp, &tmp_cap, sizeof(u64));
1206 /* Bytes 8, 9, 10, 11 are reserved */
1207 memcpy(&resp[12], &tmp_len, sizeof(u32));
1208 }
1209
1210 out_dma:
1211 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1212 dma_addr);
1213 out:
1214 return res;
1215}
1216
1217static int nvme_trans_fill_control_page(struct nvme_ns *ns,
1218 struct sg_io_hdr *hdr, u8 *resp,
1219 int len)
1220{
1221 if (len < MODE_PAGE_CONTROL_LEN)
1222 return SNTI_INTERNAL_ERROR;
1223
1224 resp[0] = MODE_PAGE_CONTROL;
1225 resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
1226 resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
1227 * D_SENSE=1, GLTSD=1, RLEC=0 */
1228 resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
1229 /* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
1230 resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
1231 /* resp[6] and [7] are obsolete, thus zero */
1232 resp[8] = 0xFF; /* Busy timeout period = 0xffff */
1233 resp[9] = 0xFF;
1234 /* Bytes 10,11: Extended selftest completion time = 0x0000 */
1235
1236 return SNTI_TRANSLATION_SUCCESS;
1237}
1238
1239static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
1240 struct sg_io_hdr *hdr,
1241 u8 *resp, int len)
1242{
1243 int res = SNTI_TRANSLATION_SUCCESS;
1244 int nvme_sc;
1245 struct nvme_dev *dev = ns->dev;
1246 u32 feature_resp;
1247 u8 vwc;
1248
1249 if (len < MODE_PAGE_CACHING_LEN)
1250 return SNTI_INTERNAL_ERROR;
1251
1252 nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
1253 &feature_resp);
1254 res = nvme_trans_status_code(hdr, nvme_sc);
1255 if (res)
1256 goto out;
1257 if (nvme_sc) {
1258 res = nvme_sc;
1259 goto out;
1260 }
1261 vwc = feature_resp & 0x00000001;
1262
1263 resp[0] = MODE_PAGE_CACHING;
1264 resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
1265 resp[2] = vwc << 2;
1266
1267 out:
1268 return res;
1269}
1270
1271static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
1272 struct sg_io_hdr *hdr, u8 *resp,
1273 int len)
1274{
1275 int res = SNTI_TRANSLATION_SUCCESS;
1276
1277 if (len < MODE_PAGE_POW_CND_LEN)
1278 return SNTI_INTERNAL_ERROR;
1279
1280 resp[0] = MODE_PAGE_POWER_CONDITION;
1281 resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
1282 /* All other bytes are zero */
1283
1284 return res;
1285}
1286
1287static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
1288 struct sg_io_hdr *hdr, u8 *resp,
1289 int len)
1290{
1291 int res = SNTI_TRANSLATION_SUCCESS;
1292
1293 if (len < MODE_PAGE_INF_EXC_LEN)
1294 return SNTI_INTERNAL_ERROR;
1295
1296 resp[0] = MODE_PAGE_INFO_EXCEP;
1297 resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
1298 resp[2] = 0x88;
1299 /* All other bytes are zero */
1300
1301 return res;
1302}
1303
1304static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1305 u8 *resp, int len)
1306{
1307 int res = SNTI_TRANSLATION_SUCCESS;
1308 u16 mode_pages_offset_1 = 0;
1309 u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
1310
1311 mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
1312 mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
1313 mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
1314
1315 res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
1316 MODE_PAGE_CACHING_LEN);
1317 if (res != SNTI_TRANSLATION_SUCCESS)
1318 goto out;
1319 res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
1320 MODE_PAGE_CONTROL_LEN);
1321 if (res != SNTI_TRANSLATION_SUCCESS)
1322 goto out;
1323 res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
1324 MODE_PAGE_POW_CND_LEN);
1325 if (res != SNTI_TRANSLATION_SUCCESS)
1326 goto out;
1327 res = nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
1328 MODE_PAGE_INF_EXC_LEN);
1329 if (res != SNTI_TRANSLATION_SUCCESS)
1330 goto out;
1331
1332 out:
1333 return res;
1334}
1335
1336static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
1337{
1338 if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
1339 /* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
1340 return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
1341 } else {
1342 return 0;
1343 }
1344}
1345
1346static int nvme_trans_mode_page_create(struct nvme_ns *ns,
1347 struct sg_io_hdr *hdr, u8 *cmd,
1348 u16 alloc_len, u8 cdb10,
1349 int (*mode_page_fill_func)
1350 (struct nvme_ns *,
1351 struct sg_io_hdr *hdr, u8 *, int),
1352 u16 mode_pages_tot_len)
1353{
1354 int res = SNTI_TRANSLATION_SUCCESS;
1355 int xfer_len;
1356 u8 *response;
1357 u8 dbd, llbaa;
1358 u16 resp_size;
1359 int mph_size;
1360 u16 mode_pages_offset_1;
1361 u16 blk_desc_len, blk_desc_offset, mode_data_length;
1362
1363 dbd = GET_MODE_SENSE_DBD(cmd);
1364 llbaa = GET_MODE_SENSE_LLBAA(cmd);
1365 mph_size = GET_MODE_SENSE_MPH_SIZE(cdb10);
1366 blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
1367
1368 resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
1369 /* Refer spc4r34 Table 440 for calculation of Mode data Length field */
1370 mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
1371
1372 blk_desc_offset = mph_size;
1373 mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
1374
Tushar Behera03ea83e2013-06-10 10:20:55 +05301375 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001376 if (response == NULL) {
1377 res = -ENOMEM;
1378 goto out_mem;
1379 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07001380
1381 res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
1382 llbaa, mode_data_length, blk_desc_len);
1383 if (res != SNTI_TRANSLATION_SUCCESS)
1384 goto out_free;
1385 if (blk_desc_len > 0) {
1386 res = nvme_trans_fill_blk_desc(ns, hdr,
1387 &response[blk_desc_offset],
1388 blk_desc_len, llbaa);
1389 if (res != SNTI_TRANSLATION_SUCCESS)
1390 goto out_free;
1391 }
1392 res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
1393 mode_pages_tot_len);
1394 if (res != SNTI_TRANSLATION_SUCCESS)
1395 goto out_free;
1396
1397 xfer_len = min(alloc_len, resp_size);
1398 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
1399
1400 out_free:
1401 kfree(response);
1402 out_mem:
1403 return res;
1404}
1405
1406/* Read Capacity Helper Functions */
1407
1408static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
1409 u8 cdb16)
1410{
1411 u8 flbas;
1412 u32 lba_length;
1413 u64 rlba;
1414 u8 prot_en;
1415 u8 p_type_lut[4] = {0, 0, 1, 2};
Vishal Verma8741ee42013-04-04 17:52:27 -06001416 __be64 tmp_rlba;
1417 __be32 tmp_rlba_32;
1418 __be32 tmp_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07001419
1420 flbas = (id_ns->flbas) & 0x0F;
1421 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1422 rlba = le64_to_cpup(&id_ns->nsze) - 1;
1423 (id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
1424
1425 if (!cdb16) {
1426 if (rlba > 0xFFFFFFFF)
1427 rlba = 0xFFFFFFFF;
1428 tmp_rlba_32 = cpu_to_be32(rlba);
1429 tmp_len = cpu_to_be32(lba_length);
1430 memcpy(response, &tmp_rlba_32, sizeof(u32));
1431 memcpy(&response[4], &tmp_len, sizeof(u32));
1432 } else {
1433 tmp_rlba = cpu_to_be64(rlba);
1434 tmp_len = cpu_to_be32(lba_length);
1435 memcpy(response, &tmp_rlba, sizeof(u64));
1436 memcpy(&response[8], &tmp_len, sizeof(u32));
1437 response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
1438 /* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
1439 /* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
1440 /* Bytes 16-31 - Reserved */
1441 }
1442}
1443
1444/* Start Stop Unit Helper Functions */
1445
1446static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1447 u8 pc, u8 pcmod, u8 start)
1448{
1449 int res = SNTI_TRANSLATION_SUCCESS;
1450 int nvme_sc;
1451 struct nvme_dev *dev = ns->dev;
1452 dma_addr_t dma_addr;
1453 void *mem;
1454 struct nvme_id_ctrl *id_ctrl;
1455 int lowest_pow_st; /* max npss = lowest power consumption */
1456 unsigned ps_desired = 0;
1457
1458 /* NVMe Controller Identify */
1459 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1460 sizeof(struct nvme_id_ctrl),
1461 &dma_addr, GFP_KERNEL);
1462 if (mem == NULL) {
1463 res = -ENOMEM;
1464 goto out;
1465 }
1466 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
1467 res = nvme_trans_status_code(hdr, nvme_sc);
1468 if (res)
1469 goto out_dma;
1470 if (nvme_sc) {
1471 res = nvme_sc;
1472 goto out_dma;
1473 }
1474 id_ctrl = mem;
1475 lowest_pow_st = id_ctrl->npss - 1;
1476
1477 switch (pc) {
1478 case NVME_POWER_STATE_START_VALID:
1479 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1480 if (pcmod == 0 && start == 0x1)
1481 ps_desired = POWER_STATE_0;
1482 if (pcmod == 0 && start == 0x0)
1483 ps_desired = lowest_pow_st;
1484 break;
1485 case NVME_POWER_STATE_ACTIVE:
1486 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1487 if (pcmod == 0)
1488 ps_desired = POWER_STATE_0;
1489 break;
1490 case NVME_POWER_STATE_IDLE:
1491 /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
1492 /* min of desired state and (lps-1) because lps is STOP */
1493 if (pcmod == 0x0)
1494 ps_desired = min(POWER_STATE_1, (lowest_pow_st - 1));
1495 else if (pcmod == 0x1)
1496 ps_desired = min(POWER_STATE_2, (lowest_pow_st - 1));
1497 else if (pcmod == 0x2)
1498 ps_desired = min(POWER_STATE_3, (lowest_pow_st - 1));
1499 break;
1500 case NVME_POWER_STATE_STANDBY:
1501 /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
1502 if (pcmod == 0x0)
1503 ps_desired = max(0, (lowest_pow_st - 2));
1504 else if (pcmod == 0x1)
1505 ps_desired = max(0, (lowest_pow_st - 1));
1506 break;
1507 case NVME_POWER_STATE_LU_CONTROL:
1508 default:
1509 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1510 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1511 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1512 break;
1513 }
1514 nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
1515 NULL);
1516 res = nvme_trans_status_code(hdr, nvme_sc);
1517 if (res)
1518 goto out_dma;
1519 if (nvme_sc)
1520 res = nvme_sc;
1521 out_dma:
1522 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
1523 dma_addr);
1524 out:
1525 return res;
1526}
1527
1528/* Write Buffer Helper Functions */
1529/* Also using this for Format Unit with hdr passed as NULL, and buffer_id, 0 */
1530
1531static int nvme_trans_send_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1532 u8 opcode, u32 tot_len, u32 offset,
1533 u8 buffer_id)
1534{
1535 int res = SNTI_TRANSLATION_SUCCESS;
1536 int nvme_sc;
1537 struct nvme_dev *dev = ns->dev;
1538 struct nvme_command c;
1539 struct nvme_iod *iod = NULL;
1540 unsigned length;
1541
1542 memset(&c, 0, sizeof(c));
1543 c.common.opcode = opcode;
1544 if (opcode == nvme_admin_download_fw) {
1545 if (hdr->iovec_count > 0) {
1546 /* Assuming SGL is not allowed for this command */
1547 res = nvme_trans_completion(hdr,
1548 SAM_STAT_CHECK_CONDITION,
1549 ILLEGAL_REQUEST,
1550 SCSI_ASC_INVALID_CDB,
1551 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1552 goto out;
1553 }
1554 iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
1555 (unsigned long)hdr->dxferp, tot_len);
1556 if (IS_ERR(iod)) {
1557 res = PTR_ERR(iod);
1558 goto out;
1559 }
Keith Buschedd10d32014-04-03 16:45:23 -06001560 length = nvme_setup_prps(dev, iod, tot_len, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001561 if (length != tot_len) {
1562 res = -ENOMEM;
1563 goto out_unmap;
1564 }
1565
Keith Buschedd10d32014-04-03 16:45:23 -06001566 c.dlfw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1567 c.dlfw.prp2 = cpu_to_le64(iod->first_dma);
Vishal Verma8741ee42013-04-04 17:52:27 -06001568 c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
1569 c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001570 } else if (opcode == nvme_admin_activate_fw) {
Matthew Wilcoxab3ea5b2013-05-06 08:22:18 -04001571 u32 cdw10 = buffer_id | NVME_FWACT_REPL_ACTV;
1572 c.common.cdw10[0] = cpu_to_le32(cdw10);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001573 }
1574
1575 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1576 res = nvme_trans_status_code(hdr, nvme_sc);
1577 if (res)
1578 goto out_unmap;
1579 if (nvme_sc)
1580 res = nvme_sc;
1581
1582 out_unmap:
1583 if (opcode == nvme_admin_download_fw) {
1584 nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
1585 nvme_free_iod(dev, iod);
1586 }
1587 out:
1588 return res;
1589}
1590
1591/* Mode Select Helper Functions */
1592
1593static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1594 u16 *bd_len, u8 *llbaa)
1595{
1596 if (cdb10) {
1597 /* 10 Byte CDB */
1598 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1599 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
1600 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &&
1601 MODE_SELECT_10_LLBAA_MASK;
1602 } else {
1603 /* 6 Byte CDB */
1604 *bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
1605 }
1606}
1607
1608static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
1609 u16 idx, u16 bd_len, u8 llbaa)
1610{
1611 u16 bd_num;
1612
1613 bd_num = bd_len / ((llbaa == 0) ?
1614 SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
1615 /* Store block descriptor info if a FORMAT UNIT comes later */
1616 /* TODO Saving 1st BD info; what to do if multiple BD received? */
1617 if (llbaa == 0) {
1618 /* Standard Block Descriptor - spc4r34 7.5.5.1 */
1619 ns->mode_select_num_blocks =
1620 (parm_list[idx + 1] << 16) +
1621 (parm_list[idx + 2] << 8) +
1622 (parm_list[idx + 3]);
1623
1624 ns->mode_select_block_len =
1625 (parm_list[idx + 5] << 16) +
1626 (parm_list[idx + 6] << 8) +
1627 (parm_list[idx + 7]);
1628 } else {
1629 /* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
1630 ns->mode_select_num_blocks =
1631 (((u64)parm_list[idx + 0]) << 56) +
1632 (((u64)parm_list[idx + 1]) << 48) +
1633 (((u64)parm_list[idx + 2]) << 40) +
1634 (((u64)parm_list[idx + 3]) << 32) +
1635 (((u64)parm_list[idx + 4]) << 24) +
1636 (((u64)parm_list[idx + 5]) << 16) +
1637 (((u64)parm_list[idx + 6]) << 8) +
1638 ((u64)parm_list[idx + 7]);
1639
1640 ns->mode_select_block_len =
1641 (parm_list[idx + 12] << 24) +
1642 (parm_list[idx + 13] << 16) +
1643 (parm_list[idx + 14] << 8) +
1644 (parm_list[idx + 15]);
1645 }
1646}
1647
Vishal Verma710a1432013-05-13 14:55:18 -06001648static int nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
Vishal Verma5d0f6132013-03-04 18:40:58 -07001649 u8 *mode_page, u8 page_code)
1650{
1651 int res = SNTI_TRANSLATION_SUCCESS;
1652 int nvme_sc;
1653 struct nvme_dev *dev = ns->dev;
1654 unsigned dword11;
1655
1656 switch (page_code) {
1657 case MODE_PAGE_CACHING:
1658 dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
1659 nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
1660 0, NULL);
1661 res = nvme_trans_status_code(hdr, nvme_sc);
1662 if (res)
1663 break;
1664 if (nvme_sc) {
1665 res = nvme_sc;
1666 break;
1667 }
1668 break;
1669 case MODE_PAGE_CONTROL:
1670 break;
1671 case MODE_PAGE_POWER_CONDITION:
1672 /* Verify the OS is not trying to set timers */
1673 if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
1674 res = nvme_trans_completion(hdr,
1675 SAM_STAT_CHECK_CONDITION,
1676 ILLEGAL_REQUEST,
1677 SCSI_ASC_INVALID_PARAMETER,
1678 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1679 if (!res)
1680 res = SNTI_INTERNAL_ERROR;
1681 break;
1682 }
1683 break;
1684 default:
1685 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1686 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1687 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1688 if (!res)
1689 res = SNTI_INTERNAL_ERROR;
1690 break;
1691 }
1692
1693 return res;
1694}
1695
1696static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1697 u8 *cmd, u16 parm_list_len, u8 pf,
1698 u8 sp, u8 cdb10)
1699{
1700 int res = SNTI_TRANSLATION_SUCCESS;
1701 u8 *parm_list;
1702 u16 bd_len;
1703 u8 llbaa = 0;
1704 u16 index, saved_index;
1705 u8 page_code;
1706 u16 mp_size;
1707
1708 /* Get parm list from data-in/out buffer */
1709 parm_list = kmalloc(parm_list_len, GFP_KERNEL);
1710 if (parm_list == NULL) {
1711 res = -ENOMEM;
1712 goto out;
1713 }
1714
1715 res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
1716 if (res != SNTI_TRANSLATION_SUCCESS)
1717 goto out_mem;
1718
1719 nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
1720 index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
1721
1722 if (bd_len != 0) {
1723 /* Block Descriptors present, parse */
1724 nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
1725 index += bd_len;
1726 }
1727 saved_index = index;
1728
1729 /* Multiple mode pages may be present; iterate through all */
1730 /* In 1st Iteration, don't do NVME Command, only check for CDB errors */
1731 do {
1732 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1733 mp_size = parm_list[index + 1] + 2;
1734 if ((page_code != MODE_PAGE_CACHING) &&
1735 (page_code != MODE_PAGE_CONTROL) &&
1736 (page_code != MODE_PAGE_POWER_CONDITION)) {
1737 res = nvme_trans_completion(hdr,
1738 SAM_STAT_CHECK_CONDITION,
1739 ILLEGAL_REQUEST,
1740 SCSI_ASC_INVALID_CDB,
1741 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1742 goto out_mem;
1743 }
1744 index += mp_size;
1745 } while (index < parm_list_len);
1746
1747 /* In 2nd Iteration, do the NVME Commands */
1748 index = saved_index;
1749 do {
1750 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1751 mp_size = parm_list[index + 1] + 2;
1752 res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
1753 page_code);
1754 if (res != SNTI_TRANSLATION_SUCCESS)
1755 break;
1756 index += mp_size;
1757 } while (index < parm_list_len);
1758
1759 out_mem:
1760 kfree(parm_list);
1761 out:
1762 return res;
1763}
1764
1765/* Format Unit Helper Functions */
1766
1767static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
1768 struct sg_io_hdr *hdr)
1769{
1770 int res = SNTI_TRANSLATION_SUCCESS;
1771 int nvme_sc;
1772 struct nvme_dev *dev = ns->dev;
1773 dma_addr_t dma_addr;
1774 void *mem;
1775 struct nvme_id_ns *id_ns;
1776 u8 flbas;
1777
1778 /*
1779 * SCSI Expects a MODE SELECT would have been issued prior to
1780 * a FORMAT UNIT, and the block size and number would be used
1781 * from the block descriptor in it. If a MODE SELECT had not
1782 * been issued, FORMAT shall use the current values for both.
1783 */
1784
1785 if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
1786 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1787 sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
1788 if (mem == NULL) {
1789 res = -ENOMEM;
1790 goto out;
1791 }
1792 /* nvme ns identify */
1793 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1794 res = nvme_trans_status_code(hdr, nvme_sc);
1795 if (res)
1796 goto out_dma;
1797 if (nvme_sc) {
1798 res = nvme_sc;
1799 goto out_dma;
1800 }
1801 id_ns = mem;
1802
1803 if (ns->mode_select_num_blocks == 0)
Vishal Verma8741ee42013-04-04 17:52:27 -06001804 ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001805 if (ns->mode_select_block_len == 0) {
1806 flbas = (id_ns->flbas) & 0x0F;
1807 ns->mode_select_block_len =
1808 (1 << (id_ns->lbaf[flbas].ds));
1809 }
1810 out_dma:
1811 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1812 mem, dma_addr);
1813 }
1814 out:
1815 return res;
1816}
1817
1818static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
1819 u8 format_prot_info, u8 *nvme_pf_code)
1820{
1821 int res = SNTI_TRANSLATION_SUCCESS;
1822 u8 *parm_list;
1823 u8 pf_usage, pf_code;
1824
1825 parm_list = kmalloc(len, GFP_KERNEL);
1826 if (parm_list == NULL) {
1827 res = -ENOMEM;
1828 goto out;
1829 }
1830 res = nvme_trans_copy_from_user(hdr, parm_list, len);
1831 if (res != SNTI_TRANSLATION_SUCCESS)
1832 goto out_mem;
1833
1834 if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
1835 FORMAT_UNIT_IMMED_MASK) != 0) {
1836 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1837 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1838 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1839 goto out_mem;
1840 }
1841
1842 if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
1843 (parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
1844 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1845 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1846 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1847 goto out_mem;
1848 }
1849 pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
1850 FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
1851 pf_code = (pf_usage << 2) | format_prot_info;
1852 switch (pf_code) {
1853 case 0:
1854 *nvme_pf_code = 0;
1855 break;
1856 case 2:
1857 *nvme_pf_code = 1;
1858 break;
1859 case 3:
1860 *nvme_pf_code = 2;
1861 break;
1862 case 7:
1863 *nvme_pf_code = 3;
1864 break;
1865 default:
1866 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1867 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1868 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1869 break;
1870 }
1871
1872 out_mem:
1873 kfree(parm_list);
1874 out:
1875 return res;
1876}
1877
1878static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1879 u8 prot_info)
1880{
1881 int res = SNTI_TRANSLATION_SUCCESS;
1882 int nvme_sc;
1883 struct nvme_dev *dev = ns->dev;
1884 dma_addr_t dma_addr;
1885 void *mem;
1886 struct nvme_id_ns *id_ns;
1887 u8 i;
1888 u8 flbas, nlbaf;
1889 u8 selected_lbaf = 0xFF;
1890 u32 cdw10 = 0;
1891 struct nvme_command c;
1892
1893 /* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
1894 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1895 &dma_addr, GFP_KERNEL);
1896 if (mem == NULL) {
1897 res = -ENOMEM;
1898 goto out;
1899 }
1900 /* nvme ns identify */
1901 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1902 res = nvme_trans_status_code(hdr, nvme_sc);
1903 if (res)
1904 goto out_dma;
1905 if (nvme_sc) {
1906 res = nvme_sc;
1907 goto out_dma;
1908 }
1909 id_ns = mem;
1910 flbas = (id_ns->flbas) & 0x0F;
1911 nlbaf = id_ns->nlbaf;
1912
1913 for (i = 0; i < nlbaf; i++) {
1914 if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
1915 selected_lbaf = i;
1916 break;
1917 }
1918 }
1919 if (selected_lbaf > 0x0F) {
1920 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1921 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1922 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1923 }
Vishal Verma8741ee42013-04-04 17:52:27 -06001924 if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07001925 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1926 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1927 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1928 }
1929
1930 cdw10 |= prot_info << 5;
1931 cdw10 |= selected_lbaf & 0x0F;
1932 memset(&c, 0, sizeof(c));
1933 c.format.opcode = nvme_admin_format_nvm;
Vishal Verma8741ee42013-04-04 17:52:27 -06001934 c.format.nsid = cpu_to_le32(ns->ns_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -07001935 c.format.cdw10 = cpu_to_le32(cdw10);
1936
1937 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1938 res = nvme_trans_status_code(hdr, nvme_sc);
1939 if (res)
1940 goto out_dma;
1941 if (nvme_sc)
1942 res = nvme_sc;
1943
1944 out_dma:
1945 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1946 dma_addr);
1947 out:
1948 return res;
1949}
1950
1951/* Read/Write Helper Functions */
1952
1953static inline void nvme_trans_get_io_cdb6(u8 *cmd,
1954 struct nvme_trans_io_cdb *cdb_info)
1955{
1956 cdb_info->fua = 0;
1957 cdb_info->prot_info = 0;
1958 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_6_CDB_LBA_OFFSET) &
1959 IO_6_CDB_LBA_MASK;
1960 cdb_info->xfer_len = GET_U8_FROM_CDB(cmd, IO_6_CDB_TX_LEN_OFFSET);
1961
1962 /* sbc3r27 sec 5.32 - TRANSFER LEN of 0 implies a 256 Block transfer */
1963 if (cdb_info->xfer_len == 0)
1964 cdb_info->xfer_len = IO_6_DEFAULT_TX_LEN;
1965}
1966
1967static inline void nvme_trans_get_io_cdb10(u8 *cmd,
1968 struct nvme_trans_io_cdb *cdb_info)
1969{
1970 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_10_CDB_FUA_OFFSET) &
1971 IO_CDB_FUA_MASK;
1972 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_10_CDB_WP_OFFSET) &
1973 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1974 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_10_CDB_LBA_OFFSET);
1975 cdb_info->xfer_len = GET_U16_FROM_CDB(cmd, IO_10_CDB_TX_LEN_OFFSET);
1976}
1977
1978static inline void nvme_trans_get_io_cdb12(u8 *cmd,
1979 struct nvme_trans_io_cdb *cdb_info)
1980{
1981 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_12_CDB_FUA_OFFSET) &
1982 IO_CDB_FUA_MASK;
1983 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_12_CDB_WP_OFFSET) &
1984 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1985 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_12_CDB_LBA_OFFSET);
1986 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_12_CDB_TX_LEN_OFFSET);
1987}
1988
1989static inline void nvme_trans_get_io_cdb16(u8 *cmd,
1990 struct nvme_trans_io_cdb *cdb_info)
1991{
1992 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_16_CDB_FUA_OFFSET) &
1993 IO_CDB_FUA_MASK;
1994 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_16_CDB_WP_OFFSET) &
1995 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1996 cdb_info->lba = GET_U64_FROM_CDB(cmd, IO_16_CDB_LBA_OFFSET);
1997 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_16_CDB_TX_LEN_OFFSET);
1998}
1999
2000static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
2001 struct nvme_trans_io_cdb *cdb_info,
2002 u32 max_blocks)
2003{
2004 /* If using iovecs, send one nvme command per vector */
2005 if (hdr->iovec_count > 0)
2006 return hdr->iovec_count;
2007 else if (cdb_info->xfer_len > max_blocks)
2008 return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
2009 else
2010 return 1;
2011}
2012
2013static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
2014 struct nvme_trans_io_cdb *cdb_info)
2015{
2016 u16 control = 0;
2017
2018 /* When Protection information support is added, implement here */
2019
2020 if (cdb_info->fua > 0)
2021 control |= NVME_RW_FUA;
2022
2023 return control;
2024}
2025
2026static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2027 struct nvme_trans_io_cdb *cdb_info, u8 is_write)
2028{
2029 int res = SNTI_TRANSLATION_SUCCESS;
2030 int nvme_sc;
2031 struct nvme_dev *dev = ns->dev;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002032 u32 num_cmds;
2033 struct nvme_iod *iod;
2034 u64 unit_len;
2035 u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
2036 u32 retcode;
2037 u32 i = 0;
2038 u64 nvme_offset = 0;
Vishal Verma8741ee42013-04-04 17:52:27 -06002039 void __user *next_mapping_addr;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002040 struct nvme_command c;
2041 u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
2042 u16 control;
Keith Buschddcb7762014-03-24 10:03:56 -04002043 u32 max_blocks = queue_max_hw_sectors(ns->queue);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002044
2045 num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
2046
2047 /*
2048 * This loop handles two cases.
2049 * First, when an SGL is used in the form of an iovec list:
2050 * - Use iov_base as the next mapping address for the nvme command_id
2051 * - Use iov_len as the data transfer length for the command.
2052 * Second, when we have a single buffer
2053 * - If larger than max_blocks, split into chunks, offset
2054 * each nvme command accordingly.
2055 */
2056 for (i = 0; i < num_cmds; i++) {
2057 memset(&c, 0, sizeof(c));
2058 if (hdr->iovec_count > 0) {
Vishal Verma8741ee42013-04-04 17:52:27 -06002059 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002060
Vishal Verma8741ee42013-04-04 17:52:27 -06002061 retcode = copy_from_user(&sgl, hdr->dxferp +
2062 i * sizeof(struct sg_iovec),
2063 sizeof(struct sg_iovec));
2064 if (retcode)
2065 return -EFAULT;
2066 unit_len = sgl.iov_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002067 unit_num_blocks = unit_len >> ns->lba_shift;
Vishal Verma8741ee42013-04-04 17:52:27 -06002068 next_mapping_addr = sgl.iov_base;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002069 } else {
2070 unit_num_blocks = min((u64)max_blocks,
2071 (cdb_info->xfer_len - nvme_offset));
2072 unit_len = unit_num_blocks << ns->lba_shift;
2073 next_mapping_addr = hdr->dxferp +
2074 ((1 << ns->lba_shift) * nvme_offset);
2075 }
2076
2077 c.rw.opcode = opcode;
2078 c.rw.nsid = cpu_to_le32(ns->ns_id);
2079 c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
2080 c.rw.length = cpu_to_le16(unit_num_blocks - 1);
2081 control = nvme_trans_io_get_control(ns, cdb_info);
2082 c.rw.control = cpu_to_le16(control);
2083
2084 iod = nvme_map_user_pages(dev,
2085 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2086 (unsigned long)next_mapping_addr, unit_len);
2087 if (IS_ERR(iod)) {
2088 res = PTR_ERR(iod);
2089 goto out;
2090 }
Keith Buschedd10d32014-04-03 16:45:23 -06002091 retcode = nvme_setup_prps(dev, iod, unit_len, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002092 if (retcode != unit_len) {
2093 nvme_unmap_user_pages(dev,
2094 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2095 iod);
2096 nvme_free_iod(dev, iod);
2097 res = -ENOMEM;
2098 goto out;
2099 }
Keith Buschedd10d32014-04-03 16:45:23 -06002100 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
2101 c.rw.prp2 = cpu_to_le64(iod->first_dma);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002102
2103 nvme_offset += unit_num_blocks;
2104
Keith Busch4f5099a2014-03-03 16:39:13 -07002105 nvme_sc = nvme_submit_io_cmd(dev, &c, NULL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002106 if (nvme_sc != NVME_SC_SUCCESS) {
2107 nvme_unmap_user_pages(dev,
2108 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2109 iod);
2110 nvme_free_iod(dev, iod);
2111 res = nvme_trans_status_code(hdr, nvme_sc);
2112 goto out;
2113 }
2114 nvme_unmap_user_pages(dev,
2115 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2116 iod);
2117 nvme_free_iod(dev, iod);
2118 }
2119 res = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2120
2121 out:
2122 return res;
2123}
2124
2125
2126/* SCSI Command Translation Functions */
2127
2128static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
2129 u8 *cmd)
2130{
2131 int res = SNTI_TRANSLATION_SUCCESS;
2132 struct nvme_trans_io_cdb cdb_info;
2133 u8 opcode = cmd[0];
2134 u64 xfer_bytes;
2135 u64 sum_iov_len = 0;
Vishal Verma8741ee42013-04-04 17:52:27 -06002136 struct sg_iovec sgl;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002137 int i;
Vishal Verma8741ee42013-04-04 17:52:27 -06002138 size_t not_copied;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002139
2140 /* Extract Fields from CDB */
2141 switch (opcode) {
2142 case WRITE_6:
2143 case READ_6:
2144 nvme_trans_get_io_cdb6(cmd, &cdb_info);
2145 break;
2146 case WRITE_10:
2147 case READ_10:
2148 nvme_trans_get_io_cdb10(cmd, &cdb_info);
2149 break;
2150 case WRITE_12:
2151 case READ_12:
2152 nvme_trans_get_io_cdb12(cmd, &cdb_info);
2153 break;
2154 case WRITE_16:
2155 case READ_16:
2156 nvme_trans_get_io_cdb16(cmd, &cdb_info);
2157 break;
2158 default:
2159 /* Will never really reach here */
2160 res = SNTI_INTERNAL_ERROR;
2161 goto out;
2162 }
2163
2164 /* Calculate total length of transfer (in bytes) */
2165 if (hdr->iovec_count > 0) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07002166 for (i = 0; i < hdr->iovec_count; i++) {
Vishal Verma8741ee42013-04-04 17:52:27 -06002167 not_copied = copy_from_user(&sgl, hdr->dxferp +
2168 i * sizeof(struct sg_iovec),
2169 sizeof(struct sg_iovec));
2170 if (not_copied)
2171 return -EFAULT;
2172 sum_iov_len += sgl.iov_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002173 /* IO vector sizes should be multiples of block size */
Vishal Verma8741ee42013-04-04 17:52:27 -06002174 if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07002175 res = nvme_trans_completion(hdr,
2176 SAM_STAT_CHECK_CONDITION,
2177 ILLEGAL_REQUEST,
2178 SCSI_ASC_INVALID_PARAMETER,
2179 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2180 goto out;
2181 }
2182 }
2183 } else {
2184 sum_iov_len = hdr->dxfer_len;
2185 }
2186
2187 /* As Per sg ioctl howto, if the lengths differ, use the lower one */
2188 xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
2189
2190 /* If block count and actual data buffer size dont match, error out */
2191 if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
2192 res = -EINVAL;
2193 goto out;
2194 }
2195
2196 /* Check for 0 length transfer - it is not illegal */
2197 if (cdb_info.xfer_len == 0)
2198 goto out;
2199
2200 /* Send NVMe IO Command(s) */
2201 res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
2202 if (res != SNTI_TRANSLATION_SUCCESS)
2203 goto out;
2204
2205 out:
2206 return res;
2207}
2208
2209static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2210 u8 *cmd)
2211{
2212 int res = SNTI_TRANSLATION_SUCCESS;
2213 u8 evpd;
2214 u8 page_code;
2215 int alloc_len;
2216 u8 *inq_response;
2217
2218 evpd = GET_INQ_EVPD_BIT(cmd);
2219 page_code = GET_INQ_PAGE_CODE(cmd);
2220 alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
2221
2222 inq_response = kmalloc(STANDARD_INQUIRY_LENGTH, GFP_KERNEL);
2223 if (inq_response == NULL) {
2224 res = -ENOMEM;
2225 goto out_mem;
2226 }
2227
2228 if (evpd == 0) {
2229 if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
2230 res = nvme_trans_standard_inquiry_page(ns, hdr,
2231 inq_response, alloc_len);
2232 } else {
2233 res = nvme_trans_completion(hdr,
2234 SAM_STAT_CHECK_CONDITION,
2235 ILLEGAL_REQUEST,
2236 SCSI_ASC_INVALID_CDB,
2237 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2238 }
2239 } else {
2240 switch (page_code) {
2241 case VPD_SUPPORTED_PAGES:
2242 res = nvme_trans_supported_vpd_pages(ns, hdr,
2243 inq_response, alloc_len);
2244 break;
2245 case VPD_SERIAL_NUMBER:
2246 res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
2247 alloc_len);
2248 break;
2249 case VPD_DEVICE_IDENTIFIERS:
2250 res = nvme_trans_device_id_page(ns, hdr, inq_response,
2251 alloc_len);
2252 break;
2253 case VPD_EXTENDED_INQUIRY:
2254 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2255 break;
2256 case VPD_BLOCK_DEV_CHARACTERISTICS:
2257 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2258 break;
2259 default:
2260 res = nvme_trans_completion(hdr,
2261 SAM_STAT_CHECK_CONDITION,
2262 ILLEGAL_REQUEST,
2263 SCSI_ASC_INVALID_CDB,
2264 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2265 break;
2266 }
2267 }
2268 kfree(inq_response);
2269 out_mem:
2270 return res;
2271}
2272
2273static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2274 u8 *cmd)
2275{
2276 int res = SNTI_TRANSLATION_SUCCESS;
2277 u16 alloc_len;
2278 u8 sp;
2279 u8 pc;
2280 u8 page_code;
2281
2282 sp = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_SP_OFFSET);
2283 if (sp != LOG_SENSE_CDB_SP_NOT_ENABLED) {
2284 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2285 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2286 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2287 goto out;
2288 }
2289 pc = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_PC_OFFSET);
2290 page_code = pc & LOG_SENSE_CDB_PAGE_CODE_MASK;
2291 pc = (pc & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
2292 if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
2293 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2294 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2295 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2296 goto out;
2297 }
2298 alloc_len = GET_U16_FROM_CDB(cmd, LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET);
2299 switch (page_code) {
2300 case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
2301 res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
2302 break;
2303 case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
2304 res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
2305 break;
2306 case LOG_PAGE_TEMPERATURE_PAGE:
2307 res = nvme_trans_log_temperature(ns, hdr, alloc_len);
2308 break;
2309 default:
2310 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2311 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2312 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2313 break;
2314 }
2315
2316 out:
2317 return res;
2318}
2319
2320static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2321 u8 *cmd)
2322{
2323 int res = SNTI_TRANSLATION_SUCCESS;
2324 u8 cdb10 = 0;
2325 u16 parm_list_len;
2326 u8 page_format;
2327 u8 save_pages;
2328
2329 page_format = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_PAGE_FORMAT_OFFSET);
2330 page_format &= MODE_SELECT_CDB_PAGE_FORMAT_MASK;
2331
2332 save_pages = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_SAVE_PAGES_OFFSET);
2333 save_pages &= MODE_SELECT_CDB_SAVE_PAGES_MASK;
2334
2335 if (GET_OPCODE(cmd) == MODE_SELECT) {
2336 parm_list_len = GET_U8_FROM_CDB(cmd,
2337 MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET);
2338 } else {
2339 parm_list_len = GET_U16_FROM_CDB(cmd,
2340 MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET);
2341 cdb10 = 1;
2342 }
2343
2344 if (parm_list_len != 0) {
2345 /*
2346 * According to SPC-4 r24, a paramter list length field of 0
2347 * shall not be considered an error
2348 */
2349 res = nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
2350 page_format, save_pages, cdb10);
2351 }
2352
2353 return res;
2354}
2355
2356static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2357 u8 *cmd)
2358{
2359 int res = SNTI_TRANSLATION_SUCCESS;
2360 u16 alloc_len;
2361 u8 cdb10 = 0;
2362 u8 page_code;
2363 u8 pc;
2364
2365 if (GET_OPCODE(cmd) == MODE_SENSE) {
2366 alloc_len = GET_U8_FROM_CDB(cmd, MODE_SENSE6_ALLOC_LEN_OFFSET);
2367 } else {
2368 alloc_len = GET_U16_FROM_CDB(cmd,
2369 MODE_SENSE10_ALLOC_LEN_OFFSET);
2370 cdb10 = 1;
2371 }
2372
2373 pc = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CONTROL_OFFSET) &
2374 MODE_SENSE_PAGE_CONTROL_MASK;
2375 if (pc != MODE_SENSE_PC_CURRENT_VALUES) {
2376 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2377 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2378 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2379 goto out;
2380 }
2381
2382 page_code = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CODE_OFFSET) &
2383 MODE_SENSE_PAGE_CODE_MASK;
2384 switch (page_code) {
2385 case MODE_PAGE_CACHING:
2386 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2387 cdb10,
2388 &nvme_trans_fill_caching_page,
2389 MODE_PAGE_CACHING_LEN);
2390 break;
2391 case MODE_PAGE_CONTROL:
2392 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2393 cdb10,
2394 &nvme_trans_fill_control_page,
2395 MODE_PAGE_CONTROL_LEN);
2396 break;
2397 case MODE_PAGE_POWER_CONDITION:
2398 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2399 cdb10,
2400 &nvme_trans_fill_pow_cnd_page,
2401 MODE_PAGE_POW_CND_LEN);
2402 break;
2403 case MODE_PAGE_INFO_EXCEP:
2404 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2405 cdb10,
2406 &nvme_trans_fill_inf_exc_page,
2407 MODE_PAGE_INF_EXC_LEN);
2408 break;
2409 case MODE_PAGE_RETURN_ALL:
2410 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2411 cdb10,
2412 &nvme_trans_fill_all_pages,
2413 MODE_PAGE_ALL_LEN);
2414 break;
2415 default:
2416 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2417 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2418 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2419 break;
2420 }
2421
2422 out:
2423 return res;
2424}
2425
2426static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2427 u8 *cmd)
2428{
2429 int res = SNTI_TRANSLATION_SUCCESS;
2430 int nvme_sc;
2431 u32 alloc_len = READ_CAP_10_RESP_SIZE;
2432 u32 resp_size = READ_CAP_10_RESP_SIZE;
2433 u32 xfer_len;
2434 u8 cdb16;
2435 struct nvme_dev *dev = ns->dev;
2436 dma_addr_t dma_addr;
2437 void *mem;
2438 struct nvme_id_ns *id_ns;
2439 u8 *response;
2440
2441 cdb16 = IS_READ_CAP_16(cmd);
2442 if (cdb16) {
2443 alloc_len = GET_READ_CAP_16_ALLOC_LENGTH(cmd);
2444 resp_size = READ_CAP_16_RESP_SIZE;
2445 }
2446
2447 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
2448 &dma_addr, GFP_KERNEL);
2449 if (mem == NULL) {
2450 res = -ENOMEM;
2451 goto out;
2452 }
2453 /* nvme ns identify */
2454 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
2455 res = nvme_trans_status_code(hdr, nvme_sc);
2456 if (res)
2457 goto out_dma;
2458 if (nvme_sc) {
2459 res = nvme_sc;
2460 goto out_dma;
2461 }
2462 id_ns = mem;
2463
Tushar Behera03ea83e2013-06-10 10:20:55 +05302464 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002465 if (response == NULL) {
2466 res = -ENOMEM;
2467 goto out_dma;
2468 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07002469 nvme_trans_fill_read_cap(response, id_ns, cdb16);
2470
2471 xfer_len = min(alloc_len, resp_size);
2472 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2473
2474 kfree(response);
2475 out_dma:
2476 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
2477 dma_addr);
2478 out:
2479 return res;
2480}
2481
2482static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2483 u8 *cmd)
2484{
2485 int res = SNTI_TRANSLATION_SUCCESS;
2486 int nvme_sc;
2487 u32 alloc_len, xfer_len, resp_size;
2488 u8 select_report;
2489 u8 *response;
2490 struct nvme_dev *dev = ns->dev;
2491 dma_addr_t dma_addr;
2492 void *mem;
2493 struct nvme_id_ctrl *id_ctrl;
2494 u32 ll_length, lun_id;
2495 u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
Vishal Verma8741ee42013-04-04 17:52:27 -06002496 __be32 tmp_len;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002497
2498 alloc_len = GET_REPORT_LUNS_ALLOC_LENGTH(cmd);
2499 select_report = GET_U8_FROM_CDB(cmd, REPORT_LUNS_SR_OFFSET);
2500
2501 if ((select_report != ALL_LUNS_RETURNED) &&
2502 (select_report != ALL_WELL_KNOWN_LUNS_RETURNED) &&
2503 (select_report != RESTRICTED_LUNS_RETURNED)) {
2504 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2505 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2506 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2507 goto out;
2508 } else {
2509 /* NVMe Controller Identify */
2510 mem = dma_alloc_coherent(&dev->pci_dev->dev,
2511 sizeof(struct nvme_id_ctrl),
2512 &dma_addr, GFP_KERNEL);
2513 if (mem == NULL) {
2514 res = -ENOMEM;
2515 goto out;
2516 }
2517 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
2518 res = nvme_trans_status_code(hdr, nvme_sc);
2519 if (res)
2520 goto out_dma;
2521 if (nvme_sc) {
2522 res = nvme_sc;
2523 goto out_dma;
2524 }
2525 id_ctrl = mem;
Vishal Verma8741ee42013-04-04 17:52:27 -06002526 ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002527 resp_size = ll_length + LUN_DATA_HEADER_SIZE;
2528
2529 if (alloc_len < resp_size) {
2530 res = nvme_trans_completion(hdr,
2531 SAM_STAT_CHECK_CONDITION,
2532 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2533 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2534 goto out_dma;
2535 }
2536
Tushar Behera03ea83e2013-06-10 10:20:55 +05302537 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002538 if (response == NULL) {
2539 res = -ENOMEM;
2540 goto out_dma;
2541 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07002542
2543 /* The first LUN ID will always be 0 per the SAM spec */
Vishal Verma8741ee42013-04-04 17:52:27 -06002544 for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
Vishal Verma5d0f6132013-03-04 18:40:58 -07002545 /*
2546 * Set the LUN Id and then increment to the next LUN
2547 * location in the parameter data.
2548 */
Vishal Verma8741ee42013-04-04 17:52:27 -06002549 __be64 tmp_id = cpu_to_be64(lun_id);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002550 memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
2551 lun_id_offset += LUN_ENTRY_SIZE;
2552 }
2553 tmp_len = cpu_to_be32(ll_length);
2554 memcpy(response, &tmp_len, sizeof(u32));
2555 }
2556
2557 xfer_len = min(alloc_len, resp_size);
2558 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2559
2560 kfree(response);
2561 out_dma:
2562 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
2563 dma_addr);
2564 out:
2565 return res;
2566}
2567
2568static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2569 u8 *cmd)
2570{
2571 int res = SNTI_TRANSLATION_SUCCESS;
2572 u8 alloc_len, xfer_len, resp_size;
2573 u8 desc_format;
2574 u8 *response;
2575
2576 alloc_len = GET_REQUEST_SENSE_ALLOC_LENGTH(cmd);
2577 desc_format = GET_U8_FROM_CDB(cmd, REQUEST_SENSE_DESC_OFFSET);
2578 desc_format &= REQUEST_SENSE_DESC_MASK;
2579
2580 resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
2581 (FIXED_FMT_SENSE_DATA_SIZE));
Tushar Behera03ea83e2013-06-10 10:20:55 +05302582 response = kzalloc(resp_size, GFP_KERNEL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002583 if (response == NULL) {
2584 res = -ENOMEM;
2585 goto out;
2586 }
Vishal Verma5d0f6132013-03-04 18:40:58 -07002587
2588 if (desc_format == DESCRIPTOR_FORMAT_SENSE_DATA_TYPE) {
2589 /* Descriptor Format Sense Data */
2590 response[0] = DESC_FORMAT_SENSE_DATA;
2591 response[1] = NO_SENSE;
2592 /* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
2593 response[2] = SCSI_ASC_NO_SENSE;
2594 response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2595 /* SDAT_OVFL = 0 | Additional Sense Length = 0 */
2596 } else {
2597 /* Fixed Format Sense Data */
2598 response[0] = FIXED_SENSE_DATA;
2599 /* Byte 1 = Obsolete */
2600 response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
2601 /* Bytes 3-6 - Information - set to zero */
2602 response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
2603 /* Bytes 8-11 - Cmd Specific Information - set to zero */
2604 response[12] = SCSI_ASC_NO_SENSE;
2605 response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2606 /* Byte 14 = Field Replaceable Unit Code = 0 */
2607 /* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
2608 }
2609
2610 xfer_len = min(alloc_len, resp_size);
2611 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2612
2613 kfree(response);
2614 out:
2615 return res;
2616}
2617
2618static int nvme_trans_security_protocol(struct nvme_ns *ns,
2619 struct sg_io_hdr *hdr,
2620 u8 *cmd)
2621{
2622 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2623 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2624 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2625}
2626
2627static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2628 u8 *cmd)
2629{
2630 int res = SNTI_TRANSLATION_SUCCESS;
2631 int nvme_sc;
Keith Busch14385de2013-04-25 14:39:27 -06002632 struct nvme_command c;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002633 u8 immed, pcmod, pc, no_flush, start;
2634
2635 immed = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_IMMED_OFFSET);
2636 pcmod = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET);
2637 pc = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_OFFSET);
2638 no_flush = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_NO_FLUSH_OFFSET);
2639 start = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_START_OFFSET);
2640
2641 immed &= START_STOP_UNIT_CDB_IMMED_MASK;
2642 pcmod &= START_STOP_UNIT_CDB_POWER_COND_MOD_MASK;
2643 pc = (pc & START_STOP_UNIT_CDB_POWER_COND_MASK) >> NIBBLE_SHIFT;
2644 no_flush &= START_STOP_UNIT_CDB_NO_FLUSH_MASK;
2645 start &= START_STOP_UNIT_CDB_START_MASK;
2646
2647 if (immed != 0) {
2648 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2649 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2650 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2651 } else {
2652 if (no_flush == 0) {
2653 /* Issue NVME FLUSH command prior to START STOP UNIT */
Keith Busch14385de2013-04-25 14:39:27 -06002654 memset(&c, 0, sizeof(c));
2655 c.common.opcode = nvme_cmd_flush;
2656 c.common.nsid = cpu_to_le32(ns->ns_id);
2657
Keith Busch4f5099a2014-03-03 16:39:13 -07002658 nvme_sc = nvme_submit_io_cmd(ns->dev, &c, NULL);
Vishal Verma5d0f6132013-03-04 18:40:58 -07002659 res = nvme_trans_status_code(hdr, nvme_sc);
2660 if (res)
2661 goto out;
2662 if (nvme_sc) {
2663 res = nvme_sc;
2664 goto out;
2665 }
2666 }
2667 /* Setup the expected power state transition */
2668 res = nvme_trans_power_state(ns, hdr, pc, pcmod, start);
2669 }
2670
2671 out:
2672 return res;
2673}
2674
2675static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
2676 struct sg_io_hdr *hdr, u8 *cmd)
2677{
2678 int res = SNTI_TRANSLATION_SUCCESS;
2679 int nvme_sc;
Keith Busch14385de2013-04-25 14:39:27 -06002680 struct nvme_command c;
Keith Busch14385de2013-04-25 14:39:27 -06002681
2682 memset(&c, 0, sizeof(c));
2683 c.common.opcode = nvme_cmd_flush;
2684 c.common.nsid = cpu_to_le32(ns->ns_id);
2685
Keith Busch4f5099a2014-03-03 16:39:13 -07002686 nvme_sc = nvme_submit_io_cmd(ns->dev, &c, NULL);
Keith Busch14385de2013-04-25 14:39:27 -06002687
Vishal Verma5d0f6132013-03-04 18:40:58 -07002688 res = nvme_trans_status_code(hdr, nvme_sc);
2689 if (res)
2690 goto out;
2691 if (nvme_sc)
2692 res = nvme_sc;
2693
2694 out:
2695 return res;
2696}
2697
2698static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2699 u8 *cmd)
2700{
2701 int res = SNTI_TRANSLATION_SUCCESS;
2702 u8 parm_hdr_len = 0;
2703 u8 nvme_pf_code = 0;
2704 u8 format_prot_info, long_list, format_data;
2705
2706 format_prot_info = GET_U8_FROM_CDB(cmd,
2707 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET);
2708 long_list = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_LONG_LIST_OFFSET);
2709 format_data = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET);
2710
2711 format_prot_info = (format_prot_info &
2712 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK) >>
2713 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT;
2714 long_list &= FORMAT_UNIT_CDB_LONG_LIST_MASK;
2715 format_data &= FORMAT_UNIT_CDB_FORMAT_DATA_MASK;
2716
2717 if (format_data != 0) {
2718 if (format_prot_info != 0) {
2719 if (long_list == 0)
2720 parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
2721 else
2722 parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
2723 }
2724 } else if (format_data == 0 && format_prot_info != 0) {
2725 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2726 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2727 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2728 goto out;
2729 }
2730
2731 /* Get parm header from data-in/out buffer */
2732 /*
2733 * According to the translation spec, the only fields in the parameter
2734 * list we are concerned with are in the header. So allocate only that.
2735 */
2736 if (parm_hdr_len > 0) {
2737 res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
2738 format_prot_info, &nvme_pf_code);
2739 if (res != SNTI_TRANSLATION_SUCCESS)
2740 goto out;
2741 }
2742
2743 /* Attempt to activate any previously downloaded firmware image */
2744 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw, 0, 0, 0);
2745
2746 /* Determine Block size and count and send format command */
2747 res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
2748 if (res != SNTI_TRANSLATION_SUCCESS)
2749 goto out;
2750
2751 res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
2752
2753 out:
2754 return res;
2755}
2756
2757static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
2758 struct sg_io_hdr *hdr,
2759 u8 *cmd)
2760{
2761 int res = SNTI_TRANSLATION_SUCCESS;
2762 struct nvme_dev *dev = ns->dev;
2763
2764 if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
2765 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2766 NOT_READY, SCSI_ASC_LUN_NOT_READY,
2767 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2768 else
2769 res = nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
2770
2771 return res;
2772}
2773
2774static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2775 u8 *cmd)
2776{
2777 int res = SNTI_TRANSLATION_SUCCESS;
2778 u32 buffer_offset, parm_list_length;
2779 u8 buffer_id, mode;
2780
2781 parm_list_length =
2782 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET);
2783 if (parm_list_length % BYTES_TO_DWORDS != 0) {
2784 /* NVMe expects Firmware file to be a whole number of DWORDS */
2785 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2786 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2787 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2788 goto out;
2789 }
2790 buffer_id = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_ID_OFFSET);
2791 if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
2792 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2793 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2794 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2795 goto out;
2796 }
2797 mode = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_MODE_OFFSET) &
2798 WRITE_BUFFER_CDB_MODE_MASK;
2799 buffer_offset =
2800 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET);
2801
2802 switch (mode) {
2803 case DOWNLOAD_SAVE_ACTIVATE:
2804 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2805 parm_list_length, buffer_offset,
2806 buffer_id);
2807 if (res != SNTI_TRANSLATION_SUCCESS)
2808 goto out;
2809 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2810 parm_list_length, buffer_offset,
2811 buffer_id);
2812 break;
2813 case DOWNLOAD_SAVE_DEFER_ACTIVATE:
2814 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2815 parm_list_length, buffer_offset,
2816 buffer_id);
2817 break;
2818 case ACTIVATE_DEFERRED_MICROCODE:
2819 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2820 parm_list_length, buffer_offset,
2821 buffer_id);
2822 break;
2823 default:
2824 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2825 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2826 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2827 break;
2828 }
2829
2830 out:
2831 return res;
2832}
2833
Keith Buschec503732013-04-24 15:44:24 -06002834struct scsi_unmap_blk_desc {
2835 __be64 slba;
2836 __be32 nlb;
2837 u32 resv;
2838};
2839
2840struct scsi_unmap_parm_list {
2841 __be16 unmap_data_len;
2842 __be16 unmap_blk_desc_data_len;
2843 u32 resv;
2844 struct scsi_unmap_blk_desc desc[0];
2845};
2846
2847static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2848 u8 *cmd)
2849{
2850 struct nvme_dev *dev = ns->dev;
2851 struct scsi_unmap_parm_list *plist;
2852 struct nvme_dsm_range *range;
Keith Buschec503732013-04-24 15:44:24 -06002853 struct nvme_command c;
2854 int i, nvme_sc, res = -ENOMEM;
2855 u16 ndesc, list_len;
2856 dma_addr_t dma_addr;
2857
2858 list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
2859 if (!list_len)
2860 return -EINVAL;
2861
2862 plist = kmalloc(list_len, GFP_KERNEL);
2863 if (!plist)
2864 return -ENOMEM;
2865
2866 res = nvme_trans_copy_from_user(hdr, plist, list_len);
2867 if (res != SNTI_TRANSLATION_SUCCESS)
2868 goto out;
2869
2870 ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
2871 if (!ndesc || ndesc > 256) {
2872 res = -EINVAL;
2873 goto out;
2874 }
2875
2876 range = dma_alloc_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2877 &dma_addr, GFP_KERNEL);
2878 if (!range)
2879 goto out;
2880
2881 for (i = 0; i < ndesc; i++) {
2882 range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
2883 range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
2884 range[i].cattr = 0;
2885 }
2886
2887 memset(&c, 0, sizeof(c));
2888 c.dsm.opcode = nvme_cmd_dsm;
2889 c.dsm.nsid = cpu_to_le32(ns->ns_id);
2890 c.dsm.prp1 = cpu_to_le64(dma_addr);
2891 c.dsm.nr = cpu_to_le32(ndesc - 1);
2892 c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
2893
Keith Busch4f5099a2014-03-03 16:39:13 -07002894 nvme_sc = nvme_submit_io_cmd(dev, &c, NULL);
Keith Buschec503732013-04-24 15:44:24 -06002895 res = nvme_trans_status_code(hdr, nvme_sc);
2896
2897 dma_free_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2898 range, dma_addr);
2899 out:
2900 kfree(plist);
2901 return res;
2902}
2903
Vishal Verma5d0f6132013-03-04 18:40:58 -07002904static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
2905{
2906 u8 cmd[BLK_MAX_CDB];
2907 int retcode;
2908 unsigned int opcode;
2909
2910 if (hdr->cmdp == NULL)
2911 return -EMSGSIZE;
2912 if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
2913 return -EFAULT;
2914
2915 opcode = cmd[0];
2916
2917 switch (opcode) {
2918 case READ_6:
2919 case READ_10:
2920 case READ_12:
2921 case READ_16:
2922 retcode = nvme_trans_io(ns, hdr, 0, cmd);
2923 break;
2924 case WRITE_6:
2925 case WRITE_10:
2926 case WRITE_12:
2927 case WRITE_16:
2928 retcode = nvme_trans_io(ns, hdr, 1, cmd);
2929 break;
2930 case INQUIRY:
2931 retcode = nvme_trans_inquiry(ns, hdr, cmd);
2932 break;
2933 case LOG_SENSE:
2934 retcode = nvme_trans_log_sense(ns, hdr, cmd);
2935 break;
2936 case MODE_SELECT:
2937 case MODE_SELECT_10:
2938 retcode = nvme_trans_mode_select(ns, hdr, cmd);
2939 break;
2940 case MODE_SENSE:
2941 case MODE_SENSE_10:
2942 retcode = nvme_trans_mode_sense(ns, hdr, cmd);
2943 break;
2944 case READ_CAPACITY:
2945 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2946 break;
2947 case SERVICE_ACTION_IN:
2948 if (IS_READ_CAP_16(cmd))
2949 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2950 else
2951 goto out;
2952 break;
2953 case REPORT_LUNS:
2954 retcode = nvme_trans_report_luns(ns, hdr, cmd);
2955 break;
2956 case REQUEST_SENSE:
2957 retcode = nvme_trans_request_sense(ns, hdr, cmd);
2958 break;
2959 case SECURITY_PROTOCOL_IN:
2960 case SECURITY_PROTOCOL_OUT:
2961 retcode = nvme_trans_security_protocol(ns, hdr, cmd);
2962 break;
2963 case START_STOP:
2964 retcode = nvme_trans_start_stop(ns, hdr, cmd);
2965 break;
2966 case SYNCHRONIZE_CACHE:
2967 retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
2968 break;
2969 case FORMAT_UNIT:
2970 retcode = nvme_trans_format_unit(ns, hdr, cmd);
2971 break;
2972 case TEST_UNIT_READY:
2973 retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
2974 break;
2975 case WRITE_BUFFER:
2976 retcode = nvme_trans_write_buffer(ns, hdr, cmd);
2977 break;
Keith Buschec503732013-04-24 15:44:24 -06002978 case UNMAP:
2979 retcode = nvme_trans_unmap(ns, hdr, cmd);
2980 break;
Vishal Verma5d0f6132013-03-04 18:40:58 -07002981 default:
2982 out:
2983 retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2984 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2985 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2986 break;
2987 }
2988 return retcode;
2989}
2990
2991int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
2992{
2993 struct sg_io_hdr hdr;
2994 int retcode;
2995
2996 if (!capable(CAP_SYS_ADMIN))
2997 return -EACCES;
2998 if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
2999 return -EFAULT;
3000 if (hdr.interface_id != 'S')
3001 return -EINVAL;
3002 if (hdr.cmd_len > BLK_MAX_CDB)
3003 return -EINVAL;
3004
3005 retcode = nvme_scsi_translate(ns, &hdr);
3006 if (retcode < 0)
3007 return retcode;
3008 if (retcode > 0)
3009 retcode = SNTI_TRANSLATION_SUCCESS;
Vishal Verma8741ee42013-04-04 17:52:27 -06003010 if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
Vishal Verma5d0f6132013-03-04 18:40:58 -07003011 return -EFAULT;
3012
3013 return retcode;
3014}
3015
Keith Busch320a3822013-10-23 13:07:34 -06003016#ifdef CONFIG_COMPAT
3017typedef struct sg_io_hdr32 {
3018 compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */
3019 compat_int_t dxfer_direction; /* [i] data transfer direction */
3020 unsigned char cmd_len; /* [i] SCSI command length ( <= 16 bytes) */
3021 unsigned char mx_sb_len; /* [i] max length to write to sbp */
3022 unsigned short iovec_count; /* [i] 0 implies no scatter gather */
3023 compat_uint_t dxfer_len; /* [i] byte count of data transfer */
3024 compat_uint_t dxferp; /* [i], [*io] points to data transfer memory
3025 or scatter gather list */
3026 compat_uptr_t cmdp; /* [i], [*i] points to command to perform */
3027 compat_uptr_t sbp; /* [i], [*o] points to sense_buffer memory */
3028 compat_uint_t timeout; /* [i] MAX_UINT->no timeout (unit: millisec) */
3029 compat_uint_t flags; /* [i] 0 -> default, see SG_FLAG... */
3030 compat_int_t pack_id; /* [i->o] unused internally (normally) */
3031 compat_uptr_t usr_ptr; /* [i->o] unused internally */
3032 unsigned char status; /* [o] scsi status */
3033 unsigned char masked_status; /* [o] shifted, masked scsi status */
3034 unsigned char msg_status; /* [o] messaging level data (optional) */
3035 unsigned char sb_len_wr; /* [o] byte count actually written to sbp */
3036 unsigned short host_status; /* [o] errors from host adapter */
3037 unsigned short driver_status; /* [o] errors from software driver */
3038 compat_int_t resid; /* [o] dxfer_len - actual_transferred */
3039 compat_uint_t duration; /* [o] time taken by cmd (unit: millisec) */
3040 compat_uint_t info; /* [o] auxiliary information */
3041} sg_io_hdr32_t; /* 64 bytes long (on sparc32) */
3042
3043typedef struct sg_iovec32 {
3044 compat_uint_t iov_base;
3045 compat_uint_t iov_len;
3046} sg_iovec32_t;
3047
3048static int sg_build_iovec(sg_io_hdr_t __user *sgio, void __user *dxferp, u16 iovec_count)
3049{
3050 sg_iovec_t __user *iov = (sg_iovec_t __user *) (sgio + 1);
3051 sg_iovec32_t __user *iov32 = dxferp;
3052 int i;
3053
3054 for (i = 0; i < iovec_count; i++) {
3055 u32 base, len;
3056
3057 if (get_user(base, &iov32[i].iov_base) ||
3058 get_user(len, &iov32[i].iov_len) ||
3059 put_user(compat_ptr(base), &iov[i].iov_base) ||
3060 put_user(len, &iov[i].iov_len))
3061 return -EFAULT;
3062 }
3063
3064 if (put_user(iov, &sgio->dxferp))
3065 return -EFAULT;
3066 return 0;
3067}
3068
3069int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg)
3070{
3071 sg_io_hdr32_t __user *sgio32 = (sg_io_hdr32_t __user *)arg;
3072 sg_io_hdr_t __user *sgio;
3073 u16 iovec_count;
3074 u32 data;
3075 void __user *dxferp;
3076 int err;
3077 int interface_id;
3078
3079 if (get_user(interface_id, &sgio32->interface_id))
3080 return -EFAULT;
3081 if (interface_id != 'S')
3082 return -EINVAL;
3083
3084 if (get_user(iovec_count, &sgio32->iovec_count))
3085 return -EFAULT;
3086
3087 {
3088 void __user *top = compat_alloc_user_space(0);
3089 void __user *new = compat_alloc_user_space(sizeof(sg_io_hdr_t) +
3090 (iovec_count * sizeof(sg_iovec_t)));
3091 if (new > top)
3092 return -EINVAL;
3093
3094 sgio = new;
3095 }
3096
3097 /* Ok, now construct. */
3098 if (copy_in_user(&sgio->interface_id, &sgio32->interface_id,
3099 (2 * sizeof(int)) +
3100 (2 * sizeof(unsigned char)) +
3101 (1 * sizeof(unsigned short)) +
3102 (1 * sizeof(unsigned int))))
3103 return -EFAULT;
3104
3105 if (get_user(data, &sgio32->dxferp))
3106 return -EFAULT;
3107 dxferp = compat_ptr(data);
3108 if (iovec_count) {
3109 if (sg_build_iovec(sgio, dxferp, iovec_count))
3110 return -EFAULT;
3111 } else {
3112 if (put_user(dxferp, &sgio->dxferp))
3113 return -EFAULT;
3114 }
3115
3116 {
3117 unsigned char __user *cmdp;
3118 unsigned char __user *sbp;
3119
3120 if (get_user(data, &sgio32->cmdp))
3121 return -EFAULT;
3122 cmdp = compat_ptr(data);
3123
3124 if (get_user(data, &sgio32->sbp))
3125 return -EFAULT;
3126 sbp = compat_ptr(data);
3127
3128 if (put_user(cmdp, &sgio->cmdp) ||
3129 put_user(sbp, &sgio->sbp))
3130 return -EFAULT;
3131 }
3132
3133 if (copy_in_user(&sgio->timeout, &sgio32->timeout,
3134 3 * sizeof(int)))
3135 return -EFAULT;
3136
3137 if (get_user(data, &sgio32->usr_ptr))
3138 return -EFAULT;
3139 if (put_user(compat_ptr(data), &sgio->usr_ptr))
3140 return -EFAULT;
3141
3142 err = nvme_sg_io(ns, sgio);
3143 if (err >= 0) {
3144 void __user *datap;
3145
3146 if (copy_in_user(&sgio32->pack_id, &sgio->pack_id,
3147 sizeof(int)) ||
3148 get_user(datap, &sgio->usr_ptr) ||
3149 put_user((u32)(unsigned long)datap,
3150 &sgio32->usr_ptr) ||
3151 copy_in_user(&sgio32->status, &sgio->status,
3152 (4 * sizeof(unsigned char)) +
3153 (2 * sizeof(unsigned short)) +
3154 (3 * sizeof(int))))
3155 err = -EFAULT;
3156 }
3157
3158 return err;
3159}
3160#endif
3161
Vishal Verma5d0f6132013-03-04 18:40:58 -07003162int nvme_sg_get_version_num(int __user *ip)
3163{
3164 return put_user(sg_version_num, ip);
3165}