Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2011 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 21 | * SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Jesse Barnes <jbarnes@virtuousgeek.org> |
| 25 | * |
| 26 | * New plane/sprite handling. |
| 27 | * |
| 28 | * The older chips had a separate interface for programming plane related |
| 29 | * registers; newer ones are much simpler and we can use the new DRM plane |
| 30 | * support. |
| 31 | */ |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 32 | #include <drm/drmP.h> |
| 33 | #include <drm/drm_crtc.h> |
| 34 | #include <drm/drm_fourcc.h> |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 35 | #include <drm/drm_rect.h> |
Chandra Konduru | c331879 | 2015-04-15 15:15:02 -0700 | [diff] [blame] | 36 | #include <drm/drm_atomic.h> |
Matt Roper | ea2c67b | 2014-12-23 10:41:52 -0800 | [diff] [blame] | 37 | #include <drm/drm_plane_helper.h> |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 38 | #include "intel_drv.h" |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 39 | #include <drm/i915_drm.h> |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 40 | #include "i915_drv.h" |
| 41 | |
Ville Syrjälä | 6ca2aeb | 2014-10-20 19:47:53 +0300 | [diff] [blame] | 42 | static bool |
| 43 | format_is_yuv(uint32_t format) |
| 44 | { |
| 45 | switch (format) { |
| 46 | case DRM_FORMAT_YUYV: |
| 47 | case DRM_FORMAT_UYVY: |
| 48 | case DRM_FORMAT_VYUY: |
| 49 | case DRM_FORMAT_YVYU: |
| 50 | return true; |
| 51 | default: |
| 52 | return false; |
| 53 | } |
| 54 | } |
| 55 | |
Ville Syrjälä | 5e7234c | 2015-09-25 16:37:43 +0300 | [diff] [blame] | 56 | static int usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, |
| 57 | int usecs) |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 58 | { |
| 59 | /* paranoia */ |
Ville Syrjälä | 5e7234c | 2015-09-25 16:37:43 +0300 | [diff] [blame] | 60 | if (!adjusted_mode->crtc_htotal) |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 61 | return 1; |
| 62 | |
Ville Syrjälä | 5e7234c | 2015-09-25 16:37:43 +0300 | [diff] [blame] | 63 | return DIV_ROUND_UP(usecs * adjusted_mode->crtc_clock, |
| 64 | 1000 * adjusted_mode->crtc_htotal); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 65 | } |
| 66 | |
Ander Conselvan de Oliveira | 26ff276 | 2014-10-28 15:10:12 +0200 | [diff] [blame] | 67 | /** |
| 68 | * intel_pipe_update_start() - start update of a set of display registers |
| 69 | * @crtc: the crtc of which the registers are going to be updated |
| 70 | * @start_vbl_count: vblank counter return pointer used for error checking |
| 71 | * |
| 72 | * Mark the start of an update to pipe registers that should be updated |
| 73 | * atomically regarding vblank. If the next vblank will happens within |
| 74 | * the next 100 us, this function waits until the vblank passes. |
| 75 | * |
| 76 | * After a successful call to this function, interrupts will be disabled |
| 77 | * until a subsequent call to intel_pipe_update_end(). That is done to |
| 78 | * avoid random delays. The value written to @start_vbl_count should be |
| 79 | * supplied to intel_pipe_update_end() for error checking. |
Ander Conselvan de Oliveira | 26ff276 | 2014-10-28 15:10:12 +0200 | [diff] [blame] | 80 | */ |
Maarten Lankhorst | 34e0adb | 2015-08-31 13:04:25 +0200 | [diff] [blame] | 81 | void intel_pipe_update_start(struct intel_crtc *crtc) |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 82 | { |
| 83 | struct drm_device *dev = crtc->base.dev; |
Ville Syrjälä | 124abe0 | 2015-09-08 13:40:45 +0300 | [diff] [blame] | 84 | const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode; |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 85 | enum pipe pipe = crtc->pipe; |
| 86 | long timeout = msecs_to_jiffies_timeout(1); |
| 87 | int scanline, min, max, vblank_start; |
Ville Syrjälä | 210871b | 2014-05-22 19:00:50 +0300 | [diff] [blame] | 88 | wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 89 | DEFINE_WAIT(wait); |
| 90 | |
Ville Syrjälä | 124abe0 | 2015-09-08 13:40:45 +0300 | [diff] [blame] | 91 | vblank_start = adjusted_mode->crtc_vblank_start; |
| 92 | if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 93 | vblank_start = DIV_ROUND_UP(vblank_start, 2); |
| 94 | |
| 95 | /* FIXME needs to be calibrated sensibly */ |
Ville Syrjälä | 124abe0 | 2015-09-08 13:40:45 +0300 | [diff] [blame] | 96 | min = vblank_start - usecs_to_scanlines(adjusted_mode, 100); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 97 | max = vblank_start - 1; |
| 98 | |
Maarten Lankhorst | 8f539a8 | 2015-07-13 16:30:32 +0200 | [diff] [blame] | 99 | local_irq_disable(); |
Maarten Lankhorst | 8f539a8 | 2015-07-13 16:30:32 +0200 | [diff] [blame] | 100 | |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 101 | if (min <= 0 || max <= 0) |
Maarten Lankhorst | 8f539a8 | 2015-07-13 16:30:32 +0200 | [diff] [blame] | 102 | return; |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 103 | |
Daniel Vetter | 1e3feef | 2015-02-13 21:03:45 +0100 | [diff] [blame] | 104 | if (WARN_ON(drm_crtc_vblank_get(&crtc->base))) |
Maarten Lankhorst | 8f539a8 | 2015-07-13 16:30:32 +0200 | [diff] [blame] | 105 | return; |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 106 | |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 107 | crtc->debug.min_vbl = min; |
| 108 | crtc->debug.max_vbl = max; |
| 109 | trace_i915_pipe_update_start(crtc); |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 110 | |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 111 | for (;;) { |
| 112 | /* |
| 113 | * prepare_to_wait() has a memory barrier, which guarantees |
| 114 | * other CPUs can see the task state update by the time we |
| 115 | * read the scanline. |
| 116 | */ |
Ville Syrjälä | 210871b | 2014-05-22 19:00:50 +0300 | [diff] [blame] | 117 | prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 118 | |
| 119 | scanline = intel_get_crtc_scanline(crtc); |
| 120 | if (scanline < min || scanline > max) |
| 121 | break; |
| 122 | |
| 123 | if (timeout <= 0) { |
| 124 | DRM_ERROR("Potential atomic update failure on pipe %c\n", |
| 125 | pipe_name(crtc->pipe)); |
| 126 | break; |
| 127 | } |
| 128 | |
| 129 | local_irq_enable(); |
| 130 | |
| 131 | timeout = schedule_timeout(timeout); |
| 132 | |
| 133 | local_irq_disable(); |
| 134 | } |
| 135 | |
Ville Syrjälä | 210871b | 2014-05-22 19:00:50 +0300 | [diff] [blame] | 136 | finish_wait(wq, &wait); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 137 | |
Daniel Vetter | 1e3feef | 2015-02-13 21:03:45 +0100 | [diff] [blame] | 138 | drm_crtc_vblank_put(&crtc->base); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 139 | |
Jesse Barnes | eb120ef | 2015-09-15 14:19:32 -0700 | [diff] [blame] | 140 | crtc->debug.scanline_start = scanline; |
| 141 | crtc->debug.start_vbl_time = ktime_get(); |
| 142 | crtc->debug.start_vbl_count = |
| 143 | dev->driver->get_vblank_counter(dev, pipe); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 144 | |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 145 | trace_i915_pipe_update_vblank_evaded(crtc); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 146 | } |
| 147 | |
Ander Conselvan de Oliveira | 26ff276 | 2014-10-28 15:10:12 +0200 | [diff] [blame] | 148 | /** |
| 149 | * intel_pipe_update_end() - end update of a set of display registers |
| 150 | * @crtc: the crtc of which the registers were updated |
| 151 | * @start_vbl_count: start vblank counter (used for error checking) |
| 152 | * |
| 153 | * Mark the end of an update started with intel_pipe_update_start(). This |
| 154 | * re-enables interrupts and verifies the update was actually completed |
| 155 | * before a vblank using the value of @start_vbl_count. |
| 156 | */ |
Maarten Lankhorst | 34e0adb | 2015-08-31 13:04:25 +0200 | [diff] [blame] | 157 | void intel_pipe_update_end(struct intel_crtc *crtc) |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 158 | { |
| 159 | struct drm_device *dev = crtc->base.dev; |
| 160 | enum pipe pipe = crtc->pipe; |
Jesse Barnes | eb120ef | 2015-09-15 14:19:32 -0700 | [diff] [blame] | 161 | int scanline_end = intel_get_crtc_scanline(crtc); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 162 | u32 end_vbl_count = dev->driver->get_vblank_counter(dev, pipe); |
Maarten Lankhorst | 85a62bf | 2015-09-01 12:15:33 +0200 | [diff] [blame] | 163 | ktime_t end_vbl_time = ktime_get(); |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 164 | |
Jesse Barnes | d637ce3 | 2015-09-17 08:08:32 -0700 | [diff] [blame] | 165 | trace_i915_pipe_update_end(crtc, end_vbl_count, scanline_end); |
Ville Syrjälä | 25ef284 | 2014-04-29 13:35:48 +0300 | [diff] [blame] | 166 | |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 167 | local_irq_enable(); |
| 168 | |
Jesse Barnes | eb120ef | 2015-09-15 14:19:32 -0700 | [diff] [blame] | 169 | if (crtc->debug.start_vbl_count && |
| 170 | crtc->debug.start_vbl_count != end_vbl_count) { |
| 171 | DRM_ERROR("Atomic update failure on pipe %c (start=%u end=%u) time %lld us, min %d, max %d, scanline start %d, end %d\n", |
| 172 | pipe_name(pipe), crtc->debug.start_vbl_count, |
| 173 | end_vbl_count, |
| 174 | ktime_us_delta(end_vbl_time, crtc->debug.start_vbl_time), |
| 175 | crtc->debug.min_vbl, crtc->debug.max_vbl, |
| 176 | crtc->debug.scanline_start, scanline_end); |
| 177 | } |
Ville Syrjälä | 8d7849d | 2014-04-29 13:35:46 +0300 | [diff] [blame] | 178 | } |
| 179 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 180 | static void |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 181 | skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, |
| 182 | struct drm_framebuffer *fb, |
Ville Syrjälä | bdd7554 | 2015-03-19 17:57:11 +0200 | [diff] [blame] | 183 | int crtc_x, int crtc_y, |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 184 | unsigned int crtc_w, unsigned int crtc_h, |
| 185 | uint32_t x, uint32_t y, |
| 186 | uint32_t src_w, uint32_t src_h) |
| 187 | { |
| 188 | struct drm_device *dev = drm_plane->dev; |
| 189 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 190 | struct intel_plane *intel_plane = to_intel_plane(drm_plane); |
Ville Syrjälä | bdd7554 | 2015-03-19 17:57:11 +0200 | [diff] [blame] | 191 | struct drm_i915_gem_object *obj = intel_fb_obj(fb); |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 192 | const int pipe = intel_plane->pipe; |
| 193 | const int plane = intel_plane->plane + 1; |
Sonika Jindal | 3b7a511 | 2015-04-10 14:37:29 +0530 | [diff] [blame] | 194 | u32 plane_ctl, stride_div, stride; |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 195 | const struct drm_intel_sprite_colorkey *key = |
| 196 | &to_intel_plane_state(drm_plane->state)->ckey; |
Tvrtko Ursulin | 121920f | 2015-03-23 11:10:37 +0000 | [diff] [blame] | 197 | unsigned long surf_addr; |
Sonika Jindal | 3b7a511 | 2015-04-10 14:37:29 +0530 | [diff] [blame] | 198 | u32 tile_height, plane_offset, plane_size; |
| 199 | unsigned int rotation; |
| 200 | int x_offset, y_offset; |
Chandra Konduru | c331879 | 2015-04-15 15:15:02 -0700 | [diff] [blame] | 201 | struct intel_crtc_state *crtc_state = to_intel_crtc(crtc)->config; |
| 202 | int scaler_id; |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 203 | |
Ville Syrjälä | 48fe469 | 2015-03-19 17:57:13 +0200 | [diff] [blame] | 204 | plane_ctl = PLANE_CTL_ENABLE | |
| 205 | PLANE_CTL_PIPE_CSC_ENABLE; |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 206 | |
Chandra Konduru | c331879 | 2015-04-15 15:15:02 -0700 | [diff] [blame] | 207 | plane_ctl |= skl_plane_ctl_format(fb->pixel_format); |
| 208 | plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]); |
Damien Lespiau | b321803 | 2015-02-27 11:15:18 +0000 | [diff] [blame] | 209 | |
Sonika Jindal | 3b7a511 | 2015-04-10 14:37:29 +0530 | [diff] [blame] | 210 | rotation = drm_plane->state->rotation; |
Chandra Konduru | c331879 | 2015-04-15 15:15:02 -0700 | [diff] [blame] | 211 | plane_ctl |= skl_plane_ctl_rotation(rotation); |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 212 | |
Damien Lespiau | b321803 | 2015-02-27 11:15:18 +0000 | [diff] [blame] | 213 | stride_div = intel_fb_stride_alignment(dev, fb->modifier[0], |
| 214 | fb->pixel_format); |
| 215 | |
Chandra Konduru | c331879 | 2015-04-15 15:15:02 -0700 | [diff] [blame] | 216 | scaler_id = to_intel_plane_state(drm_plane->state)->scaler_id; |
| 217 | |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 218 | /* Sizes are 0 based */ |
| 219 | src_w--; |
| 220 | src_h--; |
| 221 | crtc_w--; |
| 222 | crtc_h--; |
| 223 | |
Ville Syrjälä | 47ecbb2 | 2015-03-19 21:18:57 +0200 | [diff] [blame] | 224 | if (key->flags) { |
| 225 | I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value); |
| 226 | I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value); |
| 227 | I915_WRITE(PLANE_KEYMSK(pipe, plane), key->channel_mask); |
| 228 | } |
| 229 | |
| 230 | if (key->flags & I915_SET_COLORKEY_DESTINATION) |
| 231 | plane_ctl |= PLANE_CTL_KEY_ENABLE_DESTINATION; |
| 232 | else if (key->flags & I915_SET_COLORKEY_SOURCE) |
| 233 | plane_ctl |= PLANE_CTL_KEY_ENABLE_SOURCE; |
| 234 | |
Tvrtko Ursulin | dedf278 | 2015-09-21 10:45:35 +0100 | [diff] [blame] | 235 | surf_addr = intel_plane_obj_offset(intel_plane, obj, 0); |
Tvrtko Ursulin | 121920f | 2015-03-23 11:10:37 +0000 | [diff] [blame] | 236 | |
Sonika Jindal | 3b7a511 | 2015-04-10 14:37:29 +0530 | [diff] [blame] | 237 | if (intel_rotation_90_or_270(rotation)) { |
| 238 | /* stride: Surface height in tiles */ |
Chandra Konduru | 2614f17 | 2015-05-08 20:22:46 -0700 | [diff] [blame] | 239 | tile_height = intel_tile_height(dev, fb->pixel_format, |
Tvrtko Ursulin | fe47ea0 | 2015-09-21 10:45:32 +0100 | [diff] [blame] | 240 | fb->modifier[0], 0); |
Sonika Jindal | 3b7a511 | 2015-04-10 14:37:29 +0530 | [diff] [blame] | 241 | stride = DIV_ROUND_UP(fb->height, tile_height); |
| 242 | plane_size = (src_w << 16) | src_h; |
| 243 | x_offset = stride * tile_height - y - (src_h + 1); |
| 244 | y_offset = x; |
| 245 | } else { |
| 246 | stride = fb->pitches[0] / stride_div; |
| 247 | plane_size = (src_h << 16) | src_w; |
| 248 | x_offset = x; |
| 249 | y_offset = y; |
| 250 | } |
| 251 | plane_offset = y_offset << 16 | x_offset; |
| 252 | |
| 253 | I915_WRITE(PLANE_OFFSET(pipe, plane), plane_offset); |
| 254 | I915_WRITE(PLANE_STRIDE(pipe, plane), stride); |
Sonika Jindal | 3b7a511 | 2015-04-10 14:37:29 +0530 | [diff] [blame] | 255 | I915_WRITE(PLANE_SIZE(pipe, plane), plane_size); |
Chandra Konduru | c331879 | 2015-04-15 15:15:02 -0700 | [diff] [blame] | 256 | |
| 257 | /* program plane scaler */ |
| 258 | if (scaler_id >= 0) { |
| 259 | uint32_t ps_ctrl = 0; |
| 260 | |
| 261 | DRM_DEBUG_KMS("plane = %d PS_PLANE_SEL(plane) = 0x%x\n", plane, |
| 262 | PS_PLANE_SEL(plane)); |
| 263 | ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane) | |
| 264 | crtc_state->scaler_state.scalers[scaler_id].mode; |
| 265 | I915_WRITE(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl); |
| 266 | I915_WRITE(SKL_PS_PWR_GATE(pipe, scaler_id), 0); |
| 267 | I915_WRITE(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y); |
| 268 | I915_WRITE(SKL_PS_WIN_SZ(pipe, scaler_id), |
| 269 | ((crtc_w + 1) << 16)|(crtc_h + 1)); |
| 270 | |
| 271 | I915_WRITE(PLANE_POS(pipe, plane), 0); |
| 272 | } else { |
| 273 | I915_WRITE(PLANE_POS(pipe, plane), (crtc_y << 16) | crtc_x); |
| 274 | } |
| 275 | |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 276 | I915_WRITE(PLANE_CTL(pipe, plane), plane_ctl); |
Tvrtko Ursulin | 121920f | 2015-03-23 11:10:37 +0000 | [diff] [blame] | 277 | I915_WRITE(PLANE_SURF(pipe, plane), surf_addr); |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 278 | POSTING_READ(PLANE_SURF(pipe, plane)); |
| 279 | } |
| 280 | |
| 281 | static void |
Maarten Lankhorst | 7fabf5e | 2015-06-15 12:33:47 +0200 | [diff] [blame] | 282 | skl_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc) |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 283 | { |
Maarten Lankhorst | a8ad0d8 | 2015-04-21 17:12:51 +0300 | [diff] [blame] | 284 | struct drm_device *dev = dplane->dev; |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 285 | struct drm_i915_private *dev_priv = dev->dev_private; |
Maarten Lankhorst | a8ad0d8 | 2015-04-21 17:12:51 +0300 | [diff] [blame] | 286 | struct intel_plane *intel_plane = to_intel_plane(dplane); |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 287 | const int pipe = intel_plane->pipe; |
| 288 | const int plane = intel_plane->plane + 1; |
| 289 | |
Ville Syrjälä | 48fe469 | 2015-03-19 17:57:13 +0200 | [diff] [blame] | 290 | I915_WRITE(PLANE_CTL(pipe, plane), 0); |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 291 | |
Ville Syrjälä | 2ddc1da | 2015-03-19 17:57:14 +0200 | [diff] [blame] | 292 | I915_WRITE(PLANE_SURF(pipe, plane), 0); |
| 293 | POSTING_READ(PLANE_SURF(pipe, plane)); |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 294 | } |
| 295 | |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 296 | static void |
Ville Syrjälä | 6ca2aeb | 2014-10-20 19:47:53 +0300 | [diff] [blame] | 297 | chv_update_csc(struct intel_plane *intel_plane, uint32_t format) |
| 298 | { |
| 299 | struct drm_i915_private *dev_priv = intel_plane->base.dev->dev_private; |
| 300 | int plane = intel_plane->plane; |
| 301 | |
| 302 | /* Seems RGB data bypasses the CSC always */ |
| 303 | if (!format_is_yuv(format)) |
| 304 | return; |
| 305 | |
| 306 | /* |
| 307 | * BT.601 limited range YCbCr -> full range RGB |
| 308 | * |
| 309 | * |r| | 6537 4769 0| |cr | |
| 310 | * |g| = |-3330 4769 -1605| x |y-64| |
| 311 | * |b| | 0 4769 8263| |cb | |
| 312 | * |
| 313 | * Cb and Cr apparently come in as signed already, so no |
| 314 | * need for any offset. For Y we need to remove the offset. |
| 315 | */ |
| 316 | I915_WRITE(SPCSCYGOFF(plane), SPCSC_OOFF(0) | SPCSC_IOFF(-64)); |
| 317 | I915_WRITE(SPCSCCBOFF(plane), SPCSC_OOFF(0) | SPCSC_IOFF(0)); |
| 318 | I915_WRITE(SPCSCCROFF(plane), SPCSC_OOFF(0) | SPCSC_IOFF(0)); |
| 319 | |
| 320 | I915_WRITE(SPCSCC01(plane), SPCSC_C1(4769) | SPCSC_C0(6537)); |
| 321 | I915_WRITE(SPCSCC23(plane), SPCSC_C1(-3330) | SPCSC_C0(0)); |
| 322 | I915_WRITE(SPCSCC45(plane), SPCSC_C1(-1605) | SPCSC_C0(4769)); |
| 323 | I915_WRITE(SPCSCC67(plane), SPCSC_C1(4769) | SPCSC_C0(0)); |
| 324 | I915_WRITE(SPCSCC8(plane), SPCSC_C0(8263)); |
| 325 | |
| 326 | I915_WRITE(SPCSCYGICLAMP(plane), SPCSC_IMAX(940) | SPCSC_IMIN(64)); |
| 327 | I915_WRITE(SPCSCCBICLAMP(plane), SPCSC_IMAX(448) | SPCSC_IMIN(-448)); |
| 328 | I915_WRITE(SPCSCCRICLAMP(plane), SPCSC_IMAX(448) | SPCSC_IMIN(-448)); |
| 329 | |
| 330 | I915_WRITE(SPCSCYGOCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0)); |
| 331 | I915_WRITE(SPCSCCBOCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0)); |
| 332 | I915_WRITE(SPCSCCROCLAMP(plane), SPCSC_OMAX(1023) | SPCSC_OMIN(0)); |
| 333 | } |
| 334 | |
| 335 | static void |
Ville Syrjälä | b39d53f | 2013-08-06 22:24:09 +0300 | [diff] [blame] | 336 | vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc, |
| 337 | struct drm_framebuffer *fb, |
Ville Syrjälä | bdd7554 | 2015-03-19 17:57:11 +0200 | [diff] [blame] | 338 | int crtc_x, int crtc_y, |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 339 | unsigned int crtc_w, unsigned int crtc_h, |
| 340 | uint32_t x, uint32_t y, |
| 341 | uint32_t src_w, uint32_t src_h) |
| 342 | { |
| 343 | struct drm_device *dev = dplane->dev; |
| 344 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 345 | struct intel_plane *intel_plane = to_intel_plane(dplane); |
Ville Syrjälä | bdd7554 | 2015-03-19 17:57:11 +0200 | [diff] [blame] | 346 | struct drm_i915_gem_object *obj = intel_fb_obj(fb); |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 347 | int pipe = intel_plane->pipe; |
| 348 | int plane = intel_plane->plane; |
| 349 | u32 sprctl; |
| 350 | unsigned long sprsurf_offset, linear_offset; |
| 351 | int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 352 | const struct drm_intel_sprite_colorkey *key = |
| 353 | &to_intel_plane_state(dplane->state)->ckey; |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 354 | |
Ville Syrjälä | 48fe469 | 2015-03-19 17:57:13 +0200 | [diff] [blame] | 355 | sprctl = SP_ENABLE; |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 356 | |
| 357 | switch (fb->pixel_format) { |
| 358 | case DRM_FORMAT_YUYV: |
| 359 | sprctl |= SP_FORMAT_YUV422 | SP_YUV_ORDER_YUYV; |
| 360 | break; |
| 361 | case DRM_FORMAT_YVYU: |
| 362 | sprctl |= SP_FORMAT_YUV422 | SP_YUV_ORDER_YVYU; |
| 363 | break; |
| 364 | case DRM_FORMAT_UYVY: |
| 365 | sprctl |= SP_FORMAT_YUV422 | SP_YUV_ORDER_UYVY; |
| 366 | break; |
| 367 | case DRM_FORMAT_VYUY: |
| 368 | sprctl |= SP_FORMAT_YUV422 | SP_YUV_ORDER_VYUY; |
| 369 | break; |
| 370 | case DRM_FORMAT_RGB565: |
| 371 | sprctl |= SP_FORMAT_BGR565; |
| 372 | break; |
| 373 | case DRM_FORMAT_XRGB8888: |
| 374 | sprctl |= SP_FORMAT_BGRX8888; |
| 375 | break; |
| 376 | case DRM_FORMAT_ARGB8888: |
| 377 | sprctl |= SP_FORMAT_BGRA8888; |
| 378 | break; |
| 379 | case DRM_FORMAT_XBGR2101010: |
| 380 | sprctl |= SP_FORMAT_RGBX1010102; |
| 381 | break; |
| 382 | case DRM_FORMAT_ABGR2101010: |
| 383 | sprctl |= SP_FORMAT_RGBA1010102; |
| 384 | break; |
| 385 | case DRM_FORMAT_XBGR8888: |
| 386 | sprctl |= SP_FORMAT_RGBX8888; |
| 387 | break; |
| 388 | case DRM_FORMAT_ABGR8888: |
| 389 | sprctl |= SP_FORMAT_RGBA8888; |
| 390 | break; |
| 391 | default: |
| 392 | /* |
| 393 | * If we get here one of the upper layers failed to filter |
| 394 | * out the unsupported plane formats |
| 395 | */ |
| 396 | BUG(); |
| 397 | break; |
| 398 | } |
| 399 | |
Ville Syrjälä | 4ea67bc | 2013-11-18 18:32:38 -0800 | [diff] [blame] | 400 | /* |
| 401 | * Enable gamma to match primary/cursor plane behaviour. |
| 402 | * FIXME should be user controllable via propertiesa. |
| 403 | */ |
| 404 | sprctl |= SP_GAMMA_ENABLE; |
| 405 | |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 406 | if (obj->tiling_mode != I915_TILING_NONE) |
| 407 | sprctl |= SP_TILED; |
| 408 | |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 409 | /* Sizes are 0 based */ |
| 410 | src_w--; |
| 411 | src_h--; |
| 412 | crtc_w--; |
| 413 | crtc_h--; |
| 414 | |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 415 | linear_offset = y * fb->pitches[0] + x * pixel_size; |
Ville Syrjälä | 4e9a86b | 2015-06-11 16:31:14 +0300 | [diff] [blame] | 416 | sprsurf_offset = intel_gen4_compute_page_offset(dev_priv, |
| 417 | &x, &y, |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 418 | obj->tiling_mode, |
| 419 | pixel_size, |
| 420 | fb->pitches[0]); |
| 421 | linear_offset -= sprsurf_offset; |
| 422 | |
Matt Roper | 8e7d688 | 2015-01-21 16:35:41 -0800 | [diff] [blame] | 423 | if (dplane->state->rotation == BIT(DRM_ROTATE_180)) { |
Ville Syrjälä | 76eebda | 2014-08-05 11:26:52 +0530 | [diff] [blame] | 424 | sprctl |= SP_ROTATE_180; |
| 425 | |
| 426 | x += src_w; |
| 427 | y += src_h; |
| 428 | linear_offset += src_h * fb->pitches[0] + src_w * pixel_size; |
| 429 | } |
| 430 | |
Ville Syrjälä | 47ecbb2 | 2015-03-19 21:18:57 +0200 | [diff] [blame] | 431 | if (key->flags) { |
| 432 | I915_WRITE(SPKEYMINVAL(pipe, plane), key->min_value); |
| 433 | I915_WRITE(SPKEYMAXVAL(pipe, plane), key->max_value); |
| 434 | I915_WRITE(SPKEYMSK(pipe, plane), key->channel_mask); |
| 435 | } |
| 436 | |
| 437 | if (key->flags & I915_SET_COLORKEY_SOURCE) |
| 438 | sprctl |= SP_SOURCE_KEY; |
| 439 | |
Ville Syrjälä | 6ca2aeb | 2014-10-20 19:47:53 +0300 | [diff] [blame] | 440 | if (IS_CHERRYVIEW(dev) && pipe == PIPE_B) |
| 441 | chv_update_csc(intel_plane, fb->pixel_format); |
| 442 | |
Ville Syrjälä | ca6ad02 | 2014-01-17 20:09:03 +0200 | [diff] [blame] | 443 | I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]); |
| 444 | I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x); |
| 445 | |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 446 | if (obj->tiling_mode != I915_TILING_NONE) |
| 447 | I915_WRITE(SPTILEOFF(pipe, plane), (y << 16) | x); |
| 448 | else |
| 449 | I915_WRITE(SPLINOFF(pipe, plane), linear_offset); |
| 450 | |
Ville Syrjälä | c14b048 | 2014-10-16 20:52:34 +0300 | [diff] [blame] | 451 | I915_WRITE(SPCONSTALPHA(pipe, plane), 0); |
| 452 | |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 453 | I915_WRITE(SPSIZE(pipe, plane), (crtc_h << 16) | crtc_w); |
| 454 | I915_WRITE(SPCNTR(pipe, plane), sprctl); |
Daniel Vetter | 85ba7b7 | 2014-01-24 10:31:44 +0100 | [diff] [blame] | 455 | I915_WRITE(SPSURF(pipe, plane), i915_gem_obj_ggtt_offset(obj) + |
| 456 | sprsurf_offset); |
Ville Syrjälä | b12ce1d | 2015-05-26 20:27:23 +0300 | [diff] [blame] | 457 | POSTING_READ(SPSURF(pipe, plane)); |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 458 | } |
| 459 | |
| 460 | static void |
Maarten Lankhorst | 7fabf5e | 2015-06-15 12:33:47 +0200 | [diff] [blame] | 461 | vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc) |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 462 | { |
| 463 | struct drm_device *dev = dplane->dev; |
| 464 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 465 | struct intel_plane *intel_plane = to_intel_plane(dplane); |
| 466 | int pipe = intel_plane->pipe; |
| 467 | int plane = intel_plane->plane; |
| 468 | |
Ville Syrjälä | 48fe469 | 2015-03-19 17:57:13 +0200 | [diff] [blame] | 469 | I915_WRITE(SPCNTR(pipe, plane), 0); |
| 470 | |
Daniel Vetter | 85ba7b7 | 2014-01-24 10:31:44 +0100 | [diff] [blame] | 471 | I915_WRITE(SPSURF(pipe, plane), 0); |
Ville Syrjälä | b12ce1d | 2015-05-26 20:27:23 +0300 | [diff] [blame] | 472 | POSTING_READ(SPSURF(pipe, plane)); |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 473 | } |
| 474 | |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 475 | static void |
Ville Syrjälä | b39d53f | 2013-08-06 22:24:09 +0300 | [diff] [blame] | 476 | ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, |
| 477 | struct drm_framebuffer *fb, |
Ville Syrjälä | bdd7554 | 2015-03-19 17:57:11 +0200 | [diff] [blame] | 478 | int crtc_x, int crtc_y, |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 479 | unsigned int crtc_w, unsigned int crtc_h, |
| 480 | uint32_t x, uint32_t y, |
| 481 | uint32_t src_w, uint32_t src_h) |
| 482 | { |
| 483 | struct drm_device *dev = plane->dev; |
| 484 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 485 | struct intel_plane *intel_plane = to_intel_plane(plane); |
Ville Syrjälä | bdd7554 | 2015-03-19 17:57:11 +0200 | [diff] [blame] | 486 | struct drm_i915_gem_object *obj = intel_fb_obj(fb); |
Ville Syrjälä | 47ecbb2 | 2015-03-19 21:18:57 +0200 | [diff] [blame] | 487 | enum pipe pipe = intel_plane->pipe; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 488 | u32 sprctl, sprscale = 0; |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 489 | unsigned long sprsurf_offset, linear_offset; |
Ville Syrjälä | 2bd3c3c | 2012-10-31 17:50:20 +0200 | [diff] [blame] | 490 | int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 491 | const struct drm_intel_sprite_colorkey *key = |
| 492 | &to_intel_plane_state(plane->state)->ckey; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 493 | |
Ville Syrjälä | 48fe469 | 2015-03-19 17:57:13 +0200 | [diff] [blame] | 494 | sprctl = SPRITE_ENABLE; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 495 | |
| 496 | switch (fb->pixel_format) { |
| 497 | case DRM_FORMAT_XBGR8888: |
Vijay Purushothaman | 5ee3691 | 2012-08-23 12:08:57 +0530 | [diff] [blame] | 498 | sprctl |= SPRITE_FORMAT_RGBX888 | SPRITE_RGB_ORDER_RGBX; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 499 | break; |
| 500 | case DRM_FORMAT_XRGB8888: |
Vijay Purushothaman | 5ee3691 | 2012-08-23 12:08:57 +0530 | [diff] [blame] | 501 | sprctl |= SPRITE_FORMAT_RGBX888; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 502 | break; |
| 503 | case DRM_FORMAT_YUYV: |
| 504 | sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_YUYV; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 505 | break; |
| 506 | case DRM_FORMAT_YVYU: |
| 507 | sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_YVYU; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 508 | break; |
| 509 | case DRM_FORMAT_UYVY: |
| 510 | sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_UYVY; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 511 | break; |
| 512 | case DRM_FORMAT_VYUY: |
| 513 | sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_VYUY; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 514 | break; |
| 515 | default: |
Ville Syrjälä | 28d491d | 2012-10-31 17:50:21 +0200 | [diff] [blame] | 516 | BUG(); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 517 | } |
| 518 | |
Ville Syrjälä | 4ea67bc | 2013-11-18 18:32:38 -0800 | [diff] [blame] | 519 | /* |
| 520 | * Enable gamma to match primary/cursor plane behaviour. |
| 521 | * FIXME should be user controllable via propertiesa. |
| 522 | */ |
| 523 | sprctl |= SPRITE_GAMMA_ENABLE; |
| 524 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 525 | if (obj->tiling_mode != I915_TILING_NONE) |
| 526 | sprctl |= SPRITE_TILED; |
| 527 | |
Ville Syrjälä | b42c600 | 2013-11-03 13:47:27 +0200 | [diff] [blame] | 528 | if (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
Paulo Zanoni | 1f5d76d | 2013-08-23 19:51:28 -0300 | [diff] [blame] | 529 | sprctl &= ~SPRITE_TRICKLE_FEED_DISABLE; |
| 530 | else |
| 531 | sprctl |= SPRITE_TRICKLE_FEED_DISABLE; |
| 532 | |
Ville Syrjälä | 6bbfa1c | 2013-11-02 21:07:39 -0700 | [diff] [blame] | 533 | if (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
Ville Syrjälä | 86d3efc | 2013-01-18 19:11:38 +0200 | [diff] [blame] | 534 | sprctl |= SPRITE_PIPE_CSC_ENABLE; |
| 535 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 536 | /* Sizes are 0 based */ |
| 537 | src_w--; |
| 538 | src_h--; |
| 539 | crtc_w--; |
| 540 | crtc_h--; |
| 541 | |
Ville Syrjälä | 8553c18 | 2013-12-05 15:51:39 +0200 | [diff] [blame] | 542 | if (crtc_w != src_w || crtc_h != src_h) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 543 | sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 544 | |
Chris Wilson | ca320ac | 2012-12-19 12:14:22 +0000 | [diff] [blame] | 545 | linear_offset = y * fb->pitches[0] + x * pixel_size; |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 546 | sprsurf_offset = |
Ville Syrjälä | 4e9a86b | 2015-06-11 16:31:14 +0300 | [diff] [blame] | 547 | intel_gen4_compute_page_offset(dev_priv, |
| 548 | &x, &y, obj->tiling_mode, |
Chris Wilson | bc75286 | 2013-02-21 20:04:31 +0000 | [diff] [blame] | 549 | pixel_size, fb->pitches[0]); |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 550 | linear_offset -= sprsurf_offset; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 551 | |
Matt Roper | 8e7d688 | 2015-01-21 16:35:41 -0800 | [diff] [blame] | 552 | if (plane->state->rotation == BIT(DRM_ROTATE_180)) { |
Ville Syrjälä | 76eebda | 2014-08-05 11:26:52 +0530 | [diff] [blame] | 553 | sprctl |= SPRITE_ROTATE_180; |
| 554 | |
| 555 | /* HSW and BDW does this automagically in hardware */ |
| 556 | if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) { |
| 557 | x += src_w; |
| 558 | y += src_h; |
| 559 | linear_offset += src_h * fb->pitches[0] + |
| 560 | src_w * pixel_size; |
| 561 | } |
| 562 | } |
| 563 | |
Ville Syrjälä | 47ecbb2 | 2015-03-19 21:18:57 +0200 | [diff] [blame] | 564 | if (key->flags) { |
| 565 | I915_WRITE(SPRKEYVAL(pipe), key->min_value); |
| 566 | I915_WRITE(SPRKEYMAX(pipe), key->max_value); |
| 567 | I915_WRITE(SPRKEYMSK(pipe), key->channel_mask); |
| 568 | } |
| 569 | |
| 570 | if (key->flags & I915_SET_COLORKEY_DESTINATION) |
| 571 | sprctl |= SPRITE_DEST_KEY; |
| 572 | else if (key->flags & I915_SET_COLORKEY_SOURCE) |
| 573 | sprctl |= SPRITE_SOURCE_KEY; |
| 574 | |
Ville Syrjälä | ca6ad02 | 2014-01-17 20:09:03 +0200 | [diff] [blame] | 575 | I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]); |
| 576 | I915_WRITE(SPRPOS(pipe), (crtc_y << 16) | crtc_x); |
| 577 | |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 578 | /* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET |
| 579 | * register */ |
Paulo Zanoni | b3dc685 | 2013-11-02 21:07:33 -0700 | [diff] [blame] | 580 | if (IS_HASWELL(dev) || IS_BROADWELL(dev)) |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 581 | I915_WRITE(SPROFFSET(pipe), (y << 16) | x); |
| 582 | else if (obj->tiling_mode != I915_TILING_NONE) |
| 583 | I915_WRITE(SPRTILEOFF(pipe), (y << 16) | x); |
| 584 | else |
| 585 | I915_WRITE(SPRLINOFF(pipe), linear_offset); |
Damien Lespiau | c54173a | 2012-10-26 18:20:11 +0100 | [diff] [blame] | 586 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 587 | I915_WRITE(SPRSIZE(pipe), (crtc_h << 16) | crtc_w); |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 588 | if (intel_plane->can_scale) |
| 589 | I915_WRITE(SPRSCALE(pipe), sprscale); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 590 | I915_WRITE(SPRCTL(pipe), sprctl); |
Daniel Vetter | 85ba7b7 | 2014-01-24 10:31:44 +0100 | [diff] [blame] | 591 | I915_WRITE(SPRSURF(pipe), |
| 592 | i915_gem_obj_ggtt_offset(obj) + sprsurf_offset); |
Ville Syrjälä | b12ce1d | 2015-05-26 20:27:23 +0300 | [diff] [blame] | 593 | POSTING_READ(SPRSURF(pipe)); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 594 | } |
| 595 | |
| 596 | static void |
Maarten Lankhorst | 7fabf5e | 2015-06-15 12:33:47 +0200 | [diff] [blame] | 597 | ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 598 | { |
| 599 | struct drm_device *dev = plane->dev; |
| 600 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 601 | struct intel_plane *intel_plane = to_intel_plane(plane); |
| 602 | int pipe = intel_plane->pipe; |
| 603 | |
| 604 | I915_WRITE(SPRCTL(pipe), I915_READ(SPRCTL(pipe)) & ~SPRITE_ENABLE); |
| 605 | /* Can't leave the scaler enabled... */ |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 606 | if (intel_plane->can_scale) |
| 607 | I915_WRITE(SPRSCALE(pipe), 0); |
Ville Syrjälä | 5b633d6 | 2014-04-29 13:35:47 +0300 | [diff] [blame] | 608 | |
Ville Syrjälä | b12ce1d | 2015-05-26 20:27:23 +0300 | [diff] [blame] | 609 | I915_WRITE(SPRSURF(pipe), 0); |
| 610 | POSTING_READ(SPRSURF(pipe)); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 611 | } |
| 612 | |
| 613 | static void |
Ville Syrjälä | b39d53f | 2013-08-06 22:24:09 +0300 | [diff] [blame] | 614 | ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, |
| 615 | struct drm_framebuffer *fb, |
Ville Syrjälä | bdd7554 | 2015-03-19 17:57:11 +0200 | [diff] [blame] | 616 | int crtc_x, int crtc_y, |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 617 | unsigned int crtc_w, unsigned int crtc_h, |
| 618 | uint32_t x, uint32_t y, |
| 619 | uint32_t src_w, uint32_t src_h) |
| 620 | { |
| 621 | struct drm_device *dev = plane->dev; |
| 622 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 623 | struct intel_plane *intel_plane = to_intel_plane(plane); |
Ville Syrjälä | bdd7554 | 2015-03-19 17:57:11 +0200 | [diff] [blame] | 624 | struct drm_i915_gem_object *obj = intel_fb_obj(fb); |
Ville Syrjälä | 2bd3c3c | 2012-10-31 17:50:20 +0200 | [diff] [blame] | 625 | int pipe = intel_plane->pipe; |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 626 | unsigned long dvssurf_offset, linear_offset; |
Chris Wilson | 8aaa81a | 2012-04-14 22:14:26 +0100 | [diff] [blame] | 627 | u32 dvscntr, dvsscale; |
Ville Syrjälä | 2bd3c3c | 2012-10-31 17:50:20 +0200 | [diff] [blame] | 628 | int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 629 | const struct drm_intel_sprite_colorkey *key = |
| 630 | &to_intel_plane_state(plane->state)->ckey; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 631 | |
Ville Syrjälä | 48fe469 | 2015-03-19 17:57:13 +0200 | [diff] [blame] | 632 | dvscntr = DVS_ENABLE; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 633 | |
| 634 | switch (fb->pixel_format) { |
| 635 | case DRM_FORMAT_XBGR8888: |
Jesse Barnes | ab2f9df | 2012-02-27 12:40:10 -0800 | [diff] [blame] | 636 | dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_XBGR; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 637 | break; |
| 638 | case DRM_FORMAT_XRGB8888: |
Jesse Barnes | ab2f9df | 2012-02-27 12:40:10 -0800 | [diff] [blame] | 639 | dvscntr |= DVS_FORMAT_RGBX888; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 640 | break; |
| 641 | case DRM_FORMAT_YUYV: |
| 642 | dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_YUYV; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 643 | break; |
| 644 | case DRM_FORMAT_YVYU: |
| 645 | dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_YVYU; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 646 | break; |
| 647 | case DRM_FORMAT_UYVY: |
| 648 | dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_UYVY; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 649 | break; |
| 650 | case DRM_FORMAT_VYUY: |
| 651 | dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_VYUY; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 652 | break; |
| 653 | default: |
Ville Syrjälä | 28d491d | 2012-10-31 17:50:21 +0200 | [diff] [blame] | 654 | BUG(); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 655 | } |
| 656 | |
Ville Syrjälä | 4ea67bc | 2013-11-18 18:32:38 -0800 | [diff] [blame] | 657 | /* |
| 658 | * Enable gamma to match primary/cursor plane behaviour. |
| 659 | * FIXME should be user controllable via propertiesa. |
| 660 | */ |
| 661 | dvscntr |= DVS_GAMMA_ENABLE; |
| 662 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 663 | if (obj->tiling_mode != I915_TILING_NONE) |
| 664 | dvscntr |= DVS_TILED; |
| 665 | |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 666 | if (IS_GEN6(dev)) |
| 667 | dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */ |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 668 | |
| 669 | /* Sizes are 0 based */ |
| 670 | src_w--; |
| 671 | src_h--; |
| 672 | crtc_w--; |
| 673 | crtc_h--; |
| 674 | |
Chris Wilson | 8aaa81a | 2012-04-14 22:14:26 +0100 | [diff] [blame] | 675 | dvsscale = 0; |
Ville Syrjälä | 8368f01 | 2013-12-05 15:51:31 +0200 | [diff] [blame] | 676 | if (crtc_w != src_w || crtc_h != src_h) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 677 | dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; |
| 678 | |
Chris Wilson | ca320ac | 2012-12-19 12:14:22 +0000 | [diff] [blame] | 679 | linear_offset = y * fb->pitches[0] + x * pixel_size; |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 680 | dvssurf_offset = |
Ville Syrjälä | 4e9a86b | 2015-06-11 16:31:14 +0300 | [diff] [blame] | 681 | intel_gen4_compute_page_offset(dev_priv, |
| 682 | &x, &y, obj->tiling_mode, |
Chris Wilson | bc75286 | 2013-02-21 20:04:31 +0000 | [diff] [blame] | 683 | pixel_size, fb->pitches[0]); |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 684 | linear_offset -= dvssurf_offset; |
| 685 | |
Matt Roper | 8e7d688 | 2015-01-21 16:35:41 -0800 | [diff] [blame] | 686 | if (plane->state->rotation == BIT(DRM_ROTATE_180)) { |
Ville Syrjälä | 76eebda | 2014-08-05 11:26:52 +0530 | [diff] [blame] | 687 | dvscntr |= DVS_ROTATE_180; |
| 688 | |
| 689 | x += src_w; |
| 690 | y += src_h; |
| 691 | linear_offset += src_h * fb->pitches[0] + src_w * pixel_size; |
| 692 | } |
| 693 | |
Ville Syrjälä | 47ecbb2 | 2015-03-19 21:18:57 +0200 | [diff] [blame] | 694 | if (key->flags) { |
| 695 | I915_WRITE(DVSKEYVAL(pipe), key->min_value); |
| 696 | I915_WRITE(DVSKEYMAX(pipe), key->max_value); |
| 697 | I915_WRITE(DVSKEYMSK(pipe), key->channel_mask); |
| 698 | } |
| 699 | |
| 700 | if (key->flags & I915_SET_COLORKEY_DESTINATION) |
| 701 | dvscntr |= DVS_DEST_KEY; |
| 702 | else if (key->flags & I915_SET_COLORKEY_SOURCE) |
| 703 | dvscntr |= DVS_SOURCE_KEY; |
| 704 | |
Ville Syrjälä | ca6ad02 | 2014-01-17 20:09:03 +0200 | [diff] [blame] | 705 | I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]); |
| 706 | I915_WRITE(DVSPOS(pipe), (crtc_y << 16) | crtc_x); |
| 707 | |
Damien Lespiau | 5a35e99 | 2012-10-26 18:20:12 +0100 | [diff] [blame] | 708 | if (obj->tiling_mode != I915_TILING_NONE) |
| 709 | I915_WRITE(DVSTILEOFF(pipe), (y << 16) | x); |
| 710 | else |
| 711 | I915_WRITE(DVSLINOFF(pipe), linear_offset); |
| 712 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 713 | I915_WRITE(DVSSIZE(pipe), (crtc_h << 16) | crtc_w); |
| 714 | I915_WRITE(DVSSCALE(pipe), dvsscale); |
| 715 | I915_WRITE(DVSCNTR(pipe), dvscntr); |
Daniel Vetter | 85ba7b7 | 2014-01-24 10:31:44 +0100 | [diff] [blame] | 716 | I915_WRITE(DVSSURF(pipe), |
| 717 | i915_gem_obj_ggtt_offset(obj) + dvssurf_offset); |
Ville Syrjälä | b12ce1d | 2015-05-26 20:27:23 +0300 | [diff] [blame] | 718 | POSTING_READ(DVSSURF(pipe)); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 719 | } |
| 720 | |
| 721 | static void |
Maarten Lankhorst | 7fabf5e | 2015-06-15 12:33:47 +0200 | [diff] [blame] | 722 | ilk_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 723 | { |
| 724 | struct drm_device *dev = plane->dev; |
| 725 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 726 | struct intel_plane *intel_plane = to_intel_plane(plane); |
| 727 | int pipe = intel_plane->pipe; |
| 728 | |
Ville Syrjälä | 48fe469 | 2015-03-19 17:57:13 +0200 | [diff] [blame] | 729 | I915_WRITE(DVSCNTR(pipe), 0); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 730 | /* Disable the scaler */ |
| 731 | I915_WRITE(DVSSCALE(pipe), 0); |
Ville Syrjälä | 48fe469 | 2015-03-19 17:57:13 +0200 | [diff] [blame] | 732 | |
Daniel Vetter | 85ba7b7 | 2014-01-24 10:31:44 +0100 | [diff] [blame] | 733 | I915_WRITE(DVSSURF(pipe), 0); |
Ville Syrjälä | b12ce1d | 2015-05-26 20:27:23 +0300 | [diff] [blame] | 734 | POSTING_READ(DVSSURF(pipe)); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 735 | } |
| 736 | |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 737 | static int |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 738 | intel_check_sprite_plane(struct drm_plane *plane, |
Maarten Lankhorst | 061e4b8 | 2015-06-15 12:33:46 +0200 | [diff] [blame] | 739 | struct intel_crtc_state *crtc_state, |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 740 | struct intel_plane_state *state) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 741 | { |
Chandra Konduru | c331879 | 2015-04-15 15:15:02 -0700 | [diff] [blame] | 742 | struct drm_device *dev = plane->dev; |
Maarten Lankhorst | 061e4b8 | 2015-06-15 12:33:46 +0200 | [diff] [blame] | 743 | struct drm_crtc *crtc = state->base.crtc; |
| 744 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 745 | struct intel_plane *intel_plane = to_intel_plane(plane); |
Matt Roper | 2b875c2 | 2014-12-01 15:40:13 -0800 | [diff] [blame] | 746 | struct drm_framebuffer *fb = state->base.fb; |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 747 | int crtc_x, crtc_y; |
| 748 | unsigned int crtc_w, crtc_h; |
| 749 | uint32_t src_x, src_y, src_w, src_h; |
| 750 | struct drm_rect *src = &state->src; |
| 751 | struct drm_rect *dst = &state->dst; |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 752 | const struct drm_rect *clip = &state->clip; |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 753 | int hscale, vscale; |
| 754 | int max_scale, min_scale; |
Chandra Konduru | 225c228 | 2015-05-18 16:18:44 -0700 | [diff] [blame] | 755 | bool can_scale; |
Matt Roper | cf4c7c1 | 2014-12-04 10:27:42 -0800 | [diff] [blame] | 756 | int pixel_size; |
| 757 | |
| 758 | if (!fb) { |
| 759 | state->visible = false; |
Maarten Lankhorst | da20eab | 2015-06-15 12:33:44 +0200 | [diff] [blame] | 760 | return 0; |
Matt Roper | cf4c7c1 | 2014-12-04 10:27:42 -0800 | [diff] [blame] | 761 | } |
Jesse Barnes | 5e1bac2 | 2013-03-26 09:25:43 -0700 | [diff] [blame] | 762 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 763 | /* Don't modify another pipe's plane */ |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 764 | if (intel_plane->pipe != intel_crtc->pipe) { |
| 765 | DRM_DEBUG_KMS("Wrong plane <-> crtc mapping\n"); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 766 | return -EINVAL; |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 767 | } |
| 768 | |
| 769 | /* FIXME check all gen limits */ |
| 770 | if (fb->width < 3 || fb->height < 3 || fb->pitches[0] > 16384) { |
| 771 | DRM_DEBUG_KMS("Unsuitable framebuffer for plane\n"); |
| 772 | return -EINVAL; |
| 773 | } |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 774 | |
Chandra Konduru | 225c228 | 2015-05-18 16:18:44 -0700 | [diff] [blame] | 775 | /* setup can_scale, min_scale, max_scale */ |
| 776 | if (INTEL_INFO(dev)->gen >= 9) { |
| 777 | /* use scaler when colorkey is not required */ |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 778 | if (state->ckey.flags == I915_SET_COLORKEY_NONE) { |
Chandra Konduru | 225c228 | 2015-05-18 16:18:44 -0700 | [diff] [blame] | 779 | can_scale = 1; |
| 780 | min_scale = 1; |
| 781 | max_scale = skl_max_scale(intel_crtc, crtc_state); |
| 782 | } else { |
| 783 | can_scale = 0; |
| 784 | min_scale = DRM_PLANE_HELPER_NO_SCALING; |
| 785 | max_scale = DRM_PLANE_HELPER_NO_SCALING; |
| 786 | } |
| 787 | } else { |
| 788 | can_scale = intel_plane->can_scale; |
| 789 | max_scale = intel_plane->max_downscale << 16; |
| 790 | min_scale = intel_plane->can_scale ? 1 : (1 << 16); |
| 791 | } |
| 792 | |
Ville Syrjälä | 3c3686c | 2013-04-24 18:52:39 +0300 | [diff] [blame] | 793 | /* |
| 794 | * FIXME the following code does a bunch of fuzzy adjustments to the |
| 795 | * coordinates and sizes. We probably need some way to decide whether |
| 796 | * more strict checking should be done instead. |
| 797 | */ |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 798 | drm_rect_rotate(src, fb->width << 16, fb->height << 16, |
Matt Roper | 8e7d688 | 2015-01-21 16:35:41 -0800 | [diff] [blame] | 799 | state->base.rotation); |
Ville Syrjälä | 76eebda | 2014-08-05 11:26:52 +0530 | [diff] [blame] | 800 | |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 801 | hscale = drm_rect_calc_hscale_relaxed(src, dst, min_scale, max_scale); |
Ville Syrjälä | 3c3686c | 2013-04-24 18:52:39 +0300 | [diff] [blame] | 802 | BUG_ON(hscale < 0); |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 803 | |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 804 | vscale = drm_rect_calc_vscale_relaxed(src, dst, min_scale, max_scale); |
Ville Syrjälä | 3c3686c | 2013-04-24 18:52:39 +0300 | [diff] [blame] | 805 | BUG_ON(vscale < 0); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 806 | |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 807 | state->visible = drm_rect_clip_scaled(src, dst, clip, hscale, vscale); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 808 | |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 809 | crtc_x = dst->x1; |
| 810 | crtc_y = dst->y1; |
| 811 | crtc_w = drm_rect_width(dst); |
| 812 | crtc_h = drm_rect_height(dst); |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 813 | |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 814 | if (state->visible) { |
Ville Syrjälä | 3c3686c | 2013-04-24 18:52:39 +0300 | [diff] [blame] | 815 | /* check again in case clipping clamped the results */ |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 816 | hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale); |
Ville Syrjälä | 3c3686c | 2013-04-24 18:52:39 +0300 | [diff] [blame] | 817 | if (hscale < 0) { |
| 818 | DRM_DEBUG_KMS("Horizontal scaling factor out of limits\n"); |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 819 | drm_rect_debug_print(src, true); |
| 820 | drm_rect_debug_print(dst, false); |
Ville Syrjälä | 3c3686c | 2013-04-24 18:52:39 +0300 | [diff] [blame] | 821 | |
| 822 | return hscale; |
| 823 | } |
| 824 | |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 825 | vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale); |
Ville Syrjälä | 3c3686c | 2013-04-24 18:52:39 +0300 | [diff] [blame] | 826 | if (vscale < 0) { |
| 827 | DRM_DEBUG_KMS("Vertical scaling factor out of limits\n"); |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 828 | drm_rect_debug_print(src, true); |
| 829 | drm_rect_debug_print(dst, false); |
Ville Syrjälä | 3c3686c | 2013-04-24 18:52:39 +0300 | [diff] [blame] | 830 | |
| 831 | return vscale; |
| 832 | } |
| 833 | |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 834 | /* Make the source viewport size an exact multiple of the scaling factors. */ |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 835 | drm_rect_adjust_size(src, |
| 836 | drm_rect_width(dst) * hscale - drm_rect_width(src), |
| 837 | drm_rect_height(dst) * vscale - drm_rect_height(src)); |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 838 | |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 839 | drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, |
Matt Roper | 8e7d688 | 2015-01-21 16:35:41 -0800 | [diff] [blame] | 840 | state->base.rotation); |
Ville Syrjälä | 76eebda | 2014-08-05 11:26:52 +0530 | [diff] [blame] | 841 | |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 842 | /* sanity check to make sure the src viewport wasn't enlarged */ |
Matt Roper | ea2c67b | 2014-12-23 10:41:52 -0800 | [diff] [blame] | 843 | WARN_ON(src->x1 < (int) state->base.src_x || |
| 844 | src->y1 < (int) state->base.src_y || |
| 845 | src->x2 > (int) state->base.src_x + state->base.src_w || |
| 846 | src->y2 > (int) state->base.src_y + state->base.src_h); |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 847 | |
| 848 | /* |
| 849 | * Hardware doesn't handle subpixel coordinates. |
| 850 | * Adjust to (macro)pixel boundary, but be careful not to |
| 851 | * increase the source viewport size, because that could |
| 852 | * push the downscaling factor out of bounds. |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 853 | */ |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 854 | src_x = src->x1 >> 16; |
| 855 | src_w = drm_rect_width(src) >> 16; |
| 856 | src_y = src->y1 >> 16; |
| 857 | src_h = drm_rect_height(src) >> 16; |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 858 | |
| 859 | if (format_is_yuv(fb->pixel_format)) { |
| 860 | src_x &= ~1; |
| 861 | src_w &= ~1; |
| 862 | |
| 863 | /* |
| 864 | * Must keep src and dst the |
| 865 | * same if we can't scale. |
| 866 | */ |
Chandra Konduru | 225c228 | 2015-05-18 16:18:44 -0700 | [diff] [blame] | 867 | if (!can_scale) |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 868 | crtc_w &= ~1; |
| 869 | |
| 870 | if (crtc_w == 0) |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 871 | state->visible = false; |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 872 | } |
| 873 | } |
| 874 | |
| 875 | /* Check size restrictions when scaling */ |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 876 | if (state->visible && (src_w != crtc_w || src_h != crtc_h)) { |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 877 | unsigned int width_bytes; |
| 878 | |
Chandra Konduru | 225c228 | 2015-05-18 16:18:44 -0700 | [diff] [blame] | 879 | WARN_ON(!can_scale); |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 880 | |
| 881 | /* FIXME interlacing min height is 6 */ |
| 882 | |
| 883 | if (crtc_w < 3 || crtc_h < 3) |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 884 | state->visible = false; |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 885 | |
| 886 | if (src_w < 3 || src_h < 3) |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 887 | state->visible = false; |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 888 | |
Matt Roper | cf4c7c1 | 2014-12-04 10:27:42 -0800 | [diff] [blame] | 889 | pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 890 | width_bytes = ((src_x * pixel_size) & 63) + |
| 891 | src_w * pixel_size; |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 892 | |
Chandra Konduru | c331879 | 2015-04-15 15:15:02 -0700 | [diff] [blame] | 893 | if (INTEL_INFO(dev)->gen < 9 && (src_w > 2048 || src_h > 2048 || |
| 894 | width_bytes > 4096 || fb->pitches[0] > 4096)) { |
Ville Syrjälä | 1731693 | 2013-04-24 18:52:38 +0300 | [diff] [blame] | 895 | DRM_DEBUG_KMS("Source dimensions exceed hardware limits\n"); |
| 896 | return -EINVAL; |
| 897 | } |
| 898 | } |
| 899 | |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 900 | if (state->visible) { |
Chandra Konduru | 0a5ae1b | 2015-04-09 16:41:54 -0700 | [diff] [blame] | 901 | src->x1 = src_x << 16; |
| 902 | src->x2 = (src_x + src_w) << 16; |
| 903 | src->y1 = src_y << 16; |
| 904 | src->y2 = (src_y + src_h) << 16; |
Gustavo Padovan | 96d61a7 | 2014-09-05 17:04:47 -0300 | [diff] [blame] | 905 | } |
| 906 | |
| 907 | dst->x1 = crtc_x; |
| 908 | dst->x2 = crtc_x + crtc_w; |
| 909 | dst->y1 = crtc_y; |
| 910 | dst->y2 = crtc_y + crtc_h; |
| 911 | |
| 912 | return 0; |
| 913 | } |
| 914 | |
Gustavo Padovan | 34aa50a | 2014-10-24 14:51:32 +0100 | [diff] [blame] | 915 | static void |
| 916 | intel_commit_sprite_plane(struct drm_plane *plane, |
| 917 | struct intel_plane_state *state) |
| 918 | { |
Matt Roper | 2b875c2 | 2014-12-01 15:40:13 -0800 | [diff] [blame] | 919 | struct drm_crtc *crtc = state->base.crtc; |
Gustavo Padovan | 34aa50a | 2014-10-24 14:51:32 +0100 | [diff] [blame] | 920 | struct intel_plane *intel_plane = to_intel_plane(plane); |
Matt Roper | 2b875c2 | 2014-12-01 15:40:13 -0800 | [diff] [blame] | 921 | struct drm_framebuffer *fb = state->base.fb; |
Gustavo Padovan | 34aa50a | 2014-10-24 14:51:32 +0100 | [diff] [blame] | 922 | |
Matt Roper | ea2c67b | 2014-12-23 10:41:52 -0800 | [diff] [blame] | 923 | crtc = crtc ? crtc : plane->crtc; |
Matt Roper | ea2c67b | 2014-12-23 10:41:52 -0800 | [diff] [blame] | 924 | |
Maarten Lankhorst | a539205 | 2015-06-15 12:33:52 +0200 | [diff] [blame] | 925 | if (!crtc->state->active) |
Maarten Lankhorst | 302d19a | 2015-06-15 12:33:45 +0200 | [diff] [blame] | 926 | return; |
| 927 | |
| 928 | if (state->visible) { |
| 929 | intel_plane->update_plane(plane, crtc, fb, |
| 930 | state->dst.x1, state->dst.y1, |
| 931 | drm_rect_width(&state->dst), |
| 932 | drm_rect_height(&state->dst), |
| 933 | state->src.x1 >> 16, |
| 934 | state->src.y1 >> 16, |
| 935 | drm_rect_width(&state->src) >> 16, |
| 936 | drm_rect_height(&state->src) >> 16); |
| 937 | } else { |
Maarten Lankhorst | 7fabf5e | 2015-06-15 12:33:47 +0200 | [diff] [blame] | 938 | intel_plane->disable_plane(plane, crtc); |
Ville Syrjälä | 03c5b25 | 2013-10-01 18:02:11 +0300 | [diff] [blame] | 939 | } |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 940 | } |
| 941 | |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 942 | int intel_sprite_set_colorkey(struct drm_device *dev, void *data, |
| 943 | struct drm_file *file_priv) |
| 944 | { |
| 945 | struct drm_intel_sprite_colorkey *set = data; |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 946 | struct drm_plane *plane; |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 947 | struct drm_plane_state *plane_state; |
| 948 | struct drm_atomic_state *state; |
| 949 | struct drm_modeset_acquire_ctx ctx; |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 950 | int ret = 0; |
| 951 | |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 952 | /* Make sure we don't try to enable both src & dest simultaneously */ |
| 953 | if ((set->flags & (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE)) == (I915_SET_COLORKEY_DESTINATION | I915_SET_COLORKEY_SOURCE)) |
| 954 | return -EINVAL; |
| 955 | |
Ville Syrjälä | 47ecbb2 | 2015-03-19 21:18:57 +0200 | [diff] [blame] | 956 | if (IS_VALLEYVIEW(dev) && |
| 957 | set->flags & I915_SET_COLORKEY_DESTINATION) |
| 958 | return -EINVAL; |
| 959 | |
Rob Clark | 7707e65 | 2014-07-17 23:30:04 -0400 | [diff] [blame] | 960 | plane = drm_plane_find(dev, set->plane_id); |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 961 | if (!plane || plane->type != DRM_PLANE_TYPE_OVERLAY) |
| 962 | return -ENOENT; |
| 963 | |
| 964 | drm_modeset_acquire_init(&ctx, 0); |
| 965 | |
| 966 | state = drm_atomic_state_alloc(plane->dev); |
| 967 | if (!state) { |
| 968 | ret = -ENOMEM; |
| 969 | goto out; |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 970 | } |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 971 | state->acquire_ctx = &ctx; |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 972 | |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 973 | while (1) { |
| 974 | plane_state = drm_atomic_get_plane_state(state, plane); |
| 975 | ret = PTR_ERR_OR_ZERO(plane_state); |
| 976 | if (!ret) { |
| 977 | to_intel_plane_state(plane_state)->ckey = *set; |
| 978 | ret = drm_atomic_commit(state); |
Chandra Konduru | 6156a45 | 2015-04-27 13:48:39 -0700 | [diff] [blame] | 979 | } |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 980 | |
| 981 | if (ret != -EDEADLK) |
| 982 | break; |
| 983 | |
| 984 | drm_atomic_state_clear(state); |
| 985 | drm_modeset_backoff(&ctx); |
Chandra Konduru | 6156a45 | 2015-04-27 13:48:39 -0700 | [diff] [blame] | 986 | } |
| 987 | |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 988 | if (ret) |
| 989 | drm_atomic_state_free(state); |
Ville Syrjälä | 47ecbb2 | 2015-03-19 21:18:57 +0200 | [diff] [blame] | 990 | |
Maarten Lankhorst | 818ed96 | 2015-06-15 12:33:54 +0200 | [diff] [blame] | 991 | out: |
| 992 | drm_modeset_drop_locks(&ctx); |
| 993 | drm_modeset_acquire_fini(&ctx); |
Jesse Barnes | 8ea3086 | 2012-01-03 08:05:39 -0800 | [diff] [blame] | 994 | return ret; |
| 995 | } |
| 996 | |
Damien Lespiau | dada2d5 | 2015-05-12 16:13:22 +0100 | [diff] [blame] | 997 | static const uint32_t ilk_plane_formats[] = { |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 998 | DRM_FORMAT_XRGB8888, |
| 999 | DRM_FORMAT_YUYV, |
| 1000 | DRM_FORMAT_YVYU, |
| 1001 | DRM_FORMAT_UYVY, |
| 1002 | DRM_FORMAT_VYUY, |
| 1003 | }; |
| 1004 | |
Damien Lespiau | dada2d5 | 2015-05-12 16:13:22 +0100 | [diff] [blame] | 1005 | static const uint32_t snb_plane_formats[] = { |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1006 | DRM_FORMAT_XBGR8888, |
| 1007 | DRM_FORMAT_XRGB8888, |
| 1008 | DRM_FORMAT_YUYV, |
| 1009 | DRM_FORMAT_YVYU, |
| 1010 | DRM_FORMAT_UYVY, |
| 1011 | DRM_FORMAT_VYUY, |
| 1012 | }; |
| 1013 | |
Damien Lespiau | dada2d5 | 2015-05-12 16:13:22 +0100 | [diff] [blame] | 1014 | static const uint32_t vlv_plane_formats[] = { |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 1015 | DRM_FORMAT_RGB565, |
| 1016 | DRM_FORMAT_ABGR8888, |
| 1017 | DRM_FORMAT_ARGB8888, |
| 1018 | DRM_FORMAT_XBGR8888, |
| 1019 | DRM_FORMAT_XRGB8888, |
| 1020 | DRM_FORMAT_XBGR2101010, |
| 1021 | DRM_FORMAT_ABGR2101010, |
| 1022 | DRM_FORMAT_YUYV, |
| 1023 | DRM_FORMAT_YVYU, |
| 1024 | DRM_FORMAT_UYVY, |
| 1025 | DRM_FORMAT_VYUY, |
| 1026 | }; |
| 1027 | |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 1028 | static uint32_t skl_plane_formats[] = { |
| 1029 | DRM_FORMAT_RGB565, |
| 1030 | DRM_FORMAT_ABGR8888, |
| 1031 | DRM_FORMAT_ARGB8888, |
| 1032 | DRM_FORMAT_XBGR8888, |
| 1033 | DRM_FORMAT_XRGB8888, |
| 1034 | DRM_FORMAT_YUYV, |
| 1035 | DRM_FORMAT_YVYU, |
| 1036 | DRM_FORMAT_UYVY, |
| 1037 | DRM_FORMAT_VYUY, |
| 1038 | }; |
| 1039 | |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1040 | int |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 1041 | intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1042 | { |
| 1043 | struct intel_plane *intel_plane; |
Matt Roper | 8e7d688 | 2015-01-21 16:35:41 -0800 | [diff] [blame] | 1044 | struct intel_plane_state *state; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1045 | unsigned long possible_crtcs; |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1046 | const uint32_t *plane_formats; |
| 1047 | int num_plane_formats; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1048 | int ret; |
| 1049 | |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1050 | if (INTEL_INFO(dev)->gen < 5) |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1051 | return -ENODEV; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1052 | |
Daniel Vetter | b14c567 | 2013-09-19 12:18:32 +0200 | [diff] [blame] | 1053 | intel_plane = kzalloc(sizeof(*intel_plane), GFP_KERNEL); |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1054 | if (!intel_plane) |
| 1055 | return -ENOMEM; |
| 1056 | |
Matt Roper | 8e7d688 | 2015-01-21 16:35:41 -0800 | [diff] [blame] | 1057 | state = intel_create_plane_state(&intel_plane->base); |
| 1058 | if (!state) { |
Matt Roper | ea2c67b | 2014-12-23 10:41:52 -0800 | [diff] [blame] | 1059 | kfree(intel_plane); |
| 1060 | return -ENOMEM; |
| 1061 | } |
Matt Roper | 8e7d688 | 2015-01-21 16:35:41 -0800 | [diff] [blame] | 1062 | intel_plane->base.state = &state->base; |
Matt Roper | ea2c67b | 2014-12-23 10:41:52 -0800 | [diff] [blame] | 1063 | |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1064 | switch (INTEL_INFO(dev)->gen) { |
| 1065 | case 5: |
| 1066 | case 6: |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 1067 | intel_plane->can_scale = true; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1068 | intel_plane->max_downscale = 16; |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1069 | intel_plane->update_plane = ilk_update_plane; |
| 1070 | intel_plane->disable_plane = ilk_disable_plane; |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1071 | |
| 1072 | if (IS_GEN6(dev)) { |
| 1073 | plane_formats = snb_plane_formats; |
| 1074 | num_plane_formats = ARRAY_SIZE(snb_plane_formats); |
| 1075 | } else { |
| 1076 | plane_formats = ilk_plane_formats; |
| 1077 | num_plane_formats = ARRAY_SIZE(ilk_plane_formats); |
| 1078 | } |
| 1079 | break; |
| 1080 | |
| 1081 | case 7: |
Ben Widawsky | 4e0bbc3 | 2013-11-02 21:07:07 -0700 | [diff] [blame] | 1082 | case 8: |
Damien Lespiau | d49f709 | 2013-04-25 15:15:00 +0100 | [diff] [blame] | 1083 | if (IS_IVYBRIDGE(dev)) { |
Damien Lespiau | 2d354c3 | 2012-10-22 18:19:27 +0100 | [diff] [blame] | 1084 | intel_plane->can_scale = true; |
Damien Lespiau | d49f709 | 2013-04-25 15:15:00 +0100 | [diff] [blame] | 1085 | intel_plane->max_downscale = 2; |
| 1086 | } else { |
| 1087 | intel_plane->can_scale = false; |
| 1088 | intel_plane->max_downscale = 1; |
| 1089 | } |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1090 | |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 1091 | if (IS_VALLEYVIEW(dev)) { |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 1092 | intel_plane->update_plane = vlv_update_plane; |
| 1093 | intel_plane->disable_plane = vlv_disable_plane; |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 1094 | |
| 1095 | plane_formats = vlv_plane_formats; |
| 1096 | num_plane_formats = ARRAY_SIZE(vlv_plane_formats); |
| 1097 | } else { |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 1098 | intel_plane->update_plane = ivb_update_plane; |
| 1099 | intel_plane->disable_plane = ivb_disable_plane; |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 1100 | |
| 1101 | plane_formats = snb_plane_formats; |
| 1102 | num_plane_formats = ARRAY_SIZE(snb_plane_formats); |
| 1103 | } |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1104 | break; |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 1105 | case 9: |
Chandra Konduru | c331879 | 2015-04-15 15:15:02 -0700 | [diff] [blame] | 1106 | intel_plane->can_scale = true; |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 1107 | intel_plane->update_plane = skl_update_plane; |
| 1108 | intel_plane->disable_plane = skl_disable_plane; |
Chandra Konduru | 549e2bf | 2015-04-07 15:28:38 -0700 | [diff] [blame] | 1109 | state->scaler_id = -1; |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1110 | |
Damien Lespiau | dc2a41b | 2013-12-04 00:49:41 +0000 | [diff] [blame] | 1111 | plane_formats = skl_plane_formats; |
| 1112 | num_plane_formats = ARRAY_SIZE(skl_plane_formats); |
| 1113 | break; |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1114 | default: |
Jesper Juhl | a8b0bba | 2012-06-27 00:55:37 +0200 | [diff] [blame] | 1115 | kfree(intel_plane); |
Chris Wilson | d1686ae | 2012-04-10 11:41:49 +0100 | [diff] [blame] | 1116 | return -ENODEV; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1117 | } |
| 1118 | |
| 1119 | intel_plane->pipe = pipe; |
Jesse Barnes | 7f1f385 | 2013-04-02 11:22:20 -0700 | [diff] [blame] | 1120 | intel_plane->plane = plane; |
Sagar Arun Kamble | d1b9d03 | 2015-09-14 21:35:42 +0530 | [diff] [blame] | 1121 | intel_plane->frontbuffer_bit = INTEL_FRONTBUFFER_SPRITE(pipe, plane); |
Matt Roper | c59cb17 | 2014-12-01 15:40:16 -0800 | [diff] [blame] | 1122 | intel_plane->check_plane = intel_check_sprite_plane; |
| 1123 | intel_plane->commit_plane = intel_commit_sprite_plane; |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1124 | possible_crtcs = (1 << pipe); |
Derek Foreman | 8fe8a3f | 2014-09-03 10:38:20 -0300 | [diff] [blame] | 1125 | ret = drm_universal_plane_init(dev, &intel_plane->base, possible_crtcs, |
Matt Roper | 65a3fea | 2015-01-21 16:35:42 -0800 | [diff] [blame] | 1126 | &intel_plane_funcs, |
Derek Foreman | 8fe8a3f | 2014-09-03 10:38:20 -0300 | [diff] [blame] | 1127 | plane_formats, num_plane_formats, |
| 1128 | DRM_PLANE_TYPE_OVERLAY); |
Ville Syrjälä | 7ed6eee | 2014-08-05 11:26:55 +0530 | [diff] [blame] | 1129 | if (ret) { |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1130 | kfree(intel_plane); |
Ville Syrjälä | 7ed6eee | 2014-08-05 11:26:55 +0530 | [diff] [blame] | 1131 | goto out; |
| 1132 | } |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1133 | |
Sonika Jindal | 3b7a511 | 2015-04-10 14:37:29 +0530 | [diff] [blame] | 1134 | intel_create_rotation_property(dev, intel_plane); |
Ville Syrjälä | 7ed6eee | 2014-08-05 11:26:55 +0530 | [diff] [blame] | 1135 | |
Matt Roper | ea2c67b | 2014-12-23 10:41:52 -0800 | [diff] [blame] | 1136 | drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs); |
| 1137 | |
Damien Lespiau | caf4e25 | 2015-06-04 16:56:18 +0100 | [diff] [blame] | 1138 | out: |
Jesse Barnes | b840d907f | 2011-12-13 13:19:38 -0800 | [diff] [blame] | 1139 | return ret; |
| 1140 | } |