blob: af6c0aa79bae9435ea5dff4f92f2c945051352aa [file] [log] [blame]
Graf Yang6b3087c2009-01-07 23:14:39 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2007-2009 Analog Devices Inc.
3 * Philippe Gerum <rpm@xenomai.org>
Graf Yang6b3087c2009-01-07 23:14:39 +08004 *
Robin Getz96f10502009-09-24 14:11:24 +00005 * Licensed under the GPL-2 or later.
Graf Yang6b3087c2009-01-07 23:14:39 +08006 */
7
8#ifndef __ASM_BLACKFIN_SMP_H
9#define __ASM_BLACKFIN_SMP_H
10
11#include <linux/kernel.h>
12#include <linux/threads.h>
13#include <linux/cpumask.h>
14#include <linux/cache.h>
15#include <asm/blackfin.h>
16#include <mach/smp.h>
17
18#define raw_smp_processor_id() blackfin_core_id()
19
Sonic Zhangc6345ab2010-08-05 07:49:26 +000020extern void bfin_relocate_coreb_l1_mem(void);
21
22#if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1)
23asmlinkage void blackfin_icache_flush_range_l1(unsigned long *ptr);
24extern unsigned long blackfin_iflush_l1_entry[NR_CPUS];
25#endif
Graf Yangdbc895f2009-01-07 23:14:39 +080026
Graf Yang6b3087c2009-01-07 23:14:39 +080027struct corelock_slot {
28 int lock;
29};
Graf Yang60ffdb32010-01-20 10:56:24 +000030extern struct corelock_slot corelock;
Graf Yang6b3087c2009-01-07 23:14:39 +080031
Graf Yang718340f2010-02-01 06:07:50 +000032#ifdef __ARCH_SYNC_CORE_ICACHE
33extern unsigned long icache_invld_count[NR_CPUS];
34#endif
35#ifdef __ARCH_SYNC_CORE_DCACHE
36extern unsigned long dcache_invld_count[NR_CPUS];
37#endif
38
Graf Yang6b3087c2009-01-07 23:14:39 +080039void smp_icache_flush_range_others(unsigned long start,
40 unsigned long end);
Graf Yang0b39db22009-12-28 11:13:51 +000041#ifdef CONFIG_HOTPLUG_CPU
Graf Yang6f546bc2010-01-28 10:46:55 +000042void coreb_die(void);
Graf Yang0b39db22009-12-28 11:13:51 +000043void cpu_die(void);
44void platform_cpu_die(void);
45int __cpu_disable(void);
46int __cpu_die(unsigned int cpu);
47#endif
Graf Yang6b3087c2009-01-07 23:14:39 +080048
49#endif /* !__ASM_BLACKFIN_SMP_H */