Ilya Yanok | cd2bd44 | 2010-09-09 01:55:16 +0200 | [diff] [blame] | 1 | /* |
| 2 | * mpc8308_p1m Device Tree Source |
| 3 | * |
| 4 | * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | */ |
| 11 | |
| 12 | /dts-v1/; |
| 13 | |
| 14 | / { |
| 15 | compatible = "denx,mpc8308_p1m"; |
| 16 | #address-cells = <1>; |
| 17 | #size-cells = <1>; |
| 18 | |
| 19 | aliases { |
| 20 | ethernet0 = &enet0; |
| 21 | ethernet1 = &enet1; |
| 22 | serial0 = &serial0; |
| 23 | serial1 = &serial1; |
| 24 | pci0 = &pci0; |
| 25 | }; |
| 26 | |
| 27 | cpus { |
| 28 | #address-cells = <1>; |
| 29 | #size-cells = <0>; |
| 30 | |
| 31 | PowerPC,8308@0 { |
| 32 | device_type = "cpu"; |
| 33 | reg = <0x0>; |
| 34 | d-cache-line-size = <32>; |
| 35 | i-cache-line-size = <32>; |
| 36 | d-cache-size = <16384>; |
| 37 | i-cache-size = <16384>; |
| 38 | timebase-frequency = <0>; // from bootloader |
| 39 | bus-frequency = <0>; // from bootloader |
| 40 | clock-frequency = <0>; // from bootloader |
| 41 | }; |
| 42 | }; |
| 43 | |
| 44 | memory { |
| 45 | device_type = "memory"; |
| 46 | reg = <0x00000000 0x08000000>; // 128MB at 0 |
| 47 | }; |
| 48 | |
| 49 | localbus@e0005000 { |
| 50 | #address-cells = <2>; |
| 51 | #size-cells = <1>; |
| 52 | compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; |
| 53 | reg = <0xe0005000 0x1000>; |
| 54 | interrupts = <77 0x8>; |
| 55 | interrupt-parent = <&ipic>; |
| 56 | |
| 57 | ranges = <0x0 0x0 0xfc000000 0x04000000 |
| 58 | 0x1 0x0 0xfbff0000 0x00008000 |
| 59 | 0x2 0x0 0xfbff8000 0x00008000>; |
| 60 | |
| 61 | flash@0,0 { |
| 62 | #address-cells = <1>; |
| 63 | #size-cells = <1>; |
| 64 | compatible = "cfi-flash"; |
| 65 | reg = <0x0 0x0 0x4000000>; |
| 66 | bank-width = <2>; |
| 67 | device-width = <1>; |
| 68 | |
| 69 | u-boot@0 { |
| 70 | reg = <0x0 0x60000>; |
| 71 | read-only; |
| 72 | }; |
| 73 | env@60000 { |
| 74 | reg = <0x60000 0x20000>; |
| 75 | }; |
| 76 | env1@80000 { |
| 77 | reg = <0x80000 0x20000>; |
| 78 | }; |
| 79 | kernel@a0000 { |
| 80 | reg = <0xa0000 0x200000>; |
| 81 | }; |
| 82 | dtb@2a0000 { |
| 83 | reg = <0x2a0000 0x20000>; |
| 84 | }; |
| 85 | ramdisk@2c0000 { |
| 86 | reg = <0x2c0000 0x640000>; |
| 87 | }; |
| 88 | user@700000 { |
| 89 | reg = <0x700000 0x3900000>; |
| 90 | }; |
| 91 | }; |
| 92 | |
| 93 | can@1,0 { |
| 94 | compatible = "nxp,sja1000"; |
| 95 | reg = <0x1 0x0 0x80>; |
| 96 | interrupts = <18 0x8>; |
| 97 | interrups-parent = <&ipic>; |
| 98 | }; |
| 99 | |
| 100 | cpld@2,0 { |
| 101 | compatible = "denx,mpc8308_p1m-cpld"; |
| 102 | reg = <0x2 0x0 0x8>; |
| 103 | interrupts = <48 0x8>; |
| 104 | interrups-parent = <&ipic>; |
| 105 | }; |
| 106 | }; |
| 107 | |
| 108 | immr@e0000000 { |
| 109 | #address-cells = <1>; |
| 110 | #size-cells = <1>; |
| 111 | device_type = "soc"; |
| 112 | compatible = "fsl,mpc8308-immr", "simple-bus"; |
| 113 | ranges = <0 0xe0000000 0x00100000>; |
| 114 | reg = <0xe0000000 0x00000200>; |
| 115 | bus-frequency = <0>; |
| 116 | |
| 117 | i2c@3000 { |
| 118 | #address-cells = <1>; |
| 119 | #size-cells = <0>; |
| 120 | compatible = "fsl-i2c"; |
| 121 | reg = <0x3000 0x100>; |
| 122 | interrupts = <14 0x8>; |
| 123 | interrupt-parent = <&ipic>; |
| 124 | dfsrr; |
| 125 | fram@50 { |
| 126 | compatible = "ramtron,24c64"; |
| 127 | reg = <0x50>; |
| 128 | }; |
| 129 | }; |
| 130 | |
| 131 | i2c@3100 { |
| 132 | #address-cells = <1>; |
| 133 | #size-cells = <0>; |
| 134 | compatible = "fsl-i2c"; |
| 135 | reg = <0x3100 0x100>; |
| 136 | interrupts = <15 0x8>; |
| 137 | interrupt-parent = <&ipic>; |
| 138 | dfsrr; |
| 139 | pwm@28 { |
| 140 | compatible = "maxim,ds1050"; |
| 141 | reg = <0x28>; |
| 142 | }; |
| 143 | sensor@48 { |
| 144 | compatible = "maxim,max6625"; |
| 145 | reg = <0x48>; |
| 146 | }; |
| 147 | sensor@49 { |
| 148 | compatible = "maxim,max6625"; |
| 149 | reg = <0x49>; |
| 150 | }; |
| 151 | sensor@4b { |
| 152 | compatible = "maxim,max6625"; |
| 153 | reg = <0x4b>; |
| 154 | }; |
| 155 | }; |
| 156 | |
| 157 | usb@23000 { |
| 158 | compatible = "fsl-usb2-dr"; |
| 159 | reg = <0x23000 0x1000>; |
| 160 | #address-cells = <1>; |
| 161 | #size-cells = <0>; |
| 162 | interrupt-parent = <&ipic>; |
| 163 | interrupts = <38 0x8>; |
| 164 | dr_mode = "peripheral"; |
| 165 | phy_type = "ulpi"; |
| 166 | }; |
| 167 | |
| 168 | enet0: ethernet@24000 { |
| 169 | #address-cells = <1>; |
| 170 | #size-cells = <1>; |
| 171 | ranges = <0x0 0x24000 0x1000>; |
| 172 | |
| 173 | cell-index = <0>; |
| 174 | device_type = "network"; |
| 175 | model = "eTSEC"; |
| 176 | compatible = "gianfar"; |
| 177 | reg = <0x24000 0x1000>; |
| 178 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 179 | interrupts = <32 0x8 33 0x8 34 0x8>; |
| 180 | interrupt-parent = <&ipic>; |
| 181 | phy-handle = < &phy1 >; |
| 182 | |
| 183 | mdio@520 { |
| 184 | #address-cells = <1>; |
| 185 | #size-cells = <0>; |
| 186 | compatible = "fsl,gianfar-mdio"; |
| 187 | reg = <0x520 0x20>; |
| 188 | phy1: ethernet-phy@1 { |
| 189 | interrupt-parent = <&ipic>; |
| 190 | interrupts = <17 0x8>; |
| 191 | reg = <0x1>; |
| 192 | device_type = "ethernet-phy"; |
| 193 | }; |
| 194 | phy2: ethernet-phy@2 { |
| 195 | interrupt-parent = <&ipic>; |
| 196 | interrupts = <19 0x8>; |
| 197 | reg = <0x2>; |
| 198 | device_type = "ethernet-phy"; |
| 199 | }; |
| 200 | tbi0: tbi-phy@11 { |
| 201 | reg = <0x11>; |
| 202 | device_type = "tbi-phy"; |
| 203 | }; |
| 204 | }; |
| 205 | }; |
| 206 | |
| 207 | enet1: ethernet@25000 { |
| 208 | #address-cells = <1>; |
| 209 | #size-cells = <1>; |
| 210 | cell-index = <1>; |
| 211 | device_type = "network"; |
| 212 | model = "eTSEC"; |
| 213 | compatible = "gianfar"; |
| 214 | reg = <0x25000 0x1000>; |
| 215 | ranges = <0x0 0x25000 0x1000>; |
| 216 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 217 | interrupts = <35 0x8 36 0x8 37 0x8>; |
| 218 | interrupt-parent = <&ipic>; |
| 219 | phy-handle = < &phy2 >; |
| 220 | |
| 221 | mdio@520 { |
| 222 | #address-cells = <1>; |
| 223 | #size-cells = <0>; |
| 224 | compatible = "fsl,gianfar-tbi"; |
| 225 | reg = <0x520 0x20>; |
| 226 | tbi1: tbi-phy@11 { |
| 227 | reg = <0x11>; |
| 228 | device_type = "tbi-phy"; |
| 229 | }; |
| 230 | }; |
| 231 | }; |
| 232 | |
| 233 | serial0: serial@4500 { |
| 234 | cell-index = <0>; |
| 235 | device_type = "serial"; |
| 236 | compatible = "ns16550"; |
| 237 | reg = <0x4500 0x100>; |
| 238 | clock-frequency = <133333333>; |
| 239 | interrupts = <9 0x8>; |
| 240 | interrupt-parent = <&ipic>; |
| 241 | }; |
| 242 | |
| 243 | serial1: serial@4600 { |
| 244 | cell-index = <1>; |
| 245 | device_type = "serial"; |
| 246 | compatible = "ns16550"; |
| 247 | reg = <0x4600 0x100>; |
| 248 | clock-frequency = <133333333>; |
| 249 | interrupts = <10 0x8>; |
| 250 | interrupt-parent = <&ipic>; |
| 251 | }; |
| 252 | |
| 253 | gpio@c00 { |
| 254 | #gpio-cells = <2>; |
| 255 | compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio"; |
| 256 | reg = <0xc00 0x18>; |
| 257 | interrupts = <74 0x8>; |
| 258 | interrupt-parent = <&ipic>; |
| 259 | gpio-controller; |
| 260 | }; |
| 261 | |
| 262 | timer@500 { |
| 263 | compatible = "fsl,mpc8308-gtm", "fsl,gtm"; |
| 264 | reg = <0x500 0x100>; |
| 265 | interrupts = <90 8 78 8 84 8 72 8>; |
| 266 | interrupt-parent = <&ipic>; |
| 267 | clock-frequency = <133333333>; |
| 268 | }; |
| 269 | |
| 270 | /* IPIC |
| 271 | * interrupts cell = <intr #, sense> |
| 272 | * sense values match linux IORESOURCE_IRQ_* defines: |
| 273 | * sense == 8: Level, low assertion |
| 274 | * sense == 2: Edge, high-to-low change |
| 275 | */ |
| 276 | ipic: interrupt-controller@700 { |
| 277 | compatible = "fsl,ipic"; |
| 278 | interrupt-controller; |
| 279 | #address-cells = <0>; |
| 280 | #interrupt-cells = <2>; |
| 281 | reg = <0x700 0x100>; |
| 282 | device_type = "ipic"; |
| 283 | }; |
| 284 | |
| 285 | ipic-msi@7c0 { |
| 286 | compatible = "fsl,ipic-msi"; |
| 287 | reg = <0x7c0 0x40>; |
| 288 | msi-available-ranges = <0x0 0x100>; |
| 289 | interrupts = < 0x43 0x8 |
| 290 | 0x4 0x8 |
| 291 | 0x51 0x8 |
| 292 | 0x52 0x8 |
| 293 | 0x56 0x8 |
| 294 | 0x57 0x8 |
| 295 | 0x58 0x8 |
| 296 | 0x59 0x8 >; |
| 297 | interrupt-parent = < &ipic >; |
| 298 | }; |
| 299 | |
Ilya Yanok | c9de933 | 2010-10-27 01:53:00 +0200 | [diff] [blame] | 300 | dma@2c000 { |
| 301 | compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma"; |
| 302 | reg = <0x2c000 0x1800>; |
| 303 | interrupts = <3 0x8 |
| 304 | 94 0x8>; |
| 305 | interrupt-parent = < &ipic >; |
| 306 | }; |
| 307 | |
Ilya Yanok | cd2bd44 | 2010-09-09 01:55:16 +0200 | [diff] [blame] | 308 | }; |
| 309 | |
| 310 | pci0: pcie@e0009000 { |
| 311 | #address-cells = <3>; |
| 312 | #size-cells = <2>; |
| 313 | #interrupt-cells = <1>; |
| 314 | device_type = "pci"; |
| 315 | compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie"; |
| 316 | reg = <0xe0009000 0x00001000 |
| 317 | 0xb0000000 0x01000000>; |
| 318 | ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 |
| 319 | 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; |
| 320 | bus-range = <0 0>; |
| 321 | interrupt-map-mask = <0 0 0 0>; |
| 322 | interrupt-map = <0 0 0 0 &ipic 1 8>; |
| 323 | interrupts = <0x1 0x8>; |
| 324 | interrupt-parent = <&ipic>; |
| 325 | clock-frequency = <0>; |
| 326 | |
| 327 | pcie@0 { |
| 328 | #address-cells = <3>; |
| 329 | #size-cells = <2>; |
| 330 | device_type = "pci"; |
| 331 | reg = <0 0 0 0 0>; |
| 332 | ranges = <0x02000000 0 0xa0000000 |
| 333 | 0x02000000 0 0xa0000000 |
| 334 | 0 0x10000000 |
| 335 | 0x01000000 0 0x00000000 |
| 336 | 0x01000000 0 0x00000000 |
| 337 | 0 0x00800000>; |
| 338 | }; |
| 339 | }; |
| 340 | }; |