Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 1 | /* |
| 2 | * MPC8569E MDS Device Tree Source |
| 3 | * |
| 4 | * Copyright (C) 2009 Freescale Semiconductor Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | */ |
| 11 | |
| 12 | /dts-v1/; |
| 13 | |
| 14 | / { |
| 15 | model = "MPC8569EMDS"; |
| 16 | compatible = "fsl,MPC8569EMDS"; |
| 17 | #address-cells = <1>; |
| 18 | #size-cells = <1>; |
| 19 | |
| 20 | aliases { |
| 21 | serial0 = &serial0; |
| 22 | serial1 = &serial1; |
| 23 | ethernet0 = &enet0; |
| 24 | ethernet1 = &enet1; |
| 25 | ethernet2 = &enet2; |
| 26 | ethernet3 = &enet3; |
Haiying Wang | b4a31c9 | 2009-06-02 10:04:16 -0400 | [diff] [blame] | 27 | ethernet5 = &enet5; |
| 28 | ethernet7 = &enet7; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 29 | pci1 = &pci1; |
Anton Vorontsov | 5e8306f | 2009-05-02 06:16:56 +0400 | [diff] [blame] | 30 | rapidio0 = &rio0; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 31 | }; |
| 32 | |
| 33 | cpus { |
| 34 | #address-cells = <1>; |
| 35 | #size-cells = <0>; |
| 36 | |
| 37 | PowerPC,8569@0 { |
| 38 | device_type = "cpu"; |
| 39 | reg = <0x0>; |
| 40 | d-cache-line-size = <32>; // 32 bytes |
| 41 | i-cache-line-size = <32>; // 32 bytes |
| 42 | d-cache-size = <0x8000>; // L1, 32K |
| 43 | i-cache-size = <0x8000>; // L1, 32K |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 44 | sleep = <&pmc 0x00008000 // core |
| 45 | &pmc 0x00004000>; // timebase |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 46 | timebase-frequency = <0>; |
| 47 | bus-frequency = <0>; |
| 48 | clock-frequency = <0>; |
| 49 | next-level-cache = <&L2>; |
| 50 | }; |
| 51 | }; |
| 52 | |
| 53 | memory { |
| 54 | device_type = "memory"; |
| 55 | }; |
| 56 | |
| 57 | localbus@e0005000 { |
| 58 | #address-cells = <2>; |
| 59 | #size-cells = <1>; |
| 60 | compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus"; |
Anton Vorontsov | ea38f579d | 2009-05-02 06:16:51 +0400 | [diff] [blame] | 61 | reg = <0xe0005000 0x1000>; |
| 62 | interrupts = <19 2>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 63 | interrupt-parent = <&mpic>; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 64 | sleep = <&pmc 0x08000000>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 65 | |
| 66 | ranges = <0x0 0x0 0xfe000000 0x02000000 |
| 67 | 0x1 0x0 0xf8000000 0x00008000 |
| 68 | 0x2 0x0 0xf0000000 0x04000000 |
Anton Vorontsov | ea38f579d | 2009-05-02 06:16:51 +0400 | [diff] [blame] | 69 | 0x3 0x0 0xfc000000 0x00008000 |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 70 | 0x4 0x0 0xf8008000 0x00008000 |
| 71 | 0x5 0x0 0xf8010000 0x00008000>; |
| 72 | |
| 73 | nor@0,0 { |
| 74 | #address-cells = <1>; |
| 75 | #size-cells = <1>; |
| 76 | compatible = "cfi-flash"; |
| 77 | reg = <0x0 0x0 0x02000000>; |
Kevin Hao | 40aa735 | 2009-05-27 10:05:05 +0800 | [diff] [blame] | 78 | bank-width = <1>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 79 | device-width = <1>; |
Kevin Hao | 40aa735 | 2009-05-27 10:05:05 +0800 | [diff] [blame] | 80 | partition@0 { |
| 81 | label = "ramdisk"; |
| 82 | reg = <0x00000000 0x01c00000>; |
| 83 | }; |
| 84 | partition@1c00000 { |
| 85 | label = "kernel"; |
| 86 | reg = <0x01c00000 0x002e0000>; |
| 87 | }; |
| 88 | partiton@1ee0000 { |
| 89 | label = "dtb"; |
| 90 | reg = <0x01ee0000 0x00020000>; |
| 91 | }; |
| 92 | partition@1f00000 { |
| 93 | label = "firmware"; |
| 94 | reg = <0x01f00000 0x00080000>; |
| 95 | read-only; |
| 96 | }; |
| 97 | partition@1f80000 { |
| 98 | label = "u-boot"; |
| 99 | reg = <0x01f80000 0x00080000>; |
| 100 | read-only; |
| 101 | }; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 102 | }; |
| 103 | |
| 104 | bcsr@1,0 { |
Anton Vorontsov | 9b9d401 | 2009-08-19 03:28:21 +0400 | [diff] [blame] | 105 | #address-cells = <1>; |
| 106 | #size-cells = <1>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 107 | compatible = "fsl,mpc8569mds-bcsr"; |
| 108 | reg = <1 0 0x8000>; |
Anton Vorontsov | 9b9d401 | 2009-08-19 03:28:21 +0400 | [diff] [blame] | 109 | ranges = <0 1 0 0x8000>; |
| 110 | |
| 111 | bcsr17: gpio-controller@11 { |
| 112 | #gpio-cells = <2>; |
| 113 | compatible = "fsl,mpc8569mds-bcsr-gpio"; |
| 114 | reg = <0x11 0x1>; |
| 115 | gpio-controller; |
| 116 | }; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 117 | }; |
| 118 | |
Anton Vorontsov | ea38f579d | 2009-05-02 06:16:51 +0400 | [diff] [blame] | 119 | nand@3,0 { |
| 120 | compatible = "fsl,mpc8569-fcm-nand", |
| 121 | "fsl,elbc-fcm-nand"; |
| 122 | reg = <3 0 0x8000>; |
| 123 | }; |
| 124 | |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 125 | pib@4,0 { |
| 126 | compatible = "fsl,mpc8569mds-pib"; |
| 127 | reg = <4 0 0x8000>; |
| 128 | }; |
| 129 | |
| 130 | pib@5,0 { |
| 131 | compatible = "fsl,mpc8569mds-pib"; |
| 132 | reg = <5 0 0x8000>; |
| 133 | }; |
| 134 | }; |
| 135 | |
| 136 | soc@e0000000 { |
| 137 | #address-cells = <1>; |
| 138 | #size-cells = <1>; |
| 139 | device_type = "soc"; |
| 140 | compatible = "fsl,mpc8569-immr", "simple-bus"; |
| 141 | ranges = <0x0 0xe0000000 0x100000>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 142 | bus-frequency = <0>; |
| 143 | |
| 144 | ecm-law@0 { |
| 145 | compatible = "fsl,ecm-law"; |
| 146 | reg = <0x0 0x1000>; |
| 147 | fsl,num-laws = <10>; |
| 148 | }; |
| 149 | |
| 150 | ecm@1000 { |
| 151 | compatible = "fsl,mpc8569-ecm", "fsl,ecm"; |
| 152 | reg = <0x1000 0x1000>; |
| 153 | interrupts = <17 2>; |
| 154 | interrupt-parent = <&mpic>; |
| 155 | }; |
| 156 | |
| 157 | memory-controller@2000 { |
| 158 | compatible = "fsl,mpc8569-memory-controller"; |
| 159 | reg = <0x2000 0x1000>; |
| 160 | interrupt-parent = <&mpic>; |
| 161 | interrupts = <18 2>; |
| 162 | }; |
| 163 | |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 164 | i2c-sleep-nexus { |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 165 | #address-cells = <1>; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 166 | #size-cells = <1>; |
| 167 | compatible = "simple-bus"; |
| 168 | sleep = <&pmc 0x00000004>; |
| 169 | ranges; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 170 | |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 171 | i2c@3000 { |
| 172 | #address-cells = <1>; |
| 173 | #size-cells = <0>; |
| 174 | cell-index = <0>; |
| 175 | compatible = "fsl-i2c"; |
| 176 | reg = <0x3000 0x100>; |
| 177 | interrupts = <43 2>; |
| 178 | interrupt-parent = <&mpic>; |
| 179 | dfsrr; |
| 180 | |
| 181 | rtc@68 { |
| 182 | compatible = "dallas,ds1374"; |
| 183 | reg = <0x68>; |
| 184 | interrupts = <3 1>; |
| 185 | interrupt-parent = <&mpic>; |
| 186 | }; |
| 187 | }; |
| 188 | |
| 189 | i2c@3100 { |
| 190 | #address-cells = <1>; |
| 191 | #size-cells = <0>; |
| 192 | cell-index = <1>; |
| 193 | compatible = "fsl-i2c"; |
| 194 | reg = <0x3100 0x100>; |
| 195 | interrupts = <43 2>; |
| 196 | interrupt-parent = <&mpic>; |
| 197 | dfsrr; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 198 | }; |
| 199 | }; |
| 200 | |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 201 | duart-sleep-nexus { |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 202 | #address-cells = <1>; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 203 | #size-cells = <1>; |
| 204 | compatible = "simple-bus"; |
| 205 | sleep = <&pmc 0x00000002>; |
| 206 | ranges; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 207 | |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 208 | serial0: serial@4500 { |
| 209 | cell-index = <0>; |
| 210 | device_type = "serial"; |
| 211 | compatible = "ns16550"; |
| 212 | reg = <0x4500 0x100>; |
| 213 | clock-frequency = <0>; |
| 214 | interrupts = <42 2>; |
| 215 | interrupt-parent = <&mpic>; |
| 216 | }; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 217 | |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 218 | serial1: serial@4600 { |
| 219 | cell-index = <1>; |
| 220 | device_type = "serial"; |
| 221 | compatible = "ns16550"; |
| 222 | reg = <0x4600 0x100>; |
| 223 | clock-frequency = <0>; |
| 224 | interrupts = <42 2>; |
| 225 | interrupt-parent = <&mpic>; |
| 226 | }; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 227 | }; |
| 228 | |
| 229 | L2: l2-cache-controller@20000 { |
| 230 | compatible = "fsl,mpc8569-l2-cache-controller"; |
| 231 | reg = <0x20000 0x1000>; |
| 232 | cache-line-size = <32>; // 32 bytes |
| 233 | cache-size = <0x80000>; // L2, 512K |
| 234 | interrupt-parent = <&mpic>; |
| 235 | interrupts = <16 2>; |
| 236 | }; |
| 237 | |
| 238 | dma@21300 { |
| 239 | #address-cells = <1>; |
| 240 | #size-cells = <1>; |
| 241 | compatible = "fsl,mpc8569-dma", "fsl,eloplus-dma"; |
| 242 | reg = <0x21300 0x4>; |
| 243 | ranges = <0x0 0x21100 0x200>; |
| 244 | cell-index = <0>; |
| 245 | dma-channel@0 { |
| 246 | compatible = "fsl,mpc8569-dma-channel", |
| 247 | "fsl,eloplus-dma-channel"; |
| 248 | reg = <0x0 0x80>; |
| 249 | cell-index = <0>; |
| 250 | interrupt-parent = <&mpic>; |
| 251 | interrupts = <20 2>; |
| 252 | }; |
| 253 | dma-channel@80 { |
| 254 | compatible = "fsl,mpc8569-dma-channel", |
| 255 | "fsl,eloplus-dma-channel"; |
| 256 | reg = <0x80 0x80>; |
| 257 | cell-index = <1>; |
| 258 | interrupt-parent = <&mpic>; |
| 259 | interrupts = <21 2>; |
| 260 | }; |
| 261 | dma-channel@100 { |
| 262 | compatible = "fsl,mpc8569-dma-channel", |
| 263 | "fsl,eloplus-dma-channel"; |
| 264 | reg = <0x100 0x80>; |
| 265 | cell-index = <2>; |
| 266 | interrupt-parent = <&mpic>; |
| 267 | interrupts = <22 2>; |
| 268 | }; |
| 269 | dma-channel@180 { |
| 270 | compatible = "fsl,mpc8569-dma-channel", |
| 271 | "fsl,eloplus-dma-channel"; |
| 272 | reg = <0x180 0x80>; |
| 273 | cell-index = <3>; |
| 274 | interrupt-parent = <&mpic>; |
| 275 | interrupts = <23 2>; |
| 276 | }; |
| 277 | }; |
| 278 | |
Anton Vorontsov | 28da456 | 2009-05-02 06:16:53 +0400 | [diff] [blame] | 279 | sdhci@2e000 { |
| 280 | compatible = "fsl,mpc8569-esdhc", "fsl,esdhc"; |
| 281 | reg = <0x2e000 0x1000>; |
| 282 | interrupts = <72 0x8>; |
| 283 | interrupt-parent = <&mpic>; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 284 | sleep = <&pmc 0x00200000>; |
Anton Vorontsov | 28da456 | 2009-05-02 06:16:53 +0400 | [diff] [blame] | 285 | /* Filled in by U-Boot */ |
| 286 | clock-frequency = <0>; |
| 287 | status = "disabled"; |
Anton Vorontsov | 66c6b85 | 2009-06-19 03:37:52 +0400 | [diff] [blame] | 288 | sdhci,1-bit-only; |
Anton Vorontsov | 28da456 | 2009-05-02 06:16:53 +0400 | [diff] [blame] | 289 | }; |
| 290 | |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 291 | crypto@30000 { |
| 292 | compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", |
| 293 | "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; |
| 294 | reg = <0x30000 0x10000>; |
| 295 | interrupts = <45 2 58 2>; |
| 296 | interrupt-parent = <&mpic>; |
| 297 | fsl,num-channels = <4>; |
| 298 | fsl,channel-fifo-len = <24>; |
Anton Vorontsov | cd7e4a2 | 2009-05-02 06:16:49 +0400 | [diff] [blame] | 299 | fsl,exec-units-mask = <0xbfe>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 300 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 301 | sleep = <&pmc 0x01000000>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 302 | }; |
| 303 | |
| 304 | mpic: pic@40000 { |
| 305 | interrupt-controller; |
| 306 | #address-cells = <0>; |
| 307 | #interrupt-cells = <2>; |
| 308 | reg = <0x40000 0x40000>; |
| 309 | compatible = "chrp,open-pic"; |
| 310 | device_type = "open-pic"; |
| 311 | }; |
| 312 | |
Kumar Gala | 12ac426 | 2009-05-08 16:28:42 -0500 | [diff] [blame] | 313 | msi@41600 { |
| 314 | compatible = "fsl,mpc8568-msi", "fsl,mpic-msi"; |
| 315 | reg = <0x41600 0x80>; |
| 316 | msi-available-ranges = <0 0x100>; |
| 317 | interrupts = < |
| 318 | 0xe0 0 |
| 319 | 0xe1 0 |
| 320 | 0xe2 0 |
| 321 | 0xe3 0 |
| 322 | 0xe4 0 |
| 323 | 0xe5 0 |
| 324 | 0xe6 0 |
| 325 | 0xe7 0>; |
| 326 | interrupt-parent = <&mpic>; |
| 327 | }; |
| 328 | |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 329 | global-utilities@e0000 { |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 330 | #address-cells = <1>; |
| 331 | #size-cells = <1>; |
| 332 | compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts"; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 333 | reg = <0xe0000 0x1000>; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 334 | ranges = <0 0xe0000 0x1000>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 335 | fsl,has-rstcr; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 336 | |
| 337 | pmc: power@70 { |
| 338 | compatible = "fsl,mpc8569-pmc", |
| 339 | "fsl,mpc8548-pmc"; |
| 340 | reg = <0x70 0x20>; |
| 341 | }; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 342 | }; |
| 343 | |
| 344 | par_io@e0100 { |
Anton Vorontsov | bd78c33 | 2009-05-02 06:16:59 +0400 | [diff] [blame] | 345 | #address-cells = <1>; |
| 346 | #size-cells = <1>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 347 | reg = <0xe0100 0x100>; |
Anton Vorontsov | bd78c33 | 2009-05-02 06:16:59 +0400 | [diff] [blame] | 348 | ranges = <0x0 0xe0100 0x100>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 349 | device_type = "par_io"; |
| 350 | num-ports = <7>; |
| 351 | |
Anton Vorontsov | bd78c33 | 2009-05-02 06:16:59 +0400 | [diff] [blame] | 352 | qe_pio_e: gpio-controller@80 { |
| 353 | #gpio-cells = <2>; |
| 354 | compatible = "fsl,mpc8569-qe-pario-bank", |
| 355 | "fsl,mpc8323-qe-pario-bank"; |
| 356 | reg = <0x80 0x18>; |
| 357 | gpio-controller; |
| 358 | }; |
| 359 | |
Anton Vorontsov | 9b9d401 | 2009-08-19 03:28:21 +0400 | [diff] [blame] | 360 | qe_pio_f: gpio-controller@a0 { |
| 361 | #gpio-cells = <2>; |
| 362 | compatible = "fsl,mpc8569-qe-pario-bank", |
| 363 | "fsl,mpc8323-qe-pario-bank"; |
| 364 | reg = <0xa0 0x18>; |
| 365 | gpio-controller; |
| 366 | }; |
| 367 | |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 368 | pio1: ucc_pin@01 { |
| 369 | pio-map = < |
| 370 | /* port pin dir open_drain assignment has_irq */ |
| 371 | 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ |
| 372 | 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ |
| 373 | 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/ |
| 374 | 0x0 0x0 0x1 0x0 0x3 0x0 /* ENET1_TXD0_SER1_TXD0 */ |
| 375 | 0x0 0x1 0x1 0x0 0x3 0x0 /* ENET1_TXD1_SER1_TXD1 */ |
| 376 | 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */ |
| 377 | 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */ |
| 378 | 0x0 0x6 0x2 0x0 0x3 0x0 /* ENET1_RXD0_SER1_RXD0 */ |
| 379 | 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */ |
| 380 | 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */ |
| 381 | 0x0 0x9 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */ |
| 382 | 0x0 0x4 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */ |
| 383 | 0x0 0xc 0x2 0x0 0x3 0x0 /* ENET1_RX_DV_SER1_CTS_B */ |
| 384 | 0x2 0x8 0x2 0x0 0x1 0x0 /* ENET1_GRXCLK */ |
| 385 | 0x2 0x14 0x1 0x0 0x2 0x0>; /* ENET1_GTXCLK */ |
| 386 | }; |
| 387 | |
| 388 | pio2: ucc_pin@02 { |
| 389 | pio-map = < |
| 390 | /* port pin dir open_drain assignment has_irq */ |
| 391 | 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ |
| 392 | 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ |
| 393 | 0x2 0x10 0x2 0x0 0x3 0x0 /* CLK17 */ |
| 394 | 0x0 0xe 0x1 0x0 0x2 0x0 /* ENET2_TXD0_SER2_TXD0 */ |
| 395 | 0x0 0xf 0x1 0x0 0x2 0x0 /* ENET2_TXD1_SER2_TXD1 */ |
| 396 | 0x0 0x10 0x1 0x0 0x1 0x0 /* ENET2_TXD2_SER2_TXD2 */ |
| 397 | 0x0 0x11 0x1 0x0 0x1 0x0 /* ENET2_TXD3_SER2_TXD3 */ |
| 398 | 0x0 0x14 0x2 0x0 0x2 0x0 /* ENET2_RXD0_SER2_RXD0 */ |
| 399 | 0x0 0x15 0x2 0x0 0x1 0x0 /* ENET2_RXD1_SER2_RXD1 */ |
| 400 | 0x0 0x16 0x2 0x0 0x1 0x0 /* ENET2_RXD2_SER2_RXD2 */ |
| 401 | 0x0 0x17 0x2 0x0 0x1 0x0 /* ENET2_RXD3_SER2_RXD3 */ |
| 402 | 0x0 0x12 0x1 0x0 0x2 0x0 /* ENET2_TX_EN_SER2_RTS_B */ |
| 403 | 0x0 0x1a 0x2 0x0 0x3 0x0 /* ENET2_RX_DV_SER2_CTS_B */ |
| 404 | 0x2 0x3 0x2 0x0 0x1 0x0 /* ENET2_GRXCLK */ |
| 405 | 0x2 0x2 0x1 0x0 0x2 0x0>; /* ENET2_GTXCLK */ |
| 406 | }; |
| 407 | |
| 408 | pio3: ucc_pin@03 { |
| 409 | pio-map = < |
| 410 | /* port pin dir open_drain assignment has_irq */ |
| 411 | 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ |
| 412 | 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ |
| 413 | 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/ |
| 414 | 0x0 0x1d 0x1 0x0 0x2 0x0 /* ENET3_TXD0_SER3_TXD0 */ |
| 415 | 0x0 0x1e 0x1 0x0 0x3 0x0 /* ENET3_TXD1_SER3_TXD1 */ |
| 416 | 0x0 0x1f 0x1 0x0 0x2 0x0 /* ENET3_TXD2_SER3_TXD2 */ |
| 417 | 0x1 0x0 0x1 0x0 0x3 0x0 /* ENET3_TXD3_SER3_TXD3 */ |
| 418 | 0x1 0x3 0x2 0x0 0x3 0x0 /* ENET3_RXD0_SER3_RXD0 */ |
| 419 | 0x1 0x4 0x2 0x0 0x1 0x0 /* ENET3_RXD1_SER3_RXD1 */ |
| 420 | 0x1 0x5 0x2 0x0 0x2 0x0 /* ENET3_RXD2_SER3_RXD2 */ |
| 421 | 0x1 0x6 0x2 0x0 0x3 0x0 /* ENET3_RXD3_SER3_RXD3 */ |
| 422 | 0x1 0x1 0x1 0x0 0x1 0x0 /* ENET3_TX_EN_SER3_RTS_B */ |
| 423 | 0x1 0x9 0x2 0x0 0x3 0x0 /* ENET3_RX_DV_SER3_CTS_B */ |
| 424 | 0x2 0x9 0x2 0x0 0x2 0x0 /* ENET3_GRXCLK */ |
| 425 | 0x2 0x19 0x1 0x0 0x2 0x0>; /* ENET3_GTXCLK */ |
| 426 | }; |
| 427 | |
| 428 | pio4: ucc_pin@04 { |
| 429 | pio-map = < |
| 430 | /* port pin dir open_drain assignment has_irq */ |
| 431 | 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ |
| 432 | 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ |
| 433 | 0x2 0x10 0x2 0x0 0x3 0x0 /* CLK17 */ |
| 434 | 0x1 0xc 0x1 0x0 0x2 0x0 /* ENET4_TXD0_SER4_TXD0 */ |
| 435 | 0x1 0xd 0x1 0x0 0x2 0x0 /* ENET4_TXD1_SER4_TXD1 */ |
| 436 | 0x1 0xe 0x1 0x0 0x1 0x0 /* ENET4_TXD2_SER4_TXD2 */ |
| 437 | 0x1 0xf 0x1 0x0 0x2 0x0 /* ENET4_TXD3_SER4_TXD3 */ |
| 438 | 0x1 0x12 0x2 0x0 0x2 0x0 /* ENET4_RXD0_SER4_RXD0 */ |
| 439 | 0x1 0x13 0x2 0x0 0x1 0x0 /* ENET4_RXD1_SER4_RXD1 */ |
| 440 | 0x1 0x14 0x2 0x0 0x1 0x0 /* ENET4_RXD2_SER4_RXD2 */ |
| 441 | 0x1 0x15 0x2 0x0 0x2 0x0 /* ENET4_RXD3_SER4_RXD3 */ |
| 442 | 0x1 0x10 0x1 0x0 0x2 0x0 /* ENET4_TX_EN_SER4_RTS_B */ |
| 443 | 0x1 0x18 0x2 0x0 0x3 0x0 /* ENET4_RX_DV_SER4_CTS_B */ |
| 444 | 0x2 0x11 0x2 0x0 0x2 0x0 /* ENET4_GRXCLK */ |
| 445 | 0x2 0x18 0x1 0x0 0x2 0x0>; /* ENET4_GTXCLK */ |
| 446 | }; |
| 447 | }; |
| 448 | }; |
| 449 | |
| 450 | qe@e0080000 { |
| 451 | #address-cells = <1>; |
| 452 | #size-cells = <1>; |
| 453 | device_type = "qe"; |
| 454 | compatible = "fsl,qe"; |
| 455 | ranges = <0x0 0xe0080000 0x40000>; |
| 456 | reg = <0xe0080000 0x480>; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 457 | sleep = <&pmc 0x00000800>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 458 | brg-frequency = <0>; |
| 459 | bus-frequency = <0>; |
| 460 | fsl,qe-num-riscs = <4>; |
| 461 | fsl,qe-num-snums = <46>; |
| 462 | |
| 463 | qeic: interrupt-controller@80 { |
| 464 | interrupt-controller; |
| 465 | compatible = "fsl,qe-ic"; |
| 466 | #address-cells = <0>; |
| 467 | #interrupt-cells = <1>; |
| 468 | reg = <0x80 0x80>; |
| 469 | interrupts = <46 2 46 2>; //high:30 low:30 |
| 470 | interrupt-parent = <&mpic>; |
| 471 | }; |
| 472 | |
Anton Vorontsov | 9b9d401 | 2009-08-19 03:28:21 +0400 | [diff] [blame] | 473 | timer@440 { |
| 474 | compatible = "fsl,mpc8569-qe-gtm", |
| 475 | "fsl,qe-gtm", "fsl,gtm"; |
| 476 | reg = <0x440 0x40>; |
| 477 | interrupts = <12 13 14 15>; |
| 478 | interrupt-parent = <&qeic>; |
| 479 | /* Filled in by U-Boot */ |
| 480 | clock-frequency = <0>; |
| 481 | }; |
| 482 | |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 483 | spi@4c0 { |
Anton Vorontsov | bd78c33 | 2009-05-02 06:16:59 +0400 | [diff] [blame] | 484 | #address-cells = <1>; |
| 485 | #size-cells = <0>; |
| 486 | compatible = "fsl,mpc8569-qe-spi", "fsl,spi"; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 487 | reg = <0x4c0 0x40>; |
Anton Vorontsov | bd78c33 | 2009-05-02 06:16:59 +0400 | [diff] [blame] | 488 | cell-index = <0>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 489 | interrupts = <2>; |
| 490 | interrupt-parent = <&qeic>; |
Anton Vorontsov | bd78c33 | 2009-05-02 06:16:59 +0400 | [diff] [blame] | 491 | gpios = <&qe_pio_e 30 0>; |
| 492 | mode = "cpu-qe"; |
| 493 | |
| 494 | serial-flash@0 { |
| 495 | compatible = "stm,m25p40"; |
| 496 | reg = <0>; |
| 497 | spi-max-frequency = <25000000>; |
| 498 | }; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 499 | }; |
| 500 | |
| 501 | spi@500 { |
| 502 | cell-index = <1>; |
| 503 | compatible = "fsl,spi"; |
| 504 | reg = <0x500 0x40>; |
| 505 | interrupts = <1>; |
| 506 | interrupt-parent = <&qeic>; |
| 507 | mode = "cpu"; |
| 508 | }; |
| 509 | |
Anton Vorontsov | 9b9d401 | 2009-08-19 03:28:21 +0400 | [diff] [blame] | 510 | usb@6c0 { |
| 511 | compatible = "fsl,mpc8569-qe-usb", |
| 512 | "fsl,mpc8323-qe-usb"; |
| 513 | reg = <0x6c0 0x40 0x8b00 0x100>; |
| 514 | interrupts = <11>; |
| 515 | interrupt-parent = <&qeic>; |
| 516 | fsl,fullspeed-clock = "clk5"; |
| 517 | fsl,lowspeed-clock = "brg10"; |
| 518 | gpios = <&qe_pio_f 3 0 /* USBOE */ |
| 519 | &qe_pio_f 4 0 /* USBTP */ |
| 520 | &qe_pio_f 5 0 /* USBTN */ |
| 521 | &qe_pio_f 6 0 /* USBRP */ |
| 522 | &qe_pio_f 8 0 /* USBRN */ |
Anton Vorontsov | a070e66 | 2009-10-16 20:50:13 +0400 | [diff] [blame] | 523 | &bcsr17 1 0 /* SPEED */ |
| 524 | &bcsr17 2 0>; /* POWER */ |
Anton Vorontsov | 9b9d401 | 2009-08-19 03:28:21 +0400 | [diff] [blame] | 525 | }; |
| 526 | |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 527 | enet0: ucc@2000 { |
| 528 | device_type = "network"; |
| 529 | compatible = "ucc_geth"; |
| 530 | cell-index = <1>; |
| 531 | reg = <0x2000 0x200>; |
| 532 | interrupts = <32>; |
| 533 | interrupt-parent = <&qeic>; |
| 534 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 535 | rx-clock-name = "none"; |
| 536 | tx-clock-name = "clk12"; |
| 537 | pio-handle = <&pio1>; |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 538 | tbi-handle = <&tbi1>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 539 | phy-handle = <&qe_phy0>; |
| 540 | phy-connection-type = "rgmii-id"; |
| 541 | }; |
| 542 | |
| 543 | mdio@2120 { |
| 544 | #address-cells = <1>; |
| 545 | #size-cells = <0>; |
| 546 | reg = <0x2120 0x18>; |
| 547 | compatible = "fsl,ucc-mdio"; |
| 548 | |
| 549 | qe_phy0: ethernet-phy@07 { |
| 550 | interrupt-parent = <&mpic>; |
| 551 | interrupts = <1 1>; |
| 552 | reg = <0x7>; |
| 553 | device_type = "ethernet-phy"; |
| 554 | }; |
| 555 | qe_phy1: ethernet-phy@01 { |
| 556 | interrupt-parent = <&mpic>; |
| 557 | interrupts = <2 1>; |
| 558 | reg = <0x1>; |
| 559 | device_type = "ethernet-phy"; |
| 560 | }; |
| 561 | qe_phy2: ethernet-phy@02 { |
| 562 | interrupt-parent = <&mpic>; |
| 563 | interrupts = <3 1>; |
| 564 | reg = <0x2>; |
| 565 | device_type = "ethernet-phy"; |
| 566 | }; |
| 567 | qe_phy3: ethernet-phy@03 { |
| 568 | interrupt-parent = <&mpic>; |
| 569 | interrupts = <4 1>; |
| 570 | reg = <0x3>; |
| 571 | device_type = "ethernet-phy"; |
| 572 | }; |
Haiying Wang | b4a31c9 | 2009-06-02 10:04:16 -0400 | [diff] [blame] | 573 | qe_phy5: ethernet-phy@04 { |
| 574 | interrupt-parent = <&mpic>; |
| 575 | reg = <0x04>; |
| 576 | device_type = "ethernet-phy"; |
| 577 | }; |
| 578 | qe_phy7: ethernet-phy@06 { |
| 579 | interrupt-parent = <&mpic>; |
| 580 | reg = <0x6>; |
| 581 | device_type = "ethernet-phy"; |
| 582 | }; |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 583 | tbi1: tbi-phy@11 { |
Anton Vorontsov | 8a0b177 | 2009-07-01 21:39:25 +0400 | [diff] [blame] | 584 | reg = <0x11>; |
| 585 | device_type = "tbi-phy"; |
| 586 | }; |
Haiying Wang | b4a31c9 | 2009-06-02 10:04:16 -0400 | [diff] [blame] | 587 | }; |
| 588 | mdio@3520 { |
| 589 | #address-cells = <1>; |
| 590 | #size-cells = <0>; |
| 591 | reg = <0x3520 0x18>; |
| 592 | compatible = "fsl,ucc-mdio"; |
| 593 | |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 594 | tbi6: tbi-phy@15 { |
Haiying Wang | b4a31c9 | 2009-06-02 10:04:16 -0400 | [diff] [blame] | 595 | reg = <0x15>; |
| 596 | device_type = "tbi-phy"; |
| 597 | }; |
| 598 | }; |
| 599 | mdio@3720 { |
| 600 | #address-cells = <1>; |
| 601 | #size-cells = <0>; |
| 602 | reg = <0x3720 0x38>; |
| 603 | compatible = "fsl,ucc-mdio"; |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 604 | tbi8: tbi-phy@17 { |
Haiying Wang | b4a31c9 | 2009-06-02 10:04:16 -0400 | [diff] [blame] | 605 | reg = <0x17>; |
| 606 | device_type = "tbi-phy"; |
| 607 | }; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 608 | }; |
| 609 | |
| 610 | enet2: ucc@2200 { |
| 611 | device_type = "network"; |
| 612 | compatible = "ucc_geth"; |
| 613 | cell-index = <3>; |
| 614 | reg = <0x2200 0x200>; |
| 615 | interrupts = <34>; |
| 616 | interrupt-parent = <&qeic>; |
| 617 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 618 | rx-clock-name = "none"; |
| 619 | tx-clock-name = "clk12"; |
| 620 | pio-handle = <&pio3>; |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 621 | tbi-handle = <&tbi3>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 622 | phy-handle = <&qe_phy2>; |
| 623 | phy-connection-type = "rgmii-id"; |
| 624 | }; |
| 625 | |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 626 | mdio@2320 { |
| 627 | #address-cells = <1>; |
| 628 | #size-cells = <0>; |
| 629 | reg = <0x2320 0x18>; |
| 630 | compatible = "fsl,ucc-mdio"; |
| 631 | tbi3: tbi-phy@11 { |
| 632 | reg = <0x11>; |
| 633 | device_type = "tbi-phy"; |
| 634 | }; |
| 635 | }; |
| 636 | |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 637 | enet1: ucc@3000 { |
| 638 | device_type = "network"; |
| 639 | compatible = "ucc_geth"; |
| 640 | cell-index = <2>; |
| 641 | reg = <0x3000 0x200>; |
| 642 | interrupts = <33>; |
| 643 | interrupt-parent = <&qeic>; |
| 644 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 645 | rx-clock-name = "none"; |
| 646 | tx-clock-name = "clk17"; |
| 647 | pio-handle = <&pio2>; |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 648 | tbi-handle = <&tbi2>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 649 | phy-handle = <&qe_phy1>; |
| 650 | phy-connection-type = "rgmii-id"; |
| 651 | }; |
| 652 | |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 653 | mdio@3120 { |
| 654 | #address-cells = <1>; |
| 655 | #size-cells = <0>; |
| 656 | reg = <0x3120 0x18>; |
| 657 | compatible = "fsl,ucc-mdio"; |
| 658 | tbi2: tbi-phy@11 { |
| 659 | reg = <0x11>; |
| 660 | device_type = "tbi-phy"; |
| 661 | }; |
| 662 | }; |
| 663 | |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 664 | enet3: ucc@3200 { |
| 665 | device_type = "network"; |
| 666 | compatible = "ucc_geth"; |
| 667 | cell-index = <4>; |
| 668 | reg = <0x3200 0x200>; |
| 669 | interrupts = <35>; |
| 670 | interrupt-parent = <&qeic>; |
| 671 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 672 | rx-clock-name = "none"; |
| 673 | tx-clock-name = "clk17"; |
| 674 | pio-handle = <&pio4>; |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 675 | tbi-handle = <&tbi4>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 676 | phy-handle = <&qe_phy3>; |
| 677 | phy-connection-type = "rgmii-id"; |
| 678 | }; |
| 679 | |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 680 | mdio@3320 { |
| 681 | #address-cells = <1>; |
| 682 | #size-cells = <0>; |
| 683 | reg = <0x3320 0x18>; |
| 684 | compatible = "fsl,ucc-mdio"; |
| 685 | tbi4: tbi-phy@11 { |
| 686 | reg = <0x11>; |
| 687 | device_type = "tbi-phy"; |
| 688 | }; |
| 689 | }; |
| 690 | |
Haiying Wang | b4a31c9 | 2009-06-02 10:04:16 -0400 | [diff] [blame] | 691 | enet5: ucc@3400 { |
| 692 | device_type = "network"; |
| 693 | compatible = "ucc_geth"; |
| 694 | cell-index = <6>; |
| 695 | reg = <0x3400 0x200>; |
| 696 | interrupts = <41>; |
| 697 | interrupt-parent = <&qeic>; |
| 698 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 699 | rx-clock-name = "none"; |
| 700 | tx-clock-name = "none"; |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 701 | tbi-handle = <&tbi6>; |
Haiying Wang | b4a31c9 | 2009-06-02 10:04:16 -0400 | [diff] [blame] | 702 | phy-handle = <&qe_phy5>; |
| 703 | phy-connection-type = "sgmii"; |
| 704 | }; |
| 705 | |
| 706 | enet7: ucc@3600 { |
| 707 | device_type = "network"; |
| 708 | compatible = "ucc_geth"; |
| 709 | cell-index = <8>; |
| 710 | reg = <0x3600 0x200>; |
| 711 | interrupts = <43>; |
| 712 | interrupt-parent = <&qeic>; |
| 713 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 714 | rx-clock-name = "none"; |
| 715 | tx-clock-name = "none"; |
Liu Yu-B13201 | d03e067 | 2010-01-13 22:13:16 +0000 | [diff] [blame] | 716 | tbi-handle = <&tbi8>; |
Haiying Wang | b4a31c9 | 2009-06-02 10:04:16 -0400 | [diff] [blame] | 717 | phy-handle = <&qe_phy7>; |
| 718 | phy-connection-type = "sgmii"; |
| 719 | }; |
| 720 | |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 721 | muram@10000 { |
| 722 | #address-cells = <1>; |
| 723 | #size-cells = <1>; |
| 724 | compatible = "fsl,qe-muram", "fsl,cpm-muram"; |
| 725 | ranges = <0x0 0x10000 0x20000>; |
| 726 | |
| 727 | data-only@0 { |
| 728 | compatible = "fsl,qe-muram-data", |
| 729 | "fsl,cpm-muram-data"; |
| 730 | reg = <0x0 0x20000>; |
| 731 | }; |
| 732 | }; |
| 733 | |
| 734 | }; |
| 735 | |
| 736 | /* PCI Express */ |
| 737 | pci1: pcie@e000a000 { |
| 738 | compatible = "fsl,mpc8548-pcie"; |
| 739 | device_type = "pci"; |
| 740 | #interrupt-cells = <1>; |
| 741 | #size-cells = <2>; |
| 742 | #address-cells = <3>; |
| 743 | reg = <0xe000a000 0x1000>; |
| 744 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| 745 | interrupt-map = < |
| 746 | /* IDSEL 0x0 (PEX) */ |
| 747 | 00000 0x0 0x0 0x1 &mpic 0x0 0x1 |
| 748 | 00000 0x0 0x0 0x2 &mpic 0x1 0x1 |
| 749 | 00000 0x0 0x0 0x3 &mpic 0x2 0x1 |
| 750 | 00000 0x0 0x0 0x4 &mpic 0x3 0x1>; |
| 751 | |
| 752 | interrupt-parent = <&mpic>; |
| 753 | interrupts = <26 2>; |
| 754 | bus-range = <0 255>; |
| 755 | ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 |
| 756 | 0x1000000 0x0 0x00000000 0xe2800000 0x0 0x00800000>; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 757 | sleep = <&pmc 0x20000000>; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 758 | clock-frequency = <33333333>; |
| 759 | pcie@0 { |
| 760 | reg = <0x0 0x0 0x0 0x0 0x0>; |
| 761 | #size-cells = <2>; |
| 762 | #address-cells = <3>; |
| 763 | device_type = "pci"; |
| 764 | ranges = <0x2000000 0x0 0xa0000000 |
| 765 | 0x2000000 0x0 0xa0000000 |
| 766 | 0x0 0x10000000 |
| 767 | |
| 768 | 0x1000000 0x0 0x0 |
| 769 | 0x1000000 0x0 0x0 |
| 770 | 0x0 0x800000>; |
| 771 | }; |
| 772 | }; |
Anton Vorontsov | 5e8306f | 2009-05-02 06:16:56 +0400 | [diff] [blame] | 773 | |
| 774 | rio0: rapidio@e00c00000 { |
| 775 | #address-cells = <2>; |
| 776 | #size-cells = <2>; |
| 777 | compatible = "fsl,mpc8569-rapidio", "fsl,rapidio-delta"; |
| 778 | reg = <0xe00c0000 0x20000>; |
| 779 | ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>; |
| 780 | interrupts = <48 2 /* error */ |
| 781 | 49 2 /* bell_outb */ |
| 782 | 50 2 /* bell_inb */ |
| 783 | 53 2 /* msg1_tx */ |
| 784 | 54 2 /* msg1_rx */ |
| 785 | 55 2 /* msg2_tx */ |
| 786 | 56 2 /* msg2_rx */>; |
| 787 | interrupt-parent = <&mpic>; |
Anton Vorontsov | 3cfee0a | 2009-09-16 01:43:59 +0400 | [diff] [blame] | 788 | sleep = <&pmc 0x00080000>; |
Anton Vorontsov | 5e8306f | 2009-05-02 06:16:56 +0400 | [diff] [blame] | 789 | }; |
Haiying Wang | 4b3b42b | 2009-05-01 15:40:50 -0400 | [diff] [blame] | 790 | }; |