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Heiko Schocher830cb6f2009-10-15 09:33:24 -06001/*
2 * Manroland mucmc52 board Device Tree Source
3 *
4 * Copyright (C) 2009 DENX Software Engineering GmbH
5 * Heiko Schocher <hs@denx.de>
6 * Copyright 2006-2007 Secret Lab Technologies Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
John Bonesioc8bf6b52010-11-17 15:28:56 -080014/include/ "mpc5200b.dtsi"
Heiko Schocher830cb6f2009-10-15 09:33:24 -060015
16/ {
17 model = "manroland,mucmc52";
18 compatible = "manroland,mucmc52";
Heiko Schocher830cb6f2009-10-15 09:33:24 -060019
20 soc5200@f0000000 {
Heiko Schocher830cb6f2009-10-15 09:33:24 -060021 gpt0: timer@600 { // GPT 0 in GPIO mode
Heiko Schocher830cb6f2009-10-15 09:33:24 -060022 gpio-controller;
23 #gpio-cells = <2>;
24 };
25
26 gpt1: timer@610 { // General Purpose Timer in GPIO mode
Heiko Schocher830cb6f2009-10-15 09:33:24 -060027 gpio-controller;
28 #gpio-cells = <2>;
29 };
30
31 gpt2: timer@620 { // General Purpose Timer in GPIO mode
Heiko Schocher830cb6f2009-10-15 09:33:24 -060032 gpio-controller;
33 #gpio-cells = <2>;
34 };
35
36 gpt3: timer@630 { // General Purpose Timer in GPIO mode
Heiko Schocher830cb6f2009-10-15 09:33:24 -060037 gpio-controller;
38 #gpio-cells = <2>;
39 };
40
John Bonesioc8bf6b52010-11-17 15:28:56 -080041 timer@640 {
42 status = "disabled";
Heiko Schocher830cb6f2009-10-15 09:33:24 -060043 };
44
John Bonesioc8bf6b52010-11-17 15:28:56 -080045 timer@650 {
46 status = "disabled";
Heiko Schocher830cb6f2009-10-15 09:33:24 -060047 };
48
John Bonesioc8bf6b52010-11-17 15:28:56 -080049 timer@660 {
50 status = "disabled";
Heiko Schocher830cb6f2009-10-15 09:33:24 -060051 };
52
John Bonesioc8bf6b52010-11-17 15:28:56 -080053 timer@670 {
54 status = "disabled";
Heiko Schocher830cb6f2009-10-15 09:33:24 -060055 };
56
John Bonesioc8bf6b52010-11-17 15:28:56 -080057 rtc@800 {
58 status = "disabled";
59 };
60
61 can@900 {
62 status = "disabled";
63 };
64
65 can@980 {
66 status = "disabled";
67 };
68
69 spi@f00 {
70 status = "disabled";
71 };
72
73 usb@1000 {
74 status = "disabled";
75 };
76
77 psc@2000 { // PSC1
Heiko Schocher830cb6f2009-10-15 09:33:24 -060078 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
Heiko Schocher830cb6f2009-10-15 09:33:24 -060079 };
80
John Bonesioc8bf6b52010-11-17 15:28:56 -080081 psc@2200 { // PSC2
Heiko Schocher830cb6f2009-10-15 09:33:24 -060082 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
Heiko Schocher830cb6f2009-10-15 09:33:24 -060083 };
84
John Bonesioc8bf6b52010-11-17 15:28:56 -080085 psc@2400 { // PSC3
86 status = "disabled";
87 };
88
89 psc@2600 { // PSC4
90 status = "disabled";
91 };
92
93 psc@2800 { // PSC5
94 status = "disabled";
95 };
96
97 psc@2c00 { // PSC6
Heiko Schocher830cb6f2009-10-15 09:33:24 -060098 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
Heiko Schocher830cb6f2009-10-15 09:33:24 -060099 };
100
101 ethernet@3000 {
Heiko Schocher830cb6f2009-10-15 09:33:24 -0600102 phy-handle = <&phy0>;
103 };
104
105 mdio@3000 {
Heiko Schocher830cb6f2009-10-15 09:33:24 -0600106 phy0: ethernet-phy@0 {
107 compatible = "intel,lxt971";
108 reg = <0>;
109 };
110 };
111
John Bonesioc8bf6b52010-11-17 15:28:56 -0800112 i2c@3d00 {
113 status = "disabled";
Heiko Schocher830cb6f2009-10-15 09:33:24 -0600114 };
115
116 i2c@3d40 {
Heiko Schocher830cb6f2009-10-15 09:33:24 -0600117 hwmon@2c {
118 compatible = "ad,adm9240";
119 reg = <0x2c>;
120 };
121 rtc@51 {
122 compatible = "nxp,pcf8563";
123 reg = <0x51>;
124 };
125 };
Heiko Schocher830cb6f2009-10-15 09:33:24 -0600126 };
127
128 pci@f0000d00 {
Heiko Schocher830cb6f2009-10-15 09:33:24 -0600129 interrupt-map-mask = <0xf800 0 0 7>;
130 interrupt-map = <
131 /* IDSEL 0x10 */
132 0x8000 0 0 1 &mpc5200_pic 0 3 3
133 0x8000 0 0 2 &mpc5200_pic 0 3 3
134 0x8000 0 0 3 &mpc5200_pic 0 2 3
135 0x8000 0 0 4 &mpc5200_pic 0 1 3
136 >;
Heiko Schocher830cb6f2009-10-15 09:33:24 -0600137 ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000
138 0x02000000 0 0x90000000 0x90000000 0 0x10000000
139 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
140 };
141
142 localbus {
Heiko Schocher830cb6f2009-10-15 09:33:24 -0600143 ranges = <0 0 0xff800000 0x00800000
144 1 0 0x80000000 0x00800000
145 3 0 0x80000000 0x00800000>;
146
147 flash@0,0 {
148 compatible = "cfi-flash";
149 reg = <0 0 0x00800000>;
150 bank-width = <4>;
151 device-width = <2>;
152 #size-cells = <1>;
153 #address-cells = <1>;
154 partition@0 {
155 label = "DTS";
156 reg = <0x0 0x00100000>;
157 };
158 partition@100000 {
159 label = "Kernel";
160 reg = <0x100000 0x00200000>;
161 };
162 partition@300000 {
163 label = "RootFS";
164 reg = <0x00300000 0x00200000>;
165 };
166 partition@500000 {
167 label = "user";
168 reg = <0x00500000 0x00200000>;
169 };
170 partition@700000 {
171 label = "U-Boot";
172 reg = <0x00700000 0x00040000>;
173 };
174 partition@740000 {
175 label = "Env";
176 reg = <0x00740000 0x00020000>;
177 };
178 partition@760000 {
179 label = "red. Env";
180 reg = <0x00760000 0x00020000>;
181 };
182 partition@780000 {
183 label = "reserve";
184 reg = <0x00780000 0x00080000>;
185 };
186 };
187
188 simple100: gpio-controller-100@3,600100 {
189 compatible = "manroland,mucmc52-aux-gpio";
190 reg = <3 0x00600100 0x1>;
191 gpio-controller;
192 #gpio-cells = <2>;
193 };
194 simple104: gpio-controller-104@3,600104 {
195 compatible = "manroland,mucmc52-aux-gpio";
196 reg = <3 0x00600104 0x1>;
197 gpio-controller;
198 #gpio-cells = <2>;
199 };
200 simple200: gpio-controller-200@3,600200 {
201 compatible = "manroland,mucmc52-aux-gpio";
202 reg = <3 0x00600200 0x1>;
203 gpio-controller;
204 #gpio-cells = <2>;
205 };
206 simple201: gpio-controller-201@3,600201 {
207 compatible = "manroland,mucmc52-aux-gpio";
208 reg = <3 0x00600201 0x1>;
209 gpio-controller;
210 #gpio-cells = <2>;
211 };
212 simple202: gpio-controller-202@3,600202 {
213 compatible = "manroland,mucmc52-aux-gpio";
214 reg = <3 0x00600202 0x1>;
215 gpio-controller;
216 #gpio-cells = <2>;
217 };
218 simple203: gpio-controller-203@3,600203 {
219 compatible = "manroland,mucmc52-aux-gpio";
220 reg = <3 0x00600203 0x1>;
221 gpio-controller;
222 #gpio-cells = <2>;
223 };
224 simple204: gpio-controller-204@3,600204 {
225 compatible = "manroland,mucmc52-aux-gpio";
226 reg = <3 0x00600204 0x1>;
227 gpio-controller;
228 #gpio-cells = <2>;
229 };
230 simple206: gpio-controller-206@3,600206 {
231 compatible = "manroland,mucmc52-aux-gpio";
232 reg = <3 0x00600206 0x1>;
233 gpio-controller;
234 #gpio-cells = <2>;
235 };
236 simple207: gpio-controller-207@3,600207 {
237 compatible = "manroland,mucmc52-aux-gpio";
238 reg = <3 0x00600207 0x1>;
239 gpio-controller;
240 #gpio-cells = <2>;
241 };
242 simple20f: gpio-controller-20f@3,60020f {
243 compatible = "manroland,mucmc52-aux-gpio";
244 reg = <3 0x0060020f 0x1>;
245 gpio-controller;
246 #gpio-cells = <2>;
247 };
248
249 };
250};