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Valentine Barshak3910cd82007-10-31 03:56:50 +11001/*
2 * Device Tree Source for AMCC Rainier
3 *
4 * Based on Sequoia code
5 * Copyright (c) 2007 MontaVista Software, Inc.
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 *
13 */
14
David Gibson71f34972008-05-15 16:46:39 +100015/dts-v1/;
16
Valentine Barshak3910cd82007-10-31 03:56:50 +110017/ {
18 #address-cells = <2>;
19 #size-cells = <1>;
20 model = "amcc,rainier";
21 compatible = "amcc,rainier";
David Gibson71f34972008-05-15 16:46:39 +100022 dcr-parent = <&{/cpus/cpu@0}>;
Valentine Barshak3910cd82007-10-31 03:56:50 +110023
Stefan Roese8aaed982007-12-15 18:55:16 +110024 aliases {
25 ethernet0 = &EMAC0;
26 ethernet1 = &EMAC1;
27 serial0 = &UART0;
28 serial1 = &UART1;
29 serial2 = &UART2;
30 serial3 = &UART3;
31 };
32
Valentine Barshak3910cd82007-10-31 03:56:50 +110033 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
Josh Boyer72fda112007-12-06 13:20:05 -060037 cpu@0 {
Valentine Barshak3910cd82007-10-31 03:56:50 +110038 device_type = "cpu";
Josh Boyer72fda112007-12-06 13:20:05 -060039 model = "PowerPC,440GRx";
David Gibson71f34972008-05-15 16:46:39 +100040 reg = <0x00000000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +110041 clock-frequency = <0>; /* Filled in by zImage */
42 timebase-frequency = <0>; /* Filled in by zImage */
David Gibson71f34972008-05-15 16:46:39 +100043 i-cache-line-size = <32>;
44 d-cache-line-size = <32>;
45 i-cache-size = <32768>;
46 d-cache-size = <32768>;
Valentine Barshak3910cd82007-10-31 03:56:50 +110047 dcr-controller;
48 dcr-access-method = "native";
49 };
50 };
51
52 memory {
53 device_type = "memory";
David Gibson71f34972008-05-15 16:46:39 +100054 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
Valentine Barshak3910cd82007-10-31 03:56:50 +110055 };
56
57 UIC0: interrupt-controller0 {
58 compatible = "ibm,uic-440grx","ibm,uic";
59 interrupt-controller;
60 cell-index = <0>;
David Gibson71f34972008-05-15 16:46:39 +100061 dcr-reg = <0x0c0 0x009>;
Valentine Barshak3910cd82007-10-31 03:56:50 +110062 #address-cells = <0>;
63 #size-cells = <0>;
64 #interrupt-cells = <2>;
65 };
66
67 UIC1: interrupt-controller1 {
68 compatible = "ibm,uic-440grx","ibm,uic";
69 interrupt-controller;
70 cell-index = <1>;
David Gibson71f34972008-05-15 16:46:39 +100071 dcr-reg = <0x0d0 0x009>;
Valentine Barshak3910cd82007-10-31 03:56:50 +110072 #address-cells = <0>;
73 #size-cells = <0>;
74 #interrupt-cells = <2>;
David Gibson71f34972008-05-15 16:46:39 +100075 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
Valentine Barshak3910cd82007-10-31 03:56:50 +110076 interrupt-parent = <&UIC0>;
77 };
78
79 UIC2: interrupt-controller2 {
80 compatible = "ibm,uic-440grx","ibm,uic";
81 interrupt-controller;
82 cell-index = <2>;
David Gibson71f34972008-05-15 16:46:39 +100083 dcr-reg = <0x0e0 0x009>;
Valentine Barshak3910cd82007-10-31 03:56:50 +110084 #address-cells = <0>;
85 #size-cells = <0>;
86 #interrupt-cells = <2>;
David Gibson71f34972008-05-15 16:46:39 +100087 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
Valentine Barshak3910cd82007-10-31 03:56:50 +110088 interrupt-parent = <&UIC0>;
89 };
90
91 SDR0: sdr {
92 compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
David Gibson71f34972008-05-15 16:46:39 +100093 dcr-reg = <0x00e 0x002>;
Valentine Barshak3910cd82007-10-31 03:56:50 +110094 };
95
96 CPR0: cpr {
97 compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
David Gibson71f34972008-05-15 16:46:39 +100098 dcr-reg = <0x00c 0x002>;
Valentine Barshak3910cd82007-10-31 03:56:50 +110099 };
100
101 plb {
102 compatible = "ibm,plb-440grx", "ibm,plb4";
103 #address-cells = <2>;
104 #size-cells = <1>;
105 ranges;
106 clock-frequency = <0>; /* Filled in by zImage */
Stefan Roese8aaed982007-12-15 18:55:16 +1100107
Valentine Barshak3910cd82007-10-31 03:56:50 +1100108 SDRAM0: sdram {
Valentine Barshak3910cd82007-10-31 03:56:50 +1100109 compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
David Gibson71f34972008-05-15 16:46:39 +1000110 dcr-reg = <0x010 0x002>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100111 };
112
113 DMA0: dma {
114 compatible = "ibm,dma-440grx", "ibm,dma-4xx";
David Gibson71f34972008-05-15 16:46:39 +1000115 dcr-reg = <0x100 0x027>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100116 };
117
118 MAL0: mcmal {
119 compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
David Gibson71f34972008-05-15 16:46:39 +1000120 dcr-reg = <0x180 0x062>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100121 num-tx-chans = <2>;
122 num-rx-chans = <2>;
123 interrupt-parent = <&MAL0>;
David Gibson71f34972008-05-15 16:46:39 +1000124 interrupts = <0x0 0x1 0x2 0x3 0x4>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100125 #interrupt-cells = <1>;
126 #address-cells = <0>;
127 #size-cells = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000128 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
129 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
130 /*SERR*/ 0x2 &UIC1 0x0 0x4
131 /*TXDE*/ 0x3 &UIC1 0x1 0x4
132 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
133 interrupt-map-mask = <0xffffffff>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100134 };
135
136 POB0: opb {
137 compatible = "ibm,opb-440grx", "ibm,opb";
138 #address-cells = <1>;
139 #size-cells = <1>;
David Gibson71f34972008-05-15 16:46:39 +1000140 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
141 0x80000000 0x00000001 0x80000000 0x80000000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100142 interrupt-parent = <&UIC1>;
David Gibson71f34972008-05-15 16:46:39 +1000143 interrupts = <0x7 0x4>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100144 clock-frequency = <0>; /* Filled in by zImage */
145
146 EBC0: ebc {
147 compatible = "ibm,ebc-440grx", "ibm,ebc";
David Gibson71f34972008-05-15 16:46:39 +1000148 dcr-reg = <0x012 0x002>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100149 #address-cells = <2>;
150 #size-cells = <1>;
151 clock-frequency = <0>; /* Filled in by zImage */
David Gibson71f34972008-05-15 16:46:39 +1000152 interrupts = <0x5 0x1>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100153 interrupt-parent = <&UIC1>;
154
155 nor_flash@0,0 {
156 compatible = "amd,s29gl256n", "cfi-flash";
157 bank-width = <2>;
David Gibson71f34972008-05-15 16:46:39 +1000158 reg = <0x00000000 0x00000000 0x04000000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100159 #address-cells = <1>;
160 #size-cells = <1>;
161 partition@0 {
162 label = "Kernel";
David Gibson71f34972008-05-15 16:46:39 +1000163 reg = <0x00000000 0x00180000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100164 };
165 partition@180000 {
166 label = "ramdisk";
David Gibson71f34972008-05-15 16:46:39 +1000167 reg = <0x00180000 0x00200000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100168 };
169 partition@380000 {
170 label = "file system";
David Gibson71f34972008-05-15 16:46:39 +1000171 reg = <0x00380000 0x03aa0000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100172 };
173 partition@3e20000 {
174 label = "kozio";
David Gibson71f34972008-05-15 16:46:39 +1000175 reg = <0x03e20000 0x00140000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100176 };
177 partition@3f60000 {
178 label = "env";
David Gibson71f34972008-05-15 16:46:39 +1000179 reg = <0x03f60000 0x00040000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100180 };
181 partition@3fa0000 {
182 label = "u-boot";
David Gibson71f34972008-05-15 16:46:39 +1000183 reg = <0x03fa0000 0x00060000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100184 };
185 };
186
187 };
188
189 UART0: serial@ef600300 {
190 device_type = "serial";
191 compatible = "ns16550";
David Gibson71f34972008-05-15 16:46:39 +1000192 reg = <0xef600300 0x00000008>;
193 virtual-reg = <0xef600300>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100194 clock-frequency = <0>; /* Filled in by zImage */
David Gibson71f34972008-05-15 16:46:39 +1000195 current-speed = <115200>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100196 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000197 interrupts = <0x0 0x4>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100198 };
199
200 UART1: serial@ef600400 {
201 device_type = "serial";
202 compatible = "ns16550";
David Gibson71f34972008-05-15 16:46:39 +1000203 reg = <0xef600400 0x00000008>;
204 virtual-reg = <0xef600400>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100205 clock-frequency = <0>;
206 current-speed = <0>;
207 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000208 interrupts = <0x1 0x4>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100209 };
210
211 UART2: serial@ef600500 {
212 device_type = "serial";
213 compatible = "ns16550";
David Gibson71f34972008-05-15 16:46:39 +1000214 reg = <0xef600500 0x00000008>;
215 virtual-reg = <0xef600500>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100216 clock-frequency = <0>;
217 current-speed = <0>;
218 interrupt-parent = <&UIC1>;
David Gibson71f34972008-05-15 16:46:39 +1000219 interrupts = <0x3 0x4>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100220 };
221
222 UART3: serial@ef600600 {
223 device_type = "serial";
224 compatible = "ns16550";
David Gibson71f34972008-05-15 16:46:39 +1000225 reg = <0xef600600 0x00000008>;
226 virtual-reg = <0xef600600>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100227 clock-frequency = <0>;
228 current-speed = <0>;
229 interrupt-parent = <&UIC1>;
David Gibson71f34972008-05-15 16:46:39 +1000230 interrupts = <0x4 0x4>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100231 };
232
233 IIC0: i2c@ef600700 {
Valentine Barshak3910cd82007-10-31 03:56:50 +1100234 compatible = "ibm,iic-440grx", "ibm,iic";
David Gibson71f34972008-05-15 16:46:39 +1000235 reg = <0xef600700 0x00000014>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100236 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000237 interrupts = <0x2 0x4>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100238 };
239
240 IIC1: i2c@ef600800 {
Valentine Barshak3910cd82007-10-31 03:56:50 +1100241 compatible = "ibm,iic-440grx", "ibm,iic";
David Gibson71f34972008-05-15 16:46:39 +1000242 reg = <0xef600800 0x00000014>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100243 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000244 interrupts = <0x7 0x4>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100245 };
246
247 ZMII0: emac-zmii@ef600d00 {
Valentine Barshak3910cd82007-10-31 03:56:50 +1100248 compatible = "ibm,zmii-440grx", "ibm,zmii";
David Gibson71f34972008-05-15 16:46:39 +1000249 reg = <0xef600d00 0x0000000c>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100250 };
251
252 RGMII0: emac-rgmii@ef601000 {
Valentine Barshak3910cd82007-10-31 03:56:50 +1100253 compatible = "ibm,rgmii-440grx", "ibm,rgmii";
David Gibson71f34972008-05-15 16:46:39 +1000254 reg = <0xef601000 0x00000008>;
Valentine Barshak58c50192007-12-06 19:21:12 +0300255 has-mdio;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100256 };
257
258 EMAC0: ethernet@ef600e00 {
Valentine Barshak3910cd82007-10-31 03:56:50 +1100259 device_type = "network";
260 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
261 interrupt-parent = <&EMAC0>;
David Gibson71f34972008-05-15 16:46:39 +1000262 interrupts = <0x0 0x1>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100263 #interrupt-cells = <1>;
264 #address-cells = <0>;
265 #size-cells = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000266 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
267 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
Grant Erickson05781cc2008-07-08 08:03:11 +1000268 reg = <0xef600e00 0x00000074>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100269 local-mac-address = [000000000000];
270 mal-device = <&MAL0>;
271 mal-tx-channel = <0>;
272 mal-rx-channel = <0>;
273 cell-index = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000274 max-frame-size = <9000>;
275 rx-fifo-size = <4096>;
276 tx-fifo-size = <2048>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100277 phy-mode = "rgmii";
David Gibson71f34972008-05-15 16:46:39 +1000278 phy-map = <0x00000000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100279 zmii-device = <&ZMII0>;
280 zmii-channel = <0>;
281 rgmii-device = <&RGMII0>;
282 rgmii-channel = <0>;
Valentine Barshak58c50192007-12-06 19:21:12 +0300283 has-inverted-stacr-oc;
284 has-new-stacr-staopc;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100285 };
286
287 EMAC1: ethernet@ef600f00 {
Valentine Barshak3910cd82007-10-31 03:56:50 +1100288 device_type = "network";
289 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
290 interrupt-parent = <&EMAC1>;
David Gibson71f34972008-05-15 16:46:39 +1000291 interrupts = <0x0 0x1>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100292 #interrupt-cells = <1>;
293 #address-cells = <0>;
294 #size-cells = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000295 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
296 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
Grant Erickson05781cc2008-07-08 08:03:11 +1000297 reg = <0xef600f00 0x00000074>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100298 local-mac-address = [000000000000];
299 mal-device = <&MAL0>;
300 mal-tx-channel = <1>;
301 mal-rx-channel = <1>;
302 cell-index = <1>;
David Gibson71f34972008-05-15 16:46:39 +1000303 max-frame-size = <9000>;
304 rx-fifo-size = <4096>;
305 tx-fifo-size = <2048>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100306 phy-mode = "rgmii";
David Gibson71f34972008-05-15 16:46:39 +1000307 phy-map = <0x00000000>;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100308 zmii-device = <&ZMII0>;
309 zmii-channel = <1>;
310 rgmii-device = <&RGMII0>;
311 rgmii-channel = <1>;
Valentine Barshak58c50192007-12-06 19:21:12 +0300312 has-inverted-stacr-oc;
313 has-new-stacr-staopc;
Valentine Barshak3910cd82007-10-31 03:56:50 +1100314 };
315 };
Valentine Barshak0b2e9752007-12-22 04:22:39 +1100316
317 PCI0: pci@1ec000000 {
318 device_type = "pci";
319 #interrupt-cells = <1>;
320 #size-cells = <2>;
321 #address-cells = <3>;
322 compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
323 primary;
David Gibson71f34972008-05-15 16:46:39 +1000324 reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
325 0x00000001 0xeed00000 0x00000004 /* IACK */
326 0x00000001 0xeed00000 0x00000004 /* Special cycle */
327 0x00000001 0xef400000 0x00000040>; /* Internal registers */
Valentine Barshak0b2e9752007-12-22 04:22:39 +1100328
329 /* Outbound ranges, one memory and one IO,
330 * later cannot be changed. Chip supports a second
331 * IO range but we don't use it for now
332 */
Josh Boyer6f031102008-05-16 00:41:23 +1000333 ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000
334 0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000
335 0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>;
Valentine Barshak0b2e9752007-12-22 04:22:39 +1100336
337 /* Inbound 2GB range starting at 0 */
David Gibson71f34972008-05-15 16:46:39 +1000338 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
Valentine Barshak0b2e9752007-12-22 04:22:39 +1100339
340 /* All PCI interrupts are routed to IRQ 67 */
David Gibson71f34972008-05-15 16:46:39 +1000341 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
342 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
Valentine Barshak0b2e9752007-12-22 04:22:39 +1100343 };
Valentine Barshak3910cd82007-10-31 03:56:50 +1100344 };
345
346 chosen {
347 linux,stdout-path = "/plb/opb/serial@ef600300";
348 bootargs = "console=ttyS0,115200";
349 };
350};