Wolfgang Grandegger | 393adca | 2009-03-22 14:58:43 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for the Socrates board (MPC8544). |
| 3 | * |
| 4 | * Copyright (c) 2008 Emcraft Systems. |
| 5 | * Sergei Poselenov, <sposelenov@emcraft.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the |
| 9 | * Free Software Foundation; either version 2 of the License, or (at your |
| 10 | * option) any later version. |
| 11 | */ |
| 12 | |
| 13 | /dts-v1/; |
| 14 | |
| 15 | / { |
| 16 | model = "abb,socrates"; |
| 17 | compatible = "abb,socrates"; |
| 18 | #address-cells = <1>; |
| 19 | #size-cells = <1>; |
| 20 | |
| 21 | aliases { |
| 22 | ethernet0 = &enet0; |
| 23 | ethernet1 = &enet1; |
| 24 | serial0 = &serial0; |
| 25 | serial1 = &serial1; |
| 26 | pci0 = &pci0; |
| 27 | }; |
| 28 | |
| 29 | cpus { |
| 30 | #address-cells = <1>; |
| 31 | #size-cells = <0>; |
| 32 | |
| 33 | PowerPC,8544@0 { |
| 34 | device_type = "cpu"; |
| 35 | reg = <0>; |
| 36 | d-cache-line-size = <32>; |
| 37 | i-cache-line-size = <32>; |
| 38 | d-cache-size = <0x8000>; // L1, 32K |
| 39 | i-cache-size = <0x8000>; // L1, 32K |
| 40 | timebase-frequency = <0>; |
| 41 | bus-frequency = <0>; |
| 42 | clock-frequency = <0>; |
| 43 | next-level-cache = <&L2>; |
| 44 | }; |
| 45 | }; |
| 46 | |
| 47 | memory { |
| 48 | device_type = "memory"; |
| 49 | reg = <0x00000000 0x00000000>; // Filled in by U-Boot |
| 50 | }; |
| 51 | |
| 52 | soc8544@e0000000 { |
| 53 | #address-cells = <1>; |
| 54 | #size-cells = <1>; |
Wolfgang Grandegger | 212f8c6 | 2009-04-02 20:50:56 +0200 | [diff] [blame] | 55 | device_type = "soc"; |
Wolfgang Grandegger | 393adca | 2009-03-22 14:58:43 +0100 | [diff] [blame] | 56 | |
| 57 | ranges = <0x00000000 0xe0000000 0x00100000>; |
Wolfgang Grandegger | 393adca | 2009-03-22 14:58:43 +0100 | [diff] [blame] | 58 | bus-frequency = <0>; // Filled in by U-Boot |
| 59 | compatible = "fsl,mpc8544-immr", "simple-bus"; |
| 60 | |
Kumar Gala | e1a2289 | 2009-04-22 13:17:42 -0500 | [diff] [blame] | 61 | ecm-law@0 { |
| 62 | compatible = "fsl,ecm-law"; |
| 63 | reg = <0x0 0x1000>; |
| 64 | fsl,num-laws = <10>; |
| 65 | }; |
| 66 | |
| 67 | ecm@1000 { |
| 68 | compatible = "fsl,mpc8544-ecm", "fsl,ecm"; |
| 69 | reg = <0x1000 0x1000>; |
| 70 | interrupts = <17 2>; |
| 71 | interrupt-parent = <&mpic>; |
| 72 | }; |
| 73 | |
Wolfgang Grandegger | 393adca | 2009-03-22 14:58:43 +0100 | [diff] [blame] | 74 | memory-controller@2000 { |
| 75 | compatible = "fsl,mpc8544-memory-controller"; |
| 76 | reg = <0x2000 0x1000>; |
| 77 | interrupt-parent = <&mpic>; |
| 78 | interrupts = <18 2>; |
| 79 | }; |
| 80 | |
| 81 | L2: l2-cache-controller@20000 { |
| 82 | compatible = "fsl,mpc8544-l2-cache-controller"; |
| 83 | reg = <0x20000 0x1000>; |
| 84 | cache-line-size = <32>; |
| 85 | cache-size = <0x40000>; // L2, 256K |
| 86 | interrupt-parent = <&mpic>; |
| 87 | interrupts = <16 2>; |
| 88 | }; |
| 89 | |
| 90 | i2c@3000 { |
| 91 | #address-cells = <1>; |
| 92 | #size-cells = <0>; |
| 93 | cell-index = <0>; |
Wolfgang Grandegger | c724d67 | 2009-04-07 10:20:57 +0200 | [diff] [blame] | 94 | compatible = "fsl,mpc8544-i2c", "fsl-i2c"; |
Wolfgang Grandegger | 393adca | 2009-03-22 14:58:43 +0100 | [diff] [blame] | 95 | reg = <0x3000 0x100>; |
| 96 | interrupts = <43 2>; |
| 97 | interrupt-parent = <&mpic>; |
Wolfgang Grandegger | c724d67 | 2009-04-07 10:20:57 +0200 | [diff] [blame] | 98 | fsl,preserve-clocking; |
Wolfgang Grandegger | 393adca | 2009-03-22 14:58:43 +0100 | [diff] [blame] | 99 | |
| 100 | dtt@28 { |
| 101 | compatible = "winbond,w83782d"; |
| 102 | reg = <0x28>; |
| 103 | }; |
| 104 | rtc@32 { |
| 105 | compatible = "epson,rx8025"; |
| 106 | reg = <0x32>; |
| 107 | interrupts = <7 1>; |
| 108 | interrupt-parent = <&mpic>; |
| 109 | }; |
| 110 | dtt@4c { |
| 111 | compatible = "dallas,ds75"; |
| 112 | reg = <0x4c>; |
| 113 | }; |
| 114 | ts@4a { |
| 115 | compatible = "ti,tsc2003"; |
| 116 | reg = <0x4a>; |
| 117 | interrupt-parent = <&mpic>; |
| 118 | interrupts = <8 1>; |
| 119 | }; |
| 120 | }; |
| 121 | |
| 122 | i2c@3100 { |
| 123 | #address-cells = <1>; |
| 124 | #size-cells = <0>; |
| 125 | cell-index = <1>; |
Wolfgang Grandegger | c724d67 | 2009-04-07 10:20:57 +0200 | [diff] [blame] | 126 | compatible = "fsl,mpc8544-i2c", "fsl-i2c"; |
Wolfgang Grandegger | 393adca | 2009-03-22 14:58:43 +0100 | [diff] [blame] | 127 | reg = <0x3100 0x100>; |
| 128 | interrupts = <43 2>; |
| 129 | interrupt-parent = <&mpic>; |
Wolfgang Grandegger | c724d67 | 2009-04-07 10:20:57 +0200 | [diff] [blame] | 130 | fsl,preserve-clocking; |
Wolfgang Grandegger | 393adca | 2009-03-22 14:58:43 +0100 | [diff] [blame] | 131 | }; |
| 132 | |
| 133 | enet0: ethernet@24000 { |
| 134 | #address-cells = <1>; |
| 135 | #size-cells = <1>; |
| 136 | cell-index = <0>; |
| 137 | device_type = "network"; |
| 138 | model = "eTSEC"; |
| 139 | compatible = "gianfar"; |
| 140 | reg = <0x24000 0x1000>; |
| 141 | ranges = <0x0 0x24000 0x1000>; |
| 142 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 143 | interrupts = <29 2 30 2 34 2>; |
| 144 | interrupt-parent = <&mpic>; |
| 145 | phy-handle = <&phy0>; |
| 146 | tbi-handle = <&tbi0>; |
| 147 | phy-connection-type = "rgmii-id"; |
| 148 | |
| 149 | mdio@520 { |
| 150 | #address-cells = <1>; |
| 151 | #size-cells = <0>; |
| 152 | compatible = "fsl,gianfar-mdio"; |
| 153 | reg = <0x520 0x20>; |
| 154 | |
| 155 | phy0: ethernet-phy@0 { |
| 156 | interrupt-parent = <&mpic>; |
| 157 | interrupts = <0 1>; |
| 158 | reg = <0>; |
| 159 | }; |
| 160 | phy1: ethernet-phy@1 { |
| 161 | interrupt-parent = <&mpic>; |
| 162 | interrupts = <0 1>; |
| 163 | reg = <1>; |
| 164 | }; |
| 165 | tbi0: tbi-phy@11 { |
| 166 | reg = <0x11>; |
| 167 | }; |
| 168 | }; |
| 169 | }; |
| 170 | |
| 171 | enet1: ethernet@26000 { |
| 172 | #address-cells = <1>; |
| 173 | #size-cells = <1>; |
| 174 | cell-index = <1>; |
| 175 | device_type = "network"; |
| 176 | model = "eTSEC"; |
| 177 | compatible = "gianfar"; |
| 178 | reg = <0x26000 0x1000>; |
| 179 | ranges = <0x0 0x26000 0x1000>; |
| 180 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 181 | interrupts = <31 2 32 2 33 2>; |
| 182 | interrupt-parent = <&mpic>; |
| 183 | phy-handle = <&phy1>; |
| 184 | tbi-handle = <&tbi1>; |
| 185 | phy-connection-type = "rgmii-id"; |
| 186 | |
| 187 | mdio@520 { |
| 188 | #address-cells = <1>; |
| 189 | #size-cells = <0>; |
| 190 | compatible = "fsl,gianfar-tbi"; |
| 191 | reg = <0x520 0x20>; |
| 192 | |
| 193 | tbi1: tbi-phy@11 { |
| 194 | reg = <0x11>; |
| 195 | }; |
| 196 | }; |
| 197 | }; |
| 198 | |
| 199 | serial0: serial@4500 { |
| 200 | cell-index = <0>; |
| 201 | device_type = "serial"; |
| 202 | compatible = "ns16550"; |
| 203 | reg = <0x4500 0x100>; |
| 204 | clock-frequency = <0>; |
| 205 | interrupts = <42 2>; |
| 206 | interrupt-parent = <&mpic>; |
| 207 | }; |
| 208 | |
| 209 | serial1: serial@4600 { |
| 210 | cell-index = <1>; |
| 211 | device_type = "serial"; |
| 212 | compatible = "ns16550"; |
| 213 | reg = <0x4600 0x100>; |
| 214 | clock-frequency = <0>; |
| 215 | interrupts = <42 2>; |
| 216 | interrupt-parent = <&mpic>; |
| 217 | }; |
| 218 | |
| 219 | global-utilities@e0000 { //global utilities block |
| 220 | compatible = "fsl,mpc8548-guts"; |
| 221 | reg = <0xe0000 0x1000>; |
| 222 | fsl,has-rstcr; |
| 223 | }; |
| 224 | |
| 225 | mpic: pic@40000 { |
| 226 | interrupt-controller; |
| 227 | #address-cells = <0>; |
| 228 | #interrupt-cells = <2>; |
| 229 | reg = <0x40000 0x40000>; |
| 230 | compatible = "chrp,open-pic"; |
| 231 | device_type = "open-pic"; |
| 232 | }; |
| 233 | }; |
| 234 | |
| 235 | |
| 236 | localbus { |
| 237 | compatible = "fsl,mpc8544-localbus", |
| 238 | "fsl,pq3-localbus", |
| 239 | "simple-bus"; |
| 240 | #address-cells = <2>; |
| 241 | #size-cells = <1>; |
| 242 | reg = <0xe0005000 0x40>; |
| 243 | |
| 244 | ranges = <0 0 0xfc000000 0x04000000 |
| 245 | 2 0 0xc8000000 0x04000000 |
| 246 | 3 0 0xc0000000 0x00100000 |
| 247 | >; /* Overwritten by U-Boot */ |
| 248 | |
| 249 | nor_flash@0,0 { |
| 250 | compatible = "amd,s29gl256n", "cfi-flash"; |
| 251 | bank-width = <2>; |
| 252 | reg = <0x0 0x000000 0x4000000>; |
| 253 | #address-cells = <1>; |
| 254 | #size-cells = <1>; |
| 255 | partition@0 { |
| 256 | label = "kernel"; |
| 257 | reg = <0x0 0x1e0000>; |
| 258 | read-only; |
| 259 | }; |
| 260 | partition@1e0000 { |
| 261 | label = "dtb"; |
| 262 | reg = <0x1e0000 0x20000>; |
| 263 | }; |
| 264 | partition@200000 { |
| 265 | label = "root"; |
| 266 | reg = <0x200000 0x200000>; |
| 267 | }; |
| 268 | partition@400000 { |
| 269 | label = "user"; |
| 270 | reg = <0x400000 0x3b80000>; |
| 271 | }; |
| 272 | partition@3f80000 { |
| 273 | label = "env"; |
| 274 | reg = <0x3f80000 0x40000>; |
| 275 | read-only; |
| 276 | }; |
| 277 | partition@3fc0000 { |
| 278 | label = "u-boot"; |
| 279 | reg = <0x3fc0000 0x40000>; |
| 280 | read-only; |
| 281 | }; |
| 282 | }; |
| 283 | |
| 284 | display@2,0 { |
| 285 | compatible = "fujitsu,lime"; |
| 286 | reg = <2 0x0 0x4000000>; |
| 287 | interrupt-parent = <&mpic>; |
| 288 | interrupts = <6 1>; |
| 289 | }; |
| 290 | |
| 291 | fpga_pic: fpga-pic@3,10 { |
| 292 | compatible = "abb,socrates-fpga-pic"; |
| 293 | reg = <3 0x10 0x10>; |
| 294 | interrupt-controller; |
| 295 | /* IRQs 2, 10, 11, active low, level-sensitive */ |
| 296 | interrupts = <2 1 10 1 11 1>; |
| 297 | interrupt-parent = <&mpic>; |
| 298 | #interrupt-cells = <3>; |
| 299 | }; |
| 300 | |
| 301 | spi@3,60 { |
| 302 | compatible = "abb,socrates-spi"; |
| 303 | reg = <3 0x60 0x10>; |
| 304 | interrupts = <8 4 0>; // number, type, routing |
| 305 | interrupt-parent = <&fpga_pic>; |
| 306 | }; |
| 307 | |
| 308 | nand@3,70 { |
| 309 | compatible = "abb,socrates-nand"; |
| 310 | reg = <3 0x70 0x04>; |
| 311 | bank-width = <1>; |
| 312 | #address-cells = <1>; |
| 313 | #size-cells = <1>; |
| 314 | data@0 { |
| 315 | label = "data"; |
| 316 | reg = <0x0 0x40000000>; |
| 317 | }; |
| 318 | }; |
| 319 | |
| 320 | can@3,100 { |
| 321 | compatible = "philips,sja1000"; |
| 322 | reg = <3 0x100 0x80>; |
| 323 | interrupts = <2 8 1>; // number, type, routing |
| 324 | interrupt-parent = <&fpga_pic>; |
| 325 | }; |
| 326 | }; |
| 327 | |
| 328 | pci0: pci@e0008000 { |
Wolfgang Grandegger | 393adca | 2009-03-22 14:58:43 +0100 | [diff] [blame] | 329 | #interrupt-cells = <1>; |
| 330 | #size-cells = <2>; |
| 331 | #address-cells = <3>; |
| 332 | compatible = "fsl,mpc8540-pci"; |
| 333 | device_type = "pci"; |
| 334 | reg = <0xe0008000 0x1000>; |
| 335 | clock-frequency = <66666666>; |
| 336 | |
| 337 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| 338 | interrupt-map = < |
| 339 | /* IDSEL 0x11 */ |
| 340 | 0x8800 0x0 0x0 1 &mpic 5 1 |
| 341 | /* IDSEL 0x12 */ |
| 342 | 0x9000 0x0 0x0 1 &mpic 4 1>; |
| 343 | interrupt-parent = <&mpic>; |
| 344 | interrupts = <24 2>; |
| 345 | bus-range = <0x0 0x0>; |
| 346 | ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 |
| 347 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; |
| 348 | }; |
| 349 | |
| 350 | }; |