| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /***************************************************************************/ |
| 2 | |
| 3 | /* |
| 4 | * linux/arch/m68knommu/platform/5249/config.c |
| 5 | * |
| 6 | * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com) |
| 7 | */ |
| 8 | |
| 9 | /***************************************************************************/ |
| 10 | |
| 11 | #include <linux/config.h> |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/sched.h> |
| 14 | #include <linux/param.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <asm/irq.h> |
| 17 | #include <asm/dma.h> |
| 18 | #include <asm/traps.h> |
| 19 | #include <asm/machdep.h> |
| 20 | #include <asm/coldfire.h> |
| 21 | #include <asm/mcftimer.h> |
| 22 | #include <asm/mcfsim.h> |
| 23 | #include <asm/mcfdma.h> |
| 24 | |
| 25 | /***************************************************************************/ |
| 26 | |
| 27 | void coldfire_tick(void); |
| 28 | void coldfire_timer_init(irqreturn_t (*handler)(int, void *, struct pt_regs *)); |
| 29 | unsigned long coldfire_timer_offset(void); |
| 30 | void coldfire_trap_init(void); |
| 31 | void coldfire_reset(void); |
| 32 | |
| 33 | /***************************************************************************/ |
| 34 | |
| 35 | /* |
| 36 | * DMA channel base address table. |
| 37 | */ |
| 38 | unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { |
| 39 | MCF_MBAR + MCFDMA_BASE0, |
| 40 | MCF_MBAR + MCFDMA_BASE1, |
| 41 | MCF_MBAR + MCFDMA_BASE2, |
| 42 | MCF_MBAR + MCFDMA_BASE3, |
| 43 | }; |
| 44 | |
| 45 | unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; |
| 46 | |
| 47 | /***************************************************************************/ |
| 48 | |
| 49 | void mcf_autovector(unsigned int vec) |
| 50 | { |
| 51 | volatile unsigned char *mbar; |
| 52 | |
| 53 | if ((vec >= 25) && (vec <= 31)) { |
| 54 | mbar = (volatile unsigned char *) MCF_MBAR; |
| 55 | vec = 0x1 << (vec - 24); |
| 56 | *(mbar + MCFSIM_AVR) |= vec; |
| 57 | mcf_setimr(mcf_getimr() & ~vec); |
| 58 | } |
| 59 | } |
| 60 | |
| 61 | /***************************************************************************/ |
| 62 | |
| 63 | void mcf_settimericr(unsigned int timer, unsigned int level) |
| 64 | { |
| 65 | volatile unsigned char *icrp; |
| 66 | unsigned int icr, imr; |
| 67 | |
| 68 | if (timer <= 2) { |
| 69 | switch (timer) { |
| 70 | case 2: icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break; |
| 71 | default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break; |
| 72 | } |
| 73 | |
| 74 | icrp = (volatile unsigned char *) (MCF_MBAR + icr); |
| 75 | *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3; |
| 76 | mcf_setimr(mcf_getimr() & ~imr); |
| 77 | } |
| 78 | } |
| 79 | |
| 80 | /***************************************************************************/ |
| 81 | |
| 82 | int mcf_timerirqpending(int timer) |
| 83 | { |
| 84 | unsigned int imr = 0; |
| 85 | |
| 86 | switch (timer) { |
| 87 | case 1: imr = MCFSIM_IMR_TIMER1; break; |
| 88 | case 2: imr = MCFSIM_IMR_TIMER2; break; |
| 89 | default: break; |
| 90 | } |
| 91 | return (mcf_getipr() & imr); |
| 92 | } |
| 93 | |
| 94 | /***************************************************************************/ |
| 95 | |
| 96 | void config_BSP(char *commandp, int size) |
| 97 | { |
| 98 | mcf_setimr(MCFSIM_IMR_MASKALL); |
| 99 | |
| 100 | #if defined(CONFIG_BOOTPARAM) |
| 101 | strncpy(commandp, CONFIG_BOOTPARAM_STRING, size); |
| 102 | commandp[size-1] = 0; |
| 103 | #else |
| 104 | memset(commandp, 0, size); |
| 105 | #endif |
| 106 | |
| 107 | mach_sched_init = coldfire_timer_init; |
| 108 | mach_tick = coldfire_tick; |
| 109 | mach_gettimeoffset = coldfire_timer_offset; |
| 110 | mach_trap_init = coldfire_trap_init; |
| 111 | mach_reset = coldfire_reset; |
| 112 | } |
| 113 | |
| 114 | /***************************************************************************/ |