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gerrit-public.fairphone.software / kernel / msm-4.9 / e02169b682bc448ccdc819dc8639ed34a23cedd8 / . / drivers / net / phy / marvell.c
blob: a2d6386d13bcb187e2473ebeb9856108d7fb704d [file] [log] [blame]
Andy Fleming00db8182005-07-30 19:31:23 -0400[diff] [blame]1/*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16#include <linux/config.h>
17#include <linux/kernel.h>
18#include <linux/sched.h>
19#include <linux/string.h>
20#include <linux/errno.h>
21#include <linux/unistd.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
28#include <linux/skbuff.h>
29#include <linux/spinlock.h>
30#include <linux/mm.h>
31#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -0400[diff] [blame]32#include <linux/mii.h>
33#include <linux/ethtool.h>
34#include <linux/phy.h>
35
36#include <asm/io.h>
37#include <asm/irq.h>
38#include <asm/uaccess.h>
39
40#define MII_M1011_IEVENT 0x13
41#define MII_M1011_IEVENT_CLEAR 0x0000
42
43#define MII_M1011_IMASK 0x12
44#define MII_M1011_IMASK_INIT 0x6400
45#define MII_M1011_IMASK_CLEAR 0x0000
46
47MODULE_DESCRIPTION("Marvell PHY driver");
48MODULE_AUTHOR("Andy Fleming");
49MODULE_LICENSE("GPL");
50
51static int marvell_ack_interrupt(struct phy_device *phydev)
52{
53 int err;
54
55 /* Clear the interrupts by reading the reg */
56 err = phy_read(phydev, MII_M1011_IEVENT);
57
58 if (err < 0)
59 return err;
60
61 return 0;
62}
63
64static int marvell_config_intr(struct phy_device *phydev)
65{
66 int err;
67
68 if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
69 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
70 else
71 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
72
73 return err;
74}
75
76static int marvell_config_aneg(struct phy_device *phydev)
77{
78 int err;
79
80 /* The Marvell PHY has an errata which requires
81 * that certain registers get written in order
82 * to restart autonegotiation */
83 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
84
85 if (err < 0)
86 return err;
87
88 err = phy_write(phydev, 0x1d, 0x1f);
89 if (err < 0)
90 return err;
91
92 err = phy_write(phydev, 0x1e, 0x200c);
93 if (err < 0)
94 return err;
95
96 err = phy_write(phydev, 0x1d, 0x5);
97 if (err < 0)
98 return err;
99
100 err = phy_write(phydev, 0x1e, 0);
101 if (err < 0)
102 return err;
103
104 err = phy_write(phydev, 0x1e, 0x100);
105 if (err < 0)
106 return err;
107
108
109 err = genphy_config_aneg(phydev);
110
111 return err;
112}
113
114
115static struct phy_driver m88e1101_driver = {
116 .phy_id = 0x01410c00,
117 .phy_id_mask = 0xffffff00,
118 .name = "Marvell 88E1101",
119 .features = PHY_GBIT_FEATURES,
120 .flags = PHY_HAS_INTERRUPT,
121 .config_aneg = &marvell_config_aneg,
122 .read_status = &genphy_read_status,
123 .ack_interrupt = &marvell_ack_interrupt,
124 .config_intr = &marvell_config_intr,
125 .driver = { .owner = THIS_MODULE,},
126};
127
128static int __init marvell_init(void)
129{
130 return phy_driver_register(&m88e1101_driver);
131}
132
133static void __exit marvell_exit(void)
134{
135 phy_driver_unregister(&m88e1101_driver);
136}
137
138module_init(marvell_init);
139module_exit(marvell_exit);