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gerrit-public.fairphone.software / kernel / msm-4.9 / e10241d8a1a68955e2f3e74befd9fa6ce61ba2bc / . / arch / powerpc / platforms / 83xx / mpc83xx.h
blob: 88bb748aff0d7568a06aa7ffac4455afbd942c05 [file] [log] [blame]
Kumar Gala7d13d212006-01-13 11:19:58 -0600[diff] [blame]1#ifndef __MPC83XX_H__
2#define __MPC83XX_H__
3
4#include <linux/init.h>
5#include <linux/device.h>
Kumar Gala7d52c7b2007-06-22 00:23:57 -0500[diff] [blame]6#include <asm/pci-bridge.h>
Kumar Gala7d13d212006-01-13 11:19:58 -0600[diff] [blame]7
Li Yangc1616982007-02-07 13:47:56 +0800[diff] [blame]8/* System Clock Control Register */
9#define MPC83XX_SCCR_OFFS 0xA08
Li Yange5a94af2007-07-03 17:43:16 +0800[diff] [blame]10#define MPC83XX_SCCR_USB_MASK 0x00f00000
Li Yangc1616982007-02-07 13:47:56 +0800[diff] [blame]11#define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
12#define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
13#define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
14#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
15#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
16#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
Li Yange10241d2008-01-08 15:18:45 +0800[diff] [blame^]17#define MPC837X_SCCR_USB_DRCM_11 0x00c00000
Li Yangc1616982007-02-07 13:47:56 +0800[diff] [blame]18
19/* system i/o configuration register low */
20#define MPC83XX_SICRL_OFFS 0x114
Li Yange5a94af2007-07-03 17:43:16 +0800[diff] [blame]21#define MPC834X_SICRL_USB_MASK 0x60000000
22#define MPC834X_SICRL_USB0 0x40000000
23#define MPC834X_SICRL_USB1 0x20000000
24#define MPC831X_SICRL_USB_MASK 0x00000c00
25#define MPC831X_SICRL_USB_ULPI 0x00000800
Li Yange10241d2008-01-08 15:18:45 +0800[diff] [blame^]26#define MPC837X_SICRL_USB_MASK 0xf0000000
27#define MPC837X_SICRL_USB_ULPI 0x50000000
Li Yangc1616982007-02-07 13:47:56 +0800[diff] [blame]28
29/* system i/o configuration register high */
30#define MPC83XX_SICRH_OFFS 0x118
Li Yange5a94af2007-07-03 17:43:16 +0800[diff] [blame]31#define MPC834X_SICRH_USB_UTMI 0x00020000
32#define MPC831X_SICRH_USB_MASK 0x000000e0
33#define MPC831X_SICRH_USB_ULPI 0x000000a0
34
35/* USB Control Register */
36#define FSL_USB2_CONTROL_OFFS 0x500
37#define CONTROL_UTMI_PHY_EN 0x00000200
38#define CONTROL_REFSEL_48MHZ 0x00000080
39#define CONTROL_PHY_CLK_SEL_ULPI 0x00000400
40#define CONTROL_OTG_PORT 0x00000020
41
42/* USB PORTSC Registers */
43#define FSL_USB2_PORTSC1_OFFS 0x184
44#define FSL_USB2_PORTSC2_OFFS 0x188
45#define PORTSCX_PTW_16BIT 0x10000000
46#define PORTSCX_PTS_UTMI 0x00000000
47#define PORTSCX_PTS_ULPI 0x80000000
Li Yangc1616982007-02-07 13:47:56 +0800[diff] [blame]48
Kumar Gala7d13d212006-01-13 11:19:58 -0600[diff] [blame]49/*
50 * Declaration for the various functions exported by the
51 * mpc83xx_* files. Mostly for use by mpc83xx_setup
52 */
53
Arnd Bergmann09b55f72007-06-18 01:06:54 +0200[diff] [blame]54extern int mpc83xx_add_bridge(struct device_node *dev);
Kumar Gala30f59332006-02-02 13:50:44 -0600[diff] [blame]55extern void mpc83xx_restart(char *cmd);
56extern long mpc83xx_time_init(void);
Li Yange5a94af2007-07-03 17:43:16 +0800[diff] [blame]57extern int mpc834x_usb_cfg(void);
58extern int mpc831x_usb_cfg(void);
Kumar Gala7d13d212006-01-13 11:19:58 -0600[diff] [blame]59
Kumar Galae060e082006-02-02 13:51:10 -0600[diff] [blame]60#endif /* __MPC83XX_H__ */