blob: 103334c36c008b24772e05ba047edbd34e104433 [file] [log] [blame]
zhaochene61a9392019-04-17 09:15:10 +08001/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <dt-bindings/clock/qcom,gcc-sdm845.h>
14#include <dt-bindings/clock/qcom,camcc-sdm845.h>
15#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
16#include <dt-bindings/clock/qcom,rpmh.h>
17#include <dt-bindings/interrupt-controller/arm-gic.h>
18
19#include "sda845-v2.1.dtsi"
20#include "sdm845-sde-display.dtsi"
daopingl57f37b02019-07-02 22:27:55 +080021#include "sdm845-rb3.dtsi"
zhaochene61a9392019-04-17 09:15:10 +080022#include "sdm845-audio-overlay.dtsi"
23
zhaochenfefd7f9c2019-07-10 17:58:03 +080024&usb1 {
25 status = "ok";
26};
27
28&qusb_phy1 {
29 status = "ok";
30};
31
32&usb_qmp_phy {
33 status = "ok";
34};
35
Chaojun Wang069548d2019-05-08 14:03:08 +080036&pcie1 {
37 status = "disable";
38};
39
40&soc {
41 clk40M: can_clock {
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <40000000>;
45 };
46};
47
48&qupv3_se0_spi {
49 status = "ok";
50 can@0 {
51 compatible = "microchip,mcp2517fd";
52 reg = <0>;
53 clocks = <&clk40M>;
54 interrupt-parent = <&tlmm>;
55 interrupts = <104 0>;
56 interrupt-names = "can_irq";
57 spi-max-frequency = <10000000>;
58 gpio-controller;
59 status = "okay";
60 };
61};
62
zhaochene61a9392019-04-17 09:15:10 +080063&qupv3_se3_i2c {
64 status = "disabled";
65};
66
67&pmi8998_pdphy {
68 vbus-supply = <&smb2_vbus>;
69};
70
71&pmi8998_pwm_2 {
72 status = "ok";
73};
74
zhaochene61a9392019-04-17 09:15:10 +080075&wil6210 {
76 status = "disabled";
77};
78
79&smb1355_0 {
80 status = "disabled";
81};
82
83&smb1355_1 {
84 status = "disabled";
85};
86
87&key_home_default {
88 pins = "gpio4";
89};
90
91&max_rst_active {
92 mux {
93 pins = "gpio31","gpio77","gpio32";
94 };
95 config {
96 pins = "gpio31","gpio77","gpio32";
97 };
98};
99
zhaochenfefd7f9c2019-07-10 17:58:03 +0800100&pcie0 {
xiaolin83d3bd32019-08-27 23:00:46 +0800101 vreg-pcie-supply = <&pcie_vcc_eldo>;
102 qcom,vreg-pcie-voltage-level = <3300000 3300000 24000>;
zhaochenfefd7f9c2019-07-10 17:58:03 +0800103 status = "ok";
104};
105
106&pcie1 {
107 /delete-property/ wake-gpio;
108};
109
zhaochene61a9392019-04-17 09:15:10 +0800110&max_rst_suspend {
111 mux {
112 pins = "gpio31","gpio77","gpio32";
113 };
114 config {
115 pins = "gpio31","gpio77","gpio32";
116 };
117};
118
119&camera_dvdd_en_default {
120 pins = "gpio11";
121};
122
zhaochene61a9392019-04-17 09:15:10 +0800123&soc {
124 qcom,qbt1000 {
125 compatible = "qcom,qbt1000";
126 clock-names = "core", "iface";
127 clock-frequency = <25000000>;
128 qcom,ipc-gpio = <&tlmm 121 0>;
129 qcom,finger-detect-gpio = <&pm8998_gpios 4 0>;
130 };
Praveen Kurapatic9698592019-07-12 15:03:14 +0530131
132 qcom,rmnet-ipa {
133 status="disabled";
134 };
Tiequan Luo5e3adcf2019-05-22 21:34:04 +0800135};
zhaochene61a9392019-04-17 09:15:10 +0800136
Jiaxing Shi374ae872019-06-11 17:07:13 +0800137&ssc_sensors {
138 status = "disabled";
139};
140
Ziyu Jian55a57222019-06-18 16:26:40 +0800141&tlmm {
142 cam_sensor_tof_active: cam_sensor_tof_active {
143 /* RESET*/
144 mux {
145 pins = "gpio8";
146 function = "gpio";
147 };
148
149 config {
150 pins = "gpio8";
151 bias-disable; /* No PULL */
152 drive-strength = <2>; /* 2 MA */
153 };
154 };
155
156 cam_sensor_tof_suspend: cam_sensor_tof_suspend {
157 /* RESET*/
158 mux {
159 pins = "gpio8";
160 function = "gpio";
161 };
162
163 config {
164 pins = "gpio8";
165 bias-pull-down; /* PULL DOWN */
166 drive-strength = <2>; /* 2 MA */
167 output-low;
168 };
169 };
170
171 cam_sensor_tracking_active: cam_sensor_tracking_active {
172 /* RESET */
173 mux {
174 pins = "gpio21";
175 function = "gpio";
176 };
177
178 config {
179 pins = "gpio21";
180 bias-disable; /* No PULL */
181 drive-strength = <2>; /* 2 MA */
182 };
183 };
184
185 cam_sensor_tracking_suspend: cam_sensor_tracking_suspend {
186 /* RESET */
187 mux {
188 pins = "gpio21";
189 function = "gpio";
190 };
191
192 config {
193 pins = "gpio21";
194 bias-pull-down; /* PULL DOWN */
195 drive-strength = <2>; /* 2 MA */
196 output-low;
197 };
198 };
199
200 cam_sensor_rear4_active: cam_sensor_rear4_active {
201 /* RESET */
202 mux {
203 pins = "gpio12","gpio69";
204 function = "gpio";
205 };
206
207 config {
208 pins = "gpio12","gpio69";
209 bias-disable; /* No PULL */
210 drive-strength = <2>; /* 2 MA */
211 };
212 };
213
214 cam_sensor_rear4_suspend: cam_sensor_rear4_suspend {
215 /* RESET */
216 mux {
217 pins = "gpio12","gpio69";
218 function = "gpio";
219 };
220
221 config {
222 pins = "gpio12","gpio69";
Ziyu Jian6eb74692019-07-16 14:45:54 +0800223 bias-disable; /* No PULL */
Ziyu Jian55a57222019-06-18 16:26:40 +0800224 drive-strength = <2>; /* 2 MA */
Ziyu Jian55a57222019-06-18 16:26:40 +0800225 };
226 };
227};
Praveen Kurapatic9698592019-07-12 15:03:14 +0530228
229&ipa_hw {
230 status="disabled";
231};
Yuan Zhao4b058d02019-07-15 19:59:47 +0800232
233&dsi_nt35597_truly_dsc_cmd_display {
234 /delete-property/ qcom,dsi-display-active;
235};
236
237&mdss_mdp {
238 bridges = <&lt9611>;
239};
240
241&soc {
242 lt9611_vcc_eldo: lt9611-gpio-regulator@0 {
243 compatible = "regulator-fixed";
244 regulator-name = "lt9611_vcc_eldo";
245 regulator-min-microvolt = <1800000>;
246 regulator-max-microvolt = <1800000>;
247 regulator-enable-ramp-delay = <233>;
248 gpio = <&tlmm 89 0>;
249 enable-active-high;
250 };
xiaolin83d3bd32019-08-27 23:00:46 +0800251
252 pcie_vcc_eldo: pcie-gpio-regulator@0 {
253 compatible = "regulator-fixed";
254 regulator-name = "pcie_vcc_eldo";
255 regulator-min-microvolt = <3300000>;
256 regulator-max-microvolt = <3300000>;
257 gpio = <&tlmm 90 0>;
258 enable-active-high;
259 };
260
Yuan Zhao4b058d02019-07-15 19:59:47 +0800261};
262
263&qupv3_se10_i2c {
264 status = "ok";
265 lt9611: lt,lt9611@3b {
266 compatible = "lt,lt9611";
267 reg = <0x3b>;
268 interrupt-parent = <&tlmm>;
269 interrupts = <84 0>;
270 interrupt-names = "lt_irq";
271 lt,irq-gpio = <&tlmm 84 0x0>;
272 lt,reset-gpio = <&tlmm 128 0x0>;
273 lt,non-pluggable;
274 lt,preferred-mode = "1920x1080";
275
276 pinctrl-names = "default";
277 pinctrl-0 = <&lt9611_pins>;
278
279 vdd-supply = <&lt9611_vcc_eldo>;
280 lt,supply-entries {
281 #address-cells = <1>;
282 #size-cells = <0>;
283
284 lt,supply-entry@0 {
285 reg = <0>;
286 lt,supply-name = "vdd";
287 lt,supply-min-voltage = <1800000>;
288 lt,supply-max-voltage = <1800000>;
289 lt,supply-enable-load = <200000>;
290 lt,supply-post-on-sleep = <150>;
291 };
292 };
293
294 lt,customize-modes {
295 lt,customize-mode-id@0 {
296 lt,mode-h-active = <1920>;
297 lt,mode-h-front-porch = <88>;
298 lt,mode-h-pulse-width = <44>;
299 lt,mode-h-back-porch = <148>;
300 lt,mode-h-active-high;
301 lt,mode-v-active = <1080>;
302 lt,mode-v-front-porch = <4>;
303 lt,mode-v-pulse-width = <5>;
304 lt,mode-v-back-porch = <36>;
305 lt,mode-v-active-high;
306 lt,mode-refresh-rate = <60>;
307 lt,mode-clock-in-khz = <148500>;
308 };
309 };
310
311 ports {
312 #address-cells = <1>;
313 #size-cells = <0>;
314
315 port@0 {
316 reg = <0>;
317 lt9611_in: endpoint {
318 remote-endpoint = <&ext_dsi_out>;
319 };
320 };
321 };
322 };
323};
324
325&ext_dsi_bridge_display {
326 qcom,dsi-display-active;
327 ports {
328 port@0 {
329 ext_dsi_out: endpoint {
330 remote-endpoint = <&lt9611_in>;
331 };
332 };
333 };
334};
Jiaxing Shiadb74012019-10-08 18:43:55 +0800335
336&qcom_seecom {
337 /delete-property/ qcom,commonlib64-loaded-by-uefi;
338};