blob: 4a88e36c82ec1c827d7cd8658e0223991a3b621f [file] [log] [blame]
Jassi Brar5033f432010-11-22 15:37:25 +09001/* sound/soc/samsung/ac97.c
Jassi Brarfc93ea22010-01-27 14:59:08 +09002 *
3 * ALSA SoC Audio Layer - S3C AC97 Controller driver
4 * Evolved from s3c2443-ac97.c
5 *
6 * Copyright (c) 2010 Samsung Electronics Co. Ltd
Jaswinder Singhdf8ad332012-02-25 16:24:36 +05307 * Author: Jaswinder Singh <jassisinghbrar@gmail.com>
Jassi Brarfc93ea22010-01-27 14:59:08 +09008 * Credits: Graeme Gregory, Sean Choi
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
Jassi Brarfc93ea22010-01-27 14:59:08 +090015#include <linux/io.h>
16#include <linux/delay.h>
17#include <linux/clk.h>
Paul Gortmakerda155d52011-07-15 12:38:28 -040018#include <linux/module.h>
Jassi Brarfc93ea22010-01-27 14:59:08 +090019
20#include <sound/soc.h>
21
Jassi Brarfc93ea22010-01-27 14:59:08 +090022#include <mach/dma.h>
Arnd Bergmann5d229ce52013-04-11 19:08:42 +020023#include "regs-ac97.h"
Arnd Bergmann436d42c2012-08-24 15:22:12 +020024#include <linux/platform_data/asoc-s3c.h>
Jassi Brarfc93ea22010-01-27 14:59:08 +090025
Jassi Brar4b640cf2010-11-22 15:35:57 +090026#include "dma.h"
Jassi Brarfc93ea22010-01-27 14:59:08 +090027
28#define AC_CMD_ADDR(x) (x << 16)
29#define AC_CMD_DATA(x) (x & 0xffff)
30
Seungwhan Youn4f644ea2011-01-07 13:46:52 +090031#define S3C_AC97_DAI_PCM 0
32#define S3C_AC97_DAI_MIC 1
33
Jassi Brarfc93ea22010-01-27 14:59:08 +090034struct s3c_ac97_info {
Jassi Brarfc93ea22010-01-27 14:59:08 +090035 struct clk *ac97_clk;
36 void __iomem *regs;
37 struct mutex lock;
38 struct completion done;
39};
40static struct s3c_ac97_info s3c_ac97;
41
42static struct s3c2410_dma_client s3c_dma_client_out = {
43 .name = "AC97 PCMOut"
44};
45
46static struct s3c2410_dma_client s3c_dma_client_in = {
47 .name = "AC97 PCMIn"
48};
49
50static struct s3c2410_dma_client s3c_dma_client_micin = {
51 .name = "AC97 MicIn"
52};
53
54static struct s3c_dma_params s3c_ac97_pcm_out = {
55 .client = &s3c_dma_client_out,
56 .dma_size = 4,
57};
58
59static struct s3c_dma_params s3c_ac97_pcm_in = {
60 .client = &s3c_dma_client_in,
61 .dma_size = 4,
62};
63
64static struct s3c_dma_params s3c_ac97_mic_in = {
65 .client = &s3c_dma_client_micin,
66 .dma_size = 4,
67};
68
69static void s3c_ac97_activate(struct snd_ac97 *ac97)
70{
71 u32 ac_glbctrl, stat;
72
73 stat = readl(s3c_ac97.regs + S3C_AC97_GLBSTAT) & 0x7;
74 if (stat == S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE)
75 return; /* Return if already active */
76
Wolfram Sang16735d02013-11-14 14:32:02 -080077 reinit_completion(&s3c_ac97.done);
Jassi Brarfc93ea22010-01-27 14:59:08 +090078
79 ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
80 ac_glbctrl = S3C_AC97_GLBCTRL_ACLINKON;
81 writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
82 msleep(1);
83
84 ac_glbctrl |= S3C_AC97_GLBCTRL_TRANSFERDATAENABLE;
85 writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
86 msleep(1);
87
88 ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
89 ac_glbctrl |= S3C_AC97_GLBCTRL_CODECREADYIE;
90 writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
91
92 if (!wait_for_completion_timeout(&s3c_ac97.done, HZ))
Mark Brown4a6f9982010-09-23 16:48:54 +010093 pr_err("AC97: Unable to activate!");
Jassi Brarfc93ea22010-01-27 14:59:08 +090094}
95
96static unsigned short s3c_ac97_read(struct snd_ac97 *ac97,
97 unsigned short reg)
98{
99 u32 ac_glbctrl, ac_codec_cmd;
100 u32 stat, addr, data;
101
102 mutex_lock(&s3c_ac97.lock);
103
104 s3c_ac97_activate(ac97);
105
Wolfram Sang16735d02013-11-14 14:32:02 -0800106 reinit_completion(&s3c_ac97.done);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900107
108 ac_codec_cmd = readl(s3c_ac97.regs + S3C_AC97_CODEC_CMD);
109 ac_codec_cmd = S3C_AC97_CODEC_CMD_READ | AC_CMD_ADDR(reg);
110 writel(ac_codec_cmd, s3c_ac97.regs + S3C_AC97_CODEC_CMD);
111
112 udelay(50);
113
114 ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
115 ac_glbctrl |= S3C_AC97_GLBCTRL_CODECREADYIE;
116 writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
117
118 if (!wait_for_completion_timeout(&s3c_ac97.done, HZ))
Mark Brown4a6f9982010-09-23 16:48:54 +0100119 pr_err("AC97: Unable to read!");
Jassi Brarfc93ea22010-01-27 14:59:08 +0900120
121 stat = readl(s3c_ac97.regs + S3C_AC97_STAT);
122 addr = (stat >> 16) & 0x7f;
123 data = (stat & 0xffff);
124
125 if (addr != reg)
Jassi Brar99ce3a32010-11-22 15:36:03 +0900126 pr_err("ac97: req addr = %02x, rep addr = %02x\n",
Mark Brown4a6f9982010-09-23 16:48:54 +0100127 reg, addr);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900128
129 mutex_unlock(&s3c_ac97.lock);
130
131 return (unsigned short)data;
132}
133
134static void s3c_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
135 unsigned short val)
136{
137 u32 ac_glbctrl, ac_codec_cmd;
138
139 mutex_lock(&s3c_ac97.lock);
140
141 s3c_ac97_activate(ac97);
142
Wolfram Sang16735d02013-11-14 14:32:02 -0800143 reinit_completion(&s3c_ac97.done);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900144
145 ac_codec_cmd = readl(s3c_ac97.regs + S3C_AC97_CODEC_CMD);
146 ac_codec_cmd = AC_CMD_ADDR(reg) | AC_CMD_DATA(val);
147 writel(ac_codec_cmd, s3c_ac97.regs + S3C_AC97_CODEC_CMD);
148
149 udelay(50);
150
151 ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
152 ac_glbctrl |= S3C_AC97_GLBCTRL_CODECREADYIE;
153 writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
154
155 if (!wait_for_completion_timeout(&s3c_ac97.done, HZ))
Mark Brown4a6f9982010-09-23 16:48:54 +0100156 pr_err("AC97: Unable to write!");
Jassi Brarfc93ea22010-01-27 14:59:08 +0900157
158 ac_codec_cmd = readl(s3c_ac97.regs + S3C_AC97_CODEC_CMD);
159 ac_codec_cmd |= S3C_AC97_CODEC_CMD_READ;
160 writel(ac_codec_cmd, s3c_ac97.regs + S3C_AC97_CODEC_CMD);
161
162 mutex_unlock(&s3c_ac97.lock);
163}
164
165static void s3c_ac97_cold_reset(struct snd_ac97 *ac97)
166{
Mark Brown8d85d742010-09-23 17:41:46 +0100167 pr_debug("AC97: Cold reset\n");
Jassi Brarfc93ea22010-01-27 14:59:08 +0900168 writel(S3C_AC97_GLBCTRL_COLDRESET,
169 s3c_ac97.regs + S3C_AC97_GLBCTRL);
170 msleep(1);
171
172 writel(0, s3c_ac97.regs + S3C_AC97_GLBCTRL);
173 msleep(1);
174}
175
176static void s3c_ac97_warm_reset(struct snd_ac97 *ac97)
177{
178 u32 stat;
179
180 stat = readl(s3c_ac97.regs + S3C_AC97_GLBSTAT) & 0x7;
181 if (stat == S3C_AC97_GLBSTAT_MAINSTATE_ACTIVE)
182 return; /* Return if already active */
183
Mark Brown8d85d742010-09-23 17:41:46 +0100184 pr_debug("AC97: Warm reset\n");
185
Jassi Brarfc93ea22010-01-27 14:59:08 +0900186 writel(S3C_AC97_GLBCTRL_WARMRESET, s3c_ac97.regs + S3C_AC97_GLBCTRL);
187 msleep(1);
188
189 writel(0, s3c_ac97.regs + S3C_AC97_GLBCTRL);
190 msleep(1);
191
192 s3c_ac97_activate(ac97);
193}
194
195static irqreturn_t s3c_ac97_irq(int irq, void *dev_id)
196{
197 u32 ac_glbctrl, ac_glbstat;
198
199 ac_glbstat = readl(s3c_ac97.regs + S3C_AC97_GLBSTAT);
200
201 if (ac_glbstat & S3C_AC97_GLBSTAT_CODECREADY) {
202
203 ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
204 ac_glbctrl &= ~S3C_AC97_GLBCTRL_CODECREADYIE;
205 writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
206
207 complete(&s3c_ac97.done);
208 }
209
210 ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
211 ac_glbctrl |= (1<<30); /* Clear interrupt */
212 writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
213
214 return IRQ_HANDLED;
215}
216
Mark Brownb047e1c2013-06-26 12:45:59 +0100217static struct snd_ac97_bus_ops s3c_ac97_ops = {
Jassi Brarfc93ea22010-01-27 14:59:08 +0900218 .read = s3c_ac97_read,
219 .write = s3c_ac97_write,
220 .warm_reset = s3c_ac97_warm_reset,
221 .reset = s3c_ac97_cold_reset,
222};
Jassi Brarfc93ea22010-01-27 14:59:08 +0900223
Jassi Brarfc93ea22010-01-27 14:59:08 +0900224static int s3c_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
225 struct snd_soc_dai *dai)
226{
227 u32 ac_glbctrl;
228 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Daniel Mack5f712b22010-03-22 10:11:15 +0100229 struct s3c_dma_params *dma_data =
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000230 snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900231
232 ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
233 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
234 ac_glbctrl &= ~S3C_AC97_GLBCTRL_PCMINTM_MASK;
235 else
236 ac_glbctrl &= ~S3C_AC97_GLBCTRL_PCMOUTTM_MASK;
237
238 switch (cmd) {
239 case SNDRV_PCM_TRIGGER_START:
240 case SNDRV_PCM_TRIGGER_RESUME:
241 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
242 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
243 ac_glbctrl |= S3C_AC97_GLBCTRL_PCMINTM_DMA;
244 else
245 ac_glbctrl |= S3C_AC97_GLBCTRL_PCMOUTTM_DMA;
246 break;
247
248 case SNDRV_PCM_TRIGGER_STOP:
249 case SNDRV_PCM_TRIGGER_SUSPEND:
250 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
251 break;
252 }
253
254 writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
255
Boojin Kim344b4c42011-09-02 09:44:43 +0900256 if (!dma_data->ops)
257 dma_data->ops = samsung_dma_get_ops();
258
259 dma_data->ops->started(dma_data->channel);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900260
261 return 0;
262}
263
Jassi Brarfc93ea22010-01-27 14:59:08 +0900264static int s3c_ac97_mic_trigger(struct snd_pcm_substream *substream,
265 int cmd, struct snd_soc_dai *dai)
266{
267 u32 ac_glbctrl;
268 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Daniel Mack5f712b22010-03-22 10:11:15 +0100269 struct s3c_dma_params *dma_data =
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000270 snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900271
272 ac_glbctrl = readl(s3c_ac97.regs + S3C_AC97_GLBCTRL);
273 ac_glbctrl &= ~S3C_AC97_GLBCTRL_MICINTM_MASK;
274
275 switch (cmd) {
276 case SNDRV_PCM_TRIGGER_START:
277 case SNDRV_PCM_TRIGGER_RESUME:
278 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
279 ac_glbctrl |= S3C_AC97_GLBCTRL_MICINTM_DMA;
280 break;
281
282 case SNDRV_PCM_TRIGGER_STOP:
283 case SNDRV_PCM_TRIGGER_SUSPEND:
284 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
285 break;
286 }
287
288 writel(ac_glbctrl, s3c_ac97.regs + S3C_AC97_GLBCTRL);
289
Boojin Kim344b4c42011-09-02 09:44:43 +0900290 if (!dma_data->ops)
291 dma_data->ops = samsung_dma_get_ops();
292
293 dma_data->ops->started(dma_data->channel);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900294
295 return 0;
296}
297
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100298static const struct snd_soc_dai_ops s3c_ac97_dai_ops = {
Jassi Brarfc93ea22010-01-27 14:59:08 +0900299 .trigger = s3c_ac97_trigger,
300};
301
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100302static const struct snd_soc_dai_ops s3c_ac97_mic_dai_ops = {
Jassi Brarfc93ea22010-01-27 14:59:08 +0900303 .trigger = s3c_ac97_mic_trigger,
304};
305
Mark Brown36885692013-10-19 15:23:15 +0100306static int s3c_ac97_dai_probe(struct snd_soc_dai *dai)
307{
308 samsung_asoc_init_dma_data(dai, &s3c_ac97_pcm_out, &s3c_ac97_pcm_in);
309
310 return 0;
311}
312
313static int s3c_ac97_mic_dai_probe(struct snd_soc_dai *dai)
314{
315 samsung_asoc_init_dma_data(dai, NULL, &s3c_ac97_mic_in);
316
317 return 0;
318}
319
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000320static struct snd_soc_dai_driver s3c_ac97_dai[] = {
Jassi Brarfc93ea22010-01-27 14:59:08 +0900321 [S3C_AC97_DAI_PCM] = {
Jassi Brar99ce3a32010-11-22 15:36:03 +0900322 .name = "samsung-ac97",
Jassi Brarfc93ea22010-01-27 14:59:08 +0900323 .ac97_control = 1,
324 .playback = {
325 .stream_name = "AC97 Playback",
326 .channels_min = 2,
327 .channels_max = 2,
328 .rates = SNDRV_PCM_RATE_8000_48000,
329 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
330 .capture = {
331 .stream_name = "AC97 Capture",
332 .channels_min = 2,
333 .channels_max = 2,
334 .rates = SNDRV_PCM_RATE_8000_48000,
335 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
Mark Brown36885692013-10-19 15:23:15 +0100336 .probe = s3c_ac97_dai_probe,
Jassi Brarfc93ea22010-01-27 14:59:08 +0900337 .ops = &s3c_ac97_dai_ops,
338 },
339 [S3C_AC97_DAI_MIC] = {
Jassi Brar99ce3a32010-11-22 15:36:03 +0900340 .name = "samsung-ac97-mic",
Jassi Brarfc93ea22010-01-27 14:59:08 +0900341 .ac97_control = 1,
342 .capture = {
343 .stream_name = "AC97 Mic Capture",
344 .channels_min = 1,
345 .channels_max = 1,
346 .rates = SNDRV_PCM_RATE_8000_48000,
347 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
Mark Brown36885692013-10-19 15:23:15 +0100348 .probe = s3c_ac97_mic_dai_probe,
Jassi Brarfc93ea22010-01-27 14:59:08 +0900349 .ops = &s3c_ac97_mic_dai_ops,
350 },
351};
Jassi Brarfc93ea22010-01-27 14:59:08 +0900352
Kuninori Morimoto6d717f32013-03-21 03:35:33 -0700353static const struct snd_soc_component_driver s3c_ac97_component = {
354 .name = "s3c-ac97",
355};
356
Bill Pembertonfdca21a2012-12-07 09:26:15 -0500357static int s3c_ac97_probe(struct platform_device *pdev)
Jassi Brarfc93ea22010-01-27 14:59:08 +0900358{
359 struct resource *mem_res, *dmatx_res, *dmarx_res, *dmamic_res, *irq_res;
360 struct s3c_audio_pdata *ac97_pdata;
361 int ret;
362
363 ac97_pdata = pdev->dev.platform_data;
364 if (!ac97_pdata || !ac97_pdata->cfg_gpio) {
365 dev_err(&pdev->dev, "cfg_gpio callback not provided!\n");
366 return -EINVAL;
367 }
368
369 /* Check for availability of necessary resource */
370 dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
371 if (!dmatx_res) {
372 dev_err(&pdev->dev, "Unable to get AC97-TX dma resource\n");
373 return -ENXIO;
374 }
375
376 dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
377 if (!dmarx_res) {
378 dev_err(&pdev->dev, "Unable to get AC97-RX dma resource\n");
379 return -ENXIO;
380 }
381
382 dmamic_res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
383 if (!dmamic_res) {
384 dev_err(&pdev->dev, "Unable to get AC97-MIC dma resource\n");
385 return -ENXIO;
386 }
387
Jassi Brarfc93ea22010-01-27 14:59:08 +0900388 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
389 if (!irq_res) {
390 dev_err(&pdev->dev, "AC97 IRQ not provided!\n");
391 return -ENXIO;
392 }
393
Julia Lawall64efc5a2013-08-14 11:11:16 +0200394 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Mark Brown25fd0bf2013-06-26 10:34:37 +0100395 s3c_ac97.regs = devm_ioremap_resource(&pdev->dev, mem_res);
396 if (IS_ERR(s3c_ac97.regs))
397 return PTR_ERR(s3c_ac97.regs);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900398
399 s3c_ac97_pcm_out.channel = dmatx_res->start;
400 s3c_ac97_pcm_out.dma_addr = mem_res->start + S3C_AC97_PCM_DATA;
401 s3c_ac97_pcm_in.channel = dmarx_res->start;
402 s3c_ac97_pcm_in.dma_addr = mem_res->start + S3C_AC97_PCM_DATA;
403 s3c_ac97_mic_in.channel = dmamic_res->start;
404 s3c_ac97_mic_in.dma_addr = mem_res->start + S3C_AC97_MIC_DATA;
405
406 init_completion(&s3c_ac97.done);
407 mutex_init(&s3c_ac97.lock);
408
Mark Brown5d45ee32013-06-26 10:29:02 +0100409 s3c_ac97.ac97_clk = devm_clk_get(&pdev->dev, "ac97");
Jassi Brarfc93ea22010-01-27 14:59:08 +0900410 if (IS_ERR(s3c_ac97.ac97_clk)) {
Jassi Brar99ce3a32010-11-22 15:36:03 +0900411 dev_err(&pdev->dev, "ac97 failed to get ac97_clock\n");
Jassi Brarfc93ea22010-01-27 14:59:08 +0900412 ret = -ENODEV;
413 goto err2;
414 }
Thomas Abraham54f174a2012-10-03 08:46:01 +0900415 clk_prepare_enable(s3c_ac97.ac97_clk);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900416
417 if (ac97_pdata->cfg_gpio(pdev)) {
418 dev_err(&pdev->dev, "Unable to configure gpio\n");
419 ret = -EINVAL;
420 goto err3;
421 }
422
423 ret = request_irq(irq_res->start, s3c_ac97_irq,
Yong Zhang88e24c32011-09-22 16:59:20 +0800424 0, "AC97", NULL);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900425 if (ret < 0) {
Jassi Brar99ce3a32010-11-22 15:36:03 +0900426 dev_err(&pdev->dev, "ac97: interrupt request failed.\n");
Jassi Brarfc93ea22010-01-27 14:59:08 +0900427 goto err4;
428 }
429
Mark Brownb047e1c2013-06-26 12:45:59 +0100430 ret = snd_soc_set_ac97_ops(&s3c_ac97_ops);
431 if (ret != 0) {
432 dev_err(&pdev->dev, "Failed to set AC'97 ops: %d\n", ret);
433 goto err4;
434 }
435
Kuninori Morimoto6d717f32013-03-21 03:35:33 -0700436 ret = snd_soc_register_component(&pdev->dev, &s3c_ac97_component,
437 s3c_ac97_dai, ARRAY_SIZE(s3c_ac97_dai));
Jassi Brarfc93ea22010-01-27 14:59:08 +0900438 if (ret)
439 goto err5;
440
Mark Brown85ff3c22013-08-19 22:59:05 +0100441 ret = samsung_asoc_dma_platform_register(&pdev->dev);
Padmavathi Vennaa08485d2012-12-07 13:59:21 +0530442 if (ret) {
443 dev_err(&pdev->dev, "failed to get register DMA: %d\n", ret);
444 goto err6;
445 }
Jassi Brarfc93ea22010-01-27 14:59:08 +0900446
Padmavathi Vennaa08485d2012-12-07 13:59:21 +0530447 return 0;
448err6:
Kuninori Morimoto6d717f32013-03-21 03:35:33 -0700449 snd_soc_unregister_component(&pdev->dev);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900450err5:
451 free_irq(irq_res->start, NULL);
452err4:
453err3:
Thomas Abraham54f174a2012-10-03 08:46:01 +0900454 clk_disable_unprepare(s3c_ac97.ac97_clk);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900455err2:
Mark Brownb047e1c2013-06-26 12:45:59 +0100456 snd_soc_set_ac97_ops(NULL);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900457 return ret;
458}
459
Bill Pembertonfdca21a2012-12-07 09:26:15 -0500460static int s3c_ac97_remove(struct platform_device *pdev)
Jassi Brarfc93ea22010-01-27 14:59:08 +0900461{
Mark Brown25fd0bf2013-06-26 10:34:37 +0100462 struct resource *irq_res;
Jassi Brarfc93ea22010-01-27 14:59:08 +0900463
Mark Brown85ff3c22013-08-19 22:59:05 +0100464 samsung_asoc_dma_platform_unregister(&pdev->dev);
Kuninori Morimoto6d717f32013-03-21 03:35:33 -0700465 snd_soc_unregister_component(&pdev->dev);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900466
467 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
468 if (irq_res)
469 free_irq(irq_res->start, NULL);
470
Thomas Abraham54f174a2012-10-03 08:46:01 +0900471 clk_disable_unprepare(s3c_ac97.ac97_clk);
Mark Brownb047e1c2013-06-26 12:45:59 +0100472 snd_soc_set_ac97_ops(NULL);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900473
Jassi Brarfc93ea22010-01-27 14:59:08 +0900474 return 0;
475}
476
477static struct platform_driver s3c_ac97_driver = {
478 .probe = s3c_ac97_probe,
Bill Pembertonfdca21a2012-12-07 09:26:15 -0500479 .remove = s3c_ac97_remove,
Jassi Brarfc93ea22010-01-27 14:59:08 +0900480 .driver = {
Jassi Brare6104672010-11-22 15:36:00 +0900481 .name = "samsung-ac97",
Jassi Brarfc93ea22010-01-27 14:59:08 +0900482 .owner = THIS_MODULE,
483 },
484};
485
Mark Browne00c3f52011-11-23 15:20:13 +0000486module_platform_driver(s3c_ac97_driver);
Jassi Brarfc93ea22010-01-27 14:59:08 +0900487
Jaswinder Singhdf8ad332012-02-25 16:24:36 +0530488MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
Jassi Brarfc93ea22010-01-27 14:59:08 +0900489MODULE_DESCRIPTION("AC97 driver for the Samsung SoC");
490MODULE_LICENSE("GPL");
Jassi Brare6104672010-11-22 15:36:00 +0900491MODULE_ALIAS("platform:samsung-ac97");