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David Kiliani3fedd142008-11-01 00:39:12 +01001/**
2 * @file me0600_ext_irq.h
3 *
4 * @brief ME-630 external interrupt implementation.
5 * @note Copyright (C) 2006 Meilhaus Electronic GmbH (support@meilhaus.de)
6 * @author Guenter Gebhardt
7 */
8
9#ifndef _ME0600_EXT_IRQ_H_
10#define _ME0600_EXT_IRQ_H_
11
12#include <linux/sched.h>
13
14#include "mesubdevice.h"
15#include "meslock.h"
16
17#ifdef __KERNEL__
18
19/**
20 * @brief The ME-630 external interrupt subdevice class.
21 */
22typedef struct me0600_ext_irq_subdevice {
23 /* Inheritance */
24 me_subdevice_t base; /**< The subdevice base class. */
25
26 /* Attributes */
27 spinlock_t subdevice_lock; /**< Spin lock to protect the subdevice from concurrent access. */
28 spinlock_t *intcsr_lock; /**< Spin lock to protect #intcsr. */
29
30 wait_queue_head_t wait_queue; /**< Queue to put on threads waiting for an interrupt. */
31
32 int irq; /**< The irq number assigned by PCI BIOS. */
33 int rised; /**< If true an interrupt has occured. */
34 unsigned int n; /**< The number of interrupt since the driver was loaded. */
35 unsigned int lintno; /**< The number of the local PCI interrupt. */
36
37 uint32_t intcsr; /**< The PLX interrupt control and status register. */
38 uint32_t reset_reg; /**< The control register. */
39} me0600_ext_irq_subdevice_t;
40
41/**
42 * @brief The constructor to generate a ME-630 external interrupt instance.
43 *
44 * @param plx_reg_base The register base address of the PLX chip as returned by the PCI BIOS.
45 * @param me0600_reg_base The register base address of the ME-630 device as returned by the PCI BIOS.
46 * @param irq The irq assigned by the PCI BIOS.
47 *
48 * @return Pointer to new instance on success.\n
49 * NULL on error.
50 */
51me0600_ext_irq_subdevice_t *me0600_ext_irq_constructor(uint32_t plx_reg_base,
52 uint32_t me0600_reg_base,
53 spinlock_t * intcsr_lock,
54 unsigned int ext_irq_idx,
55 int irq);
56
57#endif
58#endif