David Kiliani | 3fedd14 | 2008-11-01 00:39:12 +0100 | [diff] [blame] | 1 | /** |
| 2 | * @file me1400_ext_irq_reg.h |
| 3 | * |
| 4 | * @brief ME-1400 external interrupt register definitions. |
| 5 | * @note Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de) |
| 6 | * @author Guenter Gebhardt |
| 7 | * @author Krzysztof Gantzke (k.gantzke@meilhaus.de) |
| 8 | */ |
| 9 | |
| 10 | /* |
| 11 | * Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de) |
| 12 | * |
| 13 | * This file is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License as published by |
| 15 | * the Free Software Foundation; either version 2 of the License, or |
| 16 | * (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, |
| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License |
| 24 | * along with this program; if not, write to the Free Software |
| 25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 26 | */ |
| 27 | |
| 28 | #ifndef _ME1400_EXT_IRQ_REG_H_ |
| 29 | # define _ME1400_EXT_IRQ_REG_H_ |
| 30 | |
| 31 | # ifdef __KERNEL__ |
| 32 | |
| 33 | # define PLX_INTCSR_REG 0x4C /**< The PLX interrupt control and status register offset. */ |
| 34 | # define PLX_ICR_REG 0x50 /**< The PLX initialization control register offset. */ |
| 35 | |
| 36 | # define PLX_LOCAL_INT1_EN 0x01 /**< If set the local interrupt 1 is enabled. */ |
| 37 | # define PLX_LOCAL_INT1_POL 0x02 /**< If set the local interrupt 1 polarity is high active. */ |
| 38 | # define PLX_LOCAL_INT1_STATE 0x04 /**< If set the local interrupt 1 is activ. */ |
| 39 | # define PLX_LOCAL_INT2_EN 0x08 /**< If set the local interrupt 2 is enabled. */ |
| 40 | # define PLX_LOCAL_INT2_POL 0x10 /**< If set the local interrupt 2 polarity is high active. */ |
| 41 | # define PLX_LOCAL_INT2_STATE 0x20 /**< If set the local interrupt 2 is activ. */ |
| 42 | # define PLX_PCI_INT_EN 0x40 /**< If set the PCI interrupt is enabled. */ |
| 43 | # define PLX_SOFT_INT 0x80 /**< If set an interrupt is generated. */ |
| 44 | |
| 45 | # define ME1400AB_EXT_IRQ_CTRL_REG 0x11 /**< The external interrupt control register offset. */ |
| 46 | |
| 47 | # define ME1400AB_EXT_IRQ_CLK_EN 0x01 /**< If this bit is set, the clock output is enabled. */ |
| 48 | # define ME1400AB_EXT_IRQ_IRQ_EN 0x02 /**< If set the external interrupt is enabled. Clearing this bit clears a pending interrupt. */ |
| 49 | |
| 50 | # define ME1400CD_EXT_IRQ_CTRL_REG 0x11 /**< The external interrupt control register offset. */ |
| 51 | |
| 52 | # define ME1400CD_EXT_IRQ_CLK_EN 0x10 /**< If set the external interrupt is enabled. Clearing this bit clears a pending interrupt.*/ |
| 53 | |
| 54 | # endif //__KERNEL__ |
| 55 | |
| 56 | #endif //_ME1400_EXT_IRQ_REG_H_ |