blob: e2bec8229abd73e466d0c5ba239d951f15452d77 [file] [log] [blame]
David Kiliani3fedd142008-11-01 00:39:12 +01001/**
2 * @file me4600_ao.c
3 *
4 * @brief ME-4000 analog output subdevice instance.
5 * @note Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
6 * @author Guenter Gebhardt
7 * @author Krzysztof Gantzke (k.gantzke@meilhaus.de)
8 */
9
10/*
11 * Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
12 *
13 * This file is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#ifndef __KERNEL__
29# define __KERNEL__
30#endif
31
32///Common part. (For normal and Bosch builds.)
33
34/* Includes
35 */
36
37#include <linux/module.h>
38
39#include <linux/slab.h>
40#include <linux/spinlock.h>
41#include <asm/io.h>
42#include <asm/uaccess.h>
43#include <linux/types.h>
44#include <linux/version.h>
45#include <linux/interrupt.h>
46#include <linux/delay.h>
47
48#include "medefines.h"
49#include "meinternal.h"
50#include "meerror.h"
51
52#include "medebug.h"
53#include "meids.h"
54#include "me4600_reg.h"
55#include "me4600_ao_reg.h"
56#include "me4600_ao.h"
57
58/* Defines
59 */
60
61static int me4600_ao_query_range_by_min_max(me_subdevice_t * subdevice,
62 int unit,
63 int *min,
64 int *max, int *maxdata, int *range);
65
66static int me4600_ao_query_number_ranges(me_subdevice_t * subdevice,
67 int unit, int *count);
68
69static int me4600_ao_query_range_info(me_subdevice_t * subdevice,
70 int range,
71 int *unit,
72 int *min, int *max, int *maxdata);
73
74static int me4600_ao_query_timer(me_subdevice_t * subdevice,
75 int timer,
76 int *base_frequency,
77 long long *min_ticks, long long *max_ticks);
78
79static int me4600_ao_query_number_channels(me_subdevice_t * subdevice,
80 int *number);
81
82static int me4600_ao_query_subdevice_type(me_subdevice_t * subdevice,
83 int *type, int *subtype);
84
85static int me4600_ao_query_subdevice_caps(me_subdevice_t * subdevice,
86 int *caps);
87
88static int me4600_ao_query_subdevice_caps_args(struct me_subdevice *subdevice,
89 int cap, int *args, int count);
90
91#ifndef BOSCH
92/// @note NORMAL BUILD
93/// @author Krzysztof Gantzke (k.gantzke@meilhaus.de)
94/* Includes
95 */
96
97# include <linux/workqueue.h>
98
99/* Defines
100 */
101
102/** Remove subdevice.
103*/
104static void me4600_ao_destructor(struct me_subdevice *subdevice);
105
106/** Reset subdevice. Stop all actions. Reset registry. Disable FIFO. Set output to 0V and status to 'none'.
107*/
108static int me4600_ao_io_reset_subdevice(me_subdevice_t * subdevice,
109 struct file *filep, int flags);
110
111/** Set output as single
112*/
113static int me4600_ao_io_single_config(me_subdevice_t * subdevice,
114 struct file *filep,
115 int channel,
116 int single_config,
117 int ref,
118 int trig_chan,
119 int trig_type, int trig_edge, int flags);
120
121/** Pass to user actual value of output.
122*/
123static int me4600_ao_io_single_read(me_subdevice_t * subdevice,
124 struct file *filep,
125 int channel,
126 int *value, int time_out, int flags);
127
128/** Write to output requed value.
129*/
130static int me4600_ao_io_single_write(me_subdevice_t * subdevice,
131 struct file *filep,
132 int channel,
133 int value, int time_out, int flags);
134
135/** Set output as streamed device.
136*/
137static int me4600_ao_io_stream_config(me_subdevice_t * subdevice,
138 struct file *filep,
139 meIOStreamConfig_t * config_list,
140 int count,
141 meIOStreamTrigger_t * trigger,
142 int fifo_irq_threshold, int flags);
143
144/** Wait for / Check empty space in buffer.
145*/
146static int me4600_ao_io_stream_new_values(me_subdevice_t * subdevice,
147 struct file *filep,
148 int time_out, int *count, int flags);
149
150/** Start streaming.
151*/
152static int me4600_ao_io_stream_start(me_subdevice_t * subdevice,
153 struct file *filep,
154 int start_mode, int time_out, int flags);
155
156/** Check actual state. / Wait for end.
157*/
158static int me4600_ao_io_stream_status(me_subdevice_t * subdevice,
159 struct file *filep,
160 int wait,
161 int *status, int *values, int flags);
162
163/** Stop streaming.
164*/
165static int me4600_ao_io_stream_stop(me_subdevice_t * subdevice,
166 struct file *filep,
167 int stop_mode, int flags);
168
169/** Write datas to buffor.
170*/
171static int me4600_ao_io_stream_write(me_subdevice_t * subdevice,
172 struct file *filep,
173 int write_mode,
174 int *values, int *count, int flags);
175
176/** Interrupt handler. Copy from buffer to FIFO.
177*/
178static irqreturn_t me4600_ao_isr(int irq, void *dev_id
179#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
180 , struct pt_regs *regs
181#endif
182 );
183/** Copy data from circular buffer to fifo (fast) in wraparound mode.
184*/
185int inline ao_write_data_wraparound(me4600_ao_subdevice_t * instance, int count,
186 int start_pos);
187
188/** Copy data from circular buffer to fifo (fast).
189*/
190int inline ao_write_data(me4600_ao_subdevice_t * instance, int count,
191 int start_pos);
192
193/** Copy data from circular buffer to fifo (slow).
194*/
195int inline ao_write_data_pooling(me4600_ao_subdevice_t * instance, int count,
196 int start_pos);
197
198/** Copy data from user space to circular buffer.
199*/
200int inline ao_get_data_from_user(me4600_ao_subdevice_t * instance, int count,
201 int *user_values);
202
203/** Stop presentation. Preserve FIFOs.
204*/
205int inline ao_stop_immediately(me4600_ao_subdevice_t * instance);
206
207/** Task for asynchronical state verifying.
208*/
209static void me4600_ao_work_control_task(
210#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
211 void *subdevice
212#else
213 struct work_struct *work
214#endif
215 );
216/* Functions
217 */
218
219static int me4600_ao_io_reset_subdevice(me_subdevice_t * subdevice,
220 struct file *filep, int flags)
221{
222 me4600_ao_subdevice_t *instance;
223 int err = ME_ERRNO_SUCCESS;
224 uint32_t tmp;
225
226 instance = (me4600_ao_subdevice_t *) subdevice;
227
228 PDEBUG("executed. idx=%d\n", instance->ao_idx);
229
230 if (flags) {
231 PERROR("Invalid flag specified.\n");
232 return ME_ERRNO_INVALID_FLAGS;
233 }
234
235 ME_SUBDEVICE_ENTER;
236
237 instance->status = ao_status_none;
238 instance->ao_control_task_flag = 0;
239 cancel_delayed_work(&instance->ao_control_task);
240 instance->timeout.delay = 0;
241 instance->timeout.start_time = jiffies;
242
243 //Stop state machine.
244 err = ao_stop_immediately(instance);
245
246 //Remove from synchronous start.
247 spin_lock(instance->preload_reg_lock);
248 tmp = inl(instance->preload_reg);
249 tmp &=
250 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->
251 ao_idx);
252 outl(tmp, instance->preload_reg);
253 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
254 instance->preload_reg - instance->reg_base, tmp);
255 *instance->preload_flags &=
256 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->
257 ao_idx);
258 spin_unlock(instance->preload_reg_lock);
259
260 //Set single mode, dissable FIFO, dissable external trigger, set output to analog, block interrupt.
261 outl(ME4600_AO_MODE_SINGLE | ME4600_AO_CTRL_BIT_STOP |
262 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_RESET_IRQ,
263 instance->ctrl_reg);
264 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
265 instance->ctrl_reg - instance->reg_base,
266 ME4600_AO_MODE_SINGLE | ME4600_AO_CTRL_BIT_STOP |
267 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
268 ME4600_AO_CTRL_BIT_RESET_IRQ);
269
270 //Set output to 0V
271 outl(0x8000, instance->single_reg);
272 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
273 instance->single_reg - instance->reg_base, 0x8000);
274
275 instance->circ_buf.head = 0;
276 instance->circ_buf.tail = 0;
277 instance->preloaded_count = 0;
278 instance->data_count = 0;
279 instance->single_value = 0x8000;
280 instance->single_value_in_fifo = 0x8000;
281
282 //Set status to signal that device is unconfigured.
283 instance->status = ao_status_none;
284
285 //Signal reset if user is on wait.
286 wake_up_interruptible_all(&instance->wait_queue);
287
288 ME_SUBDEVICE_EXIT;
289
290 return err;
291}
292
293static int me4600_ao_io_single_config(me_subdevice_t * subdevice,
294 struct file *filep,
295 int channel,
296 int single_config,
297 int ref,
298 int trig_chan,
299 int trig_type, int trig_edge, int flags)
300{
301 me4600_ao_subdevice_t *instance;
302 int err = ME_ERRNO_SUCCESS;
303 uint32_t ctrl;
304 uint32_t sync;
305 unsigned long cpu_flags;
306
307 instance = (me4600_ao_subdevice_t *) subdevice;
308
309 PDEBUG("executed. idx=%d\n", instance->ao_idx);
310
311 // Checking parameters
312 if (flags) {
313 PERROR
314 ("Invalid flag specified. Must be ME_IO_SINGLE_CONFIG_NO_FLAGS.\n");
315 return ME_ERRNO_INVALID_FLAGS;
316 }
317
318 switch (trig_type) {
319 case ME_TRIG_TYPE_SW:
320 if (trig_edge != ME_TRIG_EDGE_NONE) {
321 PERROR
322 ("Invalid trigger edge. Software trigger has not edge.\n");
323 return ME_ERRNO_INVALID_TRIG_EDGE;
324 }
325 break;
326
327 case ME_TRIG_TYPE_EXT_DIGITAL:
328 switch (trig_edge) {
329 case ME_TRIG_EDGE_ANY:
330 case ME_TRIG_EDGE_RISING:
331 case ME_TRIG_EDGE_FALLING:
332 break;
333
334 default:
335 PERROR("Invalid trigger edge.\n");
336 return ME_ERRNO_INVALID_TRIG_EDGE;
337 }
338 break;
339
340 default:
341 PERROR
342 ("Invalid trigger type. Trigger must be software or digital.\n");
343 return ME_ERRNO_INVALID_TRIG_TYPE;
344 }
345
346 if ((trig_chan != ME_TRIG_CHAN_DEFAULT)
347 && (trig_chan != ME_TRIG_CHAN_SYNCHRONOUS)) {
348 PERROR("Invalid trigger channel specified.\n");
349 return ME_ERRNO_INVALID_TRIG_CHAN;
350 }
351
352 if (ref != ME_REF_AO_GROUND) {
353 PERROR
354 ("Invalid reference. Analog outputs have to have got REF_AO_GROUND.\n");
355 return ME_ERRNO_INVALID_REF;
356 }
357
358 if (single_config != 0) {
359 PERROR
360 ("Invalid single config specified. Only one range for anlog outputs is available.\n");
361 return ME_ERRNO_INVALID_SINGLE_CONFIG;
362 }
363
364 if (channel != 0) {
365 PERROR
366 ("Invalid channel number specified. Analog output have only one channel.\n");
367 return ME_ERRNO_INVALID_CHANNEL;
368 }
369
370 ME_SUBDEVICE_ENTER;
371
372 //Subdevice running in stream mode!
373 if ((instance->status >= ao_status_stream_run_wait)
374 && (instance->status < ao_status_stream_end)) {
375 PERROR("Subdevice is busy.\n");
376 ME_SUBDEVICE_EXIT;
377
378 return ME_ERRNO_SUBDEVICE_BUSY;
379 }
380/// @note For single all calls (config and write) are erasing previous state!
381
382 instance->status = ao_status_none;
383
384 // Correct single mirrors
385 instance->single_value_in_fifo = instance->single_value;
386
387 //Stop device
388 err = ao_stop_immediately(instance);
389 if (err) {
390 PERROR_CRITICAL("FSM IS BUSY!\n");
391 ME_SUBDEVICE_EXIT;
392
393 return ME_ERRNO_SUBDEVICE_BUSY;
394 }
395 // Set control register.
396 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
397 // Set stop bit. Stop streaming mode.
398 ctrl = inl(instance->ctrl_reg);
399 //Reset all bits.
400 ctrl = ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP;
401
402 if (trig_type == ME_TRIG_TYPE_EXT_DIGITAL) {
403 PINFO("External digital trigger.\n");
404
405 if (trig_edge == ME_TRIG_EDGE_ANY) {
406// ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE | ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
407 instance->ctrl_trg =
408 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
409 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
410 } else if (trig_edge == ME_TRIG_EDGE_FALLING) {
411// ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
412 instance->ctrl_trg = ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
413 } else if (trig_edge == ME_TRIG_EDGE_RISING) {
414 instance->ctrl_trg = 0x0;
415 }
416 } else if (trig_type == ME_TRIG_TYPE_SW) {
417 PDEBUG("Software trigger\n");
418 instance->ctrl_trg = 0x0;
419 }
420
421 outl(ctrl, instance->ctrl_reg);
422 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
423 instance->ctrl_reg - instance->reg_base, ctrl);
424 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
425
426 // Set preload/synchronization register.
427 spin_lock(instance->preload_reg_lock);
428 if (trig_type == ME_TRIG_TYPE_SW) {
429 *instance->preload_flags &=
430 ~(ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx);
431 } else //if (trig_type == ME_TRIG_TYPE_EXT_DIGITAL)
432 {
433 *instance->preload_flags |=
434 ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx;
435 }
436
437 if (trig_chan == ME_TRIG_CHAN_DEFAULT) {
438 *instance->preload_flags &=
439 ~(ME4600_AO_SYNC_HOLD << instance->ao_idx);
440 } else //if (trig_chan == ME_TRIG_CHAN_SYNCHRONOUS)
441 {
442 *instance->preload_flags |=
443 ME4600_AO_SYNC_HOLD << instance->ao_idx;
444 }
445
446 //Reset hardware register
447 sync = inl(instance->preload_reg);
448 PDEBUG_REG("preload_reg inl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
449 instance->preload_reg - instance->reg_base, sync);
450 sync &= ~(ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx);
451 sync |= ME4600_AO_SYNC_HOLD << instance->ao_idx;
452
453 //Output configured in default (safe) mode.
454 outl(sync, instance->preload_reg);
455 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
456 instance->preload_reg - instance->reg_base, sync);
457 spin_unlock(instance->preload_reg_lock);
458
459 instance->status = ao_status_single_configured;
460
461 ME_SUBDEVICE_EXIT;
462
463 return err;
464}
465
466static int me4600_ao_io_single_read(me_subdevice_t * subdevice,
467 struct file *filep,
468 int channel,
469 int *value, int time_out, int flags)
470{
471 me4600_ao_subdevice_t *instance;
472 int err = ME_ERRNO_SUCCESS;
473
474 unsigned long j;
475 unsigned long delay = 0;
476
477 instance = (me4600_ao_subdevice_t *) subdevice;
478
479 PDEBUG("executed. idx=%d\n", instance->ao_idx);
480
481 if (flags & ~ME_IO_SINGLE_NONBLOCKING) {
482 PERROR("Invalid flag specified. %d\n", flags);
483 return ME_ERRNO_INVALID_FLAGS;
484 }
485
486 if (time_out < 0) {
487 PERROR("Invalid timeout specified.\n");
488 return ME_ERRNO_INVALID_TIMEOUT;
489 }
490
491 if (channel != 0) {
492 PERROR("Invalid channel number specified.\n");
493 return ME_ERRNO_INVALID_CHANNEL;
494 }
495
496 if ((instance->status >= ao_status_stream_configured)
497 && (instance->status <= ao_status_stream_end)) {
498 PERROR("Subdevice not configured to work in single mode!\n");
499 return ME_ERRNO_PREVIOUS_CONFIG;
500 }
501
502 ME_SUBDEVICE_ENTER;
503 if ((!flags) && (instance->status == ao_status_single_run_wait)) { //Blocking mode. Wait for trigger.
504 if (time_out) {
505 delay = (time_out * HZ) / 1000;
506 if (delay == 0)
507 delay = 1;
508 }
509
510 j = jiffies;
511
512 //Only runing process will interrupt this call. Events are signaled when status change. This procedure has own timeout.
513 wait_event_interruptible_timeout(instance->wait_queue,
514 (instance->status !=
515 ao_status_single_run_wait),
516 (delay) ? delay +
517 1 : LONG_MAX);
518
519 if (instance->status == ao_status_none) {
520 PDEBUG("Single canceled.\n");
521 err = ME_ERRNO_CANCELLED;
522 }
523
524 if (signal_pending(current)) {
525 PERROR("Wait on start of state machine interrupted.\n");
526 instance->status = ao_status_none;
527 ao_stop_immediately(instance);
528 err = ME_ERRNO_SIGNAL;
529 }
530
531 if ((delay) && ((jiffies - j) >= delay)) {
532
533 PDEBUG("Timeout reached.\n");
534 err = ME_ERRNO_TIMEOUT;
535 }
536
537 *value =
538 (!err) ? instance->single_value_in_fifo : instance->
539 single_value;
540 } else { //Non-blocking mode
541 //Read value
542 *value = instance->single_value;
543 }
544
545 ME_SUBDEVICE_EXIT;
546
547 return err;
548}
549
550static int me4600_ao_io_single_write(me_subdevice_t * subdevice,
551 struct file *filep,
552 int channel,
553 int value, int time_out, int flags)
554{
555 me4600_ao_subdevice_t *instance;
556 int err = ME_ERRNO_SUCCESS;
557 unsigned long cpu_flags;
558 unsigned long j;
559 unsigned long delay = 0x0;
560
561 //Registry handling variables.
562 uint32_t sync_mask;
563 uint32_t mode;
564 uint32_t tmp;
565 uint32_t ctrl;
566 uint32_t status;
567
568 instance = (me4600_ao_subdevice_t *) subdevice;
569
570 PDEBUG("executed. idx=%d\n", instance->ao_idx);
571
572 if (flags &
573 ~(ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS |
574 ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
575 PERROR("Invalid flag specified.\n");
576 return ME_ERRNO_INVALID_FLAGS;
577 }
578
579 if (time_out < 0) {
580 PERROR("Invalid timeout specified.\n");
581 return ME_ERRNO_INVALID_TIMEOUT;
582 }
583
584 if (value & ~ME4600_AO_MAX_DATA) {
585 PERROR("Invalid value provided.\n");
586 return ME_ERRNO_VALUE_OUT_OF_RANGE;
587 }
588
589 if (channel != 0) {
590 PERROR("Invalid channel number specified.\n");
591 return ME_ERRNO_INVALID_CHANNEL;
592 }
593
594 if ((instance->status == ao_status_none)
595 || (instance->status > ao_status_single_end)) {
596 PERROR("Subdevice not configured to work in single mode!\n");
597 return ME_ERRNO_PREVIOUS_CONFIG;
598 }
599
600 ME_SUBDEVICE_ENTER;
601
602/// @note For single all calls (config and write) are erasing previous state!
603
604 //Cancel control task
605 PDEBUG("Cancel control task. idx=%d\n", instance->ao_idx);
606 instance->ao_control_task_flag = 0;
607 cancel_delayed_work(&instance->ao_control_task);
608
609 // Correct single mirrors
610 instance->single_value_in_fifo = instance->single_value;
611
612 //Stop device
613 err = ao_stop_immediately(instance);
614 if (err) {
615 PERROR_CRITICAL("FSM IS BUSY!\n");
616 ME_SUBDEVICE_EXIT;
617
618 return ME_ERRNO_SUBDEVICE_BUSY;
619 }
620
621 if (time_out) {
622 delay = (time_out * HZ) / 1000;
623
624 if (delay == 0)
625 delay = 1;
626 }
627
628 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
629
630 instance->single_value_in_fifo = value;
631
632 ctrl = inl(instance->ctrl_reg);
633
634 if (!instance->fifo) { //No FIFO
635 //Set the single mode.
636 ctrl &= ~ME4600_AO_CTRL_MODE_MASK;
637
638 //Write value
639 PDEBUG("Write value\n");
640 outl(value, instance->single_reg);
641 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
642 instance->reg_base,
643 instance->single_reg - instance->reg_base, value);
644 } else { // mix-mode
645 //Set speed
646 outl(ME4600_AO_MIN_CHAN_TICKS - 1, instance->timer_reg);
647 PDEBUG_REG("timer_reg outl(0x%lX+0x%lX)=0x%x\n",
648 instance->reg_base,
649 instance->timer_reg - instance->reg_base,
650 (int)ME4600_AO_MIN_CHAN_TICKS);
651 instance->hardware_stop_delay = HZ / 10; //100ms
652
653 status = inl(instance->status_reg);
654
655 //Set the continous mode.
656 ctrl &= ~ME4600_AO_CTRL_MODE_MASK;
657 ctrl |= ME4600_AO_MODE_CONTINUOUS;
658
659 //Prepare FIFO
660 if (!(ctrl & ME4600_AO_CTRL_BIT_ENABLE_FIFO)) { //FIFO wasn't enabeled. Do it.
661 PINFO("Enableing FIFO.\n");
662 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
663 ctrl |=
664 ME4600_AO_CTRL_BIT_ENABLE_FIFO |
665 ME4600_AO_CTRL_BIT_RESET_IRQ;
666 } else { //Check if FIFO is empty
667 if (status & ME4600_AO_STATUS_BIT_EF) { //FIFO not empty
668 PINFO("Reseting FIFO.\n");
669 ctrl &=
670 ~(ME4600_AO_CTRL_BIT_ENABLE_FIFO |
671 ME4600_AO_CTRL_BIT_ENABLE_IRQ);
672 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
673 outl(ctrl, instance->ctrl_reg);
674 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
675 instance->reg_base,
676 instance->ctrl_reg -
677 instance->reg_base, ctrl);
678
679 ctrl |=
680 ME4600_AO_CTRL_BIT_ENABLE_FIFO |
681 ME4600_AO_CTRL_BIT_RESET_IRQ;
682 } else { //FIFO empty, only interrupt needs to be disabled!
683 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
684 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
685 }
686 }
687
688 outl(ctrl, instance->ctrl_reg);
689 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
690 instance->reg_base,
691 instance->ctrl_reg - instance->reg_base, ctrl);
692
693 //Write output - 1 value to FIFO
694 if (instance->ao_idx & 0x1) {
695 outl(value <<= 16, instance->fifo_reg);
696 PDEBUG_REG("fifo_reg outl(0x%lX+0x%lX)=0x%x\n",
697 instance->reg_base,
698 instance->fifo_reg - instance->reg_base,
699 value <<= 16);
700 } else {
701 outl(value, instance->fifo_reg);
702 PDEBUG_REG("fifo_reg outl(0x%lX+0x%lX)=0x%x\n",
703 instance->reg_base,
704 instance->fifo_reg - instance->reg_base,
705 value);
706 }
707 }
708
709 mode = *instance->preload_flags >> instance->ao_idx;
710 mode &= (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG);
711
712 PINFO("Triggering mode: 0x%x\n", mode);
713
714 spin_lock(instance->preload_reg_lock);
715 sync_mask = inl(instance->preload_reg);
716 PDEBUG_REG("preload_reg inl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
717 instance->preload_reg - instance->reg_base, sync_mask);
718 switch (mode) {
719 case 0: //Individual software
720 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
721
722 if (!instance->fifo) { // No FIFO - In this case resetting 'ME4600_AO_SYNC_HOLD' will trigger output.
723 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != ME4600_AO_SYNC_HOLD) { //Now we can set correct mode. This is exception. It is set to synchronous and triggered later.
724 sync_mask &=
725 ~(ME4600_AO_SYNC_EXT_TRIG << instance->
726 ao_idx);
727 sync_mask |=
728 ME4600_AO_SYNC_HOLD << instance->ao_idx;
729
730 outl(sync_mask, instance->preload_reg);
731 PDEBUG_REG
732 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
733 instance->reg_base,
734 instance->preload_reg - instance->reg_base,
735 sync_mask);
736 }
737 } else { // FIFO
738 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != 0x0) { //Now we can set correct mode.
739 sync_mask &=
740 ~((ME4600_AO_SYNC_EXT_TRIG |
741 ME4600_AO_SYNC_HOLD) << instance->
742 ao_idx);
743
744 outl(sync_mask, instance->preload_reg);
745 PDEBUG_REG
746 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
747 instance->reg_base,
748 instance->preload_reg - instance->reg_base,
749 sync_mask);
750 }
751 }
752 instance->single_value = value;
753 break;
754
755 case ME4600_AO_SYNC_EXT_TRIG: //Individual hardware
756 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
757
758 if (!instance->fifo) { // No FIFO - In this case resetting 'ME4600_AO_SYNC_HOLD' will trigger output.
759 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != ME4600_AO_SYNC_HOLD) { //Now we can set correct mode
760 sync_mask &=
761 ~(ME4600_AO_SYNC_EXT_TRIG << instance->
762 ao_idx);
763 sync_mask |=
764 ME4600_AO_SYNC_HOLD << instance->ao_idx;
765
766 outl(sync_mask, instance->preload_reg);
767 PDEBUG_REG
768 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
769 instance->reg_base,
770 instance->preload_reg - instance->reg_base,
771 sync_mask);
772 }
773 } else { // FIFO
774 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != 0x0) { //Now we can set correct mode.
775 sync_mask &=
776 ~((ME4600_AO_SYNC_EXT_TRIG |
777 ME4600_AO_SYNC_HOLD) << instance->
778 ao_idx);
779
780 outl(sync_mask, instance->preload_reg);
781 PDEBUG_REG
782 ("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
783 instance->reg_base,
784 instance->preload_reg - instance->reg_base,
785 sync_mask);
786 }
787 }
788 break;
789
790 case ME4600_AO_SYNC_HOLD: //Synchronous software
791 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
792
793// if((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != ME4600_AO_SYNC_HOLD)
794 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG)) { //Now we can set correct mode
795 sync_mask |=
796 ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx;
797// sync_mask &= ~(ME4600_AO_SYNC_EXT_TRIG << instance->ao_idx);
798 sync_mask |= ME4600_AO_SYNC_HOLD << instance->ao_idx;
799
800 outl(sync_mask, instance->preload_reg);
801 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
802 instance->reg_base,
803 instance->preload_reg - instance->reg_base,
804 sync_mask);
805 }
806 break;
807
808 case (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG): //Synchronous hardware
809 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
810 if ((sync_mask & ((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->ao_idx)) != (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG)) { //Now we can set correct mode
811 sync_mask |=
812 (ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) <<
813 instance->ao_idx;
814
815 outl(sync_mask, instance->preload_reg);
816 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
817 instance->reg_base,
818 instance->preload_reg - instance->reg_base,
819 sync_mask);
820 }
821 break;
822 }
823// spin_unlock(instance->preload_reg_lock); // Moved down.
824
825 //Activate ISM (remove 'stop' bits)
826 ctrl &=
827 ~(ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
828 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH);
829 ctrl |= instance->ctrl_trg;
830 ctrl &= ~(ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
831 outl(ctrl, instance->ctrl_reg);
832 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
833 instance->ctrl_reg - instance->reg_base, ctrl);
834 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
835
836/// @note When flag 'ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS' is set than output is triggered. ALWAYS!
837
838 if (!instance->fifo) { //No FIFO
839 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) { //Fired all software synchronous outputs.
840 tmp = ~(*instance->preload_flags | 0xFFFF0000);
841 PINFO
842 ("Fired all software synchronous outputs. mask:0x%08x\n",
843 tmp);
844 tmp |= sync_mask & 0xFFFF0000;
845 // Add this channel to list
846 tmp &= ~(ME4600_AO_SYNC_HOLD << instance->ao_idx);
847
848 //Fire
849 PINFO("Software trigger.\n");
850 outl(tmp, instance->preload_reg);
851 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
852 instance->reg_base,
853 instance->preload_reg - instance->reg_base,
854 tmp);
855
856 //Restore save settings
857 outl(sync_mask, instance->preload_reg);
858 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
859 instance->reg_base,
860 instance->preload_reg - instance->reg_base,
861 sync_mask);
862 } else if (!mode) { // Add this channel to list
863 outl(sync_mask &
864 ~(ME4600_AO_SYNC_HOLD << instance->ao_idx),
865 instance->preload_reg);
866 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
867 instance->reg_base,
868 instance->preload_reg - instance->reg_base,
869 sync_mask & ~(ME4600_AO_SYNC_HOLD <<
870 instance->ao_idx));
871
872 //Fire
873 PINFO("Software trigger.\n");
874
875 //Restore save settings
876 outl(sync_mask, instance->preload_reg);
877 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
878 instance->reg_base,
879 instance->preload_reg - instance->reg_base,
880 sync_mask);
881 }
882
883 } else { // mix-mode - begin
884 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) { //Trigger outputs
885 //Add channel to start list
886 outl(sync_mask |
887 (ME4600_AO_SYNC_HOLD << instance->ao_idx),
888 instance->preload_reg);
889 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
890 instance->reg_base,
891 instance->preload_reg - instance->reg_base,
892 sync_mask | (ME4600_AO_SYNC_HOLD <<
893 instance->ao_idx));
894
895 //Fire
896 PINFO
897 ("Fired all software synchronous outputs by software trigger.\n");
898 outl(0x8000, instance->single_reg);
899 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
900 instance->reg_base,
901 instance->single_reg - instance->reg_base,
902 0x8000);
903
904 //Restore save settings
905 outl(sync_mask, instance->preload_reg);
906 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
907 instance->reg_base,
908 instance->preload_reg - instance->reg_base,
909 sync_mask);
910 } else if (!mode) { //Trigger outputs
911/* //Remove channel from start list //<== Unnecessary. Removed.
912 outl(sync_mask & ~(ME4600_AO_SYNC_HOLD << instance->ao_idx), instance->preload_reg);
913 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, tmp);
914*/
915 //Fire
916 PINFO("Software trigger.\n");
917 outl(0x8000, instance->single_reg);
918 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
919 instance->reg_base,
920 instance->single_reg - instance->reg_base,
921 0x8000);
922
923/* //Restore save settings //<== Unnecessary. Removed.
924 outl(sync_mask, instance->preload_reg);
925 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, sync_mask);
926*/
927 }
928 }
929 spin_unlock(instance->preload_reg_lock);
930
931 j = jiffies;
932 instance->status = ao_status_single_run_wait;
933
934 instance->timeout.delay = delay;
935 instance->timeout.start_time = j;
936 instance->ao_control_task_flag = 1;
937 queue_delayed_work(instance->me4600_workqueue,
938 &instance->ao_control_task, 1);
939
940 if (!(flags & ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
941
942 //Only runing process will interrupt this call. Events are signaled when status change. Extra timeout add for safe reason.
943 wait_event_interruptible_timeout(instance->wait_queue,
944 (instance->status !=
945 ao_status_single_run_wait),
946 (delay) ? delay +
947 1 : LONG_MAX);
948
949 if (((!delay) || ((jiffies - j) <= delay))
950 && (instance->status != ao_status_single_end)) {
951 PDEBUG("Single canceled.\n");
952 err = ME_ERRNO_CANCELLED;
953 }
954
955 if (signal_pending(current)) {
956 PERROR("Wait on start of state machine interrupted.\n");
957 instance->ao_control_task_flag = 0;
958 cancel_delayed_work(&instance->ao_control_task);
959 ao_stop_immediately(instance);
960 instance->status = ao_status_none;
961 err = ME_ERRNO_SIGNAL;
962 }
963
964 if ((delay) && ((jiffies - j) >= delay)) {
965 if (instance->status == ao_status_single_end) {
966 PDEBUG("Timeout reached.\n");
967 } else {
968 if ((jiffies - j) > delay) {
969 PERROR
970 ("Timeout reached. Not handled by control task!\n");
971 } else {
972 PERROR
973 ("Timeout reached. Signal come but status is strange: %d\n",
974 instance->status);
975 }
976
977 ao_stop_immediately(instance);
978 }
979
980 instance->ao_control_task_flag = 0;
981 cancel_delayed_work(&instance->ao_control_task);
982 instance->status = ao_status_single_end;
983 err = ME_ERRNO_TIMEOUT;
984 }
985 }
986
987 ME_SUBDEVICE_EXIT;
988
989 return err;
990}
991
992static int me4600_ao_io_stream_config(me_subdevice_t * subdevice,
993 struct file *filep,
994 meIOStreamConfig_t * config_list,
995 int count,
996 meIOStreamTrigger_t * trigger,
997 int fifo_irq_threshold, int flags)
998{
999 me4600_ao_subdevice_t *instance;
1000 int err = ME_ERRNO_SUCCESS;
1001 uint32_t ctrl;
1002 unsigned long cpu_flags;
1003 uint64_t conv_ticks;
1004 unsigned int conv_start_ticks_low = trigger->iConvStartTicksLow;
1005 unsigned int conv_start_ticks_high = trigger->iConvStartTicksHigh;
1006
1007 instance = (me4600_ao_subdevice_t *) subdevice;
1008
1009 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1010
1011 if (!instance->fifo) {
1012 PERROR("Not a streaming ao.\n");
1013 return ME_ERRNO_NOT_SUPPORTED;
1014 }
1015
1016 conv_ticks =
1017 (uint64_t) conv_start_ticks_low +
1018 ((uint64_t) conv_start_ticks_high << 32);
1019
1020 if (flags &
1021 ~(ME_IO_STREAM_CONFIG_HARDWARE_ONLY | ME_IO_STREAM_CONFIG_WRAPAROUND
1022 | ME_IO_STREAM_CONFIG_BIT_PATTERN)) {
1023 PERROR("Invalid flags.\n");
1024 return ME_ERRNO_INVALID_FLAGS;
1025 }
1026
1027 if (flags & ME_IO_STREAM_CONFIG_HARDWARE_ONLY) {
1028 if (!flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
1029 PERROR
1030 ("Hardware ME_IO_STREAM_CONFIG_HARDWARE_ONLY has to be with ME_IO_STREAM_CONFIG_WRAPAROUND.\n");
1031 return ME_ERRNO_INVALID_FLAGS;
1032 }
1033
1034 if ((trigger->iAcqStopTrigType != ME_TRIG_TYPE_NONE)
1035 || (trigger->iScanStopTrigType != ME_TRIG_TYPE_NONE)) {
1036 PERROR
1037 ("Hardware wraparound mode must be in infinite mode.\n");
1038 return ME_ERRNO_INVALID_FLAGS;
1039 }
1040 }
1041
1042 if (count != 1) {
1043 PERROR("Only 1 entry in config list acceptable.\n");
1044 return ME_ERRNO_INVALID_CONFIG_LIST_COUNT;
1045 }
1046
1047 if (config_list[0].iChannel != 0) {
1048 PERROR("Invalid channel number specified.\n");
1049 return ME_ERRNO_INVALID_CHANNEL;
1050 }
1051
1052 if (config_list[0].iStreamConfig != 0) {
1053 PERROR("Only one range available.\n");
1054 return ME_ERRNO_INVALID_STREAM_CONFIG;
1055 }
1056
1057 if (config_list[0].iRef != ME_REF_AO_GROUND) {
1058 PERROR("Output is referenced to ground.\n");
1059 return ME_ERRNO_INVALID_REF;
1060 }
1061
1062 if ((trigger->iAcqStartTicksLow != 0)
1063 || (trigger->iAcqStartTicksHigh != 0)) {
1064 PERROR
1065 ("Invalid acquisition start trigger argument specified.\n");
1066 return ME_ERRNO_INVALID_ACQ_START_ARG;
1067 }
1068
1069 if (config_list[0].iFlags) {
1070 PERROR("Invalid config list flag.\n");
1071 return ME_ERRNO_INVALID_FLAGS;
1072 }
1073
1074 switch (trigger->iAcqStartTrigType) {
1075 case ME_TRIG_TYPE_SW:
1076 if (trigger->iAcqStartTrigEdge != ME_TRIG_EDGE_NONE) {
1077 PERROR
1078 ("Invalid acquisition start trigger edge specified.\n");
1079 return ME_ERRNO_INVALID_ACQ_START_TRIG_EDGE;
1080 }
1081 break;
1082
1083 case ME_TRIG_TYPE_EXT_DIGITAL:
1084 switch (trigger->iAcqStartTrigEdge) {
1085 case ME_TRIG_EDGE_ANY:
1086 case ME_TRIG_EDGE_RISING:
1087 case ME_TRIG_EDGE_FALLING:
1088 break;
1089
1090 default:
1091 PERROR
1092 ("Invalid acquisition start trigger edge specified.\n");
1093 return ME_ERRNO_INVALID_ACQ_START_TRIG_EDGE;
1094 }
1095 break;
1096
1097 default:
1098 PERROR("Invalid acquisition start trigger type specified.\n");
1099 return ME_ERRNO_INVALID_ACQ_START_TRIG_TYPE;
1100 }
1101
1102 if (trigger->iScanStartTrigType != ME_TRIG_TYPE_FOLLOW) {
1103 PERROR("Invalid scan start trigger type specified.\n");
1104 return ME_ERRNO_INVALID_SCAN_START_TRIG_TYPE;
1105 }
1106
1107 if (trigger->iConvStartTrigType != ME_TRIG_TYPE_TIMER) {
1108 PERROR("Invalid conv start trigger type specified.\n");
1109 return ME_ERRNO_INVALID_CONV_START_TRIG_TYPE;
1110 }
1111
1112 if ((conv_ticks < ME4600_AO_MIN_CHAN_TICKS)
1113 || (conv_ticks > ME4600_AO_MAX_CHAN_TICKS)) {
1114 PERROR("Invalid conv start trigger argument specified.\n");
1115 return ME_ERRNO_INVALID_CONV_START_ARG;
1116 }
1117
1118 if (trigger->iAcqStartTicksLow || trigger->iAcqStartTicksHigh) {
1119 PERROR("Invalid acq start trigger argument specified.\n");
1120 return ME_ERRNO_INVALID_ACQ_START_ARG;
1121 }
1122
1123 if (trigger->iScanStartTicksLow || trigger->iScanStartTicksHigh) {
1124 PERROR("Invalid scan start trigger argument specified.\n");
1125 return ME_ERRNO_INVALID_SCAN_START_ARG;
1126 }
1127
1128 switch (trigger->iScanStopTrigType) {
1129 case ME_TRIG_TYPE_NONE:
1130 if (trigger->iScanStopCount != 0) {
1131 PERROR("Invalid scan stop count specified.\n");
1132 return ME_ERRNO_INVALID_SCAN_STOP_ARG;
1133 }
1134 break;
1135
1136 case ME_TRIG_TYPE_COUNT:
1137 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
1138 if (trigger->iScanStopCount <= 0) {
1139 PERROR("Invalid scan stop count specified.\n");
1140 return ME_ERRNO_INVALID_SCAN_STOP_ARG;
1141 }
1142 } else {
1143 PERROR("The continous mode has not 'scan' contects.\n");
1144 return ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
1145 }
1146 break;
1147
1148 default:
1149 PERROR("Invalid scan stop trigger type specified.\n");
1150 return ME_ERRNO_INVALID_SCAN_STOP_TRIG_TYPE;
1151 }
1152
1153 switch (trigger->iAcqStopTrigType) {
1154 case ME_TRIG_TYPE_NONE:
1155 if (trigger->iAcqStopCount != 0) {
1156 PERROR("Invalid acq stop count specified.\n");
1157 return ME_ERRNO_INVALID_ACQ_STOP_ARG;
1158 }
1159 break;
1160
1161 case ME_TRIG_TYPE_COUNT:
1162 if (trigger->iScanStopTrigType != ME_TRIG_TYPE_NONE) {
1163 PERROR("Invalid acq stop trigger type specified.\n");
1164 return ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
1165 }
1166
1167 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
1168 if (trigger->iAcqStopCount <= 0) {
1169 PERROR
1170 ("The continous mode has not 'scan' contects.\n");
1171 return ME_ERRNO_INVALID_ACQ_STOP_ARG;
1172 }
1173 }
1174 break;
1175
1176 default:
1177 PERROR("Invalid acq stop trigger type specified.\n");
1178 return ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
1179 }
1180
1181 switch (trigger->iAcqStartTrigChan) {
1182 case ME_TRIG_CHAN_DEFAULT:
1183 case ME_TRIG_CHAN_SYNCHRONOUS:
1184 break;
1185
1186 default:
1187 PERROR("Invalid acq start trigger channel specified.\n");
1188 return ME_ERRNO_INVALID_ACQ_START_TRIG_CHAN;
1189 }
1190
1191 ME_SUBDEVICE_ENTER;
1192
1193 if ((flags & ME_IO_STREAM_CONFIG_BIT_PATTERN) && !instance->bitpattern) {
1194 PERROR("This subdevice not support output redirection.\n");
1195 ME_SUBDEVICE_EXIT;
1196 return ME_ERRNO_INVALID_FLAGS;
1197 }
1198 //Stop device
1199
1200 //Cancel control task
1201 PDEBUG("Cancel control task. idx=%d\n", instance->ao_idx);
1202 instance->ao_control_task_flag = 0;
1203 cancel_delayed_work(&instance->ao_control_task);
1204
1205 //Check if state machine is stopped.
1206 err = ao_stop_immediately(instance);
1207 if (err) {
1208 PERROR_CRITICAL("FSM IS BUSY!\n");
1209 ME_SUBDEVICE_EXIT;
1210
1211 return ME_ERRNO_SUBDEVICE_BUSY;
1212 }
1213
1214 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1215 //Reset control register. Block all actions. Disable IRQ. Disable FIFO.
1216 ctrl =
1217 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP |
1218 ME4600_AO_CTRL_BIT_RESET_IRQ;
1219 outl(ctrl, instance->ctrl_reg);
1220 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1221 instance->ctrl_reg - instance->reg_base, ctrl);
1222
1223 //This is paranoic, but to be sure.
1224 instance->preloaded_count = 0;
1225 instance->data_count = 0;
1226 instance->circ_buf.head = 0;
1227 instance->circ_buf.tail = 0;
1228
1229 /* Set mode. */
1230 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) { //Wraparound
1231 if (flags & ME_IO_STREAM_CONFIG_HARDWARE_ONLY) { //Hardware wraparound
1232 PINFO("Hardware wraparound.\n");
1233 ctrl |= ME4600_AO_MODE_WRAPAROUND;
1234 instance->mode = ME4600_AO_HW_WRAP_MODE;
1235 } else { //Software wraparound
1236 PINFO("Software wraparound.\n");
1237 ctrl |= ME4600_AO_MODE_CONTINUOUS;
1238 instance->mode = ME4600_AO_SW_WRAP_MODE;
1239 }
1240 } else { //Continous
1241 PINFO("Continous.\n");
1242 ctrl |= ME4600_AO_MODE_CONTINUOUS;
1243 instance->mode = ME4600_AO_CONTINOUS;
1244 }
1245
1246 //Set the trigger edge.
1247 if (trigger->iAcqStartTrigType == ME_TRIG_TYPE_EXT_DIGITAL) { //Set the trigger type and edge for external trigger.
1248 PINFO("External digital trigger.\n");
1249 instance->start_mode = ME4600_AO_EXT_TRIG;
1250/*
1251 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
1252*/
1253 switch (trigger->iAcqStartTrigEdge) {
1254 case ME_TRIG_EDGE_RISING:
1255 PINFO("Set the trigger edge: rising.\n");
1256 instance->ctrl_trg = 0x0;
1257 break;
1258
1259 case ME_TRIG_EDGE_FALLING:
1260 PINFO("Set the trigger edge: falling.\n");
1261// ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
1262 instance->ctrl_trg = ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
1263 break;
1264
1265 case ME_TRIG_EDGE_ANY:
1266 PINFO("Set the trigger edge: both edges.\n");
1267// ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE | ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
1268 instance->ctrl_trg =
1269 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
1270 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
1271 break;
1272 }
1273 } else {
1274 PINFO("Internal software trigger.\n");
1275 instance->start_mode = 0;
1276 }
1277
1278 //Set the stop mode and value.
1279 if (trigger->iAcqStopTrigType == ME_TRIG_TYPE_COUNT) { //Amount of data
1280 instance->stop_mode = ME4600_AO_ACQ_STOP_MODE;
1281 instance->stop_count = trigger->iAcqStopCount;
1282 } else if (trigger->iScanStopTrigType == ME_TRIG_TYPE_COUNT) { //Amount of 'scans'
1283 instance->stop_mode = ME4600_AO_SCAN_STOP_MODE;
1284 instance->stop_count = trigger->iScanStopCount;
1285 } else { //Infinite
1286 instance->stop_mode = ME4600_AO_INF_STOP_MODE;
1287 instance->stop_count = 0;
1288 }
1289
1290 PINFO("Stop count: %d.\n", instance->stop_count);
1291
1292 if (trigger->iAcqStartTrigChan == ME_TRIG_CHAN_SYNCHRONOUS) { //Synchronous start
1293 instance->start_mode |= ME4600_AO_SYNC_HOLD;
1294 if (trigger->iAcqStartTrigType == ME_TRIG_TYPE_EXT_DIGITAL) { //Externaly triggered
1295 PINFO("Synchronous start. Externaly trigger active.\n");
1296 instance->start_mode |= ME4600_AO_SYNC_EXT_TRIG;
1297 }
1298#ifdef MEDEBUG_INFO
1299 else {
1300 PINFO
1301 ("Synchronous start. Externaly trigger dissabled.\n");
1302 }
1303#endif
1304
1305 }
1306 //Set speed
1307 outl(conv_ticks - 2, instance->timer_reg);
1308 PDEBUG_REG("timer_reg outl(0x%lX+0x%lX)=0x%llx\n", instance->reg_base,
1309 instance->timer_reg - instance->reg_base, conv_ticks - 2);
1310 instance->hardware_stop_delay = (int)(conv_ticks * HZ) / ME4600_AO_BASE_FREQUENCY; //<== MUST be with cast!
1311
1312 //Conect outputs to analog or digital port.
1313 if (flags & ME_IO_STREAM_CONFIG_BIT_PATTERN) {
1314 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_DO;
1315 }
1316 // Write the control word
1317 outl(ctrl, instance->ctrl_reg);
1318 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1319 instance->ctrl_reg - instance->reg_base, ctrl);
1320
1321 //Set status.
1322 instance->status = ao_status_stream_configured;
1323 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
1324
1325 ME_SUBDEVICE_EXIT;
1326
1327 return err;
1328}
1329
1330static int me4600_ao_io_stream_new_values(me_subdevice_t * subdevice,
1331 struct file *filep,
1332 int time_out, int *count, int flags)
1333{
1334 me4600_ao_subdevice_t *instance;
1335 int err = ME_ERRNO_SUCCESS;
1336 long t = 0;
1337 long j;
1338
1339 instance = (me4600_ao_subdevice_t *) subdevice;
1340
1341 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1342
1343 if (!instance->fifo) {
1344 PERROR("Not a streaming ao.\n");
1345 return ME_ERRNO_NOT_SUPPORTED;
1346 }
1347
1348 if (flags) {
1349 PERROR("Invalid flag specified.\n");
1350 return ME_ERRNO_INVALID_FLAGS;
1351 }
1352
1353 if (!instance->circ_buf.buf) {
1354 PERROR("Circular buffer not exists.\n");
1355 return ME_ERRNO_INTERNAL;
1356 }
1357
1358 if (time_out < 0) {
1359 PERROR("Invalid time_out specified.\n");
1360 return ME_ERRNO_INVALID_TIMEOUT;
1361 }
1362
1363 ME_SUBDEVICE_ENTER;
1364
1365 if (me_circ_buf_space(&instance->circ_buf)) { //The buffer is NOT full.
1366 *count = me_circ_buf_space(&instance->circ_buf);
1367 } else { //The buffer is full.
1368 if (time_out) {
1369 t = (time_out * HZ) / 1000;
1370
1371 if (t == 0)
1372 t = 1;
1373 } else { //Max time.
1374 t = LONG_MAX;
1375 }
1376
1377 *count = 0;
1378
1379 j = jiffies;
1380
1381 //Only runing process will interrupt this call. Interrupts are when FIFO HF is signaled.
1382 wait_event_interruptible_timeout(instance->wait_queue,
1383 ((me_circ_buf_space
1384 (&instance->circ_buf))
1385 || !(inl(instance->status_reg)
1386 &
1387 ME4600_AO_STATUS_BIT_FSM)),
1388 t);
1389
1390 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
1391 PERROR("AO subdevice is not running.\n");
1392 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
1393 } else if (signal_pending(current)) {
1394 PERROR("Wait on values interrupted from signal.\n");
1395 instance->status = ao_status_none;
1396 ao_stop_immediately(instance);
1397 err = ME_ERRNO_SIGNAL;
1398 } else if ((jiffies - j) >= t) {
1399 PERROR("Wait on values timed out.\n");
1400 err = ME_ERRNO_TIMEOUT;
1401 } else { //Uff... all is good. Inform user about empty space.
1402 *count = me_circ_buf_space(&instance->circ_buf);
1403 }
1404 }
1405
1406 ME_SUBDEVICE_EXIT;
1407
1408 return err;
1409}
1410
1411static int me4600_ao_io_stream_start(me_subdevice_t * subdevice,
1412 struct file *filep,
1413 int start_mode, int time_out, int flags)
1414{
1415 me4600_ao_subdevice_t *instance;
1416 int err = ME_ERRNO_SUCCESS;
1417 unsigned long cpu_flags = 0;
1418 uint32_t status;
1419 uint32_t ctrl;
1420 uint32_t synch;
1421 int count = 0;
1422 int circ_buffer_count;
1423
1424 unsigned long ref;
1425 unsigned long delay = 0;
1426
1427 instance = (me4600_ao_subdevice_t *) subdevice;
1428
1429 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1430
1431 if (!instance->fifo) {
1432 PERROR("Not a streaming ao.\n");
1433 return ME_ERRNO_NOT_SUPPORTED;
1434 }
1435
1436 if (flags & ~ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
1437 PERROR("Invalid flags.\n");
1438 return ME_ERRNO_INVALID_FLAGS;
1439 }
1440
1441 if (time_out < 0) {
1442 PERROR("Invalid timeout specified.\n");
1443 return ME_ERRNO_INVALID_TIMEOUT;
1444 }
1445
1446 if ((start_mode != ME_START_MODE_BLOCKING)
1447 && (start_mode != ME_START_MODE_NONBLOCKING)) {
1448 PERROR("Invalid start mode specified.\n");
1449 return ME_ERRNO_INVALID_START_MODE;
1450 }
1451
1452 if (time_out) {
1453 delay = (time_out * HZ) / 1000;
1454 if (delay == 0)
1455 delay = 1;
1456 }
1457
1458 switch (instance->status) { //Checking actual mode.
1459 case ao_status_stream_configured:
1460 case ao_status_stream_end:
1461 //Correct modes!
1462 break;
1463
1464 //The device is in wrong mode.
1465 case ao_status_none:
1466 case ao_status_single_configured:
1467 case ao_status_single_run_wait:
1468 case ao_status_single_run:
1469 case ao_status_single_end_wait:
1470 PERROR
1471 ("Subdevice must be preinitialize correctly for streaming.\n");
1472 return ME_ERRNO_PREVIOUS_CONFIG;
1473
1474 case ao_status_stream_fifo_error:
1475 case ao_status_stream_buffer_error:
1476 case ao_status_stream_error:
1477 PDEBUG("Before restart broke stream 'STOP' must be caled.\n");
1478 return ME_STATUS_ERROR;
1479
1480 case ao_status_stream_run_wait:
1481 case ao_status_stream_run:
1482 case ao_status_stream_end_wait:
1483 PDEBUG("Stream is already working.\n");
1484 return ME_ERRNO_SUBDEVICE_BUSY;
1485
1486 default:
1487 instance->status = ao_status_stream_error;
1488 PERROR_CRITICAL("Status is in wrong state!\n");
1489 return ME_ERRNO_INTERNAL;
1490
1491 }
1492
1493 ME_SUBDEVICE_ENTER;
1494
1495 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
1496 instance->circ_buf.tail += instance->preloaded_count;
1497 instance->circ_buf.tail &= instance->circ_buf.mask;
1498 }
1499 circ_buffer_count = me_circ_buf_values(&instance->circ_buf);
1500
1501 if (!circ_buffer_count && !instance->preloaded_count) { //No values in buffer
1502 ME_SUBDEVICE_EXIT;
1503 PERROR("No values in buffer!\n");
1504 return ME_ERRNO_LACK_OF_RESOURCES;
1505 }
1506
1507 //Cancel control task
1508 PDEBUG("Cancel control task. idx=%d\n", instance->ao_idx);
1509 instance->ao_control_task_flag = 0;
1510 cancel_delayed_work(&instance->ao_control_task);
1511
1512 //Stop device
1513 err = ao_stop_immediately(instance);
1514 if (err) {
1515 PERROR_CRITICAL("FSM IS BUSY!\n");
1516 ME_SUBDEVICE_EXIT;
1517
1518 return ME_ERRNO_SUBDEVICE_BUSY;
1519 }
1520 //Set values for single_read()
1521 instance->single_value = ME4600_AO_MAX_DATA + 1;
1522 instance->single_value_in_fifo = ME4600_AO_MAX_DATA + 1;
1523
1524 //Setting stop points
1525 if (instance->stop_mode == ME4600_AO_SCAN_STOP_MODE) {
1526 instance->stop_data_count =
1527 instance->stop_count * circ_buffer_count;
1528 } else {
1529 instance->stop_data_count = instance->stop_count;
1530 }
1531
1532 if ((instance->stop_data_count != 0)
1533 && (instance->stop_data_count < circ_buffer_count)) {
1534 PERROR("More data in buffer than previously set limit!\n");
1535 }
1536
1537 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1538 ctrl = inl(instance->ctrl_reg);
1539 //Check FIFO
1540 if (!(ctrl & ME4600_AO_CTRL_BIT_ENABLE_FIFO)) { //FIFO wasn't enabeled. Do it. <= This should be done by user call with ME_WRITE_MODE_PRELOAD
1541 PINFO("Enableing FIFO.\n");
1542 ctrl |=
1543 ME4600_AO_CTRL_BIT_ENABLE_FIFO |
1544 ME4600_AO_CTRL_BIT_RESET_IRQ;
1545
1546 instance->preloaded_count = 0;
1547 instance->data_count = 0;
1548 } else { //Block IRQ
1549 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
1550 }
1551 outl(ctrl, instance->ctrl_reg);
1552 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1553 instance->ctrl_reg - instance->reg_base,
1554 ctrl | ME4600_AO_CTRL_BIT_RESET_IRQ);
1555
1556 //Fill FIFO <= Generaly this should be done by user pre-load call but this is second place to do it.
1557 status = inl(instance->status_reg);
1558 if (!(status & ME4600_AO_STATUS_BIT_EF)) { //FIFO empty
1559 if (instance->stop_data_count == 0) {
1560 count = ME4600_AO_FIFO_COUNT;
1561 } else {
1562 count =
1563 (ME4600_AO_FIFO_COUNT <
1564 instance->
1565 stop_data_count) ? ME4600_AO_FIFO_COUNT :
1566 instance->stop_data_count;
1567 }
1568
1569 //Copy data
1570 count =
1571 ao_write_data(instance, count, instance->preloaded_count);
1572
1573 if (count < 0) { //This should never happend!
1574 PERROR_CRITICAL("COPY FINISH WITH ERROR!\n");
1575 spin_unlock_irqrestore(&instance->subdevice_lock,
1576 cpu_flags);
1577 ME_SUBDEVICE_EXIT;
1578 return ME_ERRNO_INTERNAL;
1579 }
1580 }
1581 //Set pre-load features.
1582 spin_lock(instance->preload_reg_lock);
1583 synch = inl(instance->preload_reg);
1584 synch &=
1585 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) << instance->
1586 ao_idx);
1587 synch |=
1588 (instance->start_mode & ~ME4600_AO_EXT_TRIG) << instance->ao_idx;
1589 outl(synch, instance->preload_reg);
1590 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1591 instance->preload_reg - instance->reg_base, synch);
1592 spin_unlock(instance->preload_reg_lock);
1593
1594 //Default count is '0'
1595 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
1596 instance->preloaded_count = 0;
1597 instance->circ_buf.tail += count;
1598 instance->circ_buf.tail &= instance->circ_buf.mask;
1599 } else { //Wraparound
1600 instance->preloaded_count += count;
1601 instance->data_count += count;
1602
1603 //Special case: Infinite wraparound with less than FIFO datas always should runs in hardware mode.
1604 if ((instance->stop_mode == ME4600_AO_INF_STOP_MODE)
1605 && (circ_buffer_count <= ME4600_AO_FIFO_COUNT)) { //Change to hardware wraparound
1606 PDEBUG
1607 ("Changeing mode from software wraparound to hardware wraparound.\n");
1608 //Copy all data
1609 count =
1610 ao_write_data(instance, circ_buffer_count,
1611 instance->preloaded_count);
1612 ctrl &= ~ME4600_AO_CTRL_MODE_MASK;
1613 ctrl |= ME4600_AO_MODE_WRAPAROUND;
1614 }
1615
1616 if (instance->preloaded_count == me_circ_buf_values(&instance->circ_buf)) { //Reset position indicator.
1617 instance->preloaded_count = 0;
1618 } else if (instance->preloaded_count > me_circ_buf_values(&instance->circ_buf)) { //This should never happend!
1619 PERROR_CRITICAL
1620 ("PRELOADED MORE VALUES THAN ARE IN BUFFER!\n");
1621 spin_unlock_irqrestore(&instance->subdevice_lock,
1622 cpu_flags);
1623 ME_SUBDEVICE_EXIT;
1624 return ME_ERRNO_INTERNAL;
1625 }
1626 }
1627
1628 //Set status to 'wait for start'
1629 instance->status = ao_status_stream_run_wait;
1630
1631 status = inl(instance->status_reg);
1632 //Start state machine and interrupts
1633 ctrl &= ~(ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
1634 if (instance->start_mode == ME4600_AO_EXT_TRIG) { // External trigger.
1635 PINFO("External trigger.\n");
1636 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
1637 }
1638 if (!(status & ME4600_AO_STATUS_BIT_HF)) { //More than half!
1639 if ((ctrl & ME4600_AO_CTRL_MODE_MASK) == ME4600_AO_MODE_CONTINUOUS) { //Enable IRQ only when hardware_continous is set and FIFO is more than half
1640 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
1641 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1642 }
1643 }
1644 outl(ctrl, instance->ctrl_reg);
1645 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
1646 instance->ctrl_reg - instance->reg_base, ctrl);
1647 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
1648
1649 //Trigger output
1650 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) { //Trigger outputs
1651 spin_lock(instance->preload_reg_lock);
1652 synch = inl(instance->preload_reg);
1653 //Add channel to start list
1654 outl(synch | (ME4600_AO_SYNC_HOLD << instance->ao_idx),
1655 instance->preload_reg);
1656 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
1657 instance->reg_base,
1658 instance->preload_reg - instance->reg_base,
1659 synch | (ME4600_AO_SYNC_HOLD << instance->ao_idx));
1660
1661 //Fire
1662 PINFO
1663 ("Fired all software synchronous outputs by software trigger.\n");
1664 outl(0x8000, instance->single_reg);
1665 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
1666 instance->reg_base,
1667 instance->single_reg - instance->reg_base, 0x8000);
1668
1669 //Restore save settings
1670 outl(synch, instance->preload_reg);
1671 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
1672 instance->reg_base,
1673 instance->preload_reg - instance->reg_base, synch);
1674 spin_unlock(instance->preload_reg_lock);
1675 } else if (!instance->start_mode) { //Trigger outputs
1676/*
1677 //Remove channel from start list. // <== Unnecessary. Removed.
1678 spin_lock(instance->preload_reg_lock);
1679 synch = inl(instance->preload_reg);
1680 outl(synch & ~(ME4600_AO_SYNC_HOLD << instance->ao_idx), instance->preload_reg);
1681 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, synch & ~(ME4600_AO_SYNC_HOLD << instance->ao_idx));
1682*/
1683 //Fire
1684 PINFO("Software trigger.\n");
1685 outl(0x8000, instance->single_reg);
1686 PDEBUG_REG("single_reg outl(0x%lX+0x%lX)=0x%x\n",
1687 instance->reg_base,
1688 instance->single_reg - instance->reg_base, 0x8000);
1689
1690/*
1691 //Restore save settings. // <== Unnecessary. Removed.
1692 outl(synch, instance->preload_reg);
1693 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base, instance->preload_reg - instance->reg_base, synch);
1694 spin_unlock(instance->preload_reg_lock);
1695*/
1696 }
1697 // Set control task's timeout
1698 ref = jiffies;
1699 instance->timeout.delay = delay;
1700 instance->timeout.start_time = ref;
1701
1702 if (status & ME4600_AO_STATUS_BIT_HF) { //Less than half but not empty!
1703 PINFO("Less than half.\n");
1704 if (instance->stop_data_count != 0) {
1705 count = ME4600_AO_FIFO_COUNT / 2;
1706 } else {
1707 count =
1708 ((ME4600_AO_FIFO_COUNT / 2) <
1709 instance->stop_data_count) ? ME4600_AO_FIFO_COUNT /
1710 2 : instance->stop_data_count;
1711 }
1712
1713 //Copy data
1714 count =
1715 ao_write_data(instance, count, instance->preloaded_count);
1716
1717 if (count < 0) { //This should never happend!
1718 PERROR_CRITICAL("COPY FINISH WITH ERROR!\n");
1719 ME_SUBDEVICE_EXIT;
1720 return ME_ERRNO_INTERNAL;
1721 }
1722
1723 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
1724 instance->circ_buf.tail += count;
1725 instance->circ_buf.tail &= instance->circ_buf.mask;
1726 } else { //Wraparound
1727 instance->data_count += count;
1728 instance->preloaded_count += count;
1729
1730 if (instance->preloaded_count == me_circ_buf_values(&instance->circ_buf)) { //Reset position indicator.
1731 instance->preloaded_count = 0;
1732 } else if (instance->preloaded_count > me_circ_buf_values(&instance->circ_buf)) { //This should never happend!
1733 PERROR_CRITICAL
1734 ("PRELOADED MORE VALUES THAN ARE IN BUFFER!\n");
1735 ME_SUBDEVICE_EXIT;
1736 return ME_ERRNO_INTERNAL;
1737 }
1738 }
1739
1740 status = inl(instance->status_reg);
1741 if (!(status & ME4600_AO_STATUS_BIT_HF)) { //More than half!
1742 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1743 ctrl = inl(instance->ctrl_reg);
1744 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
1745 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1746 outl(ctrl, instance->ctrl_reg);
1747 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
1748 instance->reg_base,
1749 instance->ctrl_reg - instance->reg_base,
1750 ctrl);
1751 spin_unlock_irqrestore(&instance->subdevice_lock,
1752 cpu_flags);
1753 }
1754 }
1755 //Special case: Limited wraparound with less than HALF FIFO datas need work around to generate first interrupt.
1756 if ((instance->stop_mode != ME4600_AO_INF_STOP_MODE)
1757 && (instance->mode == ME4600_AO_SW_WRAP_MODE)
1758 && (circ_buffer_count <= (ME4600_AO_FIFO_COUNT / 2))) { //Put more data to FIFO
1759 PINFO("Limited wraparound with less than HALF FIFO datas.\n");
1760 if (instance->preloaded_count) { //This should never happend!
1761 PERROR_CRITICAL
1762 ("ERROR WHEN LOADING VALUES FOR WRAPAROUND!\n");
1763 ME_SUBDEVICE_EXIT;
1764 return ME_ERRNO_INTERNAL;
1765 }
1766
1767 while (instance->stop_data_count > instance->data_count) { //Maximum data not set jet.
1768 //Copy to buffer
1769 if (circ_buffer_count != ao_write_data(instance, circ_buffer_count, 0)) { //This should never happend!
1770 PERROR_CRITICAL
1771 ("ERROR WHEN LOADING VALUES FOR WRAPAROUND!\n");
1772 ME_SUBDEVICE_EXIT;
1773 return ME_ERRNO_INTERNAL;
1774 }
1775 instance->data_count += circ_buffer_count;
1776
1777 if (!((status = inl(instance->status_reg)) & ME4600_AO_STATUS_BIT_HF)) { //FIFO is more than half. Enable IRQ and end copy.
1778 spin_lock_irqsave(&instance->subdevice_lock,
1779 cpu_flags);
1780 ctrl = inl(instance->ctrl_reg);
1781 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
1782 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1783 outl(ctrl, instance->ctrl_reg);
1784 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
1785 instance->reg_base,
1786 instance->ctrl_reg -
1787 instance->reg_base, ctrl);
1788 spin_unlock_irqrestore(&instance->
1789 subdevice_lock,
1790 cpu_flags);
1791 break;
1792 }
1793 }
1794 }
1795 // Schedule control task.
1796 instance->ao_control_task_flag = 1;
1797 queue_delayed_work(instance->me4600_workqueue,
1798 &instance->ao_control_task, 1);
1799
1800 if (start_mode == ME_START_MODE_BLOCKING) { //Wait for start.
1801 //Only runing process will interrupt this call. Events are signaled when status change. Extra timeout add for safe reason.
1802 wait_event_interruptible_timeout(instance->wait_queue,
1803 (instance->status !=
1804 ao_status_stream_run_wait),
1805 (delay) ? delay +
1806 1 : LONG_MAX);
1807
1808 if ((instance->status != ao_status_stream_run)
1809 && (instance->status != ao_status_stream_end)) {
1810 PDEBUG("Starting stream canceled. %d\n",
1811 instance->status);
1812 err = ME_ERRNO_CANCELLED;
1813 }
1814
1815 if (signal_pending(current)) {
1816 PERROR("Wait on start of state machine interrupted.\n");
1817 instance->status = ao_status_none;
1818 ao_stop_immediately(instance);
1819 err = ME_ERRNO_SIGNAL;
1820 } else if ((delay) && ((jiffies - ref) >= delay)) {
1821 if (instance->status != ao_status_stream_run) {
1822 if (instance->status == ao_status_stream_end) {
1823 PDEBUG("Timeout reached.\n");
1824 } else {
1825 if ((jiffies - ref) > delay) {
1826 PERROR
1827 ("Timeout reached. Not handled by control task!\n");
1828 } else {
1829 PERROR
1830 ("Timeout reached. Signal come but status is strange: %d\n",
1831 instance->status);
1832 }
1833 ao_stop_immediately(instance);
1834 }
1835
1836 instance->ao_control_task_flag = 0;
1837 cancel_delayed_work(&instance->ao_control_task);
1838 instance->status = ao_status_stream_end;
1839 err = ME_ERRNO_TIMEOUT;
1840 }
1841 }
1842 }
1843
1844 ME_SUBDEVICE_EXIT;
1845 return err;
1846}
1847
1848static int me4600_ao_io_stream_status(me_subdevice_t * subdevice,
1849 struct file *filep,
1850 int wait,
1851 int *status, int *values, int flags)
1852{
1853 me4600_ao_subdevice_t *instance;
1854 int err = ME_ERRNO_SUCCESS;
1855
1856 instance = (me4600_ao_subdevice_t *) subdevice;
1857
1858 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1859
1860 if (!instance->fifo) {
1861 PERROR("Not a streaming ao.\n");
1862 return ME_ERRNO_NOT_SUPPORTED;
1863 }
1864
1865 if (flags) {
1866 PERROR("Invalid flag specified.\n");
1867 return ME_ERRNO_INVALID_FLAGS;
1868 }
1869
1870 if ((wait != ME_WAIT_NONE) && (wait != ME_WAIT_IDLE)) {
1871 PERROR("Invalid wait argument specified.\n");
1872 *status = ME_STATUS_INVALID;
1873 return ME_ERRNO_INVALID_WAIT;
1874 }
1875
1876 ME_SUBDEVICE_ENTER;
1877
1878 switch (instance->status) {
1879 case ao_status_single_configured:
1880 case ao_status_single_end:
1881 case ao_status_stream_configured:
1882 case ao_status_stream_end:
1883 case ao_status_stream_fifo_error:
1884 case ao_status_stream_buffer_error:
1885 case ao_status_stream_error:
1886 *status = ME_STATUS_IDLE;
1887 break;
1888
1889 case ao_status_single_run_wait:
1890 case ao_status_single_run:
1891 case ao_status_single_end_wait:
1892 case ao_status_stream_run_wait:
1893 case ao_status_stream_run:
1894 case ao_status_stream_end_wait:
1895 *status = ME_STATUS_BUSY;
1896 break;
1897
1898 case ao_status_none:
1899 default:
1900 *status =
1901 (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ?
1902 ME_STATUS_BUSY : ME_STATUS_IDLE;
1903 break;
1904 }
1905
1906 if ((wait == ME_WAIT_IDLE) && (*status == ME_STATUS_BUSY)) {
1907 //Only runing process will interrupt this call. Events are signaled when status change. Extra timeout add for safe reason.
1908 wait_event_interruptible_timeout(instance->wait_queue,
1909 ((instance->status !=
1910 ao_status_single_run_wait)
1911 && (instance->status !=
1912 ao_status_single_run)
1913 && (instance->status !=
1914 ao_status_single_end_wait)
1915 && (instance->status !=
1916 ao_status_stream_run_wait)
1917 && (instance->status !=
1918 ao_status_stream_run)
1919 && (instance->status !=
1920 ao_status_stream_end_wait)),
1921 LONG_MAX);
1922
1923 if (instance->status != ao_status_stream_end) {
1924 PDEBUG("Wait for IDLE canceled. %d\n",
1925 instance->status);
1926 err = ME_ERRNO_CANCELLED;
1927 }
1928
1929 if (signal_pending(current)) {
1930 PERROR("Wait for IDLE interrupted.\n");
1931 instance->status = ao_status_none;
1932 ao_stop_immediately(instance);
1933 err = ME_ERRNO_SIGNAL;
1934 }
1935
1936 *status = ME_STATUS_IDLE;
1937 }
1938
1939 *values = me_circ_buf_space(&instance->circ_buf);
1940
1941 ME_SUBDEVICE_EXIT;
1942
1943 return err;
1944}
1945
1946static int me4600_ao_io_stream_stop(me_subdevice_t * subdevice,
1947 struct file *filep,
1948 int stop_mode, int flags)
1949{ // Stop work and empty buffer and FIFO
1950 int err = ME_ERRNO_SUCCESS;
1951 me4600_ao_subdevice_t *instance;
1952 unsigned long cpu_flags;
1953 volatile uint32_t ctrl;
1954
1955 instance = (me4600_ao_subdevice_t *) subdevice;
1956
1957 PDEBUG("executed. idx=%d\n", instance->ao_idx);
1958
1959 if (flags & ~ME_IO_STREAM_STOP_PRESERVE_BUFFERS) {
1960 PERROR("Invalid flag specified.\n");
1961 return ME_ERRNO_INVALID_FLAGS;
1962 }
1963
1964 if ((stop_mode != ME_STOP_MODE_IMMEDIATE)
1965 && (stop_mode != ME_STOP_MODE_LAST_VALUE)) {
1966 PERROR("Invalid stop mode specified.\n");
1967 return ME_ERRNO_INVALID_STOP_MODE;
1968 }
1969
1970 if (!instance->fifo) {
1971 PERROR("Not a streaming ao.\n");
1972 return ME_ERRNO_NOT_SUPPORTED;
1973 }
1974
1975 if (instance->status < ao_status_stream_configured) {
1976 //There is nothing to stop!
1977 PERROR("Subdevice not in streaming mode. %d\n",
1978 instance->status);
1979 return ME_ERRNO_PREVIOUS_CONFIG;
1980 }
1981
1982 ME_SUBDEVICE_ENTER;
1983
1984 //Mark as stopping. => Software stop.
1985 instance->status = ao_status_stream_end_wait;
1986
1987 if (stop_mode == ME_STOP_MODE_IMMEDIATE) { //Stopped now!
1988 err = ao_stop_immediately(instance);
1989 } else if (stop_mode == ME_STOP_MODE_LAST_VALUE) {
1990 ctrl = inl(instance->ctrl_reg) & ME4600_AO_CTRL_MODE_MASK;
1991 if (ctrl == ME4600_AO_MODE_WRAPAROUND) { //Hardware wraparound => Hardware stop.
1992 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
1993 ctrl = inl(instance->ctrl_reg);
1994 ctrl |=
1995 ME4600_AO_CTRL_BIT_STOP |
1996 ME4600_AO_CTRL_BIT_RESET_IRQ;
1997 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
1998 outl(ctrl, instance->ctrl_reg);
1999 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2000 instance->reg_base,
2001 instance->ctrl_reg - instance->reg_base,
2002 ctrl);
2003 spin_unlock_irqrestore(&instance->subdevice_lock,
2004 cpu_flags);
2005 }
2006 //Only runing process will interrupt this call. Events are signaled when status change.
2007 wait_event_interruptible_timeout(instance->wait_queue,
2008 (instance->status !=
2009 ao_status_stream_end_wait),
2010 LONG_MAX);
2011
2012 if (instance->status != ao_status_stream_end) {
2013 PDEBUG("Stopping stream canceled.\n");
2014 err = ME_ERRNO_CANCELLED;
2015 }
2016
2017 if (signal_pending(current)) {
2018 PERROR("Stopping stream interrupted.\n");
2019 instance->status = ao_status_none;
2020 ao_stop_immediately(instance);
2021 err = ME_ERRNO_SIGNAL;
2022 }
2023 }
2024
2025 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2026 ctrl = inl(instance->ctrl_reg);
2027 ctrl |=
2028 ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
2029 ME4600_AO_CTRL_BIT_RESET_IRQ;
2030 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2031 if (!flags) { //Reset FIFO
2032 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_FIFO;
2033 }
2034 outl(ctrl, instance->ctrl_reg);
2035 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
2036 instance->ctrl_reg - instance->reg_base, ctrl);
2037 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
2038
2039 if (!flags) { //Reset software buffer
2040 instance->circ_buf.head = 0;
2041 instance->circ_buf.tail = 0;
2042 instance->preloaded_count = 0;
2043 instance->data_count = 0;
2044 }
2045
2046 ME_SUBDEVICE_EXIT;
2047
2048 return err;
2049}
2050
2051static int me4600_ao_io_stream_write(me_subdevice_t * subdevice,
2052 struct file *filep,
2053 int write_mode,
2054 int *values, int *count, int flags)
2055{
2056 int err = ME_ERRNO_SUCCESS;
2057 me4600_ao_subdevice_t *instance;
2058 unsigned long cpu_flags = 0;
2059 uint32_t reg_copy;
2060
2061 int copied_from_user = 0;
2062 int left_to_copy_from_user = *count;
2063
2064 int copied_values;
2065
2066 instance = (me4600_ao_subdevice_t *) subdevice;
2067
2068 PDEBUG("executed. idx=%d\n", instance->ao_idx);
2069
2070 //Checking arguments
2071 if (!instance->fifo) {
2072 PERROR("Not a streaming ao.\n");
2073 return ME_ERRNO_NOT_SUPPORTED;
2074 }
2075
2076 if (flags) {
2077 PERROR("Invalid flag specified.\n");
2078 return ME_ERRNO_INVALID_FLAGS;
2079 }
2080
2081 if (*count <= 0) {
2082 PERROR("Invalid count of values specified.\n");
2083 return ME_ERRNO_INVALID_VALUE_COUNT;
2084 }
2085
2086 if (values == NULL) {
2087 PERROR("Invalid address of values specified.\n");
2088 return ME_ERRNO_INVALID_POINTER;
2089 }
2090
2091 if ((instance->status == ao_status_none) || (instance->status == ao_status_single_configured)) { //The device is in single mode.
2092 PERROR
2093 ("Subdevice must be preinitialize correctly for streaming.\n");
2094 return ME_ERRNO_PREVIOUS_CONFIG;
2095 }
2096/// @note If no 'pre-load' is used. stream_start() will move data to FIFO.
2097 switch (write_mode) {
2098 case ME_WRITE_MODE_PRELOAD:
2099
2100 //Device must be stopped.
2101 if ((instance->status != ao_status_stream_configured)
2102 && (instance->status != ao_status_stream_end)) {
2103 PERROR
2104 ("Subdevice mustn't be runing when 'pre-load' mode is used.\n");
2105 return ME_ERRNO_PREVIOUS_CONFIG;
2106 }
2107 break;
2108 case ME_WRITE_MODE_NONBLOCKING:
2109 case ME_WRITE_MODE_BLOCKING:
2110 /// @note In blocking mode: When device is not runing and there is not enought space call will blocked up!
2111 /// @note Some other thread must empty buffer by starting engine.
2112 break;
2113
2114 default:
2115 PERROR("Invalid write mode specified.\n");
2116 return ME_ERRNO_INVALID_WRITE_MODE;
2117 }
2118
2119 if (instance->mode & ME4600_AO_WRAP_MODE) { //Wraparound mode. Device must be stopped.
2120 if ((instance->status != ao_status_stream_configured)
2121 && (instance->status != ao_status_stream_end)) {
2122 PERROR
2123 ("Subdevice mustn't be runing when 'pre-load' mode is used.\n");
2124 return ME_ERRNO_INVALID_WRITE_MODE;
2125 }
2126 }
2127
2128 if ((instance->mode == ME4600_AO_HW_WRAP_MODE) && (write_mode != ME_WRITE_MODE_PRELOAD)) { // hardware wrap_around mode.
2129 //This is transparent for user.
2130 PDEBUG("Changing write_mode to ME_WRITE_MODE_PRELOAD.\n");
2131 write_mode = ME_WRITE_MODE_PRELOAD;
2132 }
2133
2134 ME_SUBDEVICE_ENTER;
2135
2136 if (write_mode == ME_WRITE_MODE_PRELOAD) { //Init enviroment - preload
2137 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2138 reg_copy = inl(instance->ctrl_reg);
2139 //Check FIFO
2140 if (!(reg_copy & ME4600_AO_CTRL_BIT_ENABLE_FIFO)) { //FIFO not active. Enable it.
2141 reg_copy |= ME4600_AO_CTRL_BIT_ENABLE_FIFO;
2142 outl(reg_copy, instance->ctrl_reg);
2143 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2144 instance->reg_base,
2145 instance->ctrl_reg - instance->reg_base,
2146 reg_copy);
2147 instance->preloaded_count = 0;
2148 }
2149 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
2150 }
2151
2152 while (1) {
2153 //Copy to buffer. This step is common for all modes.
2154 copied_from_user =
2155 ao_get_data_from_user(instance, left_to_copy_from_user,
2156 values + (*count -
2157 left_to_copy_from_user));
2158 left_to_copy_from_user -= copied_from_user;
2159
2160 reg_copy = inl(instance->status_reg);
2161 if ((instance->status == ao_status_stream_run) && !(reg_copy & ME4600_AO_STATUS_BIT_FSM)) { //BROKEN PIPE! The state machine is stoped but logical status show that should be working.
2162 PERROR("Broken pipe in write.\n");
2163 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
2164 break;
2165 }
2166
2167 if ((instance->status == ao_status_stream_run) && (instance->mode == ME4600_AO_CONTINOUS) && (reg_copy & ME4600_AO_STATUS_BIT_HF)) { //Continous mode runing and data are below half!
2168
2169 // Block interrupts.
2170 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2171 reg_copy = inl(instance->ctrl_reg);
2172 //reg_copy &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2173 reg_copy |= ME4600_AO_CTRL_BIT_RESET_IRQ;
2174 outl(reg_copy, instance->ctrl_reg);
2175 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2176 instance->reg_base,
2177 instance->ctrl_reg - instance->reg_base,
2178 reg_copy);
2179 spin_unlock_irqrestore(&instance->subdevice_lock,
2180 cpu_flags);
2181
2182 //Fast copy
2183 copied_values =
2184 ao_write_data(instance, ME4600_AO_FIFO_COUNT / 2,
2185 0);
2186 if (copied_values > 0) {
2187 instance->circ_buf.tail += copied_values;
2188 instance->circ_buf.tail &=
2189 instance->circ_buf.mask;
2190 continue;
2191 }
2192 // Activate interrupts.
2193 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2194 reg_copy = inl(instance->ctrl_reg);
2195 //reg_copy |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2196 reg_copy &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
2197 outl(reg_copy, instance->ctrl_reg);
2198 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2199 instance->reg_base,
2200 instance->ctrl_reg - instance->reg_base,
2201 reg_copy);
2202 spin_unlock_irqrestore(&instance->subdevice_lock,
2203 cpu_flags);
2204
2205 if (copied_values == 0) { //This was checked and never should happend!
2206 PERROR_CRITICAL("COPING FINISH WITH 0!\n");
2207 }
2208
2209 if (copied_values < 0) { //This was checked and never should happend!
2210 PERROR_CRITICAL
2211 ("COPING FINISH WITH AN ERROR!\n");
2212 instance->status = ao_status_stream_fifo_error;
2213 err = ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2214 break;
2215 }
2216 }
2217
2218 if (!left_to_copy_from_user) { //All datas were copied.
2219 break;
2220 } else { //Not all datas were copied.
2221 if (instance->mode & ME4600_AO_WRAP_MODE) { //Error too much datas! Wraparound is limited in size!
2222 PERROR
2223 ("Too much data for wraparound mode! Exceeded size of %ld.\n",
2224 ME4600_AO_CIRC_BUF_COUNT - 1);
2225 err = ME_ERRNO_RING_BUFFER_OVERFLOW;
2226 break;
2227 }
2228
2229 if (write_mode != ME_WRITE_MODE_BLOCKING) { //Non blocking calls
2230 break;
2231 }
2232
2233 wait_event_interruptible(instance->wait_queue,
2234 me_circ_buf_space(&instance->
2235 circ_buf));
2236
2237 if (signal_pending(current)) {
2238 PERROR("Writing interrupted by signal.\n");
2239 instance->status = ao_status_none;
2240 ao_stop_immediately(instance);
2241 err = ME_ERRNO_SIGNAL;
2242 break;
2243 }
2244
2245 if (instance->status == ao_status_none) { //Reset
2246 PERROR("Writing interrupted by reset.\n");
2247 err = ME_ERRNO_CANCELLED;
2248 break;
2249 }
2250 }
2251 }
2252
2253 if (write_mode == ME_WRITE_MODE_PRELOAD) { //Copy data to FIFO - preload
2254 copied_values =
2255 ao_write_data_pooling(instance, ME4600_AO_FIFO_COUNT,
2256 instance->preloaded_count);
2257 instance->preloaded_count += copied_values;
2258 instance->data_count += copied_values;
2259
2260 if ((instance->mode == ME4600_AO_HW_WRAP_MODE)
2261 && (me_circ_buf_values(&instance->circ_buf) >
2262 ME4600_AO_FIFO_COUNT)) {
2263 PERROR
2264 ("Too much data for hardware wraparound mode! Exceeded size of %d.\n",
2265 ME4600_AO_FIFO_COUNT);
2266 err = ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2267 }
2268 }
2269
2270 *count = *count - left_to_copy_from_user;
2271 ME_SUBDEVICE_EXIT;
2272
2273 return err;
2274}
2275static irqreturn_t me4600_ao_isr(int irq, void *dev_id
2276#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 19)
2277 , struct pt_regs *regs
2278#endif
2279 )
2280{
2281 me4600_ao_subdevice_t *instance = dev_id;
2282 uint32_t irq_status;
2283 uint32_t ctrl;
2284 uint32_t status;
2285 int count = 0;
2286
2287 PDEBUG("executed. idx=%d\n", instance->ao_idx);
2288
2289 if (irq != instance->irq) {
2290 PERROR("Incorrect interrupt num: %d.\n", irq);
2291 return IRQ_NONE;
2292 }
2293
2294 irq_status = inl(instance->irq_status_reg);
2295 if (!(irq_status & (ME4600_IRQ_STATUS_BIT_AO_HF << instance->ao_idx))) {
2296 PINFO("%ld Shared interrupt. %s(): ID=%d: status_reg=0x%04X\n",
Harvey Harrisond599edc2009-01-07 14:31:57 -08002297 jiffies, __func__, instance->ao_idx, irq_status);
David Kiliani3fedd142008-11-01 00:39:12 +01002298 return IRQ_NONE;
2299 }
2300
2301 if (!instance->circ_buf.buf) {
2302 instance->status = ao_status_stream_error;
2303 PERROR_CRITICAL("CIRCULAR BUFFER NOT EXISTS!\n");
2304 //Block interrupts. Stop machine.
2305 ctrl = inl(instance->ctrl_reg);
2306 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2307 ctrl |=
2308 ME4600_AO_CTRL_BIT_RESET_IRQ |
2309 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP;
2310 outl(ctrl, instance->ctrl_reg);
2311 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2312 instance->reg_base,
2313 instance->ctrl_reg - instance->reg_base, ctrl);
2314
2315 //Inform user
2316 wake_up_interruptible_all(&instance->wait_queue);
2317 return IRQ_HANDLED;
2318 }
2319
2320 status = inl(instance->status_reg);
2321 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { //Too late. Not working! END? BROKEN PIPE?
2322 PDEBUG("Interrupt come but ISM is not working!\n");
2323 //Block interrupts. Stop machine.
2324 ctrl = inl(instance->ctrl_reg);
2325 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2326 ctrl |=
2327 ME4600_AO_CTRL_BIT_RESET_IRQ | ME4600_AO_CTRL_BIT_STOP |
2328 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
2329 outl(ctrl, instance->ctrl_reg);
2330 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2331 instance->reg_base,
2332 instance->ctrl_reg - instance->reg_base, ctrl);
2333
2334 return IRQ_HANDLED;
2335 }
2336 //General procedure. Process more datas.
2337
2338#ifdef MEDEBUG_DEBUG
2339 if (!me_circ_buf_values(&instance->circ_buf)) { //Buffer is empty!
2340 PDEBUG("Circular buffer empty!\n");
2341 }
2342#endif
2343
2344 //Check FIFO
2345 if (status & ME4600_AO_STATUS_BIT_HF) { //OK less than half
2346
2347 //Block interrupts
2348 ctrl = inl(instance->ctrl_reg);
2349 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2350 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
2351 outl(ctrl, instance->ctrl_reg);
2352 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2353 instance->reg_base,
2354 instance->ctrl_reg - instance->reg_base, ctrl);
2355
2356 do {
2357 //Calculate how many should be copied.
2358 count =
2359 (instance->stop_data_count) ? instance->
2360 stop_data_count -
2361 instance->data_count : ME4600_AO_FIFO_COUNT / 2;
2362 if (ME4600_AO_FIFO_COUNT / 2 < count) {
2363 count = ME4600_AO_FIFO_COUNT / 2;
2364 }
2365 //Copy data
2366 if (instance->mode == ME4600_AO_CONTINOUS) { //Continous
2367 count = ao_write_data(instance, count, 0);
2368 if (count > 0) {
2369 instance->circ_buf.tail += count;
2370 instance->circ_buf.tail &=
2371 instance->circ_buf.mask;
2372 instance->data_count += count;
2373
2374 if ((instance->status == ao_status_stream_end_wait) && !me_circ_buf_values(&instance->circ_buf)) { //Stoping. Whole buffer was copied.
2375 break;
2376 }
2377 }
2378 } else if ((instance->mode == ME4600_AO_SW_WRAP_MODE) && ((ctrl & ME4600_AO_CTRL_MODE_MASK) == ME4600_AO_MODE_CONTINUOUS)) { //Wraparound (software)
2379 if (instance->status == ao_status_stream_end_wait) { //We stoping => Copy to the end of the buffer.
2380 count =
2381 ao_write_data(instance, count, 0);
2382 } else { //Copy in wraparound mode.
2383 count =
2384 ao_write_data_wraparound(instance,
2385 count,
2386 instance->
2387 preloaded_count);
2388 }
2389
2390 if (count > 0) {
2391 instance->data_count += count;
2392 instance->preloaded_count += count;
2393 instance->preloaded_count %=
2394 me_circ_buf_values(&instance->
2395 circ_buf);
2396
2397 if ((instance->status == ao_status_stream_end_wait) && !instance->preloaded_count) { //Stoping. Whole buffer was copied.
2398 break;
2399 }
2400 }
2401 }
2402
2403 if ((count <= 0) || (instance->stop_data_count && (instance->stop_data_count <= instance->data_count))) { //End of work.
2404 break;
2405 }
2406 } //Repeat if still is under half fifo
2407 while ((status =
2408 inl(instance->status_reg)) & ME4600_AO_STATUS_BIT_HF);
2409
2410 //Unblock interrupts
2411 ctrl = inl(instance->ctrl_reg);
2412 if (count >= 0) { //Copy was successful.
2413 if (instance->stop_data_count && (instance->stop_data_count <= instance->data_count)) { //Finishing work. No more interrupts.
2414 PDEBUG("Finishing work. Interrupt disabled.\n");
2415 instance->status = ao_status_stream_end_wait;
2416 } else if (count > 0) { //Normal work. Enable interrupt.
2417 PDEBUG("Normal work. Enable interrupt.\n");
2418 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
2419 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2420 } else { //Normal work but there are no more data in buffer. Interrupt active but blocked. stream_write() will unblock it.
2421 PDEBUG
2422 ("No data in software buffer. Interrupt blocked.\n");
2423 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
2424 }
2425 } else { //Error during copy.
2426 instance->status = ao_status_stream_fifo_error;
2427 }
2428
2429 outl(ctrl, instance->ctrl_reg);
2430 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2431 instance->reg_base,
2432 instance->ctrl_reg - instance->reg_base, ctrl);
2433 } else { //?? more than half
2434 PDEBUG
2435 ("Interrupt come but FIFO more than half full! Reset interrupt.\n");
2436 //Reset pending interrupt
2437 ctrl = inl(instance->ctrl_reg);
2438 ctrl |= ME4600_AO_CTRL_BIT_RESET_IRQ;
2439 outl(ctrl, instance->ctrl_reg);
2440 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2441 instance->reg_base,
2442 instance->ctrl_reg - instance->reg_base, ctrl);
2443 ctrl &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
2444 outl(ctrl, instance->ctrl_reg);
2445 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2446 instance->reg_base,
2447 instance->ctrl_reg - instance->reg_base, ctrl);
2448 }
2449
2450 PINFO("ISR: Buffer count: %d.(T:%d H:%d)\n",
2451 me_circ_buf_values(&instance->circ_buf), instance->circ_buf.tail,
2452 instance->circ_buf.head);
2453 PINFO("ISR: Stop count: %d.\n", instance->stop_count);
2454 PINFO("ISR: Stop data count: %d.\n", instance->stop_data_count);
2455 PINFO("ISR: Data count: %d.\n", instance->data_count);
2456
2457 //Inform user
2458 wake_up_interruptible_all(&instance->wait_queue);
2459
2460 return IRQ_HANDLED;
2461}
2462
2463static void me4600_ao_destructor(struct me_subdevice *subdevice)
2464{
2465 me4600_ao_subdevice_t *instance;
2466
2467 instance = (me4600_ao_subdevice_t *) subdevice;
2468
2469 PDEBUG("executed. idx=%d\n", instance->ao_idx);
2470
2471 instance->ao_control_task_flag = 0;
2472
2473 // Reset subdevice to asure clean exit.
2474 me4600_ao_io_reset_subdevice(subdevice, NULL,
2475 ME_IO_RESET_SUBDEVICE_NO_FLAGS);
2476
2477 // Remove any tasks from work queue. This is paranoic because it was done allready in reset().
2478 if (!cancel_delayed_work(&instance->ao_control_task)) { //Wait 2 ticks to be sure that control task is removed from queue.
2479 set_current_state(TASK_INTERRUPTIBLE);
2480 schedule_timeout(2);
2481 }
2482
2483 if (instance->fifo) {
2484 if (instance->irq) {
2485 free_irq(instance->irq, instance);
2486 instance->irq = 0;
2487 }
2488
2489 if (instance->circ_buf.buf) {
2490 free_pages((unsigned long)instance->circ_buf.buf,
2491 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2492 }
2493 instance->circ_buf.buf = NULL;
2494 }
2495
2496 me_subdevice_deinit(&instance->base);
2497 kfree(instance);
2498}
2499
2500me4600_ao_subdevice_t *me4600_ao_constructor(uint32_t reg_base,
2501 spinlock_t * preload_reg_lock,
2502 uint32_t * preload_flags,
2503 int ao_idx,
2504 int fifo,
2505 int irq,
2506 struct workqueue_struct *me4600_wq)
2507{
2508 me4600_ao_subdevice_t *subdevice;
2509 int err;
2510
2511 PDEBUG("executed. idx=%d\n", ao_idx);
2512
2513 // Allocate memory for subdevice instance.
2514 subdevice = kmalloc(sizeof(me4600_ao_subdevice_t), GFP_KERNEL);
2515
2516 if (!subdevice) {
2517 PERROR("Cannot get memory for subdevice instance.\n");
2518 return NULL;
2519 }
2520
2521 memset(subdevice, 0, sizeof(me4600_ao_subdevice_t));
2522
2523 // Initialize subdevice base class.
2524 err = me_subdevice_init(&subdevice->base);
2525
2526 if (err) {
2527 PERROR("Cannot initialize subdevice base class instance.\n");
2528 kfree(subdevice);
2529 return NULL;
2530 }
2531 // Initialize spin locks.
2532 spin_lock_init(&subdevice->subdevice_lock);
2533
2534 subdevice->preload_reg_lock = preload_reg_lock;
2535 subdevice->preload_flags = preload_flags;
2536
2537 // Store analog output index.
2538 subdevice->ao_idx = ao_idx;
2539
2540 // Store if analog output has fifo.
2541 subdevice->fifo = (ao_idx < fifo) ? 1 : 0;
2542
2543 if (subdevice->fifo) { // Allocate and initialize circular buffer.
2544 subdevice->circ_buf.mask = ME4600_AO_CIRC_BUF_COUNT - 1;
2545
2546 subdevice->circ_buf.buf =
2547 (void *)__get_free_pages(GFP_KERNEL,
2548 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2549 PDEBUG("circ_buf = %p size=%ld\n", subdevice->circ_buf.buf,
2550 ME4600_AO_CIRC_BUF_SIZE);
2551
2552 if (!subdevice->circ_buf.buf) {
2553 PERROR
2554 ("Cannot initialize subdevice base class instance.\n");
2555 kfree(subdevice);
2556 return NULL;
2557 }
2558
2559 memset(subdevice->circ_buf.buf, 0, ME4600_AO_CIRC_BUF_SIZE);
2560 } else { // No FIFO.
2561 subdevice->circ_buf.mask = 0;
2562 subdevice->circ_buf.buf = NULL;
2563 }
2564
2565 subdevice->circ_buf.head = 0;
2566 subdevice->circ_buf.tail = 0;
2567
2568 subdevice->status = ao_status_none;
2569 subdevice->ao_control_task_flag = 0;
2570 subdevice->timeout.delay = 0;
2571 subdevice->timeout.start_time = jiffies;
2572
2573 // Initialize wait queue.
2574 init_waitqueue_head(&subdevice->wait_queue);
2575
2576 // Initialize single value to 0V.
2577 subdevice->single_value = 0x8000;
2578 subdevice->single_value_in_fifo = 0x8000;
2579
2580 // Register interrupt service routine.
2581 if (subdevice->fifo) {
2582 subdevice->irq = irq;
2583 if (request_irq(subdevice->irq, me4600_ao_isr,
2584#ifdef IRQF_DISABLED
2585 IRQF_DISABLED | IRQF_SHARED,
2586#else
2587 SA_INTERRUPT | SA_SHIRQ,
2588#endif
2589 ME4600_NAME, subdevice)) {
2590 PERROR("Cannot get interrupt line.\n");
2591 PDEBUG("free circ_buf = %p size=%d",
2592 subdevice->circ_buf.buf,
2593 PAGE_SHIFT << ME4600_AO_CIRC_BUF_SIZE_ORDER);
2594 free_pages((unsigned long)subdevice->circ_buf.buf,
2595 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2596 me_subdevice_deinit((me_subdevice_t *) subdevice);
2597 kfree(subdevice);
2598 return NULL;
2599 }
2600 PINFO("Registered irq=%d.\n", subdevice->irq);
2601 } else {
2602 subdevice->irq = 0;
2603 }
2604
2605 // Initialize registers.
2606 subdevice->irq_status_reg = reg_base + ME4600_IRQ_STATUS_REG;
2607 subdevice->preload_reg = reg_base + ME4600_AO_SYNC_REG;
2608 if (ao_idx == 0) {
2609 subdevice->ctrl_reg = reg_base + ME4600_AO_00_CTRL_REG;
2610 subdevice->status_reg = reg_base + ME4600_AO_00_STATUS_REG;
2611 subdevice->fifo_reg = reg_base + ME4600_AO_00_FIFO_REG;
2612 subdevice->single_reg = reg_base + ME4600_AO_00_SINGLE_REG;
2613 subdevice->timer_reg = reg_base + ME4600_AO_00_TIMER_REG;
2614 subdevice->reg_base = reg_base;
2615 subdevice->bitpattern = 0;
2616 } else if (ao_idx == 1) {
2617 subdevice->ctrl_reg = reg_base + ME4600_AO_01_CTRL_REG;
2618 subdevice->status_reg = reg_base + ME4600_AO_01_STATUS_REG;
2619 subdevice->fifo_reg = reg_base + ME4600_AO_01_FIFO_REG;
2620 subdevice->single_reg = reg_base + ME4600_AO_01_SINGLE_REG;
2621 subdevice->timer_reg = reg_base + ME4600_AO_01_TIMER_REG;
2622 subdevice->reg_base = reg_base;
2623 subdevice->bitpattern = 0;
2624 } else if (ao_idx == 2) {
2625 subdevice->ctrl_reg = reg_base + ME4600_AO_02_CTRL_REG;
2626 subdevice->status_reg = reg_base + ME4600_AO_02_STATUS_REG;
2627 subdevice->fifo_reg = reg_base + ME4600_AO_02_FIFO_REG;
2628 subdevice->single_reg = reg_base + ME4600_AO_02_SINGLE_REG;
2629 subdevice->timer_reg = reg_base + ME4600_AO_02_TIMER_REG;
2630 subdevice->reg_base = reg_base;
2631 subdevice->bitpattern = 0;
2632 } else if (ao_idx == 3) {
2633 subdevice->ctrl_reg = reg_base + ME4600_AO_03_CTRL_REG;
2634 subdevice->status_reg = reg_base + ME4600_AO_03_STATUS_REG;
2635 subdevice->fifo_reg = reg_base + ME4600_AO_03_FIFO_REG;
2636 subdevice->single_reg = reg_base + ME4600_AO_03_SINGLE_REG;
2637 subdevice->timer_reg = reg_base + ME4600_AO_03_TIMER_REG;
2638 subdevice->reg_base = reg_base;
2639 subdevice->bitpattern = 1;
2640 } else {
2641 PERROR_CRITICAL("WRONG SUBDEVICE idx=%d!", ao_idx);
2642 me_subdevice_deinit((me_subdevice_t *) subdevice);
2643 if (subdevice->fifo) {
2644 free_pages((unsigned long)subdevice->circ_buf.buf,
2645 ME4600_AO_CIRC_BUF_SIZE_ORDER);
2646 }
2647 subdevice->circ_buf.buf = NULL;
2648 kfree(subdevice);
2649 return NULL;
2650 }
2651
2652 // Override base class methods.
2653 subdevice->base.me_subdevice_destructor = me4600_ao_destructor;
2654 subdevice->base.me_subdevice_io_reset_subdevice =
2655 me4600_ao_io_reset_subdevice;
2656 subdevice->base.me_subdevice_io_single_config =
2657 me4600_ao_io_single_config;
2658 subdevice->base.me_subdevice_io_single_read = me4600_ao_io_single_read;
2659 subdevice->base.me_subdevice_io_single_write =
2660 me4600_ao_io_single_write;
2661 subdevice->base.me_subdevice_io_stream_config =
2662 me4600_ao_io_stream_config;
2663 subdevice->base.me_subdevice_io_stream_new_values =
2664 me4600_ao_io_stream_new_values;
2665 subdevice->base.me_subdevice_io_stream_write =
2666 me4600_ao_io_stream_write;
2667 subdevice->base.me_subdevice_io_stream_start =
2668 me4600_ao_io_stream_start;
2669 subdevice->base.me_subdevice_io_stream_status =
2670 me4600_ao_io_stream_status;
2671 subdevice->base.me_subdevice_io_stream_stop = me4600_ao_io_stream_stop;
2672 subdevice->base.me_subdevice_query_number_channels =
2673 me4600_ao_query_number_channels;
2674 subdevice->base.me_subdevice_query_subdevice_type =
2675 me4600_ao_query_subdevice_type;
2676 subdevice->base.me_subdevice_query_subdevice_caps =
2677 me4600_ao_query_subdevice_caps;
2678 subdevice->base.me_subdevice_query_subdevice_caps_args =
2679 me4600_ao_query_subdevice_caps_args;
2680 subdevice->base.me_subdevice_query_range_by_min_max =
2681 me4600_ao_query_range_by_min_max;
2682 subdevice->base.me_subdevice_query_number_ranges =
2683 me4600_ao_query_number_ranges;
2684 subdevice->base.me_subdevice_query_range_info =
2685 me4600_ao_query_range_info;
2686 subdevice->base.me_subdevice_query_timer = me4600_ao_query_timer;
2687
2688 // Prepare work queue
2689 subdevice->me4600_workqueue = me4600_wq;
2690
2691/* workqueue API changed in kernel 2.6.20 */
2692#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) )
2693 INIT_WORK(&subdevice->ao_control_task, me4600_ao_work_control_task,
2694 (void *)subdevice);
2695#else
2696 INIT_DELAYED_WORK(&subdevice->ao_control_task,
2697 me4600_ao_work_control_task);
2698#endif
2699
2700 if (subdevice->fifo) { // Set speed for single operations.
2701 outl(ME4600_AO_MIN_CHAN_TICKS - 1, subdevice->timer_reg);
2702 subdevice->hardware_stop_delay = HZ / 10; //100ms
2703 }
2704
2705 return subdevice;
2706}
2707
2708/** @brief Stop presentation. Preserve FIFOs.
2709*
2710* @param instance The subdevice instance (pointer).
2711*/
2712int inline ao_stop_immediately(me4600_ao_subdevice_t * instance)
2713{
2714 unsigned long cpu_flags;
2715 uint32_t ctrl;
2716 int timeout;
2717 int i;
2718
2719 timeout =
2720 (instance->hardware_stop_delay >
2721 (HZ / 10)) ? instance->hardware_stop_delay : HZ / 10;
2722 for (i = 0; i <= timeout; i++) {
2723 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
2724 // Stop all actions. No conditions! Block interrupts. Leave FIFO untouched!
2725 ctrl = inl(instance->ctrl_reg);
2726 ctrl |=
2727 ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
2728 | ME4600_AO_CTRL_BIT_RESET_IRQ;
2729 ctrl &=
2730 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
2731 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
2732 outl(ctrl, instance->ctrl_reg);
2733 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
2734 instance->reg_base,
2735 instance->ctrl_reg - instance->reg_base, ctrl);
2736 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
2737
2738 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) { // Exit.
2739 break;
2740 }
2741 //Still working!
2742 set_current_state(TASK_INTERRUPTIBLE);
2743 schedule_timeout(1);
2744 }
2745
2746 if (i > timeout) {
2747 PERROR_CRITICAL("FSM IS BUSY!\n");
2748 return ME_ERRNO_INTERNAL;
2749 }
2750 return ME_ERRNO_SUCCESS;
2751}
2752
2753/** @brief Copy data from circular buffer to fifo (fast) in wraparound.
2754* @note This is time critical function. Checking is done at begining and end only.
2755* @note The is not reasonable way to check how many walues was in FIFO at begining. The count must be managed externaly.
2756*
2757* @param instance The subdevice instance (pointer).
2758* @param count Maximum number of copied data.
2759* @param start_pos Position of the firs value in buffer.
2760*
2761* @return On success: Number of copied data.
2762* @return On error/success: 0. No datas were copied => no data in buffer.
2763* @return On error: -ME_ERRNO_FIFO_BUFFER_OVERFLOW.
2764*/
2765int inline ao_write_data_wraparound(me4600_ao_subdevice_t * instance, int count,
2766 int start_pos)
2767{ /// @note This is time critical function!
2768 uint32_t status;
2769 uint32_t value;
2770 int pos =
2771 (instance->circ_buf.tail + start_pos) & instance->circ_buf.mask;
2772 int local_count = count;
2773 int i = 1;
2774
2775 if (count <= 0) { //Wrong count!
2776 return 0;
2777 }
2778
2779 while (i < local_count) {
2780 //Get value from buffer
2781 value = *(instance->circ_buf.buf + pos);
2782 //Prepare it
2783 if (instance->ao_idx & 0x1) {
2784 value <<= 16;
2785 }
2786 //Put value to FIFO
2787 outl(value, instance->fifo_reg);
2788 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2789
2790 pos++;
2791 pos &= instance->circ_buf.mask;
2792 if (pos == instance->circ_buf.head) {
2793 pos = instance->circ_buf.tail;
2794 }
2795 i++;
2796 }
2797
2798 status = inl(instance->status_reg);
2799 if (!(status & ME4600_AO_STATUS_BIT_FF)) { //FIFO is full before all datas were copied!
2800 PERROR("FIFO was full before all datas were copied! idx=%d\n",
2801 instance->ao_idx);
2802 return -ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2803 } else { //Add last value
2804 value = *(instance->circ_buf.buf + pos);
2805 if (instance->ao_idx & 0x1) {
2806 value <<= 16;
2807 }
2808 //Put value to FIFO
2809 outl(value, instance->fifo_reg);
2810 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2811 }
2812
2813 PINFO("WRAPAROUND LOADED %d values. idx=%d\n", local_count,
2814 instance->ao_idx);
2815 return local_count;
2816}
2817
2818/** @brief Copy data from software buffer to fifo (fast).
2819* @note This is time critical function. Checking is done at begining and end only.
2820* @note The is not reasonable way to check how many walues was in FIFO at begining. The count must be managed externaly.
2821*
2822* @param instance The subdevice instance (pointer).
2823* @param count Maximum number of copied data.
2824* @param start_pos Position of the firs value in buffer.
2825*
2826* @return On success: Number of copied data.
2827* @return On error/success: 0. No datas were copied => no data in buffer.
2828* @return On error: -ME_ERRNO_FIFO_BUFFER_OVERFLOW.
2829*/
2830int inline ao_write_data(me4600_ao_subdevice_t * instance, int count,
2831 int start_pos)
2832{ /// @note This is time critical function!
2833 uint32_t status;
2834 uint32_t value;
2835 int pos =
2836 (instance->circ_buf.tail + start_pos) & instance->circ_buf.mask;
2837 int local_count = count;
2838 int max_count;
2839 int i = 1;
2840
2841 if (count <= 0) { //Wrong count!
2842 return 0;
2843 }
2844
2845 max_count = me_circ_buf_values(&instance->circ_buf) - start_pos;
2846 if (max_count <= 0) { //No data to copy!
2847 return 0;
2848 }
2849
2850 if (max_count < count) {
2851 local_count = max_count;
2852 }
2853
2854 while (i < local_count) {
2855 //Get value from buffer
2856 value = *(instance->circ_buf.buf + pos);
2857 //Prepare it
2858 if (instance->ao_idx & 0x1) {
2859 value <<= 16;
2860 }
2861 //Put value to FIFO
2862 outl(value, instance->fifo_reg);
2863 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2864
2865 pos++;
2866 pos &= instance->circ_buf.mask;
2867 i++;
2868 }
2869
2870 status = inl(instance->status_reg);
2871 if (!(status & ME4600_AO_STATUS_BIT_FF)) { //FIFO is full before all datas were copied!
2872 PERROR("FIFO was full before all datas were copied! idx=%d\n",
2873 instance->ao_idx);
2874 return -ME_ERRNO_FIFO_BUFFER_OVERFLOW;
2875 } else { //Add last value
2876 value = *(instance->circ_buf.buf + pos);
2877 if (instance->ao_idx & 0x1) {
2878 value <<= 16;
2879 }
2880 //Put value to FIFO
2881 outl(value, instance->fifo_reg);
2882 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2883 }
2884
2885 PINFO("FAST LOADED %d values. idx=%d\n", local_count, instance->ao_idx);
2886 return local_count;
2887}
2888
2889/** @brief Copy data from software buffer to fifo (slow).
2890* @note This is slow function that copy all data from buffer to FIFO with full control.
2891*
2892* @param instance The subdevice instance (pointer).
2893* @param count Maximum number of copied data.
2894* @param start_pos Position of the firs value in buffer.
2895*
2896* @return On success: Number of copied values.
2897* @return On error/success: 0. FIFO was full at begining.
2898* @return On error: -ME_ERRNO_RING_BUFFER_UNDEFFLOW.
2899*/
2900int inline ao_write_data_pooling(me4600_ao_subdevice_t * instance, int count,
2901 int start_pos)
2902{ /// @note This is slow function!
2903 uint32_t status;
2904 uint32_t value;
2905 int pos =
2906 (instance->circ_buf.tail + start_pos) & instance->circ_buf.mask;
2907 int local_count = count;
2908 int i;
2909 int max_count;
2910
2911 if (count <= 0) { //Wrong count!
2912 PERROR("SLOW LOADED: Wrong count! idx=%d\n", instance->ao_idx);
2913 return 0;
2914 }
2915
2916 max_count = me_circ_buf_values(&instance->circ_buf) - start_pos;
2917 if (max_count <= 0) { //No data to copy!
2918 PERROR("SLOW LOADED: No data to copy! idx=%d\n",
2919 instance->ao_idx);
2920 return 0;
2921 }
2922
2923 if (max_count < count) {
2924 local_count = max_count;
2925 }
2926
2927 for (i = 0; i < local_count; i++) {
2928 status = inl(instance->status_reg);
2929 if (!(status & ME4600_AO_STATUS_BIT_FF)) { //FIFO is full!
2930 return i;
2931 }
2932 //Get value from buffer
2933 value = *(instance->circ_buf.buf + pos);
2934 //Prepare it
2935 if (instance->ao_idx & 0x1) {
2936 value <<= 16;
2937 }
2938 //Put value to FIFO
2939 outl(value, instance->fifo_reg);
2940 //PDEBUG_REG("idx=%d fifo_reg outl(0x%lX+0x%lX)=0x%x\n", instance->ao_idx, instance->reg_base, instance->fifo_reg - instance->reg_base, value);
2941
2942 pos++;
2943 pos &= instance->circ_buf.mask;
2944 }
2945
2946 PINFO("SLOW LOADED %d values. idx=%d\n", local_count, instance->ao_idx);
2947 return local_count;
2948}
2949
2950/** @brief Copy data from user space to circular buffer.
2951* @param instance The subdevice instance (pointer).
2952* @param count Number of datas in user space.
2953* @param user_values Buffer's pointer.
2954*
2955* @return On success: Number of copied values.
2956* @return On error: -ME_ERRNO_INTERNAL.
2957*/
2958int inline ao_get_data_from_user(me4600_ao_subdevice_t * instance, int count,
2959 int *user_values)
2960{
2961 int i, err;
2962 int empty_space;
2963 int copied;
2964 int value;
2965
2966 empty_space = me_circ_buf_space(&instance->circ_buf);
2967 //We have only this space free.
2968 copied = (count < empty_space) ? count : empty_space;
2969 for (i = 0; i < copied; i++) { //Copy from user to buffer
2970 if ((err = get_user(value, (int *)(user_values + i)))) {
2971 PERROR
2972 ("BUFFER LOADED: get_user(0x%p) return an error: %d. idx=%d\n",
2973 user_values + i, err, instance->ao_idx);
2974 return -ME_ERRNO_INTERNAL;
2975 }
2976 /// @note The analog output in me4600 series has size of 16 bits.
2977 *(instance->circ_buf.buf + instance->circ_buf.head) =
2978 (uint16_t) value;
2979 instance->circ_buf.head++;
2980 instance->circ_buf.head &= instance->circ_buf.mask;
2981 }
2982
2983 PINFO("BUFFER LOADED %d values. idx=%d\n", copied, instance->ao_idx);
2984 return copied;
2985}
2986
2987/** @brief Checking actual hardware and logical state.
2988* @param instance The subdevice instance (pointer).
2989*/
2990static void me4600_ao_work_control_task(
2991#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
2992 void *subdevice
2993#else
2994 struct work_struct *work
2995#endif
2996 )
2997{
2998 me4600_ao_subdevice_t *instance;
2999 unsigned long cpu_flags = 0;
3000 uint32_t status;
3001 uint32_t ctrl;
3002 uint32_t synch;
3003 int reschedule = 0;
3004 int signaling = 0;
3005
3006#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
3007 instance = (me4600_ao_subdevice_t *) subdevice;
3008#else
3009 instance =
3010 container_of((void *)work, me4600_ao_subdevice_t, ao_control_task);
3011#endif
Harvey Harrisond599edc2009-01-07 14:31:57 -08003012 PINFO("<%s: %ld> executed. idx=%d\n", __func__, jiffies,
David Kiliani3fedd142008-11-01 00:39:12 +01003013 instance->ao_idx);
3014
3015 status = inl(instance->status_reg);
3016 PDEBUG_REG("status_reg inl(0x%lX+0x%lX)=0x%x\n", instance->reg_base,
3017 instance->status_reg - instance->reg_base, status);
3018
3019 switch (instance->status) { // Checking actual mode.
3020
3021 // Not configured for work.
3022 case ao_status_none:
3023 break;
3024
3025 //This are stable modes. No need to do anything. (?)
3026 case ao_status_single_configured:
3027 case ao_status_stream_configured:
3028 case ao_status_stream_fifo_error:
3029 case ao_status_stream_buffer_error:
3030 case ao_status_stream_error:
3031 PERROR("Shouldn't be running!.\n");
3032 break;
3033
3034 case ao_status_stream_end:
3035 if (!instance->fifo) {
3036 PERROR_CRITICAL
3037 ("Streaming on single device! This feature is not implemented in this version!\n");
3038 instance->status = ao_status_stream_error;
3039 // Signal the end.
3040 signaling = 1;
3041 break;
3042 }
3043 case ao_status_single_end:
3044 if (status & ME4600_AO_STATUS_BIT_FSM) { // State machine is working but the status is set to end. Force stop.
3045
3046 // Wait for stop.
3047 reschedule = 1;
3048 }
3049
3050 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3051 // Stop all actions. No conditions! Block interrupts and trigger. Leave FIFO untouched!
3052 ctrl = inl(instance->ctrl_reg);
3053 ctrl |=
3054 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP | ME4600_AO_CTRL_BIT_STOP
3055 | ME4600_AO_CTRL_BIT_RESET_IRQ;
3056 ctrl &=
3057 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
3058 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
3059 ctrl &=
3060 ~(ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
3061 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH);
3062 outl(ctrl, instance->ctrl_reg);
3063 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
3064 instance->reg_base,
3065 instance->ctrl_reg - instance->reg_base, ctrl);
3066 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3067 break;
3068
3069 // Single modes
3070 case ao_status_single_run_wait:
3071 case ao_status_single_run:
3072 case ao_status_single_end_wait:
3073
3074 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { // State machine is not working.
3075 if (((instance->fifo)
3076 && (!(status & ME4600_AO_STATUS_BIT_EF)))
3077 || (!(instance->fifo))) { // Single is in end state.
3078 PDEBUG("Single call has been complited.\n");
3079
3080 // Set correct value for single_read();
3081 instance->single_value =
3082 instance->single_value_in_fifo;
3083
3084 // Set status as 'ao_status_single_end'
3085 instance->status = ao_status_single_end;
3086
3087 // Signal the end.
3088 signaling = 1;
3089 // Wait for stop ISM.
3090 reschedule = 1;
3091
3092 break;
3093 }
3094 }
3095 // Check timeout.
3096 if ((instance->timeout.delay) && ((jiffies - instance->timeout.start_time) >= instance->timeout.delay)) { // Timeout
3097 PDEBUG("Timeout reached.\n");
3098 // Stop all actions. No conditions! Block interrupts and trigger. Leave FIFO untouched!
3099 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3100 ctrl = inl(instance->ctrl_reg);
3101 ctrl |=
3102 ME4600_AO_CTRL_BIT_STOP |
3103 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
3104 ME4600_AO_CTRL_BIT_RESET_IRQ;
3105 ctrl &=
3106 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
3107 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
3108 /// Fix for timeout error.
3109 ctrl &=
3110 ~(ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
3111 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH);
3112 if (instance->fifo) { //Disabling FIFO
3113 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_FIFO;
3114 }
3115 outl(ctrl, instance->ctrl_reg);
3116 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
3117 instance->reg_base,
3118 instance->ctrl_reg - instance->reg_base,
3119 ctrl);
3120 spin_unlock_irqrestore(&instance->subdevice_lock,
3121 cpu_flags);
3122
3123 spin_lock(instance->preload_reg_lock);
3124 //Remove from synchronous start. Block triggering from this output.
3125 synch = inl(instance->preload_reg);
3126 synch &=
3127 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) <<
3128 instance->ao_idx);
3129 if (!(instance->fifo)) { // No FIFO - set to single safe mode
3130 synch |=
3131 ME4600_AO_SYNC_HOLD << instance->ao_idx;
3132 }
3133 outl(synch, instance->preload_reg);
3134 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
3135 instance->reg_base,
3136 instance->preload_reg - instance->reg_base,
3137 synch);
3138 spin_unlock(instance->preload_reg_lock);
3139
3140 if (!(instance->fifo)) { // No FIFO
3141 // Restore old settings.
3142 PDEBUG("Write old value back to register.\n");
3143 outl(instance->single_value,
3144 instance->single_reg);
3145 PDEBUG_REG
3146 ("single_reg outl(0x%lX+0x%lX)=0x%x\n",
3147 instance->reg_base,
3148 instance->single_reg - instance->reg_base,
3149 instance->single_value);
3150 }
3151 // Set correct value for single_read();
3152 instance->single_value_in_fifo = instance->single_value;
3153
3154 instance->status = ao_status_single_end;
3155
3156 // Signal the end.
3157 signaling = 1;
3158 }
3159 // Wait for stop.
3160 reschedule = 1;
3161 break;
3162
3163 // Stream modes
3164 case ao_status_stream_run_wait:
3165 if (!instance->fifo) {
3166 PERROR_CRITICAL
3167 ("Streaming on single device! This feature is not implemented in this version!\n");
3168 instance->status = ao_status_stream_error;
3169 // Signal the end.
3170 signaling = 1;
3171 break;
3172 }
3173
3174 if (status & ME4600_AO_STATUS_BIT_FSM) { // State machine is working. Waiting for start finish.
3175 instance->status = ao_status_stream_run;
3176
3177 // Signal end of this step
3178 signaling = 1;
3179 } else { // State machine is not working.
3180 if (!(status & ME4600_AO_STATUS_BIT_EF)) { // FIFO is empty. Procedure has started and finish already!
3181 instance->status = ao_status_stream_end;
3182
3183 // Signal the end.
3184 signaling = 1;
3185 // Wait for stop.
3186 reschedule = 1;
3187 break;
3188 }
3189 }
3190
3191 // Check timeout.
3192 if ((instance->timeout.delay) && ((jiffies - instance->timeout.start_time) >= instance->timeout.delay)) { // Timeout
3193 PDEBUG("Timeout reached.\n");
3194 // Stop all actions. No conditions! Block interrupts. Leave FIFO untouched!
3195 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3196 ctrl = inl(instance->ctrl_reg);
3197 ctrl |=
3198 ME4600_AO_CTRL_BIT_STOP |
3199 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP |
3200 ME4600_AO_CTRL_BIT_RESET_IRQ;
3201 ctrl &=
3202 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
3203 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
3204 outl(ctrl, instance->ctrl_reg);
3205 PDEBUG_REG("ctrl_reg outl(0x%lX+0x%lX)=0x%x\n",
3206 instance->reg_base,
3207 instance->ctrl_reg - instance->reg_base,
3208 ctrl);
3209 spin_unlock_irqrestore(&instance->subdevice_lock,
3210 cpu_flags);
3211 spin_lock(instance->preload_reg_lock);
3212 //Remove from synchronous start. Block triggering from this output.
3213 synch = inl(instance->preload_reg);
3214 synch &=
3215 ~((ME4600_AO_SYNC_HOLD | ME4600_AO_SYNC_EXT_TRIG) <<
3216 instance->ao_idx);
3217 outl(synch, instance->preload_reg);
3218 PDEBUG_REG("preload_reg outl(0x%lX+0x%lX)=0x%x\n",
3219 instance->reg_base,
3220 instance->preload_reg - instance->reg_base,
3221 synch);
3222 spin_unlock(instance->preload_reg_lock);
3223
3224 instance->status = ao_status_stream_end;
3225
3226 // Signal the end.
3227 signaling = 1;
3228 }
3229 // Wait for stop.
3230 reschedule = 1;
3231 break;
3232
3233 case ao_status_stream_run:
3234 if (!instance->fifo) {
3235 PERROR_CRITICAL
3236 ("Streaming on single device! This feature is not implemented in this version!\n");
3237 instance->status = ao_status_stream_error;
3238 // Signal the end.
3239 signaling = 1;
3240 break;
3241 }
3242
3243 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { // State machine is not working. This is an error.
3244 // BROKEN PIPE!
3245 if (!(status & ME4600_AO_STATUS_BIT_EF)) { // FIFO is empty.
3246 if (me_circ_buf_values(&instance->circ_buf)) { // Software buffer is not empty.
3247 if (instance->stop_data_count && (instance->stop_data_count <= instance->data_count)) { //Finishing work. Requed data shown.
3248 PDEBUG
3249 ("ISM stoped. No data in FIFO. Buffer is not empty.\n");
3250 instance->status =
3251 ao_status_stream_end;
3252 } else {
3253 PERROR
3254 ("Output stream has been broken. ISM stoped. No data in FIFO. Buffer is not empty.\n");
3255 instance->status =
3256 ao_status_stream_buffer_error;
3257 }
3258 } else { // Software buffer is empty.
3259 PDEBUG
3260 ("ISM stoped. No data in FIFO. Buffer is empty.\n");
3261 instance->status = ao_status_stream_end;
3262 }
3263 } else { // There are still datas in FIFO.
3264 if (me_circ_buf_values(&instance->circ_buf)) { // Software buffer is not empty.
3265 PERROR
3266 ("Output stream has been broken. ISM stoped but some data in FIFO and buffer.\n");
3267 } else { // Software buffer is empty.
3268 PERROR
3269 ("Output stream has been broken. ISM stoped but some data in FIFO. Buffer is empty.\n");
3270 }
3271 instance->status = ao_status_stream_fifo_error;
3272
3273 }
3274
3275 // Signal the failure.
3276 signaling = 1;
3277 break;
3278 }
3279 // Wait for stop.
3280 reschedule = 1;
3281 break;
3282
3283 case ao_status_stream_end_wait:
3284 if (!instance->fifo) {
3285 PERROR_CRITICAL
3286 ("Streaming on single device! This feature is not implemented in this version!\n");
3287 instance->status = ao_status_stream_error;
3288 // Signal the end.
3289 signaling = 1;
3290 break;
3291 }
3292
3293 if (!(status & ME4600_AO_STATUS_BIT_FSM)) { // State machine is not working. Waiting for stop finish.
3294 instance->status = ao_status_stream_end;
3295 signaling = 1;
3296 }
3297 // State machine is working.
3298 reschedule = 1;
3299 break;
3300
3301 default:
3302 PERROR_CRITICAL("Status is in wrong state (%d)!\n",
3303 instance->status);
3304 instance->status = ao_status_stream_error;
3305 // Signal the end.
3306 signaling = 1;
3307 break;
3308
3309 }
3310
3311 if (signaling) { //Signal it.
3312 wake_up_interruptible_all(&instance->wait_queue);
3313 }
3314
3315 if (instance->ao_control_task_flag && reschedule) { // Reschedule task
3316 queue_delayed_work(instance->me4600_workqueue,
3317 &instance->ao_control_task, 1);
3318 } else {
Harvey Harrisond599edc2009-01-07 14:31:57 -08003319 PINFO("<%s> Ending control task.\n", __func__);
David Kiliani3fedd142008-11-01 00:39:12 +01003320 }
3321
3322}
3323#else
3324/// @note SPECIAL BUILD FOR BOSCH
3325/// @author Guenter Gebhardt
3326static int me4600_ao_io_reset_subdevice(me_subdevice_t * subdevice,
3327 struct file *filep, int flags)
3328{
3329 me4600_ao_subdevice_t *instance;
3330 int err = ME_ERRNO_SUCCESS;
3331 uint32_t tmp;
3332 unsigned long status;
3333
3334 PDEBUG("executed.\n");
3335
3336 instance = (me4600_ao_subdevice_t *) subdevice;
3337
3338 ME_SUBDEVICE_ENTER spin_lock_irqsave(&instance->subdevice_lock, status);
3339 spin_lock(instance->preload_reg_lock);
3340 tmp = inl(instance->preload_reg);
3341 tmp &= ~(0x10001 << instance->ao_idx);
3342 outl(tmp, instance->preload_reg);
3343 *instance->preload_flags &= ~(0x1 << instance->ao_idx);
3344 spin_unlock(instance->preload_reg_lock);
3345
3346 tmp = inl(instance->ctrl_reg);
3347 tmp |= ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3348 outl(tmp, instance->ctrl_reg);
3349
3350 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ;
3351
3352 outl(ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP,
3353 instance->ctrl_reg);
3354
3355 outl(0x8000, instance->single_reg);
3356
3357 instance->single_value = 0x8000;
3358 instance->circ_buf.head = 0;
3359 instance->circ_buf.tail = 0;
3360
3361 spin_unlock_irqrestore(&instance->subdevice_lock, status);
3362
3363 ME_SUBDEVICE_EXIT;
3364
3365 return err;
3366}
3367
3368static int me4600_ao_io_single_config(me_subdevice_t * subdevice,
3369 struct file *filep,
3370 int channel,
3371 int single_config,
3372 int ref,
3373 int trig_chan,
3374 int trig_type, int trig_edge, int flags)
3375{
3376 me4600_ao_subdevice_t *instance;
3377 int err = ME_ERRNO_SUCCESS;
3378 uint32_t tmp;
3379 unsigned long cpu_flags;
3380
3381 PDEBUG("executed.\n");
3382
3383 instance = (me4600_ao_subdevice_t *) subdevice;
3384
3385 ME_SUBDEVICE_ENTER
3386 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3387
3388 if (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) {
3389 PERROR("Subdevice is busy.\n");
3390 err = ME_ERRNO_SUBDEVICE_BUSY;
3391 goto ERROR;
3392 }
3393
3394 if (channel == 0) {
3395 if (single_config == 0) {
3396 if (ref == ME_REF_AO_GROUND) {
3397 if (trig_chan == ME_TRIG_CHAN_DEFAULT) {
3398 if (trig_type == ME_TRIG_TYPE_SW) {
3399 tmp = inl(instance->ctrl_reg);
3400 tmp |=
3401 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3402 outl(tmp, instance->ctrl_reg);
3403 tmp =
3404 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3405 outl(tmp, instance->ctrl_reg);
3406
3407 spin_lock(instance->
3408 preload_reg_lock);
3409 tmp =
3410 inl(instance->preload_reg);
3411 tmp &=
3412 ~(0x10001 << instance->
3413 ao_idx);
3414 outl(tmp,
3415 instance->preload_reg);
3416 *instance->preload_flags &=
3417 ~(0x1 << instance->ao_idx);
3418 spin_unlock(instance->
3419 preload_reg_lock);
3420 } else if (trig_type ==
3421 ME_TRIG_TYPE_EXT_DIGITAL) {
3422 if (trig_edge ==
3423 ME_TRIG_EDGE_RISING) {
3424 tmp =
3425 inl(instance->
3426 ctrl_reg);
3427 tmp |=
3428 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3429 outl(tmp,
3430 instance->
3431 ctrl_reg);
3432 tmp =
3433 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3434 |
3435 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
3436 outl(tmp,
3437 instance->
3438 ctrl_reg);
3439 } else if (trig_edge ==
3440 ME_TRIG_EDGE_FALLING)
3441 {
3442 tmp =
3443 inl(instance->
3444 ctrl_reg);
3445 tmp |=
3446 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3447 outl(tmp,
3448 instance->
3449 ctrl_reg);
3450 tmp =
3451 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3452 |
3453 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG
3454 |
3455 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
3456 outl(tmp,
3457 instance->
3458 ctrl_reg);
3459 } else if (trig_edge ==
3460 ME_TRIG_EDGE_ANY) {
3461 tmp =
3462 inl(instance->
3463 ctrl_reg);
3464 tmp |=
3465 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3466 outl(tmp,
3467 instance->
3468 ctrl_reg);
3469 tmp =
3470 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3471 |
3472 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG
3473 |
3474 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE
3475 |
3476 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
3477 outl(tmp,
3478 instance->
3479 ctrl_reg);
3480 } else {
3481 PERROR
3482 ("Invalid trigger edge.\n");
3483 err =
3484 ME_ERRNO_INVALID_TRIG_EDGE;
3485 goto ERROR;
3486 }
3487
3488 spin_lock(instance->
3489 preload_reg_lock);
3490
3491 tmp =
3492 inl(instance->preload_reg);
3493 tmp &=
3494 ~(0x10001 << instance->
3495 ao_idx);
3496 tmp |= 0x1 << instance->ao_idx;
3497 outl(tmp,
3498 instance->preload_reg);
3499 *instance->preload_flags &=
3500 ~(0x1 << instance->ao_idx);
3501 spin_unlock(instance->
3502 preload_reg_lock);
3503 } else {
3504 PERROR
3505 ("Invalid trigger type.\n");
3506 err =
3507 ME_ERRNO_INVALID_TRIG_TYPE;
3508 goto ERROR;
3509 }
3510 } else if (trig_chan ==
3511 ME_TRIG_CHAN_SYNCHRONOUS) {
3512 if (trig_type == ME_TRIG_TYPE_SW) {
3513 tmp = inl(instance->ctrl_reg);
3514 tmp |=
3515 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3516 outl(tmp, instance->ctrl_reg);
3517 tmp =
3518 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3519 outl(tmp, instance->ctrl_reg);
3520
3521 spin_lock(instance->
3522 preload_reg_lock);
3523 tmp =
3524 inl(instance->preload_reg);
3525 tmp &=
3526 ~(0x10001 << instance->
3527 ao_idx);
3528 tmp |= 0x1 << instance->ao_idx;
3529 outl(tmp,
3530 instance->preload_reg);
3531 *instance->preload_flags |=
3532 0x1 << instance->ao_idx;
3533 spin_unlock(instance->
3534 preload_reg_lock);
3535 } else if (trig_type ==
3536 ME_TRIG_TYPE_EXT_DIGITAL) {
3537 if (trig_edge ==
3538 ME_TRIG_EDGE_RISING) {
3539 tmp =
3540 inl(instance->
3541 ctrl_reg);
3542 tmp |=
3543 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3544 outl(tmp,
3545 instance->
3546 ctrl_reg);
3547 tmp =
3548 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3549 outl(tmp,
3550 instance->
3551 ctrl_reg);
3552 } else if (trig_edge ==
3553 ME_TRIG_EDGE_FALLING)
3554 {
3555 tmp =
3556 inl(instance->
3557 ctrl_reg);
3558 tmp |=
3559 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3560 outl(tmp,
3561 instance->
3562 ctrl_reg);
3563 tmp =
3564 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3565 |
3566 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
3567 outl(tmp,
3568 instance->
3569 ctrl_reg);
3570 } else if (trig_edge ==
3571 ME_TRIG_EDGE_ANY) {
3572 tmp =
3573 inl(instance->
3574 ctrl_reg);
3575 tmp |=
3576 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3577 outl(tmp,
3578 instance->
3579 ctrl_reg);
3580 tmp =
3581 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP
3582 |
3583 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE
3584 |
3585 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
3586 outl(tmp,
3587 instance->
3588 ctrl_reg);
3589 } else {
3590 PERROR
3591 ("Invalid trigger edge.\n");
3592 err =
3593 ME_ERRNO_INVALID_TRIG_EDGE;
3594 goto ERROR;
3595 }
3596
3597 spin_lock(instance->
3598 preload_reg_lock);
3599
3600 tmp =
3601 inl(instance->preload_reg);
3602 tmp |=
3603 0x10001 << instance->ao_idx;
3604 outl(tmp,
3605 instance->preload_reg);
3606 *instance->preload_flags &=
3607 ~(0x1 << instance->ao_idx);
3608 spin_unlock(instance->
3609 preload_reg_lock);
3610 } else {
3611 PERROR
3612 ("Invalid trigger type.\n");
3613 err =
3614 ME_ERRNO_INVALID_TRIG_TYPE;
3615 goto ERROR;
3616 }
3617 } else {
3618 PERROR
3619 ("Invalid trigger channel specified.\n");
3620 err = ME_ERRNO_INVALID_REF;
3621 goto ERROR;
3622 }
3623 } else {
3624 PERROR("Invalid analog reference specified.\n");
3625 err = ME_ERRNO_INVALID_REF;
3626 goto ERROR;
3627 }
3628 } else {
3629 PERROR("Invalid single config specified.\n");
3630 err = ME_ERRNO_INVALID_SINGLE_CONFIG;
3631 goto ERROR;
3632 }
3633 } else {
3634 PERROR("Invalid channel number specified.\n");
3635 err = ME_ERRNO_INVALID_CHANNEL;
3636 goto ERROR;
3637 }
3638
3639 ERROR:
3640
3641 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3642
3643 ME_SUBDEVICE_EXIT;
3644
3645 return err;
3646}
3647
3648static int me4600_ao_io_single_read(me_subdevice_t * subdevice,
3649 struct file *filep,
3650 int channel,
3651 int *value, int time_out, int flags)
3652{
3653 me4600_ao_subdevice_t *instance;
3654 int err = ME_ERRNO_SUCCESS;
3655 unsigned long tmp;
3656 unsigned long cpu_flags;
3657
3658 PDEBUG("executed.\n");
3659
3660 instance = (me4600_ao_subdevice_t *) subdevice;
3661
3662 if (channel != 0) {
3663 PERROR("Invalid channel number specified.\n");
3664 return ME_ERRNO_INVALID_CHANNEL;
3665 }
3666
3667 ME_SUBDEVICE_ENTER
3668 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3669 tmp = inl(instance->ctrl_reg);
3670
3671 if (tmp & 0x3) {
3672 PERROR("Not in single mode.\n");
3673 err = ME_ERRNO_PREVIOUS_CONFIG;
3674 } else {
3675 *value = instance->single_value;
3676 }
3677
3678 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3679
3680 ME_SUBDEVICE_EXIT;
3681
3682 return err;
3683}
3684
3685static int me4600_ao_io_single_write(me_subdevice_t * subdevice,
3686 struct file *filep,
3687 int channel,
3688 int value, int time_out, int flags)
3689{
3690 me4600_ao_subdevice_t *instance;
3691 int err = ME_ERRNO_SUCCESS;
3692 unsigned long mask = 0;
3693 unsigned long tmp;
3694 unsigned long cpu_flags;
3695 int i;
3696 wait_queue_head_t queue;
3697 unsigned long j;
3698 unsigned long delay = 0;
3699
3700 PDEBUG("executed.\n");
3701
3702 init_waitqueue_head(&queue);
3703
3704 instance = (me4600_ao_subdevice_t *) subdevice;
3705
3706 if (channel != 0) {
3707 PERROR("Invalid channel number specified.\n");
3708 return ME_ERRNO_INVALID_CHANNEL;
3709 }
3710
3711 if (time_out < 0) {
3712 PERROR("Invalid timeout specified.\n");
3713 return ME_ERRNO_INVALID_TIMEOUT;
3714 }
3715
3716 if (time_out) {
3717 delay = (time_out * HZ) / 1000;
3718
3719 if (delay == 0)
3720 delay = 1;
3721 }
3722
3723 ME_SUBDEVICE_ENTER
3724 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3725
3726 tmp = inl(instance->ctrl_reg);
3727
3728 if (tmp & 0x3) {
3729 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3730 PERROR("Not in single mode.\n");
3731 err = ME_ERRNO_PREVIOUS_CONFIG;
3732 goto ERROR;
3733 }
3734
3735 if (tmp & ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG) {
3736 outl(value, instance->single_reg);
3737 instance->single_value = value;
3738 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3739
3740 if (!(flags & ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
3741 j = jiffies;
3742
3743 while (inl(instance->status_reg) &
3744 ME4600_AO_STATUS_BIT_FSM) {
3745 interruptible_sleep_on_timeout(&queue, 1);
3746
3747 if (signal_pending(current)) {
3748 PERROR
3749 ("Wait on external trigger interrupted by signal.\n");
3750 err = ME_ERRNO_SIGNAL;
3751 goto ERROR;
3752 }
3753
3754 if (delay && ((jiffies - j) > delay)) {
3755 PERROR("Timeout reached.\n");
3756 err = ME_ERRNO_TIMEOUT;
3757 goto ERROR;
3758 }
3759 }
3760 }
3761 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx))
3762 == (0x10001 << instance->ao_idx)) {
3763 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) {
3764 tmp |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
3765 outl(tmp, instance->ctrl_reg);
3766 outl(value, instance->single_reg);
3767 instance->single_value = value;
3768 spin_unlock_irqrestore(&instance->subdevice_lock,
3769 cpu_flags);
3770
3771 if (!(flags & ME_IO_SINGLE_TYPE_WRITE_NONBLOCKING)) {
3772 j = jiffies;
3773
3774 while (inl(instance->status_reg) &
3775 ME4600_AO_STATUS_BIT_FSM) {
3776 interruptible_sleep_on_timeout(&queue,
3777 1);
3778
3779 if (signal_pending(current)) {
3780 PERROR
3781 ("Wait on external trigger interrupted by signal.\n");
3782 err = ME_ERRNO_SIGNAL;
3783 goto ERROR;
3784 }
3785
3786 if (delay && ((jiffies - j) > delay)) {
3787 PERROR("Timeout reached.\n");
3788 err = ME_ERRNO_TIMEOUT;
3789 goto ERROR;
3790 }
3791 }
3792 }
3793 } else {
3794 outl(value, instance->single_reg);
3795 instance->single_value = value;
3796 spin_unlock_irqrestore(&instance->subdevice_lock,
3797 cpu_flags);
3798 }
3799 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx))
3800 == (0x1 << instance->ao_idx)) {
3801 outl(value, instance->single_reg);
3802 instance->single_value = value;
3803
3804 PDEBUG("Synchronous SW, flags = 0x%X.\n", flags);
3805
3806 if (flags & ME_IO_SINGLE_TYPE_TRIG_SYNCHRONOUS) {
3807 PDEBUG("Trigger synchronous SW.\n");
3808 spin_lock(instance->preload_reg_lock);
3809 tmp = inl(instance->preload_reg);
3810
3811 for (i = 0; i < ME4600_AO_MAX_SUBDEVICES; i++) {
3812 if ((*instance->preload_flags & (0x1 << i))) {
3813 if ((tmp & (0x10001 << i)) ==
3814 (0x1 << i)) {
3815 mask |= 0x1 << i;
3816 }
3817 }
3818 }
3819
3820 tmp &= ~(mask);
3821
3822 outl(tmp, instance->preload_reg);
3823 spin_unlock(instance->preload_reg_lock);
3824 }
3825
3826 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3827 } else {
3828 outl(value, instance->single_reg);
3829 instance->single_value = value;
3830 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
3831 }
3832
3833 ERROR:
3834
3835 ME_SUBDEVICE_EXIT;
3836
3837 return err;
3838}
3839
3840static int me4600_ao_io_stream_config(me_subdevice_t * subdevice,
3841 struct file *filep,
3842 meIOStreamConfig_t * config_list,
3843 int count,
3844 meIOStreamTrigger_t * trigger,
3845 int fifo_irq_threshold, int flags)
3846{
3847 me4600_ao_subdevice_t *instance;
3848 int err = ME_ERRNO_SUCCESS;
3849 unsigned long ctrl;
3850 unsigned long tmp;
3851 unsigned long cpu_flags;
3852 uint64_t conv_ticks;
3853 unsigned int conv_start_ticks_low = trigger->iConvStartTicksLow;
3854 unsigned int conv_start_ticks_high = trigger->iConvStartTicksHigh;
3855
3856 PDEBUG("executed.\n");
3857
3858 instance = (me4600_ao_subdevice_t *) subdevice;
3859
3860 conv_ticks =
3861 (uint64_t) conv_start_ticks_low +
3862 ((uint64_t) conv_start_ticks_high << 32);
3863
3864 if (!instance->fifo) {
3865 PERROR("Not a streaming ao.\n");
3866 return ME_ERRNO_NOT_SUPPORTED;
3867 }
3868
3869 ME_SUBDEVICE_ENTER
3870 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
3871
3872 if ((inl(instance->status_reg)) & ME4600_AO_STATUS_BIT_FSM) {
3873 PERROR("Subdevice is busy.\n");
3874 err = ME_ERRNO_SUBDEVICE_BUSY;
3875 goto ERROR;
3876 }
3877
3878 ctrl = inl(instance->ctrl_reg);
3879 ctrl |= ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3880 outl(ctrl, instance->ctrl_reg);
3881 ctrl = ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
3882 outl(ctrl, instance->ctrl_reg);
3883
3884 if (count != 1) {
3885 PERROR("Invalid stream configuration list count specified.\n");
3886 err = ME_ERRNO_INVALID_CONFIG_LIST_COUNT;
3887 goto ERROR;
3888 }
3889
3890 if (config_list[0].iChannel != 0) {
3891 PERROR("Invalid channel number specified.\n");
3892 err = ME_ERRNO_INVALID_CHANNEL;
3893 goto ERROR;
3894 }
3895
3896 if (config_list[0].iStreamConfig != 0) {
3897 PERROR("Invalid stream config specified.\n");
3898 err = ME_ERRNO_INVALID_STREAM_CONFIG;
3899 goto ERROR;
3900 }
3901
3902 if (config_list[0].iRef != ME_REF_AO_GROUND) {
3903 PERROR("Invalid analog reference.\n");
3904 err = ME_ERRNO_INVALID_REF;
3905 goto ERROR;
3906 }
3907
3908 if ((trigger->iAcqStartTicksLow != 0)
3909 || (trigger->iAcqStartTicksHigh != 0)) {
3910 PERROR
3911 ("Invalid acquisition start trigger argument specified.\n");
3912 err = ME_ERRNO_INVALID_ACQ_START_ARG;
3913 goto ERROR;
3914 }
3915
3916 switch (trigger->iAcqStartTrigType) {
3917
3918 case ME_TRIG_TYPE_SW:
3919 break;
3920
3921 case ME_TRIG_TYPE_EXT_DIGITAL:
3922 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
3923
3924 switch (trigger->iAcqStartTrigEdge) {
3925
3926 case ME_TRIG_EDGE_RISING:
3927 break;
3928
3929 case ME_TRIG_EDGE_FALLING:
3930 ctrl |= ME4600_AO_CTRL_BIT_EX_TRIG_EDGE;
3931
3932 break;
3933
3934 case ME_TRIG_EDGE_ANY:
3935 ctrl |=
3936 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE |
3937 ME4600_AO_CTRL_BIT_EX_TRIG_EDGE_BOTH;
3938
3939 break;
3940
3941 default:
3942 PERROR
3943 ("Invalid acquisition start trigger edge specified.\n");
3944
3945 err = ME_ERRNO_INVALID_ACQ_START_TRIG_EDGE;
3946
3947 goto ERROR;
3948
3949 break;
3950 }
3951
3952 break;
3953
3954 default:
3955 PERROR("Invalid acquisition start trigger type specified.\n");
3956
3957 err = ME_ERRNO_INVALID_ACQ_START_TRIG_TYPE;
3958
3959 goto ERROR;
3960
3961 break;
3962 }
3963
3964 switch (trigger->iScanStartTrigType) {
3965
3966 case ME_TRIG_TYPE_FOLLOW:
3967 break;
3968
3969 default:
3970 PERROR("Invalid scan start trigger type specified.\n");
3971
3972 err = ME_ERRNO_INVALID_SCAN_START_TRIG_TYPE;
3973
3974 goto ERROR;
3975
3976 break;
3977 }
3978
3979 switch (trigger->iConvStartTrigType) {
3980
3981 case ME_TRIG_TYPE_TIMER:
3982 if ((conv_ticks < ME4600_AO_MIN_CHAN_TICKS)
3983 || (conv_ticks > ME4600_AO_MAX_CHAN_TICKS)) {
3984 PERROR
3985 ("Invalid conv start trigger argument specified.\n");
3986 err = ME_ERRNO_INVALID_CONV_START_ARG;
3987 goto ERROR;
3988 }
3989
3990 break;
3991
3992 default:
3993 PERROR("Invalid conv start trigger type specified.\n");
3994
3995 err = ME_ERRNO_INVALID_CONV_START_TRIG_TYPE;
3996
3997 goto ERROR;
3998
3999 break;
4000 }
4001
4002 /* Preset to hardware wraparound mode */
4003 instance->flags &= ~(ME4600_AO_FLAGS_SW_WRAP_MODE_MASK);
4004
4005 switch (trigger->iScanStopTrigType) {
4006
4007 case ME_TRIG_TYPE_NONE:
4008 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
4009 /* Set flags to indicate usage of software mode. */
4010 instance->flags |= ME4600_AO_FLAGS_SW_WRAP_MODE_INF;
4011 instance->wrap_count = 0;
4012 instance->wrap_remaining = 0;
4013 }
4014
4015 break;
4016
4017 case ME_TRIG_TYPE_COUNT:
4018 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
4019 if (trigger->iScanStopCount <= 0) {
4020 PERROR("Invalid scan stop count specified.\n");
4021 err = ME_ERRNO_INVALID_SCAN_STOP_ARG;
4022 goto ERROR;
4023 }
4024
4025 /* Set flags to indicate usage of software mode. */
4026 instance->flags |= ME4600_AO_FLAGS_SW_WRAP_MODE_FIN;
4027 instance->wrap_count = trigger->iScanStopCount;
4028 instance->wrap_remaining = trigger->iScanStopCount;
4029 } else {
4030 PERROR("Invalid scan stop trigger type specified.\n");
4031 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4032 goto ERROR;
4033 }
4034
4035 break;
4036
4037 default:
4038 PERROR("Invalid scan stop trigger type specified.\n");
4039
4040 err = ME_ERRNO_INVALID_SCAN_STOP_TRIG_TYPE;
4041
4042 goto ERROR;
4043
4044 break;
4045 }
4046
4047 switch (trigger->iAcqStopTrigType) {
4048
4049 case ME_TRIG_TYPE_NONE:
4050 break;
4051
4052 case ME_TRIG_TYPE_COUNT:
4053 if (trigger->iScanStopTrigType != ME_TRIG_TYPE_NONE) {
4054 PERROR("Invalid acq stop trigger type specified.\n");
4055 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4056 goto ERROR;
4057 }
4058
4059 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
4060 if (trigger->iAcqStopCount <= 0) {
4061 PERROR("Invalid acq stop count specified.\n");
4062 err = ME_ERRNO_INVALID_ACQ_STOP_ARG;
4063 goto ERROR;
4064 }
4065
4066 /* Set flags to indicate usage of software mode. */
4067 instance->flags |= ME4600_AO_FLAGS_SW_WRAP_MODE_FIN;
4068 instance->wrap_count = trigger->iAcqStopCount;
4069 instance->wrap_remaining = trigger->iAcqStopCount;
4070 } else {
4071 PERROR("Invalid acp stop trigger type specified.\n");
4072 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4073 goto ERROR;
4074 }
4075
4076 break;
4077
4078 default:
4079 PERROR("Invalid acq stop trigger type specified.\n");
4080 err = ME_ERRNO_INVALID_ACQ_STOP_TRIG_TYPE;
4081 goto ERROR;
4082 break;
4083 }
4084
4085 switch (trigger->iAcqStartTrigChan) {
4086
4087 case ME_TRIG_CHAN_DEFAULT:
4088 spin_lock(instance->preload_reg_lock);
4089 tmp = inl(instance->preload_reg);
4090 tmp &= ~(0x10001 << instance->ao_idx);
4091 outl(tmp, instance->preload_reg);
4092 spin_unlock(instance->preload_reg_lock);
4093
4094 break;
4095
4096 case ME_TRIG_CHAN_SYNCHRONOUS:
4097 if (trigger->iAcqStartTrigType == ME_TRIG_TYPE_SW) {
4098 spin_lock(instance->preload_reg_lock);
4099 tmp = inl(instance->preload_reg);
4100 tmp &= ~(0x10001 << instance->ao_idx);
4101 outl(tmp, instance->preload_reg);
4102 tmp |= 0x1 << instance->ao_idx;
4103 outl(tmp, instance->preload_reg);
4104 spin_unlock(instance->preload_reg_lock);
4105 } else {
4106 ctrl &= ~(ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG);
4107 spin_lock(instance->preload_reg_lock);
4108 tmp = inl(instance->preload_reg);
4109 tmp &= ~(0x10001 << instance->ao_idx);
4110 outl(tmp, instance->preload_reg);
4111 tmp |= 0x10000 << instance->ao_idx;
4112 outl(tmp, instance->preload_reg);
4113 spin_unlock(instance->preload_reg_lock);
4114 }
4115
4116 break;
4117
4118 default:
4119 PERROR("Invalid acq start trigger channel specified.\n");
4120 err = ME_ERRNO_INVALID_ACQ_START_TRIG_CHAN;
4121 goto ERROR;
4122
4123 break;
4124 }
4125
4126 outl(conv_ticks - 2, instance->timer_reg);
4127
4128 if (flags & ME_IO_STREAM_CONFIG_BIT_PATTERN) {
4129 if (instance->ao_idx == 3) {
4130 ctrl |= ME4600_AO_CTRL_BIT_ENABLE_DO;
4131 } else {
4132 err = ME_ERRNO_INVALID_FLAGS;
4133 goto ERROR;
4134 }
4135 } else {
4136 if (instance->ao_idx == 3) {
4137 ctrl &= ~ME4600_AO_CTRL_BIT_ENABLE_DO;
4138 }
4139 }
4140
4141 /* Set hardware mode. */
4142 if (flags & ME_IO_STREAM_CONFIG_WRAPAROUND) {
4143 ctrl |= ME4600_AO_CTRL_BIT_MODE_0;
4144 } else {
4145 ctrl |= ME4600_AO_CTRL_BIT_MODE_1;
4146 }
4147
4148 PDEBUG("Preload word = 0x%X.\n", inl(instance->preload_reg));
4149
4150 PDEBUG("Ctrl word = 0x%lX.\n", ctrl);
4151 outl(ctrl, instance->ctrl_reg); // Write the control word
4152
4153 ERROR:
4154
4155 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4156
4157 ME_SUBDEVICE_EXIT;
4158
4159 return err;
4160}
4161
4162static int me4600_ao_io_stream_new_values(me_subdevice_t * subdevice,
4163 struct file *filep,
4164 int time_out, int *count, int flags)
4165{
4166 me4600_ao_subdevice_t *instance;
4167 int err = ME_ERRNO_SUCCESS;
4168 long t = 0;
4169 long j;
4170
4171 PDEBUG("executed.\n");
4172
4173 instance = (me4600_ao_subdevice_t *) subdevice;
4174
4175 if (!instance->fifo) {
4176 PERROR("Not a streaming ao.\n");
4177 return ME_ERRNO_NOT_SUPPORTED;
4178 }
4179
4180 if (time_out < 0) {
4181 PERROR("Invalid time_out specified.\n");
4182 return ME_ERRNO_INVALID_TIMEOUT;
4183 }
4184
4185 if (time_out) {
4186 t = (time_out * HZ) / 1000;
4187
4188 if (t == 0)
4189 t = 1;
4190 }
4191
4192 *count = 0;
4193
4194 ME_SUBDEVICE_ENTER;
4195
4196 if (t) {
4197 j = jiffies;
4198 wait_event_interruptible_timeout(instance->wait_queue,
4199 ((me_circ_buf_space
4200 (&instance->circ_buf))
4201 || !(inl(instance->status_reg)
4202 &
4203 ME4600_AO_STATUS_BIT_FSM)),
4204 t);
4205
4206 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
4207 PERROR("AO subdevice is not running.\n");
4208 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
4209 } else if (signal_pending(current)) {
4210 PERROR("Wait on values interrupted from signal.\n");
4211 err = ME_ERRNO_SIGNAL;
4212 } else if ((jiffies - j) >= t) {
4213 PERROR("Wait on values timed out.\n");
4214 err = ME_ERRNO_TIMEOUT;
4215 } else {
4216 *count = me_circ_buf_space(&instance->circ_buf);
4217 }
4218 } else {
4219 wait_event_interruptible(instance->wait_queue,
4220 ((me_circ_buf_space
4221 (&instance->circ_buf))
4222 || !(inl(instance->status_reg) &
4223 ME4600_AO_STATUS_BIT_FSM)));
4224
4225 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
4226 PERROR("AO subdevice is not running.\n");
4227 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
4228 } else if (signal_pending(current)) {
4229 PERROR("Wait on values interrupted from signal.\n");
4230 err = ME_ERRNO_SIGNAL;
4231 } else {
4232 *count = me_circ_buf_space(&instance->circ_buf);
4233 }
4234 }
4235
4236 ME_SUBDEVICE_EXIT;
4237
4238 return err;
4239}
4240
4241static void stop_immediately(me4600_ao_subdevice_t * instance)
4242{
4243 unsigned long cpu_flags;
4244 uint32_t tmp;
4245
4246 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4247 tmp = inl(instance->ctrl_reg);
4248 tmp |= ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
4249 outl(tmp, instance->ctrl_reg);
4250
4251 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ;
4252
4253 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4254}
4255
4256static int me4600_ao_io_stream_start(me_subdevice_t * subdevice,
4257 struct file *filep,
4258 int start_mode, int time_out, int flags)
4259{
4260 me4600_ao_subdevice_t *instance;
4261 int err = ME_ERRNO_SUCCESS;
4262 unsigned long cpu_flags = 0;
4263 unsigned long ref;
4264 unsigned long tmp;
4265 unsigned long delay = 0;
4266 wait_queue_head_t queue;
4267
4268 PDEBUG("executed.\n");
4269
4270 instance = (me4600_ao_subdevice_t *) subdevice;
4271
4272 init_waitqueue_head(&queue);
4273
4274 if (time_out < 0) {
4275 PERROR("Invalid timeout specified.\n");
4276 return ME_ERRNO_INVALID_TIMEOUT;
4277 }
4278
4279 if (time_out) {
4280 delay = (time_out * HZ) / 1000;
4281
4282 if (delay == 0)
4283 delay = 1;
4284 }
4285
4286 if (!instance->fifo) {
4287 PERROR("Not a streaming ao.\n");
4288 return ME_ERRNO_NOT_SUPPORTED;
4289 }
4290
4291 ME_SUBDEVICE_ENTER
4292 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4293
4294 tmp = inl(instance->ctrl_reg);
4295
4296 switch (tmp & (ME4600_AO_CTRL_MASK_MODE)) {
4297
4298 case 0: // Single mode
4299 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4300 PERROR("Subdevice is configured in single mode.\n");
4301 err = ME_ERRNO_PREVIOUS_CONFIG;
4302 goto ERROR;
4303
4304 case 1: // Wraparound mode
4305 if (tmp & ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG) { // Normal wraparound with external trigger
4306
4307 if ((inl(instance->status_reg) &
4308 ME4600_AO_STATUS_BIT_FSM)) {
4309 spin_unlock_irqrestore(&instance->
4310 subdevice_lock,
4311 cpu_flags);
4312 PERROR("Conversion is already running.\n");
4313 err = ME_ERRNO_SUBDEVICE_BUSY;
4314 goto ERROR;
4315 }
4316
4317 tmp &=
4318 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4319 ME4600_AO_CTRL_BIT_STOP |
4320 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4321
4322 outl(tmp, instance->ctrl_reg);
4323 spin_unlock_irqrestore(&instance->subdevice_lock,
4324 cpu_flags);
4325
4326 if (start_mode == ME_START_MODE_BLOCKING) {
4327 init_waitqueue_head(&queue);
4328
4329 if (delay) {
4330 ref = jiffies;
4331
4332 while (!
4333 (inl(instance->status_reg) &
4334 ME4600_AO_STATUS_BIT_FSM)) {
4335 interruptible_sleep_on_timeout
4336 (&queue, 1);
4337
4338 if (signal_pending(current)) {
4339 PERROR
4340 ("Wait on start of state machine interrupted.\n");
4341 stop_immediately
4342 (instance);
4343 err = ME_ERRNO_SIGNAL;
4344 goto ERROR;
4345 }
4346
4347 if (((jiffies - ref) >= delay)) {
4348 PERROR
4349 ("Timeout reached.\n");
4350 stop_immediately
4351 (instance);
4352 err = ME_ERRNO_TIMEOUT;
4353 goto ERROR;
4354 }
4355 }
4356 } else {
4357 while (!
4358 (inl(instance->status_reg) &
4359 ME4600_AO_STATUS_BIT_FSM)) {
4360 interruptible_sleep_on_timeout
4361 (&queue, 1);
4362
4363 if (signal_pending(current)) {
4364 PERROR
4365 ("Wait on start of state machine interrupted.\n");
4366 stop_immediately
4367 (instance);
4368 err = ME_ERRNO_SIGNAL;
4369 goto ERROR;
4370 }
4371 }
4372 }
4373 } else if (start_mode == ME_START_MODE_NONBLOCKING) {
4374 } else {
4375 PERROR("Invalid start mode specified.\n");
4376 err = ME_ERRNO_INVALID_START_MODE;
4377 goto ERROR;
4378 }
4379 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x10000 << instance->ao_idx)) { // Synchronous with external trigger
4380
4381 if ((inl(instance->status_reg) &
4382 ME4600_AO_STATUS_BIT_FSM)) {
4383 spin_unlock_irqrestore(&instance->
4384 subdevice_lock,
4385 cpu_flags);
4386 PERROR("Conversion is already running.\n");
4387 err = ME_ERRNO_SUBDEVICE_BUSY;
4388 goto ERROR;
4389 }
4390
4391 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4392 tmp |= ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG;
4393 tmp &=
4394 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4395 ME4600_AO_CTRL_BIT_STOP |
4396 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4397 outl(tmp, instance->ctrl_reg);
4398 spin_unlock_irqrestore(&instance->
4399 subdevice_lock,
4400 cpu_flags);
4401
4402 if (start_mode == ME_START_MODE_BLOCKING) {
4403 init_waitqueue_head(&queue);
4404
4405 if (delay) {
4406 ref = jiffies;
4407
4408 while (!
4409 (inl
4410 (instance->
4411 status_reg) &
4412 ME4600_AO_STATUS_BIT_FSM))
4413 {
4414 interruptible_sleep_on_timeout
4415 (&queue, 1);
4416
4417 if (signal_pending
4418 (current)) {
4419 PERROR
4420 ("Wait on start of state machine interrupted.\n");
4421 stop_immediately
4422 (instance);
4423 err =
4424 ME_ERRNO_SIGNAL;
4425 goto ERROR;
4426 }
4427
4428 if (((jiffies - ref) >=
4429 delay)) {
4430 PERROR
4431 ("Timeout reached.\n");
4432 stop_immediately
4433 (instance);
4434 err =
4435 ME_ERRNO_TIMEOUT;
4436 goto ERROR;
4437 }
4438 }
4439 } else {
4440 while (!
4441 (inl
4442 (instance->
4443 status_reg) &
4444 ME4600_AO_STATUS_BIT_FSM))
4445 {
4446 interruptible_sleep_on_timeout
4447 (&queue, 1);
4448
4449 if (signal_pending
4450 (current)) {
4451 PERROR
4452 ("Wait on start of state machine interrupted.\n");
4453 stop_immediately
4454 (instance);
4455 err =
4456 ME_ERRNO_SIGNAL;
4457 goto ERROR;
4458 }
4459 }
4460 }
4461 } else if (start_mode ==
4462 ME_START_MODE_NONBLOCKING) {
4463 } else {
4464 PERROR
4465 ("Invalid start mode specified.\n");
4466 err = ME_ERRNO_INVALID_START_MODE;
4467 goto ERROR;
4468 }
4469 } else {
4470 tmp &=
4471 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4472 ME4600_AO_CTRL_BIT_STOP |
4473 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4474 outl(tmp, instance->ctrl_reg);
4475 spin_unlock_irqrestore(&instance->
4476 subdevice_lock,
4477 cpu_flags);
4478 }
4479 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x1 << instance->ao_idx)) { // Synchronous wraparound with sw trigger
4480
4481 if ((inl(instance->status_reg) &
4482 ME4600_AO_STATUS_BIT_FSM)) {
4483 spin_unlock_irqrestore(&instance->
4484 subdevice_lock,
4485 cpu_flags);
4486 PERROR("Conversion is already running.\n");
4487 err = ME_ERRNO_SUBDEVICE_BUSY;
4488 goto ERROR;
4489 }
4490
4491 tmp &=
4492 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4493 ME4600_AO_CTRL_BIT_STOP |
4494 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4495
4496 outl(tmp, instance->ctrl_reg);
4497
4498 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4499 outl(0x8000, instance->single_reg);
4500 instance->single_value = 0x8000;
4501 }
4502
4503 spin_unlock_irqrestore(&instance->subdevice_lock,
4504 cpu_flags);
4505 } else { // Software start
4506
4507 if ((inl(instance->status_reg) &
4508 ME4600_AO_STATUS_BIT_FSM)) {
4509 spin_unlock_irqrestore(&instance->
4510 subdevice_lock,
4511 cpu_flags);
4512 PERROR("Conversion is already running.\n");
4513 err = ME_ERRNO_SUBDEVICE_BUSY;
4514 goto ERROR;
4515 }
4516
4517 tmp &=
4518 ~(ME4600_AO_CTRL_BIT_ENABLE_IRQ |
4519 ME4600_AO_CTRL_BIT_STOP |
4520 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4521
4522 outl(tmp, instance->ctrl_reg);
4523
4524 outl(0x8000, instance->single_reg);
4525 instance->single_value = 0x8000;
4526
4527 spin_unlock_irqrestore(&instance->subdevice_lock,
4528 cpu_flags);
4529 }
4530
4531 break;
4532
4533 case 2: // Continuous mode
4534 if (tmp & ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG) { // Externally triggered
4535
4536 if ((inl(instance->status_reg) &
4537 ME4600_AO_STATUS_BIT_FSM)) {
4538 spin_unlock_irqrestore(&instance->
4539 subdevice_lock,
4540 cpu_flags);
4541 PERROR("Conversion is already running.\n");
4542 err = ME_ERRNO_SUBDEVICE_BUSY;
4543 goto ERROR;
4544 }
4545
4546 tmp &=
4547 ~(ME4600_AO_CTRL_BIT_STOP |
4548 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4549 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4550 outl(tmp, instance->ctrl_reg);
4551 instance->wrap_remaining = instance->wrap_count;
4552 instance->circ_buf.tail = 0;
4553 spin_unlock_irqrestore(&instance->subdevice_lock,
4554 cpu_flags);
4555
4556 if (start_mode == ME_START_MODE_BLOCKING) {
4557 init_waitqueue_head(&queue);
4558
4559 if (delay) {
4560 ref = jiffies;
4561
4562 while (!
4563 (inl(instance->status_reg) &
4564 ME4600_AO_STATUS_BIT_FSM)) {
4565 interruptible_sleep_on_timeout
4566 (&queue, 1);
4567
4568 if (signal_pending(current)) {
4569 PERROR
4570 ("Wait on start of state machine interrupted.\n");
4571 stop_immediately
4572 (instance);
4573 err = ME_ERRNO_SIGNAL;
4574 goto ERROR;
4575 }
4576
4577 if (((jiffies - ref) >= delay)) {
4578 PERROR
4579 ("Timeout reached.\n");
4580 stop_immediately
4581 (instance);
4582 err = ME_ERRNO_TIMEOUT;
4583 goto ERROR;
4584 }
4585 }
4586 } else {
4587 while (!
4588 (inl(instance->status_reg) &
4589 ME4600_AO_STATUS_BIT_FSM)) {
4590 interruptible_sleep_on_timeout
4591 (&queue, 1);
4592
4593 if (signal_pending(current)) {
4594 PERROR
4595 ("Wait on start of state machine interrupted.\n");
4596 stop_immediately
4597 (instance);
4598 err = ME_ERRNO_SIGNAL;
4599 goto ERROR;
4600 }
4601 }
4602 }
4603 } else if (start_mode == ME_START_MODE_NONBLOCKING) {
4604 /* Do nothing */
4605 } else {
4606 PERROR("Invalid start mode specified.\n");
4607 stop_immediately(instance);
4608 err = ME_ERRNO_INVALID_START_MODE;
4609 goto ERROR;
4610 }
4611 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x10000 << instance->ao_idx)) { // Synchronous with external trigger
4612
4613 if ((inl(instance->status_reg) &
4614 ME4600_AO_STATUS_BIT_FSM)) {
4615 spin_unlock_irqrestore(&instance->
4616 subdevice_lock,
4617 cpu_flags);
4618 PERROR("Conversion is already running.\n");
4619 err = ME_ERRNO_SUBDEVICE_BUSY;
4620 goto ERROR;
4621 }
4622
4623 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4624 tmp |=
4625 ME4600_AO_CTRL_BIT_ENABLE_EX_TRIG |
4626 ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4627 tmp &=
4628 ~(ME4600_AO_CTRL_BIT_STOP |
4629 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4630 outl(tmp, instance->ctrl_reg);
4631 instance->wrap_remaining = instance->wrap_count;
4632 instance->circ_buf.tail = 0;
4633
4634 spin_unlock_irqrestore(&instance->
4635 subdevice_lock,
4636 cpu_flags);
4637
4638 if (start_mode == ME_START_MODE_BLOCKING) {
4639 init_waitqueue_head(&queue);
4640
4641 if (delay) {
4642 ref = jiffies;
4643
4644 while (!
4645 (inl
4646 (instance->
4647 status_reg) &
4648 ME4600_AO_STATUS_BIT_FSM))
4649 {
4650 interruptible_sleep_on_timeout
4651 (&queue, 1);
4652
4653 if (signal_pending
4654 (current)) {
4655 PERROR
4656 ("Wait on start of state machine interrupted.\n");
4657 stop_immediately
4658 (instance);
4659 err =
4660 ME_ERRNO_SIGNAL;
4661 goto ERROR;
4662 }
4663
4664 if (((jiffies - ref) >=
4665 delay)) {
4666 PERROR
4667 ("Timeout reached.\n");
4668 stop_immediately
4669 (instance);
4670 err =
4671 ME_ERRNO_TIMEOUT;
4672 goto ERROR;
4673 }
4674 }
4675 } else {
4676 while (!
4677 (inl
4678 (instance->
4679 status_reg) &
4680 ME4600_AO_STATUS_BIT_FSM))
4681 {
4682 interruptible_sleep_on_timeout
4683 (&queue, 1);
4684
4685 if (signal_pending
4686 (current)) {
4687 PERROR
4688 ("Wait on start of state machine interrupted.\n");
4689 stop_immediately
4690 (instance);
4691 err =
4692 ME_ERRNO_SIGNAL;
4693 goto ERROR;
4694 }
4695 }
4696 }
4697 } else if (start_mode ==
4698 ME_START_MODE_NONBLOCKING) {
4699 } else {
4700 PERROR
4701 ("Invalid start mode specified.\n");
4702 stop_immediately(instance);
4703 err = ME_ERRNO_INVALID_START_MODE;
4704 goto ERROR;
4705 }
4706 } else {
4707 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4708 tmp &=
4709 ~(ME4600_AO_CTRL_BIT_STOP |
4710 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4711 outl(tmp, instance->ctrl_reg);
4712 instance->wrap_remaining = instance->wrap_count;
4713 instance->circ_buf.tail = 0;
4714 spin_unlock_irqrestore(&instance->
4715 subdevice_lock,
4716 cpu_flags);
4717 }
4718 } else if ((inl(instance->preload_reg) & (0x10001 << instance->ao_idx)) == (0x1 << instance->ao_idx)) { // Synchronous wraparound with sw trigger
4719
4720 if ((inl(instance->status_reg) &
4721 ME4600_AO_STATUS_BIT_FSM)) {
4722 spin_unlock_irqrestore(&instance->
4723 subdevice_lock,
4724 cpu_flags);
4725 PERROR("Conversion is already running.\n");
4726 err = ME_ERRNO_SUBDEVICE_BUSY;
4727 goto ERROR;
4728 }
4729
4730 tmp &=
4731 ~(ME4600_AO_CTRL_BIT_STOP |
4732 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4733 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4734 instance->wrap_remaining = instance->wrap_count;
4735 instance->circ_buf.tail = 0;
4736 PDEBUG("CTRL Reg = 0x%X.\n", inl(instance->ctrl_reg));
4737 outl(tmp, instance->ctrl_reg);
4738
4739 if (flags & ME_IO_STREAM_START_TYPE_TRIG_SYNCHRONOUS) {
4740 outl(0x8000, instance->single_reg);
4741 instance->single_value = 0x8000;
4742 }
4743
4744 spin_unlock_irqrestore(&instance->subdevice_lock,
4745 cpu_flags);
4746 } else { // Software start
4747
4748 if ((inl(instance->status_reg) &
4749 ME4600_AO_STATUS_BIT_FSM)) {
4750 spin_unlock_irqrestore(&instance->
4751 subdevice_lock,
4752 cpu_flags);
4753 PERROR("Conversion is already running.\n");
4754 err = ME_ERRNO_SUBDEVICE_BUSY;
4755 goto ERROR;
4756 }
4757
4758 tmp &=
4759 ~(ME4600_AO_CTRL_BIT_STOP |
4760 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP);
4761
4762 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
4763 outl(tmp, instance->ctrl_reg);
4764 outl(0x8000, instance->single_reg);
4765 instance->single_value = 0x8000;
4766 instance->wrap_remaining = instance->wrap_count;
4767 instance->circ_buf.tail = 0;
4768 spin_unlock_irqrestore(&instance->subdevice_lock,
4769 cpu_flags);
4770 }
4771
4772 break;
4773
4774 default:
4775 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4776 PERROR("Invalid mode configured.\n");
4777 err = ME_ERRNO_INTERNAL;
4778 goto ERROR;
4779 }
4780
4781 ERROR:
4782
4783 ME_SUBDEVICE_EXIT;
4784
4785 return err;
4786}
4787
4788static int me4600_ao_io_stream_status(me_subdevice_t * subdevice,
4789 struct file *filep,
4790 int wait,
4791 int *status, int *values, int flags)
4792{
4793 me4600_ao_subdevice_t *instance;
4794 int err = ME_ERRNO_SUCCESS;
4795 wait_queue_head_t queue;
4796
4797 PDEBUG("executed.\n");
4798
4799 instance = (me4600_ao_subdevice_t *) subdevice;
4800
4801 init_waitqueue_head(&queue);
4802
4803 if (!instance->fifo) {
4804 PERROR("Not a streaming ao.\n");
4805 return ME_ERRNO_NOT_SUPPORTED;
4806 }
4807
4808 ME_SUBDEVICE_ENTER;
4809
4810 if (wait == ME_WAIT_NONE) {
4811 *status =
4812 (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ?
4813 ME_STATUS_BUSY : ME_STATUS_IDLE;
4814 *values = me_circ_buf_space(&instance->circ_buf);
4815 } else if (wait == ME_WAIT_IDLE) {
4816 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) {
4817 interruptible_sleep_on_timeout(&queue, 1);
4818
4819 if (instance->flags & ME4600_AO_FLAGS_BROKEN_PIPE) {
4820 PERROR("Output stream was interrupted.\n");
4821 *status = ME_STATUS_ERROR;
4822 err = ME_ERRNO_SUCCESS;
4823 goto ERROR;
4824 }
4825
4826 if (signal_pending(current)) {
4827 PERROR
4828 ("Wait on state machine interrupted by signal.\n");
4829 *status = ME_STATUS_INVALID;
4830 err = ME_ERRNO_SIGNAL;
4831 goto ERROR;
4832 }
4833 }
4834
4835 *status = ME_STATUS_IDLE;
4836
4837 *values = me_circ_buf_space(&instance->circ_buf);
4838 } else {
4839 PERROR("Invalid wait argument specified.\n");
4840 *status = ME_STATUS_INVALID;
4841 err = ME_ERRNO_INVALID_WAIT;
4842 goto ERROR;
4843 }
4844
4845 ERROR:
4846
4847 ME_SUBDEVICE_EXIT;
4848
4849 return err;
4850}
4851
4852static int me4600_ao_io_stream_stop(me_subdevice_t * subdevice,
4853 struct file *filep,
4854 int stop_mode, int flags)
4855{
4856 int err = ME_ERRNO_SUCCESS;
4857 me4600_ao_subdevice_t *instance;
4858 unsigned long cpu_flags;
4859 unsigned long tmp;
4860
4861 PDEBUG("executed.\n");
4862
4863 instance = (me4600_ao_subdevice_t *) subdevice;
4864
4865 if (!instance->fifo) {
4866 PERROR("Not a streaming ao.\n");
4867 return ME_ERRNO_NOT_SUPPORTED;
4868 }
4869
4870 ME_SUBDEVICE_ENTER;
4871
4872 if (stop_mode == ME_STOP_MODE_IMMEDIATE) {
4873 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4874 tmp = inl(instance->ctrl_reg);
4875 tmp |=
4876 ME4600_AO_CTRL_BIT_STOP | ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
4877 outl(tmp, instance->ctrl_reg);
4878
4879 while (inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM) ;
4880
4881 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4882 } else if (stop_mode == ME_STOP_MODE_LAST_VALUE) {
4883 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4884 tmp = inl(instance->ctrl_reg);
4885 tmp |= ME4600_AO_CTRL_BIT_STOP;
4886 outl(tmp, instance->ctrl_reg);
4887 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
4888 } else {
4889 PERROR("Invalid stop mode specified.\n");
4890 err = ME_ERRNO_INVALID_STOP_MODE;
4891 goto ERROR;
4892 }
4893
4894 ERROR:
4895
4896 ME_SUBDEVICE_EXIT;
4897
4898 return err;
4899}
4900
4901static int me4600_ao_io_stream_write(me_subdevice_t * subdevice,
4902 struct file *filep,
4903 int write_mode,
4904 int *values, int *count, int flags)
4905{
4906 int err = ME_ERRNO_SUCCESS;
4907 me4600_ao_subdevice_t *instance;
4908 unsigned long tmp;
4909 int i;
4910 int value;
4911 int cnt = *count;
4912 int c;
4913 int k;
4914 int ret = 0;
4915 unsigned long cpu_flags = 0;
4916
4917 PDEBUG("executed.\n");
4918
4919 instance = (me4600_ao_subdevice_t *) subdevice;
4920
4921 if (!instance->fifo) {
4922 PERROR("Not a streaming ao.\n");
4923 return ME_ERRNO_NOT_SUPPORTED;
4924 }
4925
4926 ME_SUBDEVICE_ENTER;
4927
4928 if (*count <= 0) {
4929 PERROR("Invalid count of values specified.\n");
4930 err = ME_ERRNO_INVALID_VALUE_COUNT;
4931 goto ERROR;
4932 }
4933
4934 spin_lock_irqsave(&instance->subdevice_lock, cpu_flags);
4935
4936 tmp = inl(instance->ctrl_reg);
4937
4938 switch (tmp & 0x3) {
4939
4940 case 1: // Wraparound mode
4941 if (instance->bosch_fw) { // Bosch firmware
4942 spin_unlock_irqrestore(&instance->subdevice_lock,
4943 cpu_flags);
4944
4945 if (cnt != 7) {
4946 PERROR
4947 ("Invalid count of values specified. 7 expected.\n");
4948 err = ME_ERRNO_INVALID_VALUE_COUNT;
4949 goto ERROR;
4950 }
4951
4952 for (i = 0; i < 7; i++) {
4953 if (get_user(value, values)) {
4954 PERROR
4955 ("Can't copy value from user space.\n");
4956 err = ME_ERRNO_INTERNAL;
4957 goto ERROR;
4958 }
4959
4960 if (i == 0) {
4961 /* Maximum voltage */
4962 value <<= 16;
4963 value |=
4964 inl(instance->reg_base +
4965 0xD4) & 0xFFFF;
4966 outl(value, instance->reg_base + 0xD4);
4967 } else if (i == 1) {
4968 /* Minimum voltage */
4969 value &= 0xFFFF;
4970 value |=
4971 inl(instance->reg_base +
4972 0xD4) & 0xFFFF0000;
4973 outl(value, instance->reg_base + 0xD4);
4974 } else if (i == 2) {
4975 /* Delta up */
4976 value <<= 16;
4977 value |=
4978 inl(instance->reg_base +
4979 0xD8) & 0xFFFF;
4980 outl(value, instance->reg_base + 0xD8);
4981 } else if (i == 3) {
4982 /* Delta down */
4983 value &= 0xFFFF;
4984 value |=
4985 inl(instance->reg_base +
4986 0xD8) & 0xFFFF0000;
4987 outl(value, instance->reg_base + 0xD8);
4988 } else if (i == 4) {
4989 /* Start value */
4990 outl(value, instance->reg_base + 0xDC);
4991 } else if (i == 5) {
4992 /* Invert */
4993 if (value) {
4994 value = inl(instance->ctrl_reg);
4995 value |= 0x100;
4996 outl(value, instance->ctrl_reg);
4997 } else {
4998 value = inl(instance->ctrl_reg);
4999 value &= ~0x100;
5000 outl(value, instance->ctrl_reg);
5001 }
5002 } else if (i == 6) {
5003 /* Timer for positive ramp */
5004 outl(value, instance->reg_base + 0xE0);
5005 }
5006
5007 values++;
5008 }
5009 } else { // Normal firmware
5010 PDEBUG("Write for wraparound mode.\n");
5011
5012 if (inl(instance->status_reg) &
5013 ME4600_AO_STATUS_BIT_FSM) {
5014 spin_unlock_irqrestore(&instance->
5015 subdevice_lock,
5016 cpu_flags);
5017 PERROR
5018 ("There is already a conversion running.\n");
5019 err = ME_ERRNO_SUBDEVICE_BUSY;
5020 goto ERROR;
5021 }
5022
5023 tmp |= ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
5024 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_FIFO;
5025 outl(tmp, instance->ctrl_reg);
5026 tmp |= ME4600_AO_CTRL_BIT_ENABLE_FIFO;
5027
5028 if ((*count > ME4600_AO_FIFO_COUNT) ||
5029 ((instance->
5030 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5031 ME4600_AO_FLAGS_SW_WRAP_MODE_FIN)) {
5032 tmp &=
5033 ~(ME4600_AO_CTRL_BIT_MODE_0 |
5034 ME4600_AO_CTRL_BIT_MODE_1);
5035 tmp |= ME4600_AO_CTRL_BIT_MODE_1;
5036 }
5037
5038 outl(tmp, instance->ctrl_reg);
5039 spin_unlock_irqrestore(&instance->subdevice_lock,
5040 cpu_flags);
5041
5042 if ((*count <= ME4600_AO_FIFO_COUNT) &&
5043 ((instance->
5044 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5045 ME4600_AO_FLAGS_SW_WRAP_MODE_INF)) {
5046 for (i = 0; i < *count; i++) {
5047 if (get_user(value, values + i)) {
5048 PERROR
5049 ("Cannot copy value from user space.\n");
5050 err = ME_ERRNO_INTERNAL;
5051 goto ERROR;
5052 }
5053
5054 if (instance->ao_idx & 0x1)
5055 value <<= 16;
5056
5057 outl(value, instance->fifo_reg);
5058 }
5059 } else if ((*count <= ME4600_AO_CIRC_BUF_COUNT) &&
5060 ((instance->
5061 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK)
5062 == ME4600_AO_FLAGS_SW_WRAP_MODE_INF)) {
5063 for (i = 0; i < *count; i++) {
5064 if (get_user(value, values + i)) {
5065 PERROR
5066 ("Cannot copy value from user space.\n");
5067 err = ME_ERRNO_INTERNAL;
5068 goto ERROR;
5069 }
5070
5071 instance->circ_buf.buf[i] = value; /* Used to hold the values. */
5072 }
5073
5074 instance->circ_buf.tail = 0; /* Used as the current read position. */
5075 instance->circ_buf.head = *count; /* Used as the buffer size. */
5076
5077 /* Preload the FIFO. */
5078
5079 for (i = 0; i < ME4600_AO_FIFO_COUNT;
5080 i++, instance->circ_buf.tail++) {
5081 if (instance->circ_buf.tail >=
5082 instance->circ_buf.head)
5083 instance->circ_buf.tail = 0;
5084
5085 if (instance->ao_idx & 0x1)
5086 outl(instance->circ_buf.
5087 buf[instance->circ_buf.
5088 tail] << 16,
5089 instance->fifo_reg);
5090 else
5091 outl(instance->circ_buf.
5092 buf[instance->circ_buf.
5093 tail],
5094 instance->fifo_reg);
5095 }
5096 } else if ((*count <= ME4600_AO_CIRC_BUF_COUNT) &&
5097 ((instance->
5098 flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK)
5099 == ME4600_AO_FLAGS_SW_WRAP_MODE_FIN)) {
5100 unsigned int preload_count;
5101
5102 for (i = 0; i < *count; i++) {
5103 if (get_user(value, values + i)) {
5104 PERROR
5105 ("Cannot copy value from user space.\n");
5106 err = ME_ERRNO_INTERNAL;
5107 goto ERROR;
5108 }
5109
5110 instance->circ_buf.buf[i] = value; /* Used to hold the values. */
5111 }
5112
5113 instance->circ_buf.tail = 0; /* Used as the current read position. */
5114 instance->circ_buf.head = *count; /* Used as the buffer size. */
5115
5116 /* Try to preload the whole FIFO. */
5117 preload_count = ME4600_AO_FIFO_COUNT;
5118
5119 if (preload_count > instance->wrap_count)
5120 preload_count = instance->wrap_count;
5121
5122 /* Preload the FIFO. */
5123 for (i = 0; i < preload_count;
5124 i++, instance->circ_buf.tail++) {
5125 if (instance->circ_buf.tail >=
5126 instance->circ_buf.head)
5127 instance->circ_buf.tail = 0;
5128
5129 if (instance->ao_idx & 0x1)
5130 outl(instance->circ_buf.
5131 buf[instance->circ_buf.
5132 tail] << 16,
5133 instance->fifo_reg);
5134 else
5135 outl(instance->circ_buf.
5136 buf[instance->circ_buf.
5137 tail],
5138 instance->fifo_reg);
5139 }
5140
5141 instance->wrap_remaining =
5142 instance->wrap_count - preload_count;
5143 } else {
5144 PERROR("To many values written.\n");
5145 err = ME_ERRNO_INVALID_VALUE_COUNT;
5146 goto ERROR;
5147 }
5148 }
5149
5150 break;
5151
5152 case 2: // Continuous mode
5153 /* Check if in SW wrapround mode */
5154 if (instance->flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) {
5155 spin_unlock_irqrestore(&instance->subdevice_lock,
5156 cpu_flags);
5157 PERROR("Subdevice is configured SW wrapround mode.\n");
5158 err = ME_ERRNO_PREVIOUS_CONFIG;
5159 goto ERROR;
5160 }
5161
5162 switch (write_mode) {
5163
5164 case ME_WRITE_MODE_BLOCKING:
5165 spin_unlock_irqrestore(&instance->subdevice_lock,
5166 cpu_flags);
5167
5168 PDEBUG("Write for blocking continuous mode.\n");
5169
5170 while (cnt > 0) {
5171 wait_event_interruptible(instance->wait_queue,
5172 (c =
5173 me_circ_buf_space_to_end
5174 (&instance->
5175 circ_buf)));
5176
5177 if (instance->
5178 flags & ME4600_AO_FLAGS_BROKEN_PIPE) {
5179 PERROR
5180 ("Broken pipe in blocking write.\n");
5181 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
5182 goto ERROR;
5183 } else if (signal_pending(current)) {
5184 PERROR
5185 ("Wait for free buffer interrupted from signal.\n");
5186 err = ME_ERRNO_SIGNAL;
5187 goto ERROR;
5188 }
5189
5190 PDEBUG("Space to end = %d.\n", c);
5191
5192 /* Only able to write size of free buffer or size of count */
5193
5194 if (cnt < c)
5195 c = cnt;
5196 k = sizeof(int) * c;
5197 k -= copy_from_user(instance->circ_buf.buf +
5198 instance->circ_buf.head,
5199 values, k);
5200 c = k / sizeof(int);
5201
5202 PDEBUG("Copy %d values from user space.\n", c);
5203
5204 if (!c) {
5205 PERROR
5206 ("Cannot copy values from user space.\n");
5207 err = ME_ERRNO_INTERNAL;
5208 goto ERROR;
5209 }
5210
5211 instance->circ_buf.head =
5212 (instance->circ_buf.head +
5213 c) & (instance->circ_buf.mask);
5214
5215 values += c;
5216 cnt -= c;
5217 ret += c;
5218
5219 /* Values are now available so enable interrupts */
5220 spin_lock_irqsave(&instance->subdevice_lock,
5221 cpu_flags);
5222
5223 if (me_circ_buf_space(&instance->circ_buf)) {
5224 tmp = inl(instance->ctrl_reg);
5225 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5226 outl(tmp, instance->ctrl_reg);
5227 }
5228
5229 spin_unlock_irqrestore(&instance->
5230 subdevice_lock,
5231 cpu_flags);
5232 }
5233
5234 *count = ret;
5235
5236 break;
5237
5238 case ME_WRITE_MODE_NONBLOCKING:
5239 spin_unlock_irqrestore(&instance->subdevice_lock,
5240 cpu_flags);
5241
5242 PDEBUG("Write for non blocking continuous mode.\n");
5243
5244 while (cnt > 0) {
5245 if (instance->
5246 flags & ME4600_AO_FLAGS_BROKEN_PIPE) {
5247 PERROR
5248 ("ME4600:Broken pipe in nonblocking write.\n");
5249 err = ME_ERRNO_SUBDEVICE_NOT_RUNNING;
5250 goto ERROR;
5251 }
5252
5253 c = me_circ_buf_space_to_end(&instance->
5254 circ_buf);
5255
5256 if (!c) {
5257 PDEBUG
5258 ("Returning from nonblocking write.\n");
5259 break;
5260 }
5261
5262 PDEBUG("Space to end = %d.\n", c);
5263
5264 /* Only able to write size of free buffer or size of count */
5265
5266 if (cnt < c)
5267 c = cnt;
5268 k = sizeof(int) * c;
5269 k -= copy_from_user(instance->circ_buf.buf +
5270 instance->circ_buf.head,
5271 values, k);
5272 c = k / sizeof(int);
5273
5274 PDEBUG("Copy %d values from user space.\n", c);
5275
5276 if (!c) {
5277 PERROR
5278 ("Cannot copy values from user space.\n");
5279 err = ME_ERRNO_INTERNAL;
5280 goto ERROR;
5281 }
5282
5283 instance->circ_buf.head =
5284 (instance->circ_buf.head +
5285 c) & (instance->circ_buf.mask);
5286
5287 values += c;
5288 cnt -= c;
5289 ret += c;
5290
5291 /* Values are now available so enable interrupts */
5292 spin_lock_irqsave(&instance->subdevice_lock,
5293 cpu_flags);
5294
5295 if (me_circ_buf_space(&instance->circ_buf)) {
5296 tmp = inl(instance->ctrl_reg);
5297 tmp |= ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5298 outl(tmp, instance->ctrl_reg);
5299 }
5300
5301 spin_unlock_irqrestore(&instance->
5302 subdevice_lock,
5303 cpu_flags);
5304 }
5305
5306 *count = ret;
5307
5308 break;
5309
5310 case ME_WRITE_MODE_PRELOAD:
5311 PDEBUG("Write for preload continuous mode.\n");
5312
5313 if ((inl(instance->status_reg) &
5314 ME4600_AO_STATUS_BIT_FSM)) {
5315 spin_unlock_irqrestore(&instance->
5316 subdevice_lock,
5317 cpu_flags);
5318 PERROR
5319 ("Can't Preload DAC FIFO while conversion is running.\n");
5320 err = ME_ERRNO_SUBDEVICE_BUSY;
5321 goto ERROR;
5322 }
5323
5324 tmp = inl(instance->ctrl_reg);
5325
5326 tmp |=
5327 ME4600_AO_CTRL_BIT_STOP |
5328 ME4600_AO_CTRL_BIT_IMMEDIATE_STOP;
5329 outl(tmp, instance->ctrl_reg);
5330 tmp &=
5331 ~(ME4600_AO_CTRL_BIT_ENABLE_FIFO |
5332 ME4600_AO_CTRL_BIT_ENABLE_IRQ);
5333 outl(tmp, instance->ctrl_reg);
5334 tmp |= ME4600_AO_CTRL_BIT_ENABLE_FIFO;
5335 outl(tmp, instance->ctrl_reg);
5336
5337 instance->circ_buf.head = 0;
5338 instance->circ_buf.tail = 0;
5339 instance->flags &= ~ME4600_AO_FLAGS_BROKEN_PIPE;
5340
5341 spin_unlock_irqrestore(&instance->subdevice_lock,
5342 cpu_flags);
5343
5344 c = ME4600_AO_FIFO_COUNT;
5345
5346 if (cnt < c)
5347 c = cnt;
5348
5349 for (i = 0; i < c; i++) {
5350 if (get_user(value, values)) {
5351 PERROR
5352 ("Can't copy value from user space.\n");
5353 err = ME_ERRNO_INTERNAL;
5354 goto ERROR;
5355 }
5356
5357 if (instance->ao_idx & 0x1)
5358 value <<= 16;
5359
5360 outl(value, instance->fifo_reg);
5361
5362 values++;
5363 }
5364
5365 cnt -= c;
5366
5367 ret += c;
5368
5369 PDEBUG("Wrote %d values to fifo.\n", c);
5370
5371 while (1) {
5372 c = me_circ_buf_space_to_end(&instance->
5373 circ_buf);
5374
5375 if (c == 0)
5376 break;
5377
5378 if (cnt < c)
5379 c = cnt;
5380
5381 if (c <= 0)
5382 break;
5383
5384 k = sizeof(int) * c;
5385
5386 k -= copy_from_user(instance->circ_buf.buf +
5387 instance->circ_buf.head,
5388 values, k);
5389
5390 c = k / sizeof(int);
5391
5392 PDEBUG("Wrote %d values to circular buffer.\n",
5393 c);
5394
5395 if (!c) {
5396 PERROR
5397 ("Can't copy values from user space.\n");
5398 err = ME_ERRNO_INTERNAL;
5399 goto ERROR;
5400 }
5401
5402 instance->circ_buf.head =
5403 (instance->circ_buf.head +
5404 c) & (instance->circ_buf.mask);
5405
5406 values += c;
5407 cnt -= c;
5408 ret += c;
5409 }
5410
5411 *count = ret;
5412
5413 break;
5414
5415 default:
5416 spin_unlock_irqrestore(&instance->subdevice_lock,
5417 cpu_flags);
5418
5419 PERROR("Invalid write mode specified.\n");
5420
5421 err = ME_ERRNO_INVALID_WRITE_MODE;
5422
5423 goto ERROR;
5424 }
5425
5426 break;
5427
5428 default: // Single mode of invalid
5429 spin_unlock_irqrestore(&instance->subdevice_lock, cpu_flags);
5430 PERROR("Subdevice is configured in single mode.\n");
5431 err = ME_ERRNO_PREVIOUS_CONFIG;
5432 goto ERROR;
5433 }
5434
5435 ERROR:
5436
5437 ME_SUBDEVICE_EXIT;
5438
5439 return err;
5440}
5441
5442#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)
5443static irqreturn_t me4600_ao_isr(int irq, void *dev_id)
5444#else
5445static irqreturn_t me4600_ao_isr(int irq, void *dev_id, struct pt_regs *regs)
5446#endif
5447{
5448 unsigned long tmp;
5449 int value;
5450 me4600_ao_subdevice_t *instance = dev_id;
5451 int i;
5452 int c = 0;
5453 int c1 = 0;
5454
5455 if (irq != instance->irq) {
5456 PDEBUG("Incorrect interrupt num: %d.\n", irq);
5457 return IRQ_NONE;
5458 }
5459
5460 if (!((0x1 << (instance->ao_idx + 3)) & inl(instance->irq_status_reg))) {
5461 return IRQ_NONE;
5462 }
5463
5464 PDEBUG("executed.\n");
5465
5466 tmp = inl(instance->status_reg);
5467
5468 if (!(tmp & ME4600_AO_STATUS_BIT_EF) &&
5469 (tmp & ME4600_AO_STATUS_BIT_HF) &&
5470 (tmp & ME4600_AO_STATUS_BIT_HF)) {
5471 c = ME4600_AO_FIFO_COUNT;
5472 PDEBUG("Fifo empty.\n");
5473 } else if ((tmp & ME4600_AO_STATUS_BIT_EF) &&
5474 (tmp & ME4600_AO_STATUS_BIT_HF) &&
5475 (tmp & ME4600_AO_STATUS_BIT_HF)) {
5476 c = ME4600_AO_FIFO_COUNT / 2;
5477 PDEBUG("Fifo under half full.\n");
5478 } else {
5479 c = 0;
5480 PDEBUG("Fifo full.\n");
5481 }
5482
5483 PDEBUG("Try to write 0x%04X values.\n", c);
5484
5485 if ((instance->flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5486 ME4600_AO_FLAGS_SW_WRAP_MODE_INF) {
5487 while (c) {
5488 c1 = c;
5489
5490 if (c1 > (instance->circ_buf.head - instance->circ_buf.tail)) /* Only up to the end of the buffer */
5491 c1 = (instance->circ_buf.head -
5492 instance->circ_buf.tail);
5493
5494 /* Write the values to the FIFO */
5495 for (i = 0; i < c1; i++, instance->circ_buf.tail++, c--) {
5496 if (instance->ao_idx & 0x1)
5497 outl(instance->circ_buf.
5498 buf[instance->circ_buf.tail] << 16,
5499 instance->fifo_reg);
5500 else
5501 outl(instance->circ_buf.
5502 buf[instance->circ_buf.tail],
5503 instance->fifo_reg);
5504 }
5505
5506 if (instance->circ_buf.tail >= instance->circ_buf.head) /* Start from beginning */
5507 instance->circ_buf.tail = 0;
5508 }
5509
5510 spin_lock(&instance->subdevice_lock);
5511
5512 tmp = inl(instance->ctrl_reg);
5513 tmp |= ME4600_AO_CTRL_BIT_RESET_IRQ;
5514 outl(tmp, instance->ctrl_reg);
5515 tmp &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
5516 outl(tmp, instance->ctrl_reg);
5517
5518 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
5519 PERROR("Broken pipe.\n");
5520 instance->flags |= ME4600_AO_FLAGS_BROKEN_PIPE;
5521 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5522 outl(tmp, instance->ctrl_reg);
5523 }
5524
5525 spin_unlock(&instance->subdevice_lock);
5526 } else if ((instance->flags & ME4600_AO_FLAGS_SW_WRAP_MODE_MASK) ==
5527 ME4600_AO_FLAGS_SW_WRAP_MODE_FIN) {
5528 while (c && instance->wrap_remaining) {
5529 c1 = c;
5530
5531 if (c1 > (instance->circ_buf.head - instance->circ_buf.tail)) /* Only up to the end of the buffer */
5532 c1 = (instance->circ_buf.head -
5533 instance->circ_buf.tail);
5534
5535 if (c1 > instance->wrap_remaining) /* Only up to count of user defined number of values */
5536 c1 = instance->wrap_remaining;
5537
5538 /* Write the values to the FIFO */
5539 for (i = 0; i < c1;
5540 i++, instance->circ_buf.tail++, c--,
5541 instance->wrap_remaining--) {
5542 if (instance->ao_idx & 0x1)
5543 outl(instance->circ_buf.
5544 buf[instance->circ_buf.tail] << 16,
5545 instance->fifo_reg);
5546 else
5547 outl(instance->circ_buf.
5548 buf[instance->circ_buf.tail],
5549 instance->fifo_reg);
5550 }
5551
5552 if (instance->circ_buf.tail >= instance->circ_buf.head) /* Start from beginning */
5553 instance->circ_buf.tail = 0;
5554 }
5555
5556 spin_lock(&instance->subdevice_lock);
5557
5558 tmp = inl(instance->ctrl_reg);
5559
5560 if (!instance->wrap_remaining) {
5561 PDEBUG("Finite SW wraparound done.\n");
5562 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5563 }
5564
5565 tmp |= ME4600_AO_CTRL_BIT_RESET_IRQ;
5566
5567 outl(tmp, instance->ctrl_reg);
5568 tmp &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
5569 outl(tmp, instance->ctrl_reg);
5570
5571 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
5572 PERROR("Broken pipe.\n");
5573 instance->flags |= ME4600_AO_FLAGS_BROKEN_PIPE;
5574 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5575 outl(tmp, instance->ctrl_reg);
5576 }
5577
5578 spin_unlock(&instance->subdevice_lock);
5579
5580 } else { /* Regular continuous mode */
5581
5582 while (1) {
5583 c1 = me_circ_buf_values_to_end(&instance->circ_buf);
5584 PDEBUG("Values to end = %d.\n", c1);
5585
5586 if (c1 > c)
5587 c1 = c;
5588
5589 if (c1 <= 0) {
5590 PDEBUG("Work done or buffer empty.\n");
5591 break;
5592 }
5593
5594 if (instance->ao_idx & 0x1) {
5595 for (i = 0; i < c1; i++) {
5596 value =
5597 *(instance->circ_buf.buf +
5598 instance->circ_buf.tail +
5599 i) << 16;
5600 outl(value, instance->fifo_reg);
5601 }
5602 } else
5603 outsl(instance->fifo_reg,
5604 instance->circ_buf.buf +
5605 instance->circ_buf.tail, c1);
5606
5607 instance->circ_buf.tail =
5608 (instance->circ_buf.tail +
5609 c1) & (instance->circ_buf.mask);
5610
5611 PDEBUG("%d values wrote to port 0x%04X.\n", c1,
5612 instance->fifo_reg);
5613
5614 c -= c1;
5615 }
5616
5617 spin_lock(&instance->subdevice_lock);
5618
5619 tmp = inl(instance->ctrl_reg);
5620
5621 if (!me_circ_buf_values(&instance->circ_buf)) {
5622 PDEBUG
5623 ("Disable Interrupt because no values left in buffer.\n");
5624 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5625 }
5626
5627 tmp |= ME4600_AO_CTRL_BIT_RESET_IRQ;
5628
5629 outl(tmp, instance->ctrl_reg);
5630 tmp &= ~ME4600_AO_CTRL_BIT_RESET_IRQ;
5631 outl(tmp, instance->ctrl_reg);
5632
5633 if (!(inl(instance->status_reg) & ME4600_AO_STATUS_BIT_FSM)) {
5634 PDEBUG("Broken pipe in me4600_ao_isr.\n");
5635 instance->flags |= ME4600_AO_FLAGS_BROKEN_PIPE;
5636 tmp &= ~ME4600_AO_CTRL_BIT_ENABLE_IRQ;
5637 outl(tmp, instance->ctrl_reg);
5638 }
5639
5640 spin_unlock(&instance->subdevice_lock);
5641
5642 wake_up_interruptible(&instance->wait_queue);
5643 }
5644
5645 return IRQ_HANDLED;
5646}
5647
5648static void me4600_ao_destructor(struct me_subdevice *subdevice)
5649{
5650 me4600_ao_subdevice_t *instance;
5651
5652 PDEBUG("executed.\n");
5653
5654 instance = (me4600_ao_subdevice_t *) subdevice;
5655
5656 free_irq(instance->irq, instance);
5657 kfree(instance->circ_buf.buf);
5658 me_subdevice_deinit(&instance->base);
5659 kfree(instance);
5660}
5661
5662me4600_ao_subdevice_t *me4600_ao_constructor(uint32_t reg_base,
5663 spinlock_t * preload_reg_lock,
5664 uint32_t * preload_flags,
5665 int ao_idx, int fifo, int irq)
5666{
5667 me4600_ao_subdevice_t *subdevice;
5668 int err;
5669
5670 PDEBUG("executed.\n");
5671
5672 /* Allocate memory for subdevice instance */
5673 subdevice = kmalloc(sizeof(me4600_ao_subdevice_t), GFP_KERNEL);
5674
5675 if (!subdevice) {
5676 PERROR("Cannot get memory for subdevice instance.\n");
5677 return NULL;
5678 }
5679
5680 memset(subdevice, 0, sizeof(me4600_ao_subdevice_t));
5681
5682 /* Initialize subdevice base class */
5683 err = me_subdevice_init(&subdevice->base);
5684
5685 if (err) {
5686 PERROR("Cannot initialize subdevice base class instance.\n");
5687 kfree(subdevice);
5688 return NULL;
5689 }
5690 // Initialize spin locks.
5691 spin_lock_init(&subdevice->subdevice_lock);
5692
5693 subdevice->preload_reg_lock = preload_reg_lock;
5694 subdevice->preload_flags = preload_flags;
5695
5696 /* Allocate and initialize circular buffer */
5697 subdevice->circ_buf.mask = ME4600_AO_CIRC_BUF_COUNT - 1;
5698 subdevice->circ_buf.buf = kmalloc(ME4600_AO_CIRC_BUF_SIZE, GFP_KERNEL);
5699
5700 if (!subdevice->circ_buf.buf) {
5701 PERROR("Cannot initialize subdevice base class instance.\n");
5702 me_subdevice_deinit((me_subdevice_t *) subdevice);
5703 kfree(subdevice);
5704 return NULL;
5705 }
5706
5707 memset(subdevice->circ_buf.buf, 0, ME4600_AO_CIRC_BUF_SIZE);
5708
5709 subdevice->circ_buf.head = 0;
5710 subdevice->circ_buf.tail = 0;
5711
5712 /* Initialize wait queue */
5713 init_waitqueue_head(&subdevice->wait_queue);
5714
5715 /* Initialize single value to 0V */
5716 subdevice->single_value = 0x8000;
5717
5718 /* Store analog output index */
5719 subdevice->ao_idx = ao_idx;
5720
5721 /* Store if analog output has fifo */
5722 subdevice->fifo = fifo;
5723
5724 /* Initialize registers */
5725
5726 if (ao_idx == 0) {
5727 subdevice->ctrl_reg = reg_base + ME4600_AO_00_CTRL_REG;
5728 subdevice->status_reg = reg_base + ME4600_AO_00_STATUS_REG;
5729 subdevice->fifo_reg = reg_base + ME4600_AO_00_FIFO_REG;
5730 subdevice->single_reg = reg_base + ME4600_AO_00_SINGLE_REG;
5731 subdevice->timer_reg = reg_base + ME4600_AO_00_TIMER_REG;
5732 subdevice->reg_base = reg_base;
5733
5734 if (inl(subdevice->reg_base + ME4600_AO_BOSCH_REG) == 0x20000) {
5735 PINFO("Bosch firmware in use for channel 0.\n");
5736 subdevice->bosch_fw = 1;
5737 } else {
5738 subdevice->bosch_fw = 0;
5739 }
5740 } else if (ao_idx == 1) {
5741 subdevice->ctrl_reg = reg_base + ME4600_AO_01_CTRL_REG;
5742 subdevice->status_reg = reg_base + ME4600_AO_01_STATUS_REG;
5743 subdevice->fifo_reg = reg_base + ME4600_AO_01_FIFO_REG;
5744 subdevice->single_reg = reg_base + ME4600_AO_01_SINGLE_REG;
5745 subdevice->timer_reg = reg_base + ME4600_AO_01_TIMER_REG;
5746 subdevice->reg_base = reg_base;
5747 subdevice->bosch_fw = 0;
5748 } else if (ao_idx == 2) {
5749 subdevice->ctrl_reg = reg_base + ME4600_AO_02_CTRL_REG;
5750 subdevice->status_reg = reg_base + ME4600_AO_02_STATUS_REG;
5751 subdevice->fifo_reg = reg_base + ME4600_AO_02_FIFO_REG;
5752 subdevice->single_reg = reg_base + ME4600_AO_02_SINGLE_REG;
5753 subdevice->timer_reg = reg_base + ME4600_AO_02_TIMER_REG;
5754 subdevice->reg_base = reg_base;
5755 subdevice->bosch_fw = 0;
5756 } else {
5757 subdevice->ctrl_reg = reg_base + ME4600_AO_03_CTRL_REG;
5758 subdevice->status_reg = reg_base + ME4600_AO_03_STATUS_REG;
5759 subdevice->fifo_reg = reg_base + ME4600_AO_03_FIFO_REG;
5760 subdevice->single_reg = reg_base + ME4600_AO_03_SINGLE_REG;
5761 subdevice->timer_reg = reg_base + ME4600_AO_03_TIMER_REG;
5762 subdevice->reg_base = reg_base;
5763 subdevice->bosch_fw = 0;
5764 }
5765
5766 subdevice->irq_status_reg = reg_base + ME4600_IRQ_STATUS_REG;
5767 subdevice->preload_reg = reg_base + ME4600_AO_LOADSETREG_XX;
5768
5769 /* Register interrupt service routine */
5770 subdevice->irq = irq;
5771
5772 if (request_irq
5773 (subdevice->irq, me4600_ao_isr, SA_INTERRUPT | SA_SHIRQ,
5774 ME4600_NAME, subdevice)) {
5775 PERROR("Cannot get interrupt line.\n");
5776 me_subdevice_deinit((me_subdevice_t *) subdevice);
5777 kfree(subdevice->circ_buf.buf);
5778 kfree(subdevice);
5779 return NULL;
5780 }
5781
5782 /* Override base class methods. */
5783 subdevice->base.me_subdevice_destructor = me4600_ao_destructor;
5784 subdevice->base.me_subdevice_io_reset_subdevice =
5785 me4600_ao_io_reset_subdevice;
5786 subdevice->base.me_subdevice_io_single_config =
5787 me4600_ao_io_single_config;
5788 subdevice->base.me_subdevice_io_single_read = me4600_ao_io_single_read;
5789 subdevice->base.me_subdevice_io_single_write =
5790 me4600_ao_io_single_write;
5791 subdevice->base.me_subdevice_io_stream_config =
5792 me4600_ao_io_stream_config;
5793 subdevice->base.me_subdevice_io_stream_new_values =
5794 me4600_ao_io_stream_new_values;
5795 subdevice->base.me_subdevice_io_stream_write =
5796 me4600_ao_io_stream_write;
5797 subdevice->base.me_subdevice_io_stream_start =
5798 me4600_ao_io_stream_start;
5799 subdevice->base.me_subdevice_io_stream_status =
5800 me4600_ao_io_stream_status;
5801 subdevice->base.me_subdevice_io_stream_stop = me4600_ao_io_stream_stop;
5802 subdevice->base.me_subdevice_query_number_channels =
5803 me4600_ao_query_number_channels;
5804 subdevice->base.me_subdevice_query_subdevice_type =
5805 me4600_ao_query_subdevice_type;
5806 subdevice->base.me_subdevice_query_subdevice_caps =
5807 me4600_ao_query_subdevice_caps;
5808 subdevice->base.me_subdevice_query_subdevice_caps_args =
5809 me4600_ao_query_subdevice_caps_args;
5810 subdevice->base.me_subdevice_query_range_by_min_max =
5811 me4600_ao_query_range_by_min_max;
5812 subdevice->base.me_subdevice_query_number_ranges =
5813 me4600_ao_query_number_ranges;
5814 subdevice->base.me_subdevice_query_range_info =
5815 me4600_ao_query_range_info;
5816 subdevice->base.me_subdevice_query_timer = me4600_ao_query_timer;
5817
5818 return subdevice;
5819}
5820
5821#endif // BOSCH
5822
5823/* Common functions
5824*/
5825
5826static int me4600_ao_query_range_by_min_max(me_subdevice_t * subdevice,
5827 int unit,
5828 int *min,
5829 int *max, int *maxdata, int *range)
5830{
5831 me4600_ao_subdevice_t *instance;
5832
5833 instance = (me4600_ao_subdevice_t *) subdevice;
5834
5835 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5836
5837 if ((*max - *min) < 0) {
5838 PERROR("Invalid minimum and maximum values specified.\n");
5839 return ME_ERRNO_INVALID_MIN_MAX;
5840 }
5841
5842 if ((unit == ME_UNIT_VOLT) || (unit == ME_UNIT_ANY)) {
5843 if ((*max <= (ME4600_AO_MAX_RANGE + 1000))
5844 && (*min >= ME4600_AO_MIN_RANGE)) {
5845 *min = ME4600_AO_MIN_RANGE;
5846 *max = ME4600_AO_MAX_RANGE;
5847 *maxdata = ME4600_AO_MAX_DATA;
5848 *range = 0;
5849 } else {
5850 PERROR("No matching range available.\n");
5851 return ME_ERRNO_NO_RANGE;
5852 }
5853 } else {
5854 PERROR("Invalid physical unit specified.\n");
5855 return ME_ERRNO_INVALID_UNIT;
5856 }
5857
5858 return ME_ERRNO_SUCCESS;
5859}
5860
5861static int me4600_ao_query_number_ranges(me_subdevice_t * subdevice,
5862 int unit, int *count)
5863{
5864 me4600_ao_subdevice_t *instance;
5865
5866 instance = (me4600_ao_subdevice_t *) subdevice;
5867
5868 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5869
5870 if ((unit == ME_UNIT_VOLT) || (unit == ME_UNIT_ANY)) {
5871 *count = 1;
5872 } else {
5873 *count = 0;
5874 }
5875
5876 return ME_ERRNO_SUCCESS;
5877}
5878
5879static int me4600_ao_query_range_info(me_subdevice_t * subdevice,
5880 int range,
5881 int *unit,
5882 int *min, int *max, int *maxdata)
5883{
5884 me4600_ao_subdevice_t *instance;
5885
5886 instance = (me4600_ao_subdevice_t *) subdevice;
5887
5888 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5889
5890 if (range == 0) {
5891 *unit = ME_UNIT_VOLT;
5892 *min = ME4600_AO_MIN_RANGE;
5893 *max = ME4600_AO_MAX_RANGE;
5894 *maxdata = ME4600_AO_MAX_DATA;
5895 } else {
5896 PERROR("Invalid range number specified.\n");
5897 return ME_ERRNO_INVALID_RANGE;
5898 }
5899
5900 return ME_ERRNO_SUCCESS;
5901}
5902
5903static int me4600_ao_query_timer(me_subdevice_t * subdevice,
5904 int timer,
5905 int *base_frequency,
5906 long long *min_ticks, long long *max_ticks)
5907{
5908 me4600_ao_subdevice_t *instance;
5909
5910 instance = (me4600_ao_subdevice_t *) subdevice;
5911
5912 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5913
5914 if ((timer != ME_TIMER_ACQ_START) && (timer != ME_TIMER_CONV_START)) {
5915 PERROR("Invalid timer specified.\n");
5916 return ME_ERRNO_INVALID_TIMER;
5917 }
5918
5919 if (instance->fifo) { //Streaming device.
5920 *base_frequency = ME4600_AO_BASE_FREQUENCY;
5921 if (timer == ME_TIMER_ACQ_START) {
5922 *min_ticks = ME4600_AO_MIN_ACQ_TICKS;
5923 *max_ticks = ME4600_AO_MAX_ACQ_TICKS;
5924 } else if (timer == ME_TIMER_CONV_START) {
5925 *min_ticks = ME4600_AO_MIN_CHAN_TICKS;
5926 *max_ticks = ME4600_AO_MAX_CHAN_TICKS;
5927 }
5928 } else { //Not streaming device!
5929 *base_frequency = 0;
5930 *min_ticks = 0;
5931 *max_ticks = 0;
5932 }
5933
5934 return ME_ERRNO_SUCCESS;
5935}
5936
5937static int me4600_ao_query_number_channels(me_subdevice_t * subdevice,
5938 int *number)
5939{
5940 me4600_ao_subdevice_t *instance;
5941 instance = (me4600_ao_subdevice_t *) subdevice;
5942
5943 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5944
5945 *number = 1;
5946
5947 return ME_ERRNO_SUCCESS;
5948}
5949
5950static int me4600_ao_query_subdevice_type(me_subdevice_t * subdevice,
5951 int *type, int *subtype)
5952{
5953 me4600_ao_subdevice_t *instance;
5954
5955 instance = (me4600_ao_subdevice_t *) subdevice;
5956
5957 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5958
5959 *type = ME_TYPE_AO;
5960 *subtype = (instance->fifo) ? ME_SUBTYPE_STREAMING : ME_SUBTYPE_SINGLE;
5961
5962 return ME_ERRNO_SUCCESS;
5963}
5964
5965static int me4600_ao_query_subdevice_caps(me_subdevice_t * subdevice, int *caps)
5966{
5967 me4600_ao_subdevice_t *instance;
5968 instance = (me4600_ao_subdevice_t *) subdevice;
5969
5970 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5971
5972 *caps =
5973 ME_CAPS_AO_TRIG_SYNCHRONOUS | ((instance->fifo) ? ME_CAPS_AO_FIFO :
5974 ME_CAPS_NONE);
5975
5976 return ME_ERRNO_SUCCESS;
5977}
5978
5979static int me4600_ao_query_subdevice_caps_args(struct me_subdevice *subdevice,
5980 int cap, int *args, int count)
5981{
5982 me4600_ao_subdevice_t *instance;
5983 int err = ME_ERRNO_SUCCESS;
5984
5985 instance = (me4600_ao_subdevice_t *) subdevice;
5986
5987 PDEBUG("executed. idx=%d\n", instance->ao_idx);
5988
5989 if (count != 1) {
5990 PERROR("Invalid capability argument count.\n");
5991 return ME_ERRNO_INVALID_CAP_ARG_COUNT;
5992 }
5993
5994 switch (cap) {
5995 case ME_CAP_AI_FIFO_SIZE:
5996 args[0] = (instance->fifo) ? ME4600_AO_FIFO_COUNT : 0;
5997 break;
5998
5999 case ME_CAP_AI_BUFFER_SIZE:
6000 args[0] =
6001 (instance->circ_buf.buf) ? ME4600_AO_CIRC_BUF_COUNT : 0;
6002 break;
6003
6004 default:
6005 PERROR("Invalid capability.\n");
6006 err = ME_ERRNO_INVALID_CAP;
6007 args[0] = 0;
6008 }
6009
6010 return err;
6011}