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David Kiliani3fedd142008-11-01 00:39:12 +01001/**
2 * @file me4600_ext_irq.h
3 *
4 * @brief Meilhaus ME-4000 external interrupt subdevice class.
5 * @note Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
6 * @author Guenter Gebhardt
7 */
8
9/*
10 * Copyright (C) 2007 Meilhaus Electronic GmbH (support@meilhaus.de)
11 *
12 * This file is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#ifndef _ME4600_EXT_IRQ_H_
28#define _ME4600_EXT_IRQ_H_
29
30#include "mesubdevice.h"
31
32#ifdef __KERNEL__
33
34/**
35 * @brief The subdevice class.
36 */
37typedef struct me4600_ext_irq_subdevice {
38 /* Inheritance */
39 me_subdevice_t base; /**< The subdevice base class. */
40
41 /* Attributes */
42 spinlock_t subdevice_lock; /**< Spin lock to protect the subdevice from concurrent access. */
43 spinlock_t *ctrl_reg_lock; /**< Spin lock to protect #ctrl_reg from concurrent access. */
44
45 wait_queue_head_t wait_queue;
46
47 int irq;
48
49 int rised;
50 int value;
51 int count;
52
53 unsigned long ctrl_reg;
54 unsigned long irq_status_reg;
55 unsigned long ext_irq_config_reg;
56 unsigned long ext_irq_value_reg;
57#ifdef MEDEBUG_DEBUG_REG
58 unsigned long reg_base;
59#endif
60} me4600_ext_irq_subdevice_t;
61
62/**
63 * @brief The constructor to generate a external interrupt subdevice instance.
64 *
65 * @param reg_base The register base address of the device as returned by the PCI BIOS.
66 * @param irq The interrupt number assigned by the PCI BIOS.
67 * @param ctrl_reg_lock Pointer to spin lock protecting the control register from concurrent access.
68 *
69 * @return Pointer to new instance on success.\n
70 * NULL on error.
71 */
72me4600_ext_irq_subdevice_t *me4600_ext_irq_constructor(uint32_t reg_base,
73 int irq,
74 spinlock_t *
75 ctrl_reg_lock);
76
77#endif
78#endif