blob: b82dcf08e747e1052ea13b4a11feef25b7f7775b [file] [log] [blame]
Rob Herring220e6cf2011-06-07 10:02:55 -05001/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#include <linux/clk.h>
17#include <linux/clkdev.h>
18#include <linux/io.h>
19#include <linux/irq.h>
20#include <linux/irqdomain.h>
21#include <linux/of.h>
22#include <linux/of_irq.h>
23#include <linux/of_platform.h>
24#include <linux/of_address.h>
25
26#include <asm/cacheflush.h>
27#include <asm/unified.h>
28#include <asm/smp_scu.h>
29#include <asm/hardware/arm_timer.h>
30#include <asm/hardware/timer-sp.h>
31#include <asm/hardware/gic.h>
32#include <asm/hardware/cache-l2x0.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/time.h>
36#include <mach/irqs.h>
37
38#include "core.h"
39#include "sysregs.h"
40
41void __iomem *sregs_base;
42
43#define HB_SCU_VIRT_BASE 0xfee00000
44void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
45
46static struct map_desc scu_io_desc __initdata = {
47 .virtual = HB_SCU_VIRT_BASE,
48 .pfn = 0, /* run-time */
49 .length = SZ_4K,
50 .type = MT_DEVICE,
51};
52
53static void __init highbank_scu_map_io(void)
54{
55 unsigned long base;
56
57 /* Get SCU base */
58 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
59
60 scu_io_desc.pfn = __phys_to_pfn(base);
61 iotable_init(&scu_io_desc, 1);
62}
63
64static void __init highbank_map_io(void)
65{
66 highbank_scu_map_io();
67 highbank_lluart_map_io();
68}
69
70#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
71#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
72
73void highbank_set_cpu_jump(int cpu, void *jump_addr)
74{
75 writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
76 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
77 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
78 HB_JUMP_TABLE_PHYS(cpu) + 15);
79}
80
81const static struct of_device_id irq_match[] = {
82 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
83 {}
84};
85
86static void __init highbank_init_irq(void)
87{
88 of_irq_init(irq_match);
89 l2x0_of_init(0, ~0UL);
90}
91
92static void __init highbank_timer_init(void)
93{
94 int irq;
95 struct device_node *np;
96 void __iomem *timer_base;
97
98 /* Map system registers */
99 np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
100 sregs_base = of_iomap(np, 0);
101 WARN_ON(!sregs_base);
102
103 np = of_find_compatible_node(NULL, NULL, "arm,sp804");
104 timer_base = of_iomap(np, 0);
105 WARN_ON(!timer_base);
106 irq = irq_of_parse_and_map(np, 0);
107
108 highbank_clocks_init();
109
110 sp804_clocksource_init(timer_base + 0x20, "timer1");
111 sp804_clockevents_init(timer_base, irq, "timer0");
112}
113
114static struct sys_timer highbank_timer = {
115 .init = highbank_timer_init,
116};
117
118static void highbank_power_off(void)
119{
120 hignbank_set_pwr_shutdown();
121 scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
122
123 while (1)
124 cpu_do_idle();
125}
126
127static void __init highbank_init(void)
128{
129 pm_power_off = highbank_power_off;
130
131 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
132}
133
134static const char *highbank_match[] __initconst = {
135 "calxeda,highbank",
136 NULL,
137};
138
139DT_MACHINE_START(HIGHBANK, "Highbank")
140 .map_io = highbank_map_io,
141 .init_irq = highbank_init_irq,
142 .timer = &highbank_timer,
143 .init_machine = highbank_init,
144 .dt_compat = highbank_match,
145MACHINE_END