arch/arm/boot/dts/at91sam9n12.dtsi

/*
 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Hong Xu <hong.xu@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9N12 SoC";
	compatible = "atmel,at91sam9n12";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 4 7>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
				interrupts = <17 4 0>;
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
				interrupts = <17 4 0>;
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 4 0>;
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4 7>;
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x4000>;
				interrupts = <5 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x4000>;
				interrupts = <6 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x4000>;
				interrupts = <7 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart3: serial@f8028000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8028000 0x4000>;
				interrupts = <8 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
				interrupts = <9 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
				interrupts = <10 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = < 0x40000000 0x10000000
				0xffffe000 0x00000600
				0xffffe600 0x00000200
				0x00100000 0x00100000
			       >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			gpios = <&pioD 5 0
				 &pioD 4 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00500000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00500000 0x00100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 0 /* sda */
			 &pioA 31 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};