blob: 1ab3dac7b632b329f1e32305de3bbeb38d513adf [file] [log] [blame]
dea31012005-04-17 16:05:31 -05001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04003 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2005 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
dea31012005-04-17 16:05:31 -05006 * www.emulex.com *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04007 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea31012005-04-17 16:05:31 -05008 * *
9 * This program is free software; you can redistribute it and/or *
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -040010 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
dea31012005-04-17 16:05:31 -050020 *******************************************************************/
21
dea31012005-04-17 16:05:31 -050022#include <linux/blkdev.h>
23#include <linux/delay.h>
24#include <linux/dma-mapping.h>
25#include <linux/idr.h>
26#include <linux/interrupt.h>
27#include <linux/kthread.h>
28#include <linux/pci.h>
29#include <linux/spinlock.h>
30
James.Smart@Emulex.Com91886522005-08-10 15:03:09 -040031#include <scsi/scsi.h>
dea31012005-04-17 16:05:31 -050032#include <scsi/scsi_device.h>
33#include <scsi/scsi_host.h>
34#include <scsi/scsi_transport_fc.h>
35
36#include "lpfc_hw.h"
37#include "lpfc_sli.h"
38#include "lpfc_disc.h"
39#include "lpfc_scsi.h"
40#include "lpfc.h"
41#include "lpfc_logmsg.h"
42#include "lpfc_crtn.h"
43#include "lpfc_version.h"
44
45static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *);
46static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
47static int lpfc_post_rcv_buf(struct lpfc_hba *);
48
49static struct scsi_transport_template *lpfc_transport_template = NULL;
50static DEFINE_IDR(lpfc_hba_index);
51
52/************************************************************************/
53/* */
54/* lpfc_config_port_prep */
55/* This routine will do LPFC initialization prior to the */
56/* CONFIG_PORT mailbox command. This will be initialized */
57/* as a SLI layer callback routine. */
58/* This routine returns 0 on success or -ERESTART if it wants */
59/* the SLI layer to reset the HBA and try again. Any */
60/* other return value indicates an error. */
61/* */
62/************************************************************************/
63int
64lpfc_config_port_prep(struct lpfc_hba * phba)
65{
66 lpfc_vpd_t *vp = &phba->vpd;
67 int i = 0, rc;
68 LPFC_MBOXQ_t *pmb;
69 MAILBOX_t *mb;
70 char *lpfc_vpd_data = NULL;
71 uint16_t offset = 0;
72 static char licensed[56] =
73 "key unlock for use with gnu public licensed code only\0";
74
75 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
76 if (!pmb) {
77 phba->hba_state = LPFC_HBA_ERROR;
78 return -ENOMEM;
79 }
80
81 mb = &pmb->mb;
82 phba->hba_state = LPFC_INIT_MBX_CMDS;
83
84 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
85 uint32_t *ptext = (uint32_t *) licensed;
86
87 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
88 *ptext = cpu_to_be32(*ptext);
89
90 lpfc_read_nv(phba, pmb);
91 memset((char*)mb->un.varRDnvp.rsvd3, 0,
92 sizeof (mb->un.varRDnvp.rsvd3));
93 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
94 sizeof (licensed));
95
96 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
97
98 if (rc != MBX_SUCCESS) {
99 lpfc_printf_log(phba,
100 KERN_ERR,
101 LOG_MBOX,
102 "%d:0324 Config Port initialization "
103 "error, mbxCmd x%x READ_NVPARM, "
104 "mbxStatus x%x\n",
105 phba->brd_no,
106 mb->mbxCommand, mb->mbxStatus);
107 mempool_free(pmb, phba->mbox_mem_pool);
108 return -ERESTART;
109 }
110 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
111 sizeof (mb->un.varRDnvp.nodename));
112 }
113
114 /* Setup and issue mailbox READ REV command */
115 lpfc_read_rev(phba, pmb);
116 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
117 if (rc != MBX_SUCCESS) {
118 lpfc_printf_log(phba,
119 KERN_ERR,
120 LOG_INIT,
121 "%d:0439 Adapter failed to init, mbxCmd x%x "
122 "READ_REV, mbxStatus x%x\n",
123 phba->brd_no,
124 mb->mbxCommand, mb->mbxStatus);
125 mempool_free( pmb, phba->mbox_mem_pool);
126 return -ERESTART;
127 }
128
James.Smart@Emulex.Com1de933f2005-11-28 11:41:15 -0500129 /*
130 * The value of rr must be 1 since the driver set the cv field to 1.
131 * This setting requires the FW to set all revision fields.
dea31012005-04-17 16:05:31 -0500132 */
James.Smart@Emulex.Com1de933f2005-11-28 11:41:15 -0500133 if (mb->un.varRdRev.rr == 0) {
dea31012005-04-17 16:05:31 -0500134 vp->rev.rBit = 0;
James.Smart@Emulex.Com1de933f2005-11-28 11:41:15 -0500135 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
136 "%d:0440 Adapter failed to init, READ_REV has "
137 "missing revision information.\n",
138 phba->brd_no);
dea31012005-04-17 16:05:31 -0500139 mempool_free(pmb, phba->mbox_mem_pool);
140 return -ERESTART;
dea31012005-04-17 16:05:31 -0500141 }
142
143 /* Save information as VPD data */
James.Smart@Emulex.Com1de933f2005-11-28 11:41:15 -0500144 vp->rev.rBit = 1;
145 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
146 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
147 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
148 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
dea31012005-04-17 16:05:31 -0500149 vp->rev.biuRev = mb->un.varRdRev.biuRev;
150 vp->rev.smRev = mb->un.varRdRev.smRev;
151 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
152 vp->rev.endecRev = mb->un.varRdRev.endecRev;
153 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
154 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
155 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
156 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
157 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
158 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
159
160 if (lpfc_is_LC_HBA(phba->pcidev->device))
161 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
162 sizeof (phba->RandomData));
163
164 /* Get the default values for Model Name and Description */
165 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
166
167 /* Get adapter VPD information */
168 pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
169 if (!pmb->context2)
170 goto out_free_mbox;
171 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
172 if (!lpfc_vpd_data)
173 goto out_free_context2;
174
175 do {
176 lpfc_dump_mem(phba, pmb, offset);
177 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
178
179 if (rc != MBX_SUCCESS) {
180 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
181 "%d:0441 VPD not present on adapter, "
182 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
183 phba->brd_no,
184 mb->mbxCommand, mb->mbxStatus);
185 kfree(lpfc_vpd_data);
186 lpfc_vpd_data = NULL;
187 break;
188 }
189
190 lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
191 mb->un.varDmp.word_cnt);
192 offset += mb->un.varDmp.word_cnt;
193 } while (mb->un.varDmp.word_cnt);
194 lpfc_parse_vpd(phba, lpfc_vpd_data);
195
196 kfree(lpfc_vpd_data);
197out_free_context2:
198 kfree(pmb->context2);
199out_free_mbox:
200 mempool_free(pmb, phba->mbox_mem_pool);
201 return 0;
202}
203
204/************************************************************************/
205/* */
206/* lpfc_config_port_post */
207/* This routine will do LPFC initialization after the */
208/* CONFIG_PORT mailbox command. This will be initialized */
209/* as a SLI layer callback routine. */
210/* This routine returns 0 on success. Any other return value */
211/* indicates an error. */
212/* */
213/************************************************************************/
214int
215lpfc_config_port_post(struct lpfc_hba * phba)
216{
217 LPFC_MBOXQ_t *pmb;
218 MAILBOX_t *mb;
219 struct lpfc_dmabuf *mp;
220 struct lpfc_sli *psli = &phba->sli;
221 uint32_t status, timeout;
222 int i, j, rc;
223
224 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
225 if (!pmb) {
226 phba->hba_state = LPFC_HBA_ERROR;
227 return -ENOMEM;
228 }
229 mb = &pmb->mb;
230
231 lpfc_config_link(phba, pmb);
232 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
233 if (rc != MBX_SUCCESS) {
234 lpfc_printf_log(phba,
235 KERN_ERR,
236 LOG_INIT,
237 "%d:0447 Adapter failed init, mbxCmd x%x "
238 "CONFIG_LINK mbxStatus x%x\n",
239 phba->brd_no,
240 mb->mbxCommand, mb->mbxStatus);
241 phba->hba_state = LPFC_HBA_ERROR;
242 mempool_free( pmb, phba->mbox_mem_pool);
243 return -EIO;
244 }
245
246 /* Get login parameters for NID. */
247 lpfc_read_sparam(phba, pmb);
248 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
249 lpfc_printf_log(phba,
250 KERN_ERR,
251 LOG_INIT,
252 "%d:0448 Adapter failed init, mbxCmd x%x "
253 "READ_SPARM mbxStatus x%x\n",
254 phba->brd_no,
255 mb->mbxCommand, mb->mbxStatus);
256 phba->hba_state = LPFC_HBA_ERROR;
257 mp = (struct lpfc_dmabuf *) pmb->context1;
258 mempool_free( pmb, phba->mbox_mem_pool);
259 lpfc_mbuf_free(phba, mp->virt, mp->phys);
260 kfree(mp);
261 return -EIO;
262 }
263
264 mp = (struct lpfc_dmabuf *) pmb->context1;
265
266 memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
267 lpfc_mbuf_free(phba, mp->virt, mp->phys);
268 kfree(mp);
269 pmb->context1 = NULL;
270
271 memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
272 sizeof (struct lpfc_name));
273 memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
274 sizeof (struct lpfc_name));
275 /* If no serial number in VPD data, use low 6 bytes of WWNN */
276 /* This should be consolidated into parse_vpd ? - mr */
277 if (phba->SerialNumber[0] == 0) {
278 uint8_t *outptr;
279
Andrew Morton68ce1eb2005-09-21 09:46:54 -0700280 outptr = &phba->fc_nodename.u.s.IEEE[0];
dea31012005-04-17 16:05:31 -0500281 for (i = 0; i < 12; i++) {
282 status = *outptr++;
283 j = ((status & 0xf0) >> 4);
284 if (j <= 9)
285 phba->SerialNumber[i] =
286 (char)((uint8_t) 0x30 + (uint8_t) j);
287 else
288 phba->SerialNumber[i] =
289 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
290 i++;
291 j = (status & 0xf);
292 if (j <= 9)
293 phba->SerialNumber[i] =
294 (char)((uint8_t) 0x30 + (uint8_t) j);
295 else
296 phba->SerialNumber[i] =
297 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
298 }
299 }
300
301 /* This should turn on DELAYED ABTS for ELS timeouts */
302 lpfc_set_slim(phba, pmb, 0x052198, 0x1);
303 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
304 phba->hba_state = LPFC_HBA_ERROR;
305 mempool_free( pmb, phba->mbox_mem_pool);
306 return -EIO;
307 }
308
309
310 lpfc_read_config(phba, pmb);
311 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
312 lpfc_printf_log(phba,
313 KERN_ERR,
314 LOG_INIT,
315 "%d:0453 Adapter failed to init, mbxCmd x%x "
316 "READ_CONFIG, mbxStatus x%x\n",
317 phba->brd_no,
318 mb->mbxCommand, mb->mbxStatus);
319 phba->hba_state = LPFC_HBA_ERROR;
320 mempool_free( pmb, phba->mbox_mem_pool);
321 return -EIO;
322 }
323
324 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
325 if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
326 phba->cfg_hba_queue_depth =
327 mb->un.varRdConfig.max_xri + 1;
328
329 phba->lmt = mb->un.varRdConfig.lmt;
330 /* HBA is not 4GB capable, or HBA is not 2GB capable,
331 don't let link speed ask for it */
332 if ((((phba->lmt & LMT_4250_10bit) != LMT_4250_10bit) &&
333 (phba->cfg_link_speed > LINK_SPEED_2G)) ||
334 (((phba->lmt & LMT_2125_10bit) != LMT_2125_10bit) &&
335 (phba->cfg_link_speed > LINK_SPEED_1G))) {
336 /* Reset link speed to auto. 1G/2GB HBA cfg'd for 4G */
337 lpfc_printf_log(phba,
338 KERN_WARNING,
339 LOG_LINK_EVENT,
340 "%d:1302 Invalid speed for this board: "
341 "Reset link speed to auto: x%x\n",
342 phba->brd_no,
343 phba->cfg_link_speed);
344 phba->cfg_link_speed = LINK_SPEED_AUTO;
345 }
346
347 phba->hba_state = LPFC_LINK_DOWN;
348
349 /* Only process IOCBs on ring 0 till hba_state is READY */
350 if (psli->ring[psli->ip_ring].cmdringaddr)
351 psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT;
352 if (psli->ring[psli->fcp_ring].cmdringaddr)
353 psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
354 if (psli->ring[psli->next_ring].cmdringaddr)
355 psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
356
357 /* Post receive buffers for desired rings */
358 lpfc_post_rcv_buf(phba);
359
360 /* Enable appropriate host interrupts */
361 spin_lock_irq(phba->host->host_lock);
362 status = readl(phba->HCregaddr);
363 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
364 if (psli->num_rings > 0)
365 status |= HC_R0INT_ENA;
366 if (psli->num_rings > 1)
367 status |= HC_R1INT_ENA;
368 if (psli->num_rings > 2)
369 status |= HC_R2INT_ENA;
370 if (psli->num_rings > 3)
371 status |= HC_R3INT_ENA;
372
373 writel(status, phba->HCregaddr);
374 readl(phba->HCregaddr); /* flush */
375 spin_unlock_irq(phba->host->host_lock);
376
377 /*
378 * Setup the ring 0 (els) timeout handler
379 */
380 timeout = phba->fc_ratov << 1;
381 phba->els_tmofunc.expires = jiffies + HZ * timeout;
382 add_timer(&phba->els_tmofunc);
383
384 lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
385 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
386 if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) {
387 lpfc_printf_log(phba,
388 KERN_ERR,
389 LOG_INIT,
390 "%d:0454 Adapter failed to init, mbxCmd x%x "
391 "INIT_LINK, mbxStatus x%x\n",
392 phba->brd_no,
393 mb->mbxCommand, mb->mbxStatus);
394
395 /* Clear all interrupt enable conditions */
396 writel(0, phba->HCregaddr);
397 readl(phba->HCregaddr); /* flush */
398 /* Clear all pending interrupts */
399 writel(0xffffffff, phba->HAregaddr);
400 readl(phba->HAregaddr); /* flush */
401
402 phba->hba_state = LPFC_HBA_ERROR;
403 mempool_free(pmb, phba->mbox_mem_pool);
404 return -EIO;
405 }
406 /* MBOX buffer will be freed in mbox compl */
407
408 i = 0;
409 while ((phba->hba_state != LPFC_HBA_READY) ||
410 (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
411 ((phba->fc_map_cnt == 0) && (i<2)) ||
412 (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
413 /* Check every second for 30 retries. */
414 i++;
415 if (i > 30) {
416 break;
417 }
418 if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
419 /* The link is down. Set linkdown timeout */
420 break;
421 }
422
423 /* Delay for 1 second to give discovery time to complete. */
424 msleep(1000);
425
426 }
427
428 /* Since num_disc_nodes keys off of PLOGI, delay a bit to let
429 * any potential PRLIs to flush thru the SLI sub-system.
430 */
431 msleep(50);
432
433 return (0);
434}
435
436/************************************************************************/
437/* */
438/* lpfc_hba_down_prep */
439/* This routine will do LPFC uninitialization before the */
440/* HBA is reset when bringing down the SLI Layer. This will be */
441/* initialized as a SLI layer callback routine. */
442/* This routine returns 0 on success. Any other return value */
443/* indicates an error. */
444/* */
445/************************************************************************/
446int
447lpfc_hba_down_prep(struct lpfc_hba * phba)
448{
449 /* Disable interrupts */
450 writel(0, phba->HCregaddr);
451 readl(phba->HCregaddr); /* flush */
452
453 /* Cleanup potential discovery resources */
454 lpfc_els_flush_rscn(phba);
455 lpfc_els_flush_cmd(phba);
456 lpfc_disc_flush_list(phba);
457
458 return (0);
459}
460
461/************************************************************************/
462/* */
463/* lpfc_handle_eratt */
464/* This routine will handle processing a Host Attention */
465/* Error Status event. This will be initialized */
466/* as a SLI layer callback routine. */
467/* */
468/************************************************************************/
469void
470lpfc_handle_eratt(struct lpfc_hba * phba)
471{
472 struct lpfc_sli *psli = &phba->sli;
473 struct lpfc_sli_ring *pring;
474
475 /*
476 * If a reset is sent to the HBA restore PCI configuration registers.
477 */
478 if ( phba->hba_state == LPFC_INIT_START ) {
479 mdelay(1);
480 readl(phba->HCregaddr); /* flush */
481 writel(0, phba->HCregaddr);
482 readl(phba->HCregaddr); /* flush */
483
484 /* Restore PCI cmd register */
485 pci_write_config_word(phba->pcidev,
486 PCI_COMMAND, phba->pci_cfg_value);
487 }
488
489 if (phba->work_hs & HS_FFER6) {
490 /* Re-establishing Link */
491 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
492 "%d:1301 Re-establishing Link "
493 "Data: x%x x%x x%x\n",
494 phba->brd_no, phba->work_hs,
495 phba->work_status[0], phba->work_status[1]);
496 spin_lock_irq(phba->host->host_lock);
497 phba->fc_flag |= FC_ESTABLISH_LINK;
498 spin_unlock_irq(phba->host->host_lock);
499
500 /*
501 * Firmware stops when it triggled erratt with HS_FFER6.
502 * That could cause the I/Os dropped by the firmware.
503 * Error iocb (I/O) on txcmplq and let the SCSI layer
504 * retry it after re-establishing link.
505 */
506 pring = &psli->ring[psli->fcp_ring];
507 lpfc_sli_abort_iocb_ring(phba, pring);
508
509
510 /*
511 * There was a firmware error. Take the hba offline and then
512 * attempt to restart it.
513 */
514 lpfc_offline(phba);
515 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
516 mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
517 return;
518 }
519 } else {
520 /* The if clause above forces this code path when the status
521 * failure is a value other than FFER6. Do not call the offline
522 * twice. This is the adapter hardware error path.
523 */
524 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
525 "%d:0457 Adapter Hardware Error "
526 "Data: x%x x%x x%x\n",
527 phba->brd_no, phba->work_hs,
528 phba->work_status[0], phba->work_status[1]);
529
530 lpfc_offline(phba);
531
dea31012005-04-17 16:05:31 -0500532 }
533}
534
535/************************************************************************/
536/* */
537/* lpfc_handle_latt */
538/* This routine will handle processing a Host Attention */
539/* Link Status event. This will be initialized */
540/* as a SLI layer callback routine. */
541/* */
542/************************************************************************/
543void
544lpfc_handle_latt(struct lpfc_hba * phba)
545{
546 struct lpfc_sli *psli = &phba->sli;
547 LPFC_MBOXQ_t *pmb;
548 volatile uint32_t control;
549 struct lpfc_dmabuf *mp;
550 int rc = -ENOMEM;
551
552 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
553 if (!pmb)
554 goto lpfc_handle_latt_err_exit;
555
556 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
557 if (!mp)
558 goto lpfc_handle_latt_free_pmb;
559
560 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
561 if (!mp->virt)
562 goto lpfc_handle_latt_free_mp;
563
564 rc = -EIO;
565
James.Smart@Emulex.Com6281bfe2005-11-28 11:41:33 -0500566 /* Cleanup any outstanding ELS commands */
567 lpfc_els_flush_cmd(phba);
dea31012005-04-17 16:05:31 -0500568
569 psli->slistat.link_event++;
570 lpfc_read_la(phba, pmb, mp);
571 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
572 rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
573 if (rc == MBX_NOT_FINISHED)
574 goto lpfc_handle_latt_free_mp;
575
576 /* Clear Link Attention in HA REG */
577 spin_lock_irq(phba->host->host_lock);
578 writel(HA_LATT, phba->HAregaddr);
579 readl(phba->HAregaddr); /* flush */
580 spin_unlock_irq(phba->host->host_lock);
581
582 return;
583
584lpfc_handle_latt_free_mp:
585 kfree(mp);
586lpfc_handle_latt_free_pmb:
587 kfree(pmb);
588lpfc_handle_latt_err_exit:
589 /* Enable Link attention interrupts */
590 spin_lock_irq(phba->host->host_lock);
591 psli->sli_flag |= LPFC_PROCESS_LA;
592 control = readl(phba->HCregaddr);
593 control |= HC_LAINT_ENA;
594 writel(control, phba->HCregaddr);
595 readl(phba->HCregaddr); /* flush */
596
597 /* Clear Link Attention in HA REG */
598 writel(HA_LATT, phba->HAregaddr);
599 readl(phba->HAregaddr); /* flush */
600 spin_unlock_irq(phba->host->host_lock);
601 lpfc_linkdown(phba);
602 phba->hba_state = LPFC_HBA_ERROR;
603
604 /* The other case is an error from issue_mbox */
605 if (rc == -ENOMEM)
606 lpfc_printf_log(phba,
607 KERN_WARNING,
608 LOG_MBOX,
609 "%d:0300 READ_LA: no buffers\n",
610 phba->brd_no);
611
612 return;
613}
614
615/************************************************************************/
616/* */
617/* lpfc_parse_vpd */
618/* This routine will parse the VPD data */
619/* */
620/************************************************************************/
621static int
622lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd)
623{
624 uint8_t lenlo, lenhi;
625 uint32_t Length;
626 int i, j;
627 int finished = 0;
628 int index = 0;
629
630 if (!vpd)
631 return 0;
632
633 /* Vital Product */
634 lpfc_printf_log(phba,
635 KERN_INFO,
636 LOG_INIT,
637 "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
638 phba->brd_no,
639 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
640 (uint32_t) vpd[3]);
641 do {
642 switch (vpd[index]) {
643 case 0x82:
644 index += 1;
645 lenlo = vpd[index];
646 index += 1;
647 lenhi = vpd[index];
648 index += 1;
649 i = ((((unsigned short)lenhi) << 8) + lenlo);
650 index += i;
651 break;
652 case 0x90:
653 index += 1;
654 lenlo = vpd[index];
655 index += 1;
656 lenhi = vpd[index];
657 index += 1;
658 Length = ((((unsigned short)lenhi) << 8) + lenlo);
659
660 while (Length > 0) {
661 /* Look for Serial Number */
662 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
663 index += 2;
664 i = vpd[index];
665 index += 1;
666 j = 0;
667 Length -= (3+i);
668 while(i--) {
669 phba->SerialNumber[j++] = vpd[index++];
670 if (j == 31)
671 break;
672 }
673 phba->SerialNumber[j] = 0;
674 continue;
675 }
676 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
677 phba->vpd_flag |= VPD_MODEL_DESC;
678 index += 2;
679 i = vpd[index];
680 index += 1;
681 j = 0;
682 Length -= (3+i);
683 while(i--) {
684 phba->ModelDesc[j++] = vpd[index++];
685 if (j == 255)
686 break;
687 }
688 phba->ModelDesc[j] = 0;
689 continue;
690 }
691 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
692 phba->vpd_flag |= VPD_MODEL_NAME;
693 index += 2;
694 i = vpd[index];
695 index += 1;
696 j = 0;
697 Length -= (3+i);
698 while(i--) {
699 phba->ModelName[j++] = vpd[index++];
700 if (j == 79)
701 break;
702 }
703 phba->ModelName[j] = 0;
704 continue;
705 }
706 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
707 phba->vpd_flag |= VPD_PROGRAM_TYPE;
708 index += 2;
709 i = vpd[index];
710 index += 1;
711 j = 0;
712 Length -= (3+i);
713 while(i--) {
714 phba->ProgramType[j++] = vpd[index++];
715 if (j == 255)
716 break;
717 }
718 phba->ProgramType[j] = 0;
719 continue;
720 }
721 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
722 phba->vpd_flag |= VPD_PORT;
723 index += 2;
724 i = vpd[index];
725 index += 1;
726 j = 0;
727 Length -= (3+i);
728 while(i--) {
729 phba->Port[j++] = vpd[index++];
730 if (j == 19)
731 break;
732 }
733 phba->Port[j] = 0;
734 continue;
735 }
736 else {
737 index += 2;
738 i = vpd[index];
739 index += 1;
740 index += i;
741 Length -= (3 + i);
742 }
743 }
744 finished = 0;
745 break;
746 case 0x78:
747 finished = 1;
748 break;
749 default:
750 index ++;
751 break;
752 }
753 } while (!finished && (index < 108));
754
755 return(1);
756}
757
758static void
759lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
760{
761 lpfc_vpd_t *vp;
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -0500762 uint16_t dev_id;
James.Smart@Emulex.Com964b77e2005-10-28 20:29:01 -0400763 uint8_t hdrtype;
dea31012005-04-17 16:05:31 -0500764 char str[16];
765
766 vp = &phba->vpd;
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -0500767 pci_read_config_word(phba->pcidev, PCI_DEVICE_ID, &dev_id);
James.Smart@Emulex.Com964b77e2005-10-28 20:29:01 -0400768 pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
dea31012005-04-17 16:05:31 -0500769
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -0500770 switch (dev_id) {
James.Smart@Emulex.Com06325e72005-06-25 10:34:22 -0400771 case PCI_DEVICE_ID_FIREFLY:
772 strcpy(str, "LP6000 1");
773 break;
dea31012005-04-17 16:05:31 -0500774 case PCI_DEVICE_ID_SUPERFLY:
775 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
776 strcpy(str, "LP7000 1");
777 else
778 strcpy(str, "LP7000E 1");
779 break;
780 case PCI_DEVICE_ID_DRAGONFLY:
781 strcpy(str, "LP8000 1");
782 break;
783 case PCI_DEVICE_ID_CENTAUR:
784 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
785 strcpy(str, "LP9002 2");
786 else
787 strcpy(str, "LP9000 1");
788 break;
789 case PCI_DEVICE_ID_RFLY:
790 strcpy(str, "LP952 2");
791 break;
792 case PCI_DEVICE_ID_PEGASUS:
793 strcpy(str, "LP9802 2");
794 break;
795 case PCI_DEVICE_ID_THOR:
James.Smart@Emulex.Com964b77e2005-10-28 20:29:01 -0400796 if (hdrtype == 0x80)
797 strcpy(str, "LP10000DC 2");
798 else
799 strcpy(str, "LP10000 2");
dea31012005-04-17 16:05:31 -0500800 break;
801 case PCI_DEVICE_ID_VIPER:
802 strcpy(str, "LPX1000 10");
803 break;
804 case PCI_DEVICE_ID_PFLY:
805 strcpy(str, "LP982 2");
806 break;
807 case PCI_DEVICE_ID_TFLY:
James.Smart@Emulex.Com964b77e2005-10-28 20:29:01 -0400808 if (hdrtype == 0x80)
809 strcpy(str, "LP1050DC 2");
810 else
811 strcpy(str, "LP1050 2");
dea31012005-04-17 16:05:31 -0500812 break;
813 case PCI_DEVICE_ID_HELIOS:
James.Smart@Emulex.Com964b77e2005-10-28 20:29:01 -0400814 if (hdrtype == 0x80)
815 strcpy(str, "LP11002 4");
816 else
817 strcpy(str, "LP11000 4");
dea31012005-04-17 16:05:31 -0500818 break;
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -0500819 case PCI_DEVICE_ID_HELIOS_SCSP:
820 strcpy(str, "LP11000-SP 4");
821 break;
822 case PCI_DEVICE_ID_HELIOS_DCSP:
823 strcpy(str, "LP11002-SP 4");
824 break;
825 case PCI_DEVICE_ID_NEPTUNE:
826 if (hdrtype == 0x80)
827 strcpy(str, "LPe1002 4");
828 else
829 strcpy(str, "LPe1000 4");
830 break;
831 case PCI_DEVICE_ID_NEPTUNE_SCSP:
832 strcpy(str, "LPe1000-SP 4");
833 break;
834 case PCI_DEVICE_ID_NEPTUNE_DCSP:
835 strcpy(str, "LPe1002-SP 4");
836 break;
dea31012005-04-17 16:05:31 -0500837 case PCI_DEVICE_ID_BMID:
838 strcpy(str, "LP1150 4");
839 break;
840 case PCI_DEVICE_ID_BSMB:
841 strcpy(str, "LP111 4");
842 break;
843 case PCI_DEVICE_ID_ZEPHYR:
James.Smart@Emulex.Com964b77e2005-10-28 20:29:01 -0400844 if (hdrtype == 0x80)
845 strcpy(str, "LPe11002 4");
846 else
847 strcpy(str, "LPe11000 4");
dea31012005-04-17 16:05:31 -0500848 break;
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -0500849 case PCI_DEVICE_ID_ZEPHYR_SCSP:
850 strcpy(str, "LPe11000-SP 4");
851 break;
852 case PCI_DEVICE_ID_ZEPHYR_DCSP:
853 strcpy(str, "LPe11002-SP 4");
854 break;
dea31012005-04-17 16:05:31 -0500855 case PCI_DEVICE_ID_ZMID:
James.Smart@Emulex.Com964b77e2005-10-28 20:29:01 -0400856 strcpy(str, "LPe1150 4");
dea31012005-04-17 16:05:31 -0500857 break;
858 case PCI_DEVICE_ID_ZSMB:
James.Smart@Emulex.Com964b77e2005-10-28 20:29:01 -0400859 strcpy(str, "LPe111 4");
dea31012005-04-17 16:05:31 -0500860 break;
861 case PCI_DEVICE_ID_LP101:
862 strcpy(str, "LP101 2");
863 break;
864 case PCI_DEVICE_ID_LP10000S:
865 strcpy(str, "LP10000-S 2");
866 break;
James.Smart@Emulex.Com06325e72005-06-25 10:34:22 -0400867 default:
868 memset(str, 0, 16);
869 break;
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -0500870 case PCI_DEVICE_ID_LP11000S:
871 if (hdrtype == 0x80)
872 strcpy(str, "LP11002-S 4");
873 else
874 strcpy(str, "LP11000-S 4");
875 break;
876 case PCI_DEVICE_ID_LPE11000S:
877 if (hdrtype == 0x80)
878 strcpy(str, "LPe11002-S 4");
879 else
880 strcpy(str, "LPe11000-S 4");
881 break;
dea31012005-04-17 16:05:31 -0500882 }
883 if (mdp)
884 sscanf(str, "%s", mdp);
885 if (descp)
886 sprintf(descp, "Emulex LightPulse %s Gigabit PCI Fibre "
887 "Channel Adapter", str);
888}
889
890/**************************************************/
891/* lpfc_post_buffer */
892/* */
893/* This routine will post count buffers to the */
894/* ring with the QUE_RING_BUF_CN command. This */
895/* allows 3 buffers / command to be posted. */
896/* Returns the number of buffers NOT posted. */
897/**************************************************/
898int
899lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
900 int type)
901{
902 IOCB_t *icmd;
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -0400903 struct lpfc_iocbq *iocb;
dea31012005-04-17 16:05:31 -0500904 struct lpfc_dmabuf *mp1, *mp2;
905
906 cnt += pring->missbufcnt;
907
908 /* While there are buffers to post */
909 while (cnt > 0) {
910 /* Allocate buffer for command iocb */
911 spin_lock_irq(phba->host->host_lock);
James.Smart@Emulex.Com0bd4ca22005-10-28 20:30:02 -0400912 iocb = lpfc_sli_get_iocbq(phba);
dea31012005-04-17 16:05:31 -0500913 spin_unlock_irq(phba->host->host_lock);
914 if (iocb == NULL) {
915 pring->missbufcnt = cnt;
916 return cnt;
917 }
dea31012005-04-17 16:05:31 -0500918 icmd = &iocb->iocb;
919
920 /* 2 buffers can be posted per command */
921 /* Allocate buffer to post */
922 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
923 if (mp1)
924 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
925 &mp1->phys);
926 if (mp1 == 0 || mp1->virt == 0) {
Jesper Juhlc9475cb2005-11-07 01:01:26 -0800927 kfree(mp1);
dea31012005-04-17 16:05:31 -0500928 spin_lock_irq(phba->host->host_lock);
James Bottomley604a3e32005-10-29 10:28:33 -0500929 lpfc_sli_release_iocbq(phba, iocb);
dea31012005-04-17 16:05:31 -0500930 spin_unlock_irq(phba->host->host_lock);
931 pring->missbufcnt = cnt;
932 return cnt;
933 }
934
935 INIT_LIST_HEAD(&mp1->list);
936 /* Allocate buffer to post */
937 if (cnt > 1) {
938 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
939 if (mp2)
940 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
941 &mp2->phys);
942 if (mp2 == 0 || mp2->virt == 0) {
Jesper Juhlc9475cb2005-11-07 01:01:26 -0800943 kfree(mp2);
dea31012005-04-17 16:05:31 -0500944 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
945 kfree(mp1);
946 spin_lock_irq(phba->host->host_lock);
James Bottomley604a3e32005-10-29 10:28:33 -0500947 lpfc_sli_release_iocbq(phba, iocb);
dea31012005-04-17 16:05:31 -0500948 spin_unlock_irq(phba->host->host_lock);
949 pring->missbufcnt = cnt;
950 return cnt;
951 }
952
953 INIT_LIST_HEAD(&mp2->list);
954 } else {
955 mp2 = NULL;
956 }
957
958 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
959 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
960 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
961 icmd->ulpBdeCount = 1;
962 cnt--;
963 if (mp2) {
964 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
965 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
966 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
967 cnt--;
968 icmd->ulpBdeCount = 2;
969 }
970
971 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
972 icmd->ulpLe = 1;
973
974 spin_lock_irq(phba->host->host_lock);
975 if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
976 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
977 kfree(mp1);
978 cnt++;
979 if (mp2) {
980 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
981 kfree(mp2);
982 cnt++;
983 }
James Bottomley604a3e32005-10-29 10:28:33 -0500984 lpfc_sli_release_iocbq(phba, iocb);
dea31012005-04-17 16:05:31 -0500985 pring->missbufcnt = cnt;
986 spin_unlock_irq(phba->host->host_lock);
987 return cnt;
988 }
989 spin_unlock_irq(phba->host->host_lock);
990 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
991 if (mp2) {
992 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
993 }
994 }
995 pring->missbufcnt = 0;
996 return 0;
997}
998
999/************************************************************************/
1000/* */
1001/* lpfc_post_rcv_buf */
1002/* This routine post initial rcv buffers to the configured rings */
1003/* */
1004/************************************************************************/
1005static int
1006lpfc_post_rcv_buf(struct lpfc_hba * phba)
1007{
1008 struct lpfc_sli *psli = &phba->sli;
1009
1010 /* Ring 0, ELS / CT buffers */
1011 lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
1012 /* Ring 2 - FCP no buffers needed */
1013
1014 return 0;
1015}
1016
1017#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
1018
1019/************************************************************************/
1020/* */
1021/* lpfc_sha_init */
1022/* */
1023/************************************************************************/
1024static void
1025lpfc_sha_init(uint32_t * HashResultPointer)
1026{
1027 HashResultPointer[0] = 0x67452301;
1028 HashResultPointer[1] = 0xEFCDAB89;
1029 HashResultPointer[2] = 0x98BADCFE;
1030 HashResultPointer[3] = 0x10325476;
1031 HashResultPointer[4] = 0xC3D2E1F0;
1032}
1033
1034/************************************************************************/
1035/* */
1036/* lpfc_sha_iterate */
1037/* */
1038/************************************************************************/
1039static void
1040lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
1041{
1042 int t;
1043 uint32_t TEMP;
1044 uint32_t A, B, C, D, E;
1045 t = 16;
1046 do {
1047 HashWorkingPointer[t] =
1048 S(1,
1049 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
1050 8] ^
1051 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
1052 } while (++t <= 79);
1053 t = 0;
1054 A = HashResultPointer[0];
1055 B = HashResultPointer[1];
1056 C = HashResultPointer[2];
1057 D = HashResultPointer[3];
1058 E = HashResultPointer[4];
1059
1060 do {
1061 if (t < 20) {
1062 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
1063 } else if (t < 40) {
1064 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
1065 } else if (t < 60) {
1066 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
1067 } else {
1068 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
1069 }
1070 TEMP += S(5, A) + E + HashWorkingPointer[t];
1071 E = D;
1072 D = C;
1073 C = S(30, B);
1074 B = A;
1075 A = TEMP;
1076 } while (++t <= 79);
1077
1078 HashResultPointer[0] += A;
1079 HashResultPointer[1] += B;
1080 HashResultPointer[2] += C;
1081 HashResultPointer[3] += D;
1082 HashResultPointer[4] += E;
1083
1084}
1085
1086/************************************************************************/
1087/* */
1088/* lpfc_challenge_key */
1089/* */
1090/************************************************************************/
1091static void
1092lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
1093{
1094 *HashWorking = (*RandomChallenge ^ *HashWorking);
1095}
1096
1097/************************************************************************/
1098/* */
1099/* lpfc_hba_init */
1100/* */
1101/************************************************************************/
1102void
1103lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
1104{
1105 int t;
1106 uint32_t *HashWorking;
1107 uint32_t *pwwnn = phba->wwnn;
1108
1109 HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL);
1110 if (!HashWorking)
1111 return;
1112
1113 memset(HashWorking, 0, (80 * sizeof(uint32_t)));
1114 HashWorking[0] = HashWorking[78] = *pwwnn++;
1115 HashWorking[1] = HashWorking[79] = *pwwnn;
1116
1117 for (t = 0; t < 7; t++)
1118 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
1119
1120 lpfc_sha_init(hbainit);
1121 lpfc_sha_iterate(hbainit, HashWorking);
1122 kfree(HashWorking);
1123}
1124
1125static void
1126lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind)
1127{
1128 struct lpfc_nodelist *ndlp, *next_ndlp;
1129
1130 /* clean up phba - lpfc specific */
1131 lpfc_can_disctmo(phba);
1132 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
1133 nlp_listp) {
1134 lpfc_nlp_remove(phba, ndlp);
1135 }
1136
1137 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
1138 nlp_listp) {
1139 lpfc_nlp_remove(phba, ndlp);
1140 }
1141
1142 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
1143 nlp_listp) {
1144 lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
1145 }
1146
1147 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
1148 nlp_listp) {
1149 lpfc_nlp_remove(phba, ndlp);
1150 }
1151
1152 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
1153 nlp_listp) {
1154 lpfc_nlp_remove(phba, ndlp);
1155 }
1156
1157 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list,
1158 nlp_listp) {
1159 lpfc_nlp_remove(phba, ndlp);
1160 }
1161
1162 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
1163 nlp_listp) {
1164 lpfc_nlp_remove(phba, ndlp);
1165 }
1166
1167 list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
1168 nlp_listp) {
1169 lpfc_nlp_remove(phba, ndlp);
1170 }
1171
1172 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1173 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1174 INIT_LIST_HEAD(&phba->fc_unused_list);
1175 INIT_LIST_HEAD(&phba->fc_plogi_list);
1176 INIT_LIST_HEAD(&phba->fc_adisc_list);
1177 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1178 INIT_LIST_HEAD(&phba->fc_prli_list);
1179 INIT_LIST_HEAD(&phba->fc_npr_list);
1180
1181 phba->fc_map_cnt = 0;
1182 phba->fc_unmap_cnt = 0;
1183 phba->fc_plogi_cnt = 0;
1184 phba->fc_adisc_cnt = 0;
1185 phba->fc_reglogin_cnt = 0;
1186 phba->fc_prli_cnt = 0;
1187 phba->fc_npr_cnt = 0;
1188 phba->fc_unused_cnt= 0;
1189 return;
1190}
1191
1192static void
1193lpfc_establish_link_tmo(unsigned long ptr)
1194{
1195 struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
1196 unsigned long iflag;
1197
1198
1199 /* Re-establishing Link, timer expired */
1200 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
1201 "%d:1300 Re-establishing Link, timer expired "
1202 "Data: x%x x%x\n",
1203 phba->brd_no, phba->fc_flag, phba->hba_state);
1204 spin_lock_irqsave(phba->host->host_lock, iflag);
1205 phba->fc_flag &= ~FC_ESTABLISH_LINK;
1206 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1207}
1208
1209static int
1210lpfc_stop_timer(struct lpfc_hba * phba)
1211{
1212 struct lpfc_sli *psli = &phba->sli;
1213
1214 /* Instead of a timer, this has been converted to a
1215 * deferred procedding list.
1216 */
1217 while (!list_empty(&phba->freebufList)) {
1218
1219 struct lpfc_dmabuf *mp = NULL;
1220
1221 list_remove_head((&phba->freebufList), mp,
1222 struct lpfc_dmabuf, list);
1223 if (mp) {
1224 lpfc_mbuf_free(phba, mp->virt, mp->phys);
1225 kfree(mp);
1226 }
1227 }
1228
1229 del_timer_sync(&phba->fc_estabtmo);
1230 del_timer_sync(&phba->fc_disctmo);
1231 del_timer_sync(&phba->fc_fdmitmo);
1232 del_timer_sync(&phba->els_tmofunc);
1233 psli = &phba->sli;
1234 del_timer_sync(&psli->mbox_tmo);
1235 return(1);
1236}
1237
1238int
1239lpfc_online(struct lpfc_hba * phba)
1240{
1241 if (!phba)
1242 return 0;
1243
1244 if (!(phba->fc_flag & FC_OFFLINE_MODE))
1245 return 0;
1246
1247 lpfc_printf_log(phba,
1248 KERN_WARNING,
1249 LOG_INIT,
1250 "%d:0458 Bring Adapter online\n",
1251 phba->brd_no);
1252
1253 if (!lpfc_sli_queue_setup(phba))
1254 return 1;
1255
1256 if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */
1257 return 1;
1258
1259 spin_lock_irq(phba->host->host_lock);
1260 phba->fc_flag &= ~FC_OFFLINE_MODE;
1261 spin_unlock_irq(phba->host->host_lock);
1262
dea31012005-04-17 16:05:31 -05001263 return 0;
1264}
1265
1266int
1267lpfc_offline(struct lpfc_hba * phba)
1268{
1269 struct lpfc_sli_ring *pring;
1270 struct lpfc_sli *psli;
1271 unsigned long iflag;
1272 int i = 0;
1273
1274 if (!phba)
1275 return 0;
1276
1277 if (phba->fc_flag & FC_OFFLINE_MODE)
1278 return 0;
1279
dea31012005-04-17 16:05:31 -05001280 psli = &phba->sli;
1281 pring = &psli->ring[psli->fcp_ring];
1282
1283 lpfc_linkdown(phba);
1284
1285 /* The linkdown event takes 30 seconds to timeout. */
1286 while (pring->txcmplq_cnt) {
1287 mdelay(10);
1288 if (i++ > 3000)
1289 break;
1290 }
1291
1292 /* stop all timers associated with this hba */
1293 lpfc_stop_timer(phba);
1294 phba->work_hba_events = 0;
1295
1296 lpfc_printf_log(phba,
1297 KERN_WARNING,
1298 LOG_INIT,
1299 "%d:0460 Bring Adapter offline\n",
1300 phba->brd_no);
1301
1302 /* Bring down the SLI Layer and cleanup. The HBA is offline
1303 now. */
1304 lpfc_sli_hba_down(phba);
1305 lpfc_cleanup(phba, 1);
1306 spin_lock_irqsave(phba->host->host_lock, iflag);
1307 phba->fc_flag |= FC_OFFLINE_MODE;
1308 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1309 return 0;
1310}
1311
1312/******************************************************************************
1313* Function name: lpfc_scsi_free
1314*
1315* Description: Called from lpfc_pci_remove_one free internal driver resources
1316*
1317******************************************************************************/
1318static int
1319lpfc_scsi_free(struct lpfc_hba * phba)
1320{
1321 struct lpfc_scsi_buf *sb, *sb_next;
1322 struct lpfc_iocbq *io, *io_next;
1323
1324 spin_lock_irq(phba->host->host_lock);
1325 /* Release all the lpfc_scsi_bufs maintained by this host. */
1326 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) {
1327 list_del(&sb->list);
1328 pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
1329 sb->dma_handle);
1330 kfree(sb);
1331 phba->total_scsi_bufs--;
1332 }
1333
1334 /* Release all the lpfc_iocbq entries maintained by this host. */
1335 list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
1336 list_del(&io->list);
1337 kfree(io);
1338 phba->total_iocbq_bufs--;
1339 }
1340
1341 spin_unlock_irq(phba->host->host_lock);
1342
1343 return 0;
1344}
1345
1346
1347static int __devinit
1348lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1349{
1350 struct Scsi_Host *host;
1351 struct lpfc_hba *phba;
1352 struct lpfc_sli *psli;
1353 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
1354 unsigned long bar0map_len, bar2map_len;
1355 int error = -ENODEV, retval;
1356 int i;
James Bottomley604a3e32005-10-29 10:28:33 -05001357 uint16_t iotag;
dea31012005-04-17 16:05:31 -05001358
1359 if (pci_enable_device(pdev))
1360 goto out;
1361 if (pci_request_regions(pdev, LPFC_DRIVER_NAME))
1362 goto out_disable_device;
1363
James.Smart@Emulex.Comf888ba32005-08-10 15:03:01 -04001364 host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba));
dea31012005-04-17 16:05:31 -05001365 if (!host)
1366 goto out_release_regions;
1367
1368 phba = (struct lpfc_hba*)host->hostdata;
1369 memset(phba, 0, sizeof (struct lpfc_hba));
dea31012005-04-17 16:05:31 -05001370 phba->host = host;
1371
1372 phba->fc_flag |= FC_LOADING;
1373 phba->pcidev = pdev;
1374
1375 /* Assign an unused board number */
1376 if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL))
1377 goto out_put_host;
1378
1379 error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no);
1380 if (error)
1381 goto out_put_host;
1382
1383 host->unique_id = phba->brd_no;
James.Smart@Emulex.Com6175c022005-11-28 11:42:05 -05001384 init_MUTEX(&phba->hba_can_block);
dea31012005-04-17 16:05:31 -05001385 INIT_LIST_HEAD(&phba->ctrspbuflist);
1386 INIT_LIST_HEAD(&phba->rnidrspbuflist);
1387 INIT_LIST_HEAD(&phba->freebufList);
1388
1389 /* Initialize timers used by driver */
1390 init_timer(&phba->fc_estabtmo);
1391 phba->fc_estabtmo.function = lpfc_establish_link_tmo;
1392 phba->fc_estabtmo.data = (unsigned long)phba;
1393 init_timer(&phba->fc_disctmo);
1394 phba->fc_disctmo.function = lpfc_disc_timeout;
1395 phba->fc_disctmo.data = (unsigned long)phba;
1396
1397 init_timer(&phba->fc_fdmitmo);
1398 phba->fc_fdmitmo.function = lpfc_fdmi_tmo;
1399 phba->fc_fdmitmo.data = (unsigned long)phba;
1400 init_timer(&phba->els_tmofunc);
1401 phba->els_tmofunc.function = lpfc_els_timeout;
1402 phba->els_tmofunc.data = (unsigned long)phba;
1403 psli = &phba->sli;
1404 init_timer(&psli->mbox_tmo);
1405 psli->mbox_tmo.function = lpfc_mbox_timeout;
1406 psli->mbox_tmo.data = (unsigned long)phba;
1407
1408 /*
1409 * Get all the module params for configuring this host and then
1410 * establish the host parameters.
1411 */
1412 lpfc_get_cfgparam(phba);
1413
1414 host->max_id = LPFC_MAX_TARGET;
1415 host->max_lun = phba->cfg_max_luns;
1416 host->this_id = -1;
1417
1418 /* Initialize all internally managed lists. */
1419 INIT_LIST_HEAD(&phba->fc_nlpmap_list);
1420 INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
1421 INIT_LIST_HEAD(&phba->fc_unused_list);
1422 INIT_LIST_HEAD(&phba->fc_plogi_list);
1423 INIT_LIST_HEAD(&phba->fc_adisc_list);
1424 INIT_LIST_HEAD(&phba->fc_reglogin_list);
1425 INIT_LIST_HEAD(&phba->fc_prli_list);
1426 INIT_LIST_HEAD(&phba->fc_npr_list);
1427
1428
1429 pci_set_master(pdev);
1430 retval = pci_set_mwi(pdev);
1431 if (retval)
1432 dev_printk(KERN_WARNING, &pdev->dev,
1433 "Warning: pci_set_mwi returned %d\n", retval);
1434
1435 if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
1436 if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
1437 goto out_idr_remove;
1438
1439 /*
1440 * Get the bus address of Bar0 and Bar2 and the number of bytes
1441 * required by each mapping.
1442 */
1443 phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0);
1444 bar0map_len = pci_resource_len(phba->pcidev, 0);
1445
1446 phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
1447 bar2map_len = pci_resource_len(phba->pcidev, 2);
1448
1449 /* Map HBA SLIM and Control Registers to a kernel virtual address. */
1450 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
1451 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
1452
1453 /* Allocate memory for SLI-2 structures */
1454 phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
1455 &phba->slim2p_mapping, GFP_KERNEL);
1456 if (!phba->slim2p)
1457 goto out_iounmap;
1458
James.Smart@Emulex.Comf91b3922005-10-28 20:29:28 -04001459 memset(phba->slim2p, 0, SLI2_SLIM_SIZE);
dea31012005-04-17 16:05:31 -05001460
1461 /* Initialize the SLI Layer to run with lpfc HBAs. */
1462 lpfc_sli_setup(phba);
1463 lpfc_sli_queue_setup(phba);
1464
1465 error = lpfc_mem_alloc(phba);
1466 if (error)
1467 goto out_free_slim;
1468
1469 /* Initialize and populate the iocb list per host. */
1470 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
1471 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
1472 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
1473 if (iocbq_entry == NULL) {
1474 printk(KERN_ERR "%s: only allocated %d iocbs of "
1475 "expected %d count. Unloading driver.\n",
1476 __FUNCTION__, i, LPFC_IOCB_LIST_CNT);
1477 error = -ENOMEM;
1478 goto out_free_iocbq;
1479 }
1480
1481 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
James Bottomley604a3e32005-10-29 10:28:33 -05001482 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
1483 if (iotag == 0) {
1484 kfree (iocbq_entry);
1485 printk(KERN_ERR "%s: failed to allocate IOTAG. "
1486 "Unloading driver.\n",
1487 __FUNCTION__);
1488 error = -ENOMEM;
1489 goto out_free_iocbq;
1490 }
dea31012005-04-17 16:05:31 -05001491 spin_lock_irq(phba->host->host_lock);
1492 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
1493 phba->total_iocbq_bufs++;
1494 spin_unlock_irq(phba->host->host_lock);
1495 }
1496
1497 /* Initialize HBA structure */
1498 phba->fc_edtov = FF_DEF_EDTOV;
1499 phba->fc_ratov = FF_DEF_RATOV;
1500 phba->fc_altov = FF_DEF_ALTOV;
1501 phba->fc_arbtov = FF_DEF_ARBTOV;
1502
1503 INIT_LIST_HEAD(&phba->work_list);
1504 phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
1505 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
1506
1507 /* Startup the kernel thread for this host adapter. */
1508 phba->worker_thread = kthread_run(lpfc_do_work, phba,
1509 "lpfc_worker_%d", phba->brd_no);
1510 if (IS_ERR(phba->worker_thread)) {
1511 error = PTR_ERR(phba->worker_thread);
1512 goto out_free_iocbq;
1513 }
1514
1515 /* We can rely on a queue depth attribute only after SLI HBA setup */
1516 host->can_queue = phba->cfg_hba_queue_depth - 10;
1517
1518 /* Tell the midlayer we support 16 byte commands */
1519 host->max_cmd_len = 16;
1520
1521 /* Initialize the list of scsi buffers used by driver for scsi IO. */
1522 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
1523
1524 host->transportt = lpfc_transport_template;
1525 host->hostdata[0] = (unsigned long)phba;
1526 pci_set_drvdata(pdev, host);
1527 error = scsi_add_host(host, &pdev->dev);
1528 if (error)
1529 goto out_kthread_stop;
1530
1531 error = lpfc_alloc_sysfs_attr(phba);
1532 if (error)
1533 goto out_kthread_stop;
1534
1535 error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ,
1536 LPFC_DRIVER_NAME, phba);
1537 if (error) {
1538 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1539 "%d:0451 Enable interrupt handler failed\n",
1540 phba->brd_no);
1541 goto out_free_sysfs_attr;
1542 }
1543 phba->MBslimaddr = phba->slim_memmap_p;
1544 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
1545 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
1546 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
1547 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
1548
1549 error = lpfc_sli_hba_setup(phba);
1550 if (error)
1551 goto out_free_irq;
1552
1553 /*
1554 * set fixed host attributes
1555 * Must done after lpfc_sli_hba_setup()
1556 */
1557
Andrew Morton68ce1eb2005-09-21 09:46:54 -07001558 fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
1559 fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
dea31012005-04-17 16:05:31 -05001560 fc_host_supported_classes(host) = FC_COS_CLASS3;
1561
1562 memset(fc_host_supported_fc4s(host), 0,
1563 sizeof(fc_host_supported_fc4s(host)));
1564 fc_host_supported_fc4s(host)[2] = 1;
1565 fc_host_supported_fc4s(host)[7] = 1;
1566
1567 lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
1568
1569 fc_host_supported_speeds(host) = 0;
1570 switch (FC_JEDEC_ID(phba->vpd.rev.biuRev)) {
1571 case VIPER_JEDEC_ID:
1572 fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
1573 break;
1574 case HELIOS_JEDEC_ID:
1575 fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
1576 /* Fall through */
1577 case CENTAUR_2G_JEDEC_ID:
1578 case PEGASUS_JEDEC_ID:
1579 case THOR_JEDEC_ID:
1580 fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
1581 /* Fall through */
1582 default:
1583 fc_host_supported_speeds(host) = FC_PORTSPEED_1GBIT;
1584 }
1585
1586 fc_host_maxframe_size(host) =
1587 ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
1588 (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb);
1589
1590 /* This value is also unchanging */
1591 memset(fc_host_active_fc4s(host), 0,
1592 sizeof(fc_host_active_fc4s(host)));
1593 fc_host_active_fc4s(host)[2] = 1;
1594 fc_host_active_fc4s(host)[7] = 1;
1595
1596 spin_lock_irq(phba->host->host_lock);
1597 phba->fc_flag &= ~FC_LOADING;
1598 spin_unlock_irq(phba->host->host_lock);
1599 return 0;
1600
1601out_free_irq:
1602 lpfc_stop_timer(phba);
1603 phba->work_hba_events = 0;
1604 free_irq(phba->pcidev->irq, phba);
1605out_free_sysfs_attr:
1606 lpfc_free_sysfs_attr(phba);
1607out_kthread_stop:
1608 kthread_stop(phba->worker_thread);
1609out_free_iocbq:
1610 list_for_each_entry_safe(iocbq_entry, iocbq_next,
1611 &phba->lpfc_iocb_list, list) {
1612 spin_lock_irq(phba->host->host_lock);
1613 kfree(iocbq_entry);
1614 phba->total_iocbq_bufs--;
1615 spin_unlock_irq(phba->host->host_lock);
1616 }
1617 lpfc_mem_free(phba);
1618out_free_slim:
1619 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p,
1620 phba->slim2p_mapping);
1621out_iounmap:
1622 iounmap(phba->ctrl_regs_memmap_p);
1623 iounmap(phba->slim_memmap_p);
1624out_idr_remove:
1625 idr_remove(&lpfc_hba_index, phba->brd_no);
1626out_put_host:
1627 scsi_host_put(host);
1628out_release_regions:
1629 pci_release_regions(pdev);
1630out_disable_device:
1631 pci_disable_device(pdev);
1632out:
1633 return error;
1634}
1635
1636static void __devexit
1637lpfc_pci_remove_one(struct pci_dev *pdev)
1638{
1639 struct Scsi_Host *host = pci_get_drvdata(pdev);
1640 struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata[0];
1641 unsigned long iflag;
1642
1643 lpfc_free_sysfs_attr(phba);
1644
1645 spin_lock_irqsave(phba->host->host_lock, iflag);
1646 phba->fc_flag |= FC_UNLOADING;
1647
1648 spin_unlock_irqrestore(phba->host->host_lock, iflag);
1649
1650 fc_remove_host(phba->host);
1651 scsi_remove_host(phba->host);
1652
1653 kthread_stop(phba->worker_thread);
1654
1655 /*
1656 * Bring down the SLI Layer. This step disable all interrupts,
1657 * clears the rings, discards all mailbox commands, and resets
1658 * the HBA.
1659 */
1660 lpfc_sli_hba_down(phba);
1661
1662 /* Release the irq reservation */
1663 free_irq(phba->pcidev->irq, phba);
1664
1665 lpfc_cleanup(phba, 0);
1666 lpfc_stop_timer(phba);
1667 phba->work_hba_events = 0;
1668
1669 /*
1670 * Call scsi_free before mem_free since scsi bufs are released to their
1671 * corresponding pools here.
1672 */
1673 lpfc_scsi_free(phba);
1674 lpfc_mem_free(phba);
1675
1676 /* Free resources associated with SLI2 interface */
1677 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
1678 phba->slim2p, phba->slim2p_mapping);
1679
1680 /* unmap adapter SLIM and Control Registers */
1681 iounmap(phba->ctrl_regs_memmap_p);
1682 iounmap(phba->slim_memmap_p);
1683
1684 pci_release_regions(phba->pcidev);
1685 pci_disable_device(phba->pcidev);
1686
1687 idr_remove(&lpfc_hba_index, phba->brd_no);
1688 scsi_host_put(phba->host);
1689
1690 pci_set_drvdata(pdev, NULL);
1691}
1692
1693static struct pci_device_id lpfc_id_table[] = {
1694 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
1695 PCI_ANY_ID, PCI_ANY_ID, },
James.Smart@Emulex.Com06325e72005-06-25 10:34:22 -04001696 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
1697 PCI_ANY_ID, PCI_ANY_ID, },
dea31012005-04-17 16:05:31 -05001698 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
1699 PCI_ANY_ID, PCI_ANY_ID, },
1700 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
1701 PCI_ANY_ID, PCI_ANY_ID, },
1702 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR,
1703 PCI_ANY_ID, PCI_ANY_ID, },
1704 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY,
1705 PCI_ANY_ID, PCI_ANY_ID, },
1706 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY,
1707 PCI_ANY_ID, PCI_ANY_ID, },
1708 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY,
1709 PCI_ANY_ID, PCI_ANY_ID, },
1710 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
1711 PCI_ANY_ID, PCI_ANY_ID, },
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -05001712 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE,
1713 PCI_ANY_ID, PCI_ANY_ID, },
1714 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP,
1715 PCI_ANY_ID, PCI_ANY_ID, },
1716 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP,
1717 PCI_ANY_ID, PCI_ANY_ID, },
dea31012005-04-17 16:05:31 -05001718 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
1719 PCI_ANY_ID, PCI_ANY_ID, },
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -05001720 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP,
1721 PCI_ANY_ID, PCI_ANY_ID, },
1722 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP,
1723 PCI_ANY_ID, PCI_ANY_ID, },
dea31012005-04-17 16:05:31 -05001724 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
1725 PCI_ANY_ID, PCI_ANY_ID, },
1726 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
1727 PCI_ANY_ID, PCI_ANY_ID, },
1728 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
1729 PCI_ANY_ID, PCI_ANY_ID, },
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -05001730 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP,
1731 PCI_ANY_ID, PCI_ANY_ID, },
1732 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP,
1733 PCI_ANY_ID, PCI_ANY_ID, },
dea31012005-04-17 16:05:31 -05001734 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
1735 PCI_ANY_ID, PCI_ANY_ID, },
1736 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
1737 PCI_ANY_ID, PCI_ANY_ID, },
1738 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY,
1739 PCI_ANY_ID, PCI_ANY_ID, },
1740 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101,
1741 PCI_ANY_ID, PCI_ANY_ID, },
1742 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
1743 PCI_ANY_ID, PCI_ANY_ID, },
James.Smart@Emulex.Come4adb202005-11-28 11:42:12 -05001744 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S,
1745 PCI_ANY_ID, PCI_ANY_ID, },
1746 {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S,
1747 PCI_ANY_ID, PCI_ANY_ID, },
dea31012005-04-17 16:05:31 -05001748 { 0 }
1749};
1750
1751MODULE_DEVICE_TABLE(pci, lpfc_id_table);
1752
1753static struct pci_driver lpfc_driver = {
1754 .name = LPFC_DRIVER_NAME,
1755 .id_table = lpfc_id_table,
1756 .probe = lpfc_pci_probe_one,
1757 .remove = __devexit_p(lpfc_pci_remove_one),
1758};
1759
1760static int __init
1761lpfc_init(void)
1762{
1763 int error = 0;
1764
1765 printk(LPFC_MODULE_DESC "\n");
James.Smart@Emulex.Comc44ce172005-06-25 10:34:39 -04001766 printk(LPFC_COPYRIGHT "\n");
dea31012005-04-17 16:05:31 -05001767
1768 lpfc_transport_template =
1769 fc_attach_transport(&lpfc_transport_functions);
1770 if (!lpfc_transport_template)
1771 return -ENOMEM;
1772 error = pci_register_driver(&lpfc_driver);
1773 if (error)
1774 fc_release_transport(lpfc_transport_template);
1775
1776 return error;
1777}
1778
1779static void __exit
1780lpfc_exit(void)
1781{
1782 pci_unregister_driver(&lpfc_driver);
1783 fc_release_transport(lpfc_transport_template);
1784}
1785
1786module_init(lpfc_init);
1787module_exit(lpfc_exit);
1788MODULE_LICENSE("GPL");
1789MODULE_DESCRIPTION(LPFC_MODULE_DESC);
1790MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
1791MODULE_VERSION("0:" LPFC_DRIVER_VERSION);