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Rabin Vincent27e34992010-07-02 16:52:08 +05301/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
6 */
7
8#ifndef __LINUX_MFD_STMPE_H
9#define __LINUX_MFD_STMPE_H
10
Paul Gortmaker313162d2012-01-30 11:46:54 -050011#include <linux/mutex.h>
12
13struct device;
Linus Walleij9c9e3212014-05-08 23:16:35 +020014struct regulator;
Rabin Vincent27e34992010-07-02 16:52:08 +053015
16enum stmpe_block {
17 STMPE_BLOCK_GPIO = 1 << 0,
18 STMPE_BLOCK_KEYPAD = 1 << 1,
19 STMPE_BLOCK_TOUCHSCREEN = 1 << 2,
20 STMPE_BLOCK_ADC = 1 << 3,
21 STMPE_BLOCK_PWM = 1 << 4,
22 STMPE_BLOCK_ROTATOR = 1 << 5,
23};
24
25enum stmpe_partnum {
Viresh Kumar1cda2392011-11-17 11:02:22 +053026 STMPE610,
Viresh Kumar7f7f4ea2011-11-17 11:02:23 +053027 STMPE801,
Rabin Vincent27e34992010-07-02 16:52:08 +053028 STMPE811,
29 STMPE1601,
Jean-Nicolas Graux230f13a2013-04-09 10:35:19 +020030 STMPE1801,
Rabin Vincent27e34992010-07-02 16:52:08 +053031 STMPE2401,
32 STMPE2403,
Chris Blaire31f9b82012-01-26 22:17:03 +010033 STMPE_NBR_PARTS
Rabin Vincent27e34992010-07-02 16:52:08 +053034};
35
36/*
37 * For registers whose locations differ on variants, the correct address is
38 * obtained by indexing stmpe->regs with one of the following.
39 */
40enum {
41 STMPE_IDX_CHIP_ID,
42 STMPE_IDX_ICR_LSB,
43 STMPE_IDX_IER_LSB,
Jean-Nicolas Graux230f13a2013-04-09 10:35:19 +020044 STMPE_IDX_ISR_LSB,
Rabin Vincent27e34992010-07-02 16:52:08 +053045 STMPE_IDX_ISR_MSB,
46 STMPE_IDX_GPMR_LSB,
47 STMPE_IDX_GPSR_LSB,
48 STMPE_IDX_GPCR_LSB,
49 STMPE_IDX_GPDR_LSB,
50 STMPE_IDX_GPEDR_MSB,
51 STMPE_IDX_GPRER_LSB,
52 STMPE_IDX_GPFER_LSB,
Linus Walleij80e1dd82014-11-03 16:48:47 -080053 STMPE_IDX_GPPUR_LSB,
54 STMPE_IDX_GPPDR_LSB,
Rabin Vincent27e34992010-07-02 16:52:08 +053055 STMPE_IDX_GPAFR_U_MSB,
56 STMPE_IDX_IEGPIOR_LSB,
Jean-Nicolas Graux230f13a2013-04-09 10:35:19 +020057 STMPE_IDX_ISGPIOR_LSB,
Rabin Vincent27e34992010-07-02 16:52:08 +053058 STMPE_IDX_ISGPIOR_MSB,
59 STMPE_IDX_MAX,
60};
61
62
63struct stmpe_variant_info;
Viresh Kumar1a6e4b72011-11-17 11:02:20 +053064struct stmpe_client_info;
Rabin Vincent27e34992010-07-02 16:52:08 +053065
66/**
67 * struct stmpe - STMPE MFD structure
Linus Walleij9c9e3212014-05-08 23:16:35 +020068 * @vcc: optional VCC regulator
69 * @vio: optional VIO regulator
Rabin Vincent27e34992010-07-02 16:52:08 +053070 * @lock: lock protecting I/O operations
71 * @irq_lock: IRQ bus lock
72 * @dev: device, mostly for dev_dbg()
Lee Jones76f93992012-11-05 16:10:31 +010073 * @irq_domain: IRQ domain
Viresh Kumar1a6e4b72011-11-17 11:02:20 +053074 * @client: client - i2c or spi
75 * @ci: client specific information
Om Prakash4dcaa6b2011-06-27 09:54:22 +020076 * @partnum: part number
Rabin Vincent27e34992010-07-02 16:52:08 +053077 * @variant: the detected STMPE model number
78 * @regs: list of addresses of registers which are at different addresses on
79 * different variants. Indexed by one of STMPE_IDX_*.
Viresh Kumar73de16d2011-11-08 09:44:06 +053080 * @irq: irq number for stmpe
Rabin Vincent27e34992010-07-02 16:52:08 +053081 * @num_gpios: number of gpios, differs for variants
82 * @ier: cache of IER registers for bus_lock
83 * @oldier: cache of IER registers for bus_lock
84 * @pdata: platform data
85 */
86struct stmpe {
Linus Walleij9c9e3212014-05-08 23:16:35 +020087 struct regulator *vcc;
88 struct regulator *vio;
Rabin Vincent27e34992010-07-02 16:52:08 +053089 struct mutex lock;
90 struct mutex irq_lock;
91 struct device *dev;
Lee Jones76f93992012-11-05 16:10:31 +010092 struct irq_domain *domain;
Viresh Kumar1a6e4b72011-11-17 11:02:20 +053093 void *client;
94 struct stmpe_client_info *ci;
Rabin Vincent27e34992010-07-02 16:52:08 +053095 enum stmpe_partnum partnum;
96 struct stmpe_variant_info *variant;
97 const u8 *regs;
98
Viresh Kumar73de16d2011-11-08 09:44:06 +053099 int irq;
Rabin Vincent27e34992010-07-02 16:52:08 +0530100 int num_gpios;
101 u8 ier[2];
102 u8 oldier[2];
103 struct stmpe_platform_data *pdata;
104};
105
106extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data);
107extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg);
108extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
109 u8 *values);
110extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
111 const u8 *values);
112extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val);
113extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins,
114 enum stmpe_block block);
115extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks);
116extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks);
117
Wolfram Sangb8e9cf02010-08-16 17:14:44 +0200118#define STMPE_GPIO_NOREQ_811_TOUCH (0xf0)
119
Rabin Vincent27e34992010-07-02 16:52:08 +0530120/**
Rabin Vincent27e34992010-07-02 16:52:08 +0530121 * struct stmpe_platform_data - STMPE platform data
122 * @id: device id to distinguish between multiple STMPEs on the same board
123 * @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*)
124 * @irq_trigger: IRQ trigger to use for the interrupt to the host
Sundar R Iyer5981f4e2010-07-21 11:41:07 +0530125 * @autosleep: bool to enable/disable stmpe autosleep
126 * @autosleep_timeout: inactivity timeout in milliseconds for autosleep
Viresh Kumar73de16d2011-11-08 09:44:06 +0530127 * @irq_over_gpio: true if gpio is used to get irq
128 * @irq_gpio: gpio number over which irq will be requested (significant only if
129 * irq_over_gpio is true)
Rabin Vincent27e34992010-07-02 16:52:08 +0530130 */
131struct stmpe_platform_data {
132 int id;
133 unsigned int blocks;
Rabin Vincent27e34992010-07-02 16:52:08 +0530134 unsigned int irq_trigger;
Sundar R Iyer5981f4e2010-07-21 11:41:07 +0530135 bool autosleep;
Viresh Kumar73de16d2011-11-08 09:44:06 +0530136 bool irq_over_gpio;
137 int irq_gpio;
Sundar R Iyer5981f4e2010-07-21 11:41:07 +0530138 int autosleep_timeout;
Rabin Vincent27e34992010-07-02 16:52:08 +0530139};
140
Rabin Vincent27e34992010-07-02 16:52:08 +0530141#endif