blob: 0e0ba3b913f7d99997b0ad12f1dd8420849557aa [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
Mike Frysinger53f8a252007-11-15 15:48:01 +08006mainmenu "Blackfin Kernel Configuration"
Bryan Wu1394f032007-05-06 14:50:22 -07007
8config MMU
9 bool
10 default n
11
12config FPU
13 bool
14 default n
15
16config RWSEM_GENERIC_SPINLOCK
17 bool
18 default y
19
20config RWSEM_XCHGADD_ALGORITHM
21 bool
22 default n
23
24config BLACKFIN
25 bool
26 default y
27
Aubrey Lie3defff2007-05-21 18:09:11 +080028config ZONE_DMA
29 bool
30 default y
31
Bryan Wu1394f032007-05-06 14:50:22 -070032config BFIN
33 bool
34 default y
35
36config SEMAPHORE_SLEEPERS
37 bool
38 default y
39
40config GENERIC_FIND_NEXT_BIT
41 bool
42 default y
43
44config GENERIC_HWEIGHT
45 bool
46 default y
47
48config GENERIC_HARDIRQS
49 bool
50 default y
51
52config GENERIC_IRQ_PROBE
Mike Frysingere4e9a7a2007-11-15 20:39:34 +080053 bool
Bryan Wu1394f032007-05-06 14:50:22 -070054 default y
55
56config GENERIC_TIME
57 bool
58 default n
59
Michael Hennerichb2d15832007-07-24 15:46:36 +080060config GENERIC_GPIO
Bryan Wu1394f032007-05-06 14:50:22 -070061 bool
62 default y
63
64config FORCE_MAX_ZONEORDER
65 int
66 default "14"
67
68config GENERIC_CALIBRATE_DELAY
69 bool
70 default y
71
72config IRQCHIP_DEMUX_GPIO
73 bool
Michael Hennerich59003142007-10-21 16:54:27 +080074 depends on (BF52x || BF53x || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -070075 default y
76
77source "init/Kconfig"
78source "kernel/Kconfig.preempt"
79
80menu "Blackfin Processor Options"
81
82comment "Processor and Board Settings"
83
84choice
85 prompt "CPU"
86 default BF533
87
Michael Hennerich59003142007-10-21 16:54:27 +080088config BF522
89 bool "BF522"
90 help
91 BF522 Processor Support.
92
93config BF525
94 bool "BF525"
95 help
96 BF525 Processor Support.
97
98config BF527
99 bool "BF527"
100 help
101 BF527 Processor Support.
102
Bryan Wu1394f032007-05-06 14:50:22 -0700103config BF531
104 bool "BF531"
105 help
106 BF531 Processor Support.
107
108config BF532
109 bool "BF532"
110 help
111 BF532 Processor Support.
112
113config BF533
114 bool "BF533"
115 help
116 BF533 Processor Support.
117
118config BF534
119 bool "BF534"
120 help
121 BF534 Processor Support.
122
123config BF536
124 bool "BF536"
125 help
126 BF536 Processor Support.
127
128config BF537
129 bool "BF537"
130 help
131 BF537 Processor Support.
132
Roy Huang24a07a12007-07-12 22:41:45 +0800133config BF542
134 bool "BF542"
135 help
136 BF542 Processor Support.
137
138config BF544
139 bool "BF544"
140 help
141 BF544 Processor Support.
142
143config BF548
144 bool "BF548"
145 help
146 BF548 Processor Support.
147
148config BF549
149 bool "BF549"
150 help
151 BF549 Processor Support.
152
Bryan Wu1394f032007-05-06 14:50:22 -0700153config BF561
154 bool "BF561"
155 help
156 Not Supported Yet - Work in progress - BF561 Processor Support.
157
158endchoice
159
160choice
161 prompt "Silicon Rev"
Michael Hennerich59003142007-10-21 16:54:27 +0800162 default BF_REV_0_1 if BF527
Bryan Wu1394f032007-05-06 14:50:22 -0700163 default BF_REV_0_2 if BF537
164 default BF_REV_0_3 if BF533
Roy Huang24a07a12007-07-12 22:41:45 +0800165 default BF_REV_0_0 if BF549
166
167config BF_REV_0_0
168 bool "0.0"
Mike Frysingerd07f4382007-11-15 15:49:17 +0800169 depends on (BF52x || BF54x)
Michael Hennerich59003142007-10-21 16:54:27 +0800170
171config BF_REV_0_1
Mike Frysingerd07f4382007-11-15 15:49:17 +0800172 bool "0.1"
173 depends on (BF52x || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700174
175config BF_REV_0_2
176 bool "0.2"
177 depends on (BF537 || BF536 || BF534)
178
179config BF_REV_0_3
180 bool "0.3"
181 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
182
183config BF_REV_0_4
184 bool "0.4"
185 depends on (BF561 || BF533 || BF532 || BF531)
186
187config BF_REV_0_5
188 bool "0.5"
189 depends on (BF561 || BF533 || BF532 || BF531)
190
Jie Zhangde3025f2007-06-25 18:04:12 +0800191config BF_REV_ANY
192 bool "any"
193
194config BF_REV_NONE
195 bool "none"
196
Bryan Wu1394f032007-05-06 14:50:22 -0700197endchoice
198
Michael Hennerich59003142007-10-21 16:54:27 +0800199config BF52x
200 bool
201 depends on (BF522 || BF525 || BF527)
202 default y
203
Roy Huang24a07a12007-07-12 22:41:45 +0800204config BF53x
205 bool
206 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
207 default y
208
209config BF54x
210 bool
211 depends on (BF542 || BF544 || BF548 || BF549)
212 default y
213
Bryan Wu1394f032007-05-06 14:50:22 -0700214config BFIN_DUAL_CORE
215 bool
216 depends on (BF561)
217 default y
218
219config BFIN_SINGLE_CORE
220 bool
221 depends on !BFIN_DUAL_CORE
222 default y
223
Bryan Wu1394f032007-05-06 14:50:22 -0700224config MEM_GENERIC_BOARD
225 bool
226 depends on GENERIC_BOARD
227 default y
228
229config MEM_MT48LC64M4A2FB_7E
230 bool
231 depends on (BFIN533_STAMP)
232 default y
233
234config MEM_MT48LC16M16A2TG_75
235 bool
236 depends on (BFIN533_EZKIT || BFIN561_EZKIT \
Javier Herreroab472a02007-10-29 16:14:44 +0800237 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM \
238 || H8606_HVSISTEMAS)
Bryan Wu1394f032007-05-06 14:50:22 -0700239 default y
240
241config MEM_MT48LC32M8A2_75
242 bool
243 depends on (BFIN537_STAMP || PNAV10)
244 default y
245
246config MEM_MT48LC8M32B2B5_7
247 bool
248 depends on (BFIN561_BLUETECHNIX_CM)
249 default y
250
Michael Hennerich59003142007-10-21 16:54:27 +0800251config MEM_MT48LC32M16A2TG_75
252 bool
253 depends on (BFIN527_EZKIT)
254 default y
255
Bryan Wu1394f032007-05-06 14:50:22 -0700256config BFIN_SHARED_FLASH_ENET
257 bool
258 depends on (BFIN533_STAMP)
259 default y
260
Michael Hennerich59003142007-10-21 16:54:27 +0800261source "arch/blackfin/mach-bf527/Kconfig"
Bryan Wu1394f032007-05-06 14:50:22 -0700262source "arch/blackfin/mach-bf533/Kconfig"
263source "arch/blackfin/mach-bf561/Kconfig"
264source "arch/blackfin/mach-bf537/Kconfig"
Roy Huang24a07a12007-07-12 22:41:45 +0800265source "arch/blackfin/mach-bf548/Kconfig"
Bryan Wu1394f032007-05-06 14:50:22 -0700266
267menu "Board customizations"
268
269config CMDLINE_BOOL
270 bool "Default bootloader kernel arguments"
271
272config CMDLINE
273 string "Initial kernel command string"
274 depends on CMDLINE_BOOL
275 default "console=ttyBF0,57600"
276 help
277 If you don't have a boot loader capable of passing a command line string
278 to the kernel, you may specify one here. As a minimum, you should specify
279 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
280
Robin Getzf16295e2007-08-03 18:07:17 +0800281comment "Clock/PLL Setup"
Bryan Wu1394f032007-05-06 14:50:22 -0700282
283config CLKIN_HZ
284 int "Crystal Frequency in Hz"
285 default "11059200" if BFIN533_STAMP
286 default "27000000" if BFIN533_EZKIT
Javier Herreroab472a02007-10-29 16:14:44 +0800287 default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS)
Bryan Wu1394f032007-05-06 14:50:22 -0700288 default "30000000" if BFIN561_EZKIT
289 default "24576000" if PNAV10
290 help
291 The frequency of CLKIN crystal oscillator on the board in Hz.
292
Robin Getzf16295e2007-08-03 18:07:17 +0800293config BFIN_KERNEL_CLOCK
294 bool "Re-program Clocks while Kernel boots?"
295 default n
296 help
297 This option decides if kernel clocks are re-programed from the
298 bootloader settings. If the clocks are not set, the SDRAM settings
299 are also not changed, and the Bootloader does 100% of the hardware
300 configuration.
301
302config PLL_BYPASS
Mike Frysingere4e9a7a2007-11-15 20:39:34 +0800303 bool "Bypass PLL"
304 depends on BFIN_KERNEL_CLOCK
305 default n
Robin Getzf16295e2007-08-03 18:07:17 +0800306
307config CLKIN_HALF
308 bool "Half Clock In"
309 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
310 default n
311 help
312 If this is set the clock will be divided by 2, before it goes to the PLL.
313
314config VCO_MULT
315 int "VCO Multiplier"
316 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
317 range 1 64
318 default "22" if BFIN533_EZKIT
319 default "45" if BFIN533_STAMP
Michael Hennerich59003142007-10-21 16:54:27 +0800320 default "20" if (BFIN537_STAMP || BFIN527_EZKIT)
Robin Getzf16295e2007-08-03 18:07:17 +0800321 default "22" if BFIN533_BLUETECHNIX_CM
322 default "20" if BFIN537_BLUETECHNIX_CM
323 default "20" if BFIN561_BLUETECHNIX_CM
324 default "20" if BFIN561_EZKIT
Javier Herreroab472a02007-10-29 16:14:44 +0800325 default "16" if H8606_HVSISTEMAS
Robin Getzf16295e2007-08-03 18:07:17 +0800326 help
327 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
328 PLL Frequency = (Crystal Frequency) * (this setting)
329
330choice
331 prompt "Core Clock Divider"
332 depends on BFIN_KERNEL_CLOCK
333 default CCLK_DIV_1
334 help
335 This sets the frequency of the core. It can be 1, 2, 4 or 8
336 Core Frequency = (PLL frequency) / (this setting)
337
338config CCLK_DIV_1
339 bool "1"
340
341config CCLK_DIV_2
342 bool "2"
343
344config CCLK_DIV_4
345 bool "4"
346
347config CCLK_DIV_8
348 bool "8"
349endchoice
350
351config SCLK_DIV
352 int "System Clock Divider"
353 depends on BFIN_KERNEL_CLOCK
354 range 1 15
355 default 5 if BFIN533_EZKIT
356 default 5 if BFIN533_STAMP
Michael Hennerich59003142007-10-21 16:54:27 +0800357 default 4 if (BFIN537_STAMP || BFIN527_EZKIT)
Robin Getzf16295e2007-08-03 18:07:17 +0800358 default 5 if BFIN533_BLUETECHNIX_CM
359 default 4 if BFIN537_BLUETECHNIX_CM
360 default 4 if BFIN561_BLUETECHNIX_CM
361 default 5 if BFIN561_EZKIT
Javier Herreroab472a02007-10-29 16:14:44 +0800362 default 3 if H8606_HVSISTEMAS
Robin Getzf16295e2007-08-03 18:07:17 +0800363 help
364 This sets the frequency of the system clock (including SDRAM or DDR).
365 This can be between 1 and 15
366 System Clock = (PLL frequency) / (this setting)
367
368#
369# Max & Min Speeds for various Chips
370#
371config MAX_VCO_HZ
372 int
373 default 600000000 if BF522
374 default 600000000 if BF525
375 default 600000000 if BF527
376 default 400000000 if BF531
377 default 400000000 if BF532
378 default 750000000 if BF533
379 default 500000000 if BF534
380 default 400000000 if BF536
381 default 600000000 if BF537
382 default 533000000 if BF538
383 default 533000000 if BF539
384 default 600000000 if BF542
385 default 533000000 if BF544
386 default 533000000 if BF549
387 default 600000000 if BF561
388
389config MIN_VCO_HZ
390 int
391 default 50000000
392
393config MAX_SCLK_HZ
394 int
395 default 133000000
396
397config MIN_SCLK_HZ
398 int
399 default 27000000
400
401comment "Kernel Timer/Scheduler"
402
403source kernel/Kconfig.hz
404
405comment "Memory Setup"
406
Bryan Wu1394f032007-05-06 14:50:22 -0700407config MEM_SIZE
408 int "SDRAM Memory Size in MBytes"
409 default 32 if BFIN533_EZKIT
Michael Hennerich59003142007-10-21 16:54:27 +0800410 default 64 if BFIN527_EZKIT
Bryan Wu1394f032007-05-06 14:50:22 -0700411 default 64 if BFIN537_STAMP
412 default 64 if BFIN561_EZKIT
413 default 128 if BFIN533_STAMP
414 default 64 if PNAV10
Javier Herreroab472a02007-10-29 16:14:44 +0800415 default 32 if H8606_HVSISTEMAS
Bryan Wu1394f032007-05-06 14:50:22 -0700416
417config MEM_ADD_WIDTH
418 int "SDRAM Memory Address Width"
419 default 9 if BFIN533_EZKIT
420 default 9 if BFIN561_EZKIT
Javier Herreroab472a02007-10-29 16:14:44 +0800421 default 9 if H8606_HVSISTEMAS
Michael Hennerich59003142007-10-21 16:54:27 +0800422 default 10 if BFIN527_EZKIT
Bryan Wu1394f032007-05-06 14:50:22 -0700423 default 10 if BFIN537_STAMP
424 default 11 if BFIN533_STAMP
425 default 10 if PNAV10
426
427config ENET_FLASH_PIN
428 int "PF port/pin used for flash and ethernet sharing"
429 depends on (BFIN533_STAMP)
430 default 0
431 help
432 PF port/pin used for flash and ethernet sharing to allow other PF
433 pins to be used on other platforms without having to touch common
434 code.
435 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
436
437config BOOT_LOAD
438 hex "Kernel load address for booting"
439 default "0x1000"
Mike Frysinger2d8f1612007-08-05 14:06:16 +0800440 range 0x1000 0x20000000
Bryan Wu1394f032007-05-06 14:50:22 -0700441 help
442 This option allows you to set the load address of the kernel.
443 This can be useful if you are on a board which has a small amount
444 of memory or you wish to reserve some memory at the beginning of
445 the address space.
446
Mike Frysinger2d8f1612007-08-05 14:06:16 +0800447 Note that you need to keep this value above 4k (0x1000) as this
448 memory region is used to capture NULL pointer references as well
449 as some core kernel functions.
Bryan Wu1394f032007-05-06 14:50:22 -0700450
451comment "LED Status Indicators"
452 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
453
454config BFIN_ALIVE_LED
455 bool "Enable Board Alive"
456 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
457 default n
458 help
459 Blink the LEDs you select when the kernel is running. Helps detect
460 a hung kernel.
461
462config BFIN_ALIVE_LED_NUM
463 int "LED"
464 depends on BFIN_ALIVE_LED
465 range 1 3 if BFIN533_STAMP
466 default "3" if BFIN533_STAMP
467 help
468 Select the LED (marked on the board) for you to blink.
469
470config BFIN_IDLE_LED
471 bool "Enable System Load/Idle LED"
472 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
473 default n
474 help
475 Blinks the LED you select when to determine kernel load.
476
477config BFIN_IDLE_LED_NUM
478 int "LED"
479 depends on BFIN_IDLE_LED
480 range 1 3 if BFIN533_STAMP
481 default "2" if BFIN533_STAMP
482 help
483 Select the LED (marked on the board) for you to blink.
484
Mike Frysingerf0b5d122007-08-05 17:03:59 +0800485choice
486 prompt "Blackfin Exception Scratch Register"
487 default BFIN_SCRATCH_REG_RETN
488 help
489 Select the resource to reserve for the Exception handler:
490 - RETN: Non-Maskable Interrupt (NMI)
491 - RETE: Exception Return (JTAG/ICE)
492 - CYCLES: Performance counter
493
494 If you are unsure, please select "RETN".
495
496config BFIN_SCRATCH_REG_RETN
497 bool "RETN"
498 help
499 Use the RETN register in the Blackfin exception handler
500 as a stack scratch register. This means you cannot
501 safely use NMI on the Blackfin while running Linux, but
502 you can debug the system with a JTAG ICE and use the
503 CYCLES performance registers.
504
505 If you are unsure, please select "RETN".
506
507config BFIN_SCRATCH_REG_RETE
508 bool "RETE"
509 help
510 Use the RETE register in the Blackfin exception handler
511 as a stack scratch register. This means you cannot
512 safely use a JTAG ICE while debugging a Blackfin board,
513 but you can safely use the CYCLES performance registers
514 and the NMI.
515
516 If you are unsure, please select "RETN".
517
518config BFIN_SCRATCH_REG_CYCLES
519 bool "CYCLES"
520 help
521 Use the CYCLES register in the Blackfin exception handler
522 as a stack scratch register. This means you cannot
523 safely use the CYCLES performance registers on a Blackfin
524 board at anytime, but you can debug the system with a JTAG
525 ICE and use the NMI.
526
527 If you are unsure, please select "RETN".
528
529endchoice
530
Bryan Wu1394f032007-05-06 14:50:22 -0700531#
532# Sorry - but you need to put the hex address here -
533#
534
535# Flag Data register
536config BFIN_ALIVE_LED_PORT
537 hex
538 default 0xFFC00700 if (BFIN533_STAMP)
539
540# Peripheral Flag Direction Register
541config BFIN_ALIVE_LED_DPORT
542 hex
543 default 0xFFC00730 if (BFIN533_STAMP)
544
545config BFIN_ALIVE_LED_PIN
546 hex
547 default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
548 default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
549 default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
550
551config BFIN_IDLE_LED_PORT
552 hex
553 default 0xFFC00700 if (BFIN533_STAMP)
554
555# Peripheral Flag Direction Register
556config BFIN_IDLE_LED_DPORT
557 hex
558 default 0xFFC00730 if (BFIN533_STAMP)
559
560config BFIN_IDLE_LED_PIN
561 hex
562 default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
563 default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
564 default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
565
Bryan Wu1394f032007-05-06 14:50:22 -0700566endmenu
567
568
569menu "Blackfin Kernel Optimizations"
570
Bryan Wu1394f032007-05-06 14:50:22 -0700571comment "Memory Optimizations"
572
573config I_ENTRY_L1
574 bool "Locate interrupt entry code in L1 Memory"
575 default y
576 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200577 If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked
578 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700579
580config EXCPT_IRQ_SYSC_L1
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200581 bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory"
Bryan Wu1394f032007-05-06 14:50:22 -0700582 default y
583 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200584 If enabled, the entire ASM lowlevel exception and interrupt entry code
585 (STORE/RESTORE CONTEXT) is linked into L1 instruction memory.
586 (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700587
588config DO_IRQ_L1
589 bool "Locate frequently called do_irq dispatcher function in L1 Memory"
590 default y
591 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200592 If enabled, the frequently called do_irq dispatcher function is linked
593 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700594
595config CORE_TIMER_IRQ_L1
596 bool "Locate frequently called timer_interrupt() function in L1 Memory"
597 default y
598 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200599 If enabled, the frequently called timer_interrupt() function is linked
600 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700601
602config IDLE_L1
603 bool "Locate frequently idle function in L1 Memory"
604 default y
605 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200606 If enabled, the frequently called idle function is linked
607 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700608
609config SCHEDULE_L1
610 bool "Locate kernel schedule function in L1 Memory"
611 default y
612 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200613 If enabled, the frequently called kernel schedule is linked
614 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700615
616config ARITHMETIC_OPS_L1
617 bool "Locate kernel owned arithmetic functions in L1 Memory"
618 default y
619 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200620 If enabled, arithmetic functions are linked
621 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700622
623config ACCESS_OK_L1
624 bool "Locate access_ok function in L1 Memory"
625 default y
626 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200627 If enabled, the access_ok function is linked
628 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700629
630config MEMSET_L1
631 bool "Locate memset function in L1 Memory"
632 default y
633 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200634 If enabled, the memset function is linked
635 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700636
637config MEMCPY_L1
638 bool "Locate memcpy function in L1 Memory"
639 default y
640 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200641 If enabled, the memcpy function is linked
642 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700643
644config SYS_BFIN_SPINLOCK_L1
645 bool "Locate sys_bfin_spinlock function in L1 Memory"
646 default y
647 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200648 If enabled, sys_bfin_spinlock function is linked
649 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700650
651config IP_CHECKSUM_L1
652 bool "Locate IP Checksum function in L1 Memory"
653 default n
654 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200655 If enabled, the IP Checksum function is linked
656 into L1 instruction memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700657
658config CACHELINE_ALIGNED_L1
659 bool "Locate cacheline_aligned data to L1 Data Memory"
Michael Hennerich157cc5a2007-07-12 16:20:21 +0800660 default y if !BF54x
661 default n if BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700662 depends on !BF531
663 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200664 If enabled, cacheline_anligned data is linked
665 into L1 data memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700666
667config SYSCALL_TAB_L1
668 bool "Locate Syscall Table L1 Data Memory"
669 default n
670 depends on !BF531
671 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200672 If enabled, the Syscall LUT is linked
673 into L1 data memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700674
675config CPLB_SWITCH_TAB_L1
676 bool "Locate CPLB Switch Tables L1 Data Memory"
677 default n
678 depends on !BF531
679 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +0200680 If enabled, the CPLB Switch Tables are linked
681 into L1 data memory. (less latency)
Bryan Wu1394f032007-05-06 14:50:22 -0700682
683endmenu
684
685
686choice
687 prompt "Kernel executes from"
688 help
689 Choose the memory type that the kernel will be running in.
690
691config RAMKERNEL
692 bool "RAM"
693 help
694 The kernel will be resident in RAM when running.
695
696config ROMKERNEL
697 bool "ROM"
698 help
699 The kernel will be resident in FLASH/ROM when running.
700
701endchoice
702
703source "mm/Kconfig"
704
Bryan Wudb0fa202007-07-12 14:55:05 +0800705config LARGE_ALLOCS
706 bool "Allow allocating large blocks (> 1MB) of memory"
707 help
708 Allow the slab memory allocator to keep chains for very large
709 memory sizes - upto 32MB. You may need this if your system has
710 a lot of RAM, and you need to able to allocate very large
711 contiguous chunks. If unsure, say N.
712
Mike Frysinger780431e2007-10-21 23:37:54 +0800713config BFIN_GPTIMERS
714 tristate "Enable Blackfin General Purpose Timers API"
715 default n
716 help
717 Enable support for the General Purpose Timers API. If you
718 are unsure, say N.
719
720 To compile this driver as a module, choose M here: the module
721 will be called gptimers.ko.
722
Bryan Wu1394f032007-05-06 14:50:22 -0700723config BFIN_DMA_5XX
724 bool "Enable DMA Support"
Michael Hennerich59003142007-10-21 16:54:27 +0800725 depends on (BF52x || BF53x || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700726 default y
727 help
728 DMA driver for BF5xx.
729
730choice
731 prompt "Uncached SDRAM region"
732 default DMA_UNCACHED_1M
Adrian Bunk247537b2007-09-26 20:02:52 +0200733 depends on BFIN_DMA_5XX
Bryan Wu1394f032007-05-06 14:50:22 -0700734config DMA_UNCACHED_2M
735 bool "Enable 2M DMA region"
736config DMA_UNCACHED_1M
737 bool "Enable 1M DMA region"
738config DMA_UNCACHED_NONE
739 bool "Disable DMA region"
740endchoice
741
742
743comment "Cache Support"
Robin Getz3bebca22007-10-10 23:55:26 +0800744config BFIN_ICACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700745 bool "Enable ICACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800746config BFIN_DCACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700747 bool "Enable DCACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800748config BFIN_DCACHE_BANKA
Bryan Wu1394f032007-05-06 14:50:22 -0700749 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
Robin Getz3bebca22007-10-10 23:55:26 +0800750 depends on BFIN_DCACHE && !BF531
Bryan Wu1394f032007-05-06 14:50:22 -0700751 default n
Robin Getz3bebca22007-10-10 23:55:26 +0800752config BFIN_ICACHE_LOCK
753 bool "Enable Instruction Cache Locking"
Bryan Wu1394f032007-05-06 14:50:22 -0700754
755choice
756 prompt "Policy"
Robin Getz3bebca22007-10-10 23:55:26 +0800757 depends on BFIN_DCACHE
758 default BFIN_WB
759config BFIN_WB
Bryan Wu1394f032007-05-06 14:50:22 -0700760 bool "Write back"
761 help
762 Write Back Policy:
763 Cached data will be written back to SDRAM only when needed.
764 This can give a nice increase in performance, but beware of
765 broken drivers that do not properly invalidate/flush their
766 cache.
767
768 Write Through Policy:
769 Cached data will always be written back to SDRAM when the
770 cache is updated. This is a completely safe setting, but
771 performance is worse than Write Back.
772
773 If you are unsure of the options and you want to be safe,
774 then go with Write Through.
775
Robin Getz3bebca22007-10-10 23:55:26 +0800776config BFIN_WT
Bryan Wu1394f032007-05-06 14:50:22 -0700777 bool "Write through"
778 help
779 Write Back Policy:
780 Cached data will be written back to SDRAM only when needed.
781 This can give a nice increase in performance, but beware of
782 broken drivers that do not properly invalidate/flush their
783 cache.
784
785 Write Through Policy:
786 Cached data will always be written back to SDRAM when the
787 cache is updated. This is a completely safe setting, but
788 performance is worse than Write Back.
789
790 If you are unsure of the options and you want to be safe,
791 then go with Write Through.
792
793endchoice
794
795config L1_MAX_PIECE
796 int "Set the max L1 SRAM pieces"
797 default 16
798 help
799 Set the max memory pieces for the L1 SRAM allocation algorithm.
800 Min value is 16. Max value is 1024.
801
Bryan Wu1394f032007-05-06 14:50:22 -0700802comment "Asynchonous Memory Configuration"
803
Mike Frysingerddf416b2007-10-10 18:06:47 +0800804menu "EBIU_AMGCTL Global Control"
Bryan Wu1394f032007-05-06 14:50:22 -0700805config C_AMCKEN
806 bool "Enable CLKOUT"
807 default y
808
809config C_CDPRIO
810 bool "DMA has priority over core for ext. accesses"
Michael Hennerich9be343c2007-07-12 11:58:44 +0800811 depends on !BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700812 default n
813
814config C_B0PEN
815 depends on BF561
816 bool "Bank 0 16 bit packing enable"
817 default y
818
819config C_B1PEN
820 depends on BF561
821 bool "Bank 1 16 bit packing enable"
822 default y
823
824config C_B2PEN
825 depends on BF561
826 bool "Bank 2 16 bit packing enable"
827 default y
828
829config C_B3PEN
830 depends on BF561
831 bool "Bank 3 16 bit packing enable"
832 default n
833
834choice
835 prompt"Enable Asynchonous Memory Banks"
836 default C_AMBEN_ALL
837
838config C_AMBEN
839 bool "Disable All Banks"
840
841config C_AMBEN_B0
842 bool "Enable Bank 0"
843
844config C_AMBEN_B0_B1
845 bool "Enable Bank 0 & 1"
846
847config C_AMBEN_B0_B1_B2
848 bool "Enable Bank 0 & 1 & 2"
849
850config C_AMBEN_ALL
851 bool "Enable All Banks"
852endchoice
853endmenu
854
855menu "EBIU_AMBCTL Control"
856config BANK_0
857 hex "Bank 0"
858 default 0x7BB0
859
860config BANK_1
861 hex "Bank 1"
862 default 0x7BB0
863
864config BANK_2
865 hex "Bank 2"
866 default 0x7BB0
867
868config BANK_3
869 hex "Bank 3"
870 default 0x99B3
871endmenu
872
873endmenu
874
875#############################################################################
876menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
877
878config PCI
879 bool "PCI support"
880 help
881 Support for PCI bus.
882
883source "drivers/pci/Kconfig"
884
885config HOTPLUG
886 bool "Support for hot-pluggable device"
887 help
888 Say Y here if you want to plug devices into your computer while
889 the system is running, and be able to use them quickly. In many
890 cases, the devices can likewise be unplugged at any time too.
891
892 One well known example of this is PCMCIA- or PC-cards, credit-card
893 size devices such as network cards, modems or hard drives which are
894 plugged into slots found on all modern laptop computers. Another
895 example, used on modern desktops as well as laptops, is USB.
896
897 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
898 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
899 Then your kernel will automatically call out to a user mode "policy
900 agent" (/sbin/hotplug) to load modules and set up software needed
901 to use devices as you hotplug them.
902
903source "drivers/pcmcia/Kconfig"
904
905source "drivers/pci/hotplug/Kconfig"
906
907endmenu
908
909menu "Executable file formats"
910
911source "fs/Kconfig.binfmt"
912
913endmenu
914
915menu "Power management options"
916source "kernel/power/Kconfig"
917
918choice
919 prompt "Select PM Wakeup Event Source"
920 default PM_WAKEUP_GPIO_BY_SIC_IWR
921 depends on PM
922 help
923 If you have a GPIO already configured as input with the corresponding PORTx_MASK
924 bit set - "Specify Wakeup Event by SIC_IWR value"
925
926config PM_WAKEUP_GPIO_BY_SIC_IWR
927 bool "Specify Wakeup Event by SIC_IWR value"
928config PM_WAKEUP_BY_GPIO
929 bool "Cause Wakeup Event by GPIO"
930config PM_WAKEUP_GPIO_API
931 bool "Configure Wakeup Event by PM GPIO API"
932
933endchoice
934
935config PM_WAKEUP_SIC_IWR
936 hex "Wakeup Events (SIC_IWR)"
937 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
938 default 0x80000000 if (BF537 || BF536 || BF534)
939 default 0x100000 if (BF533 || BF532 || BF531)
940
941config PM_WAKEUP_GPIO_NUMBER
942 int "Wakeup GPIO number"
943 range 0 47
944 depends on PM_WAKEUP_BY_GPIO
945 default 2 if BFIN537_STAMP
946
947choice
948 prompt "GPIO Polarity"
949 depends on PM_WAKEUP_BY_GPIO
950 default PM_WAKEUP_GPIO_POLAR_H
951config PM_WAKEUP_GPIO_POLAR_H
952 bool "Active High"
953config PM_WAKEUP_GPIO_POLAR_L
954 bool "Active Low"
955config PM_WAKEUP_GPIO_POLAR_EDGE_F
956 bool "Falling EDGE"
957config PM_WAKEUP_GPIO_POLAR_EDGE_R
958 bool "Rising EDGE"
959config PM_WAKEUP_GPIO_POLAR_EDGE_B
960 bool "Both EDGE"
961endchoice
962
963endmenu
964
Roy Huang24a07a12007-07-12 22:41:45 +0800965if (BF537 || BF533 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700966
967menu "CPU Frequency scaling"
968
969source "drivers/cpufreq/Kconfig"
970
971config CPU_FREQ
972 bool
973 default n
974 help
975 If you want to enable this option, you should select the
976 DPMC driver from Character Devices.
977endmenu
978
979endif
980
981source "net/Kconfig"
982
983source "drivers/Kconfig"
984
985source "fs/Kconfig"
986
Mathieu Desnoyers09caded2007-10-18 23:41:05 -0700987source "kernel/Kconfig.instrumentation"
Bryan Wu1394f032007-05-06 14:50:22 -0700988
989menu "Kernel hacking"
990
991source "lib/Kconfig.debug"
992
993config DEBUG_HWERR
994 bool "Hardware error interrupt debugging"
995 depends on DEBUG_KERNEL
996 help
997 When enabled, the hardware error interrupt is never disabled, and
998 will happen immediately when an error condition occurs. This comes
999 at a slight cost in code size, but is necessary if you are getting
1000 hardware error interrupts and need to know where they are coming
1001 from.
1002
1003config DEBUG_ICACHE_CHECK
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02001004 bool "Check Instruction cache coherency"
Bryan Wu1394f032007-05-06 14:50:22 -07001005 depends on DEBUG_KERNEL
1006 depends on DEBUG_HWERR
1007 help
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02001008 Say Y here if you are getting weird unexplained errors. This will
1009 ensure that icache is what SDRAM says it should be by doing a
1010 byte wise comparison between SDRAM and instruction cache. This
Bryan Wu1394f032007-05-06 14:50:22 -07001011 also relocates the irq_panic() function to L1 memory, (which is
1012 un-cached).
1013
Bryan Wu1394f032007-05-06 14:50:22 -07001014config DEBUG_HUNT_FOR_ZERO
1015 bool "Catch NULL pointer reads/writes"
1016 default y
1017 help
1018 Say Y here to catch reads/writes to anywhere in the memory range
1019 from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
1020 catching common programming errors such as NULL pointer dereferences.
1021
1022 Misbehaving applications will be killed (generate a SEGV) while the
1023 kernel will trigger a panic.
1024
1025 Enabling this option will take up an extra entry in CPLB table.
1026 Otherwise, there is no extra overhead.
1027
Robin Getz518039b2007-07-25 11:03:28 +08001028config DEBUG_BFIN_HWTRACE_ON
1029 bool "Turn on Blackfin's Hardware Trace"
1030 default y
1031 help
1032 All Blackfins include a Trace Unit which stores a history of the last
1033 16 changes in program flow taken by the program sequencer. The history
1034 allows the user to recreate the program sequencer’s recent path. This
1035 can be handy when an application dies - we print out the execution
1036 path of how it got to the offending instruction.
1037
1038 By turning this off, you may save a tiny amount of power.
1039
1040choice
1041 prompt "Omit loop Tracing"
1042 default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1043 depends on DEBUG_BFIN_HWTRACE_ON
1044 help
1045 The trace buffer can be configured to omit recording of changes in
1046 program flow that match either the last entry or one of the last
1047 two entries. Omitting one of these entries from the record prevents
1048 the trace buffer from overflowing because of any sort of loop (for, do
1049 while, etc) in the program.
1050
1051 Because zero-overhead Hardware loops are not recorded in the trace buffer,
1052 this feature can be used to prevent trace overflow from loops that
1053 are nested four deep.
1054
1055config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1056 bool "Trace all Loops"
1057 help
1058 The trace buffer records all changes of flow
1059
1060config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1061 bool "Compress single-level loops"
1062 help
1063 The trace buffer does not record single loops - helpful if trace
1064 is spinning on a while or do loop.
1065
1066config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1067 bool "Compress two-level loops"
1068 help
1069 The trace buffer does not record loops two levels deep. Helpful if
1070 the trace is spinning in a nested loop
1071
1072endchoice
1073
1074config DEBUG_BFIN_HWTRACE_COMPRESSION
1075 int
1076 depends on DEBUG_BFIN_HWTRACE_ON
1077 default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1078 default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1079 default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1080
1081
1082config DEBUG_BFIN_HWTRACE_EXPAND
1083 bool "Expand Trace Buffer greater than 16 entries"
1084 depends on DEBUG_BFIN_HWTRACE_ON
1085 default n
1086 help
1087 By selecting this option, every time the 16 hardware entries in
1088 the Blackfin's HW Trace buffer are full, the kernel will move them
1089 into a software buffer, for dumping when there is an issue. This
1090 has a great impact on performance, (an interrupt every 16 change of
1091 flows) and should normally be turned off, except in those nasty
1092 debugging sessions
1093
1094config DEBUG_BFIN_HWTRACE_EXPAND_LEN
1095 int "Size of Trace buffer (in power of 2k)"
1096 range 0 4
1097 depends on DEBUG_BFIN_HWTRACE_EXPAND
1098 default 1
1099 help
1100 This sets the size of the software buffer that the trace information
1101 is kept in.
1102 0 for (2^0) 1k, or 256 entries,
1103 1 for (2^1) 2k, or 512 entries,
1104 2 for (2^2) 4k, or 1024 entries,
1105 3 for (2^3) 8k, or 2048 entries,
1106 4 for (2^4) 16k, or 4096 entries
1107
Bryan Wu1394f032007-05-06 14:50:22 -07001108config DEBUG_BFIN_NO_KERN_HWTRACE
1109 bool "Trace user apps (turn off hwtrace in kernel)"
Robin Getz518039b2007-07-25 11:03:28 +08001110 depends on DEBUG_BFIN_HWTRACE_ON
Bryan Wu1394f032007-05-06 14:50:22 -07001111 default n
1112 help
1113 Some pieces of the kernel contain a lot of flow changes which can
1114 quickly fill up the hardware trace buffer. When debugging crashes,
1115 the hardware trace may indicate that the problem lies in kernel
1116 space when in reality an application is buggy.
1117
1118 Say Y here to disable hardware tracing in some known "jumpy" pieces
1119 of code so that the trace buffer will extend further back.
1120
Robin Getz0ae53642007-10-09 17:24:49 +08001121config EARLY_PRINTK
1122 bool "Early printk"
1123 default n
1124 help
1125 This option enables special console drivers which allow the kernel
1126 to print messages very early in the bootup process.
1127
1128 This is useful for kernel debugging when your machine crashes very
1129 early before the console code is initialized. After enabling this
1130 feature, you must add "earlyprintk=serial,uart0,57600" to the
1131 command line (bootargs). It is safe to say Y here in all cases, as
1132 all of this lives in the init section and is thrown away after the
1133 kernel boots completely.
1134
Bryan Wu1394f032007-05-06 14:50:22 -07001135config DUAL_CORE_TEST_MODULE
1136 tristate "Dual Core Test Module"
1137 depends on (BF561)
1138 default n
1139 help
1140 Say Y here to build-in dual core test module for dual core test.
1141
1142config CPLB_INFO
1143 bool "Display the CPLB information"
1144 help
1145 Display the CPLB information.
1146
1147config ACCESS_CHECK
1148 bool "Check the user pointer address"
1149 default y
1150 help
1151 Usually the pointer transfer from user space is checked to see if its
1152 address is in the kernel space.
1153
1154 Say N here to disable that check to improve the performance.
1155
1156endmenu
1157
1158source "security/Kconfig"
1159
1160source "crypto/Kconfig"
1161
1162source "lib/Kconfig"