Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 1 | /* |
| 2 | * AD7190 AD7192 AD7195 SPI ADC driver |
| 3 | * |
Michael Hennerich | f316983 | 2012-04-30 16:06:12 +0200 | [diff] [blame] | 4 | * Copyright 2011-2012 Analog Devices Inc. |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 5 | * |
| 6 | * Licensed under the GPL-2. |
| 7 | */ |
| 8 | |
| 9 | #include <linux/interrupt.h> |
| 10 | #include <linux/device.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/slab.h> |
| 13 | #include <linux/sysfs.h> |
| 14 | #include <linux/spi/spi.h> |
| 15 | #include <linux/regulator/consumer.h> |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/sched.h> |
| 18 | #include <linux/delay.h> |
| 19 | |
Jonathan Cameron | 06458e2 | 2012-04-25 15:54:58 +0100 | [diff] [blame] | 20 | #include <linux/iio/iio.h> |
| 21 | #include <linux/iio/sysfs.h> |
| 22 | #include <linux/iio/buffer.h> |
Jonathan Cameron | 06458e2 | 2012-04-25 15:54:58 +0100 | [diff] [blame] | 23 | #include <linux/iio/trigger.h> |
| 24 | #include <linux/iio/trigger_consumer.h> |
Lars-Peter Clausen | a648232 | 2012-06-18 18:33:50 +0200 | [diff] [blame] | 25 | #include <linux/iio/triggered_buffer.h> |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 26 | #include <linux/iio/adc/ad_sigma_delta.h> |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 27 | |
| 28 | #include "ad7192.h" |
| 29 | |
| 30 | /* Registers */ |
| 31 | #define AD7192_REG_COMM 0 /* Communications Register (WO, 8-bit) */ |
| 32 | #define AD7192_REG_STAT 0 /* Status Register (RO, 8-bit) */ |
| 33 | #define AD7192_REG_MODE 1 /* Mode Register (RW, 24-bit */ |
| 34 | #define AD7192_REG_CONF 2 /* Configuration Register (RW, 24-bit) */ |
| 35 | #define AD7192_REG_DATA 3 /* Data Register (RO, 24/32-bit) */ |
| 36 | #define AD7192_REG_ID 4 /* ID Register (RO, 8-bit) */ |
| 37 | #define AD7192_REG_GPOCON 5 /* GPOCON Register (RO, 8-bit) */ |
| 38 | #define AD7192_REG_OFFSET 6 /* Offset Register (RW, 16-bit |
| 39 | * (AD7792)/24-bit (AD7192)) */ |
| 40 | #define AD7192_REG_FULLSALE 7 /* Full-Scale Register |
| 41 | * (RW, 16-bit (AD7792)/24-bit (AD7192)) */ |
| 42 | |
| 43 | /* Communications Register Bit Designations (AD7192_REG_COMM) */ |
| 44 | #define AD7192_COMM_WEN (1 << 7) /* Write Enable */ |
| 45 | #define AD7192_COMM_WRITE (0 << 6) /* Write Operation */ |
| 46 | #define AD7192_COMM_READ (1 << 6) /* Read Operation */ |
| 47 | #define AD7192_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */ |
| 48 | #define AD7192_COMM_CREAD (1 << 2) /* Continuous Read of Data Register */ |
| 49 | |
| 50 | /* Status Register Bit Designations (AD7192_REG_STAT) */ |
| 51 | #define AD7192_STAT_RDY (1 << 7) /* Ready */ |
| 52 | #define AD7192_STAT_ERR (1 << 6) /* Error (Overrange, Underrange) */ |
| 53 | #define AD7192_STAT_NOREF (1 << 5) /* Error no external reference */ |
| 54 | #define AD7192_STAT_PARITY (1 << 4) /* Parity */ |
| 55 | #define AD7192_STAT_CH3 (1 << 2) /* Channel 3 */ |
| 56 | #define AD7192_STAT_CH2 (1 << 1) /* Channel 2 */ |
| 57 | #define AD7192_STAT_CH1 (1 << 0) /* Channel 1 */ |
| 58 | |
| 59 | /* Mode Register Bit Designations (AD7192_REG_MODE) */ |
| 60 | #define AD7192_MODE_SEL(x) (((x) & 0x7) << 21) /* Operation Mode Select */ |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 61 | #define AD7192_MODE_SEL_MASK (0x7 << 21) /* Operation Mode Select Mask */ |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 62 | #define AD7192_MODE_DAT_STA (1 << 20) /* Status Register transmission */ |
| 63 | #define AD7192_MODE_CLKSRC(x) (((x) & 0x3) << 18) /* Clock Source Select */ |
| 64 | #define AD7192_MODE_SINC3 (1 << 15) /* SINC3 Filter Select */ |
| 65 | #define AD7192_MODE_ACX (1 << 14) /* AC excitation enable(AD7195 only)*/ |
| 66 | #define AD7192_MODE_ENPAR (1 << 13) /* Parity Enable */ |
| 67 | #define AD7192_MODE_CLKDIV (1 << 12) /* Clock divide by 2 (AD7190/2 only)*/ |
| 68 | #define AD7192_MODE_SCYCLE (1 << 11) /* Single cycle conversion */ |
| 69 | #define AD7192_MODE_REJ60 (1 << 10) /* 50/60Hz notch filter */ |
| 70 | #define AD7192_MODE_RATE(x) ((x) & 0x3FF) /* Filter Update Rate Select */ |
| 71 | |
| 72 | /* Mode Register: AD7192_MODE_SEL options */ |
| 73 | #define AD7192_MODE_CONT 0 /* Continuous Conversion Mode */ |
| 74 | #define AD7192_MODE_SINGLE 1 /* Single Conversion Mode */ |
| 75 | #define AD7192_MODE_IDLE 2 /* Idle Mode */ |
| 76 | #define AD7192_MODE_PWRDN 3 /* Power-Down Mode */ |
| 77 | #define AD7192_MODE_CAL_INT_ZERO 4 /* Internal Zero-Scale Calibration */ |
| 78 | #define AD7192_MODE_CAL_INT_FULL 5 /* Internal Full-Scale Calibration */ |
| 79 | #define AD7192_MODE_CAL_SYS_ZERO 6 /* System Zero-Scale Calibration */ |
| 80 | #define AD7192_MODE_CAL_SYS_FULL 7 /* System Full-Scale Calibration */ |
| 81 | |
| 82 | /* Mode Register: AD7192_MODE_CLKSRC options */ |
| 83 | #define AD7192_CLK_EXT_MCLK1_2 0 /* External 4.92 MHz Clock connected |
| 84 | * from MCLK1 to MCLK2 */ |
| 85 | #define AD7192_CLK_EXT_MCLK2 1 /* External Clock applied to MCLK2 */ |
| 86 | #define AD7192_CLK_INT 2 /* Internal 4.92 MHz Clock not |
| 87 | * available at the MCLK2 pin */ |
| 88 | #define AD7192_CLK_INT_CO 3 /* Internal 4.92 MHz Clock available |
| 89 | * at the MCLK2 pin */ |
| 90 | |
| 91 | |
| 92 | /* Configuration Register Bit Designations (AD7192_REG_CONF) */ |
| 93 | |
| 94 | #define AD7192_CONF_CHOP (1 << 23) /* CHOP enable */ |
| 95 | #define AD7192_CONF_REFSEL (1 << 20) /* REFIN1/REFIN2 Reference Select */ |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 96 | #define AD7192_CONF_CHAN(x) (((1 << (x)) & 0xFF) << 8) /* Channel select */ |
| 97 | #define AD7192_CONF_CHAN_MASK (0xFF << 8) /* Channel select mask */ |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 98 | #define AD7192_CONF_BURN (1 << 7) /* Burnout current enable */ |
| 99 | #define AD7192_CONF_REFDET (1 << 6) /* Reference detect enable */ |
| 100 | #define AD7192_CONF_BUF (1 << 4) /* Buffered Mode Enable */ |
| 101 | #define AD7192_CONF_UNIPOLAR (1 << 3) /* Unipolar/Bipolar Enable */ |
| 102 | #define AD7192_CONF_GAIN(x) ((x) & 0x7) /* Gain Select */ |
| 103 | |
| 104 | #define AD7192_CH_AIN1P_AIN2M 0 /* AIN1(+) - AIN2(-) */ |
| 105 | #define AD7192_CH_AIN3P_AIN4M 1 /* AIN3(+) - AIN4(-) */ |
| 106 | #define AD7192_CH_TEMP 2 /* Temp Sensor */ |
| 107 | #define AD7192_CH_AIN2P_AIN2M 3 /* AIN2(+) - AIN2(-) */ |
| 108 | #define AD7192_CH_AIN1 4 /* AIN1 - AINCOM */ |
| 109 | #define AD7192_CH_AIN2 5 /* AIN2 - AINCOM */ |
| 110 | #define AD7192_CH_AIN3 6 /* AIN3 - AINCOM */ |
| 111 | #define AD7192_CH_AIN4 7 /* AIN4 - AINCOM */ |
| 112 | |
| 113 | /* ID Register Bit Designations (AD7192_REG_ID) */ |
| 114 | #define ID_AD7190 0x4 |
| 115 | #define ID_AD7192 0x0 |
| 116 | #define ID_AD7195 0x6 |
| 117 | #define AD7192_ID_MASK 0x0F |
| 118 | |
| 119 | /* GPOCON Register Bit Designations (AD7192_REG_GPOCON) */ |
| 120 | #define AD7192_GPOCON_BPDSW (1 << 6) /* Bridge power-down switch enable */ |
| 121 | #define AD7192_GPOCON_GP32EN (1 << 5) /* Digital Output P3 and P2 enable */ |
| 122 | #define AD7192_GPOCON_GP10EN (1 << 4) /* Digital Output P1 and P0 enable */ |
| 123 | #define AD7192_GPOCON_P3DAT (1 << 3) /* P3 state */ |
| 124 | #define AD7192_GPOCON_P2DAT (1 << 2) /* P2 state */ |
| 125 | #define AD7192_GPOCON_P1DAT (1 << 1) /* P1 state */ |
| 126 | #define AD7192_GPOCON_P0DAT (1 << 0) /* P0 state */ |
| 127 | |
| 128 | #define AD7192_INT_FREQ_MHz 4915200 |
| 129 | |
| 130 | /* NOTE: |
| 131 | * The AD7190/2/5 features a dual use data out ready DOUT/RDY output. |
| 132 | * In order to avoid contentions on the SPI bus, it's therefore necessary |
| 133 | * to use spi bus locking. |
| 134 | * |
| 135 | * The DOUT/RDY output must also be wired to an interrupt capable GPIO. |
| 136 | */ |
| 137 | |
| 138 | struct ad7192_state { |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 139 | struct regulator *reg; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 140 | u16 int_vref_mv; |
| 141 | u32 mclk; |
| 142 | u32 f_order; |
| 143 | u32 mode; |
| 144 | u32 conf; |
| 145 | u32 scale_avail[8][2]; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 146 | u8 gpocon; |
| 147 | u8 devid; |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 148 | |
| 149 | struct ad_sigma_delta sd; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 150 | }; |
| 151 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 152 | static struct ad7192_state *ad_sigma_delta_to_ad7192(struct ad_sigma_delta *sd) |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 153 | { |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 154 | return container_of(sd, struct ad7192_state, sd); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 155 | } |
| 156 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 157 | static int ad7192_set_channel(struct ad_sigma_delta *sd, unsigned int channel) |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 158 | { |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 159 | struct ad7192_state *st = ad_sigma_delta_to_ad7192(sd); |
| 160 | |
| 161 | st->conf &= ~AD7192_CONF_CHAN_MASK; |
| 162 | st->conf |= AD7192_CONF_CHAN(channel); |
| 163 | |
| 164 | return ad_sd_write_reg(&st->sd, AD7192_REG_CONF, 3, st->conf); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 165 | } |
| 166 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 167 | static int ad7192_set_mode(struct ad_sigma_delta *sd, |
| 168 | enum ad_sigma_delta_mode mode) |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 169 | { |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 170 | struct ad7192_state *st = ad_sigma_delta_to_ad7192(sd); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 171 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 172 | st->mode &= ~AD7192_MODE_SEL_MASK; |
| 173 | st->mode |= AD7192_MODE_SEL(mode); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 174 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 175 | return ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 176 | } |
| 177 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 178 | static const struct ad_sigma_delta_info ad7192_sigma_delta_info = { |
| 179 | .set_channel = ad7192_set_channel, |
| 180 | .set_mode = ad7192_set_mode, |
| 181 | .has_registers = true, |
| 182 | .addr_shift = 3, |
| 183 | .read_mask = BIT(6), |
| 184 | }; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 185 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 186 | static const struct ad_sd_calib_data ad7192_calib_arr[8] = { |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 187 | {AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN1}, |
| 188 | {AD7192_MODE_CAL_INT_FULL, AD7192_CH_AIN1}, |
| 189 | {AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN2}, |
| 190 | {AD7192_MODE_CAL_INT_FULL, AD7192_CH_AIN2}, |
| 191 | {AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN3}, |
| 192 | {AD7192_MODE_CAL_INT_FULL, AD7192_CH_AIN3}, |
| 193 | {AD7192_MODE_CAL_INT_ZERO, AD7192_CH_AIN4}, |
| 194 | {AD7192_MODE_CAL_INT_FULL, AD7192_CH_AIN4} |
| 195 | }; |
| 196 | |
| 197 | static int ad7192_calibrate_all(struct ad7192_state *st) |
| 198 | { |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 199 | return ad_sd_calibrate_all(&st->sd, ad7192_calib_arr, |
| 200 | ARRAY_SIZE(ad7192_calib_arr)); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 201 | } |
| 202 | |
Lars-Peter Clausen | 49f8812 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 203 | static int ad7192_setup(struct ad7192_state *st, |
| 204 | const struct ad7192_platform_data *pdata) |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 205 | { |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 206 | struct iio_dev *indio_dev = spi_get_drvdata(st->sd.spi); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 207 | unsigned long long scale_uv; |
| 208 | int i, ret, id; |
| 209 | u8 ones[6]; |
| 210 | |
| 211 | /* reset the serial interface */ |
| 212 | memset(&ones, 0xFF, 6); |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 213 | ret = spi_write(st->sd.spi, &ones, 6); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 214 | if (ret < 0) |
| 215 | goto out; |
| 216 | msleep(1); /* Wait for at least 500us */ |
| 217 | |
| 218 | /* write/read test for device presence */ |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 219 | ret = ad_sd_read_reg(&st->sd, AD7192_REG_ID, 1, &id); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 220 | if (ret) |
| 221 | goto out; |
| 222 | |
| 223 | id &= AD7192_ID_MASK; |
| 224 | |
| 225 | if (id != st->devid) |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 226 | dev_warn(&st->sd.spi->dev, "device ID query failed (0x%X)\n", id); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 227 | |
| 228 | switch (pdata->clock_source_sel) { |
| 229 | case AD7192_CLK_EXT_MCLK1_2: |
| 230 | case AD7192_CLK_EXT_MCLK2: |
| 231 | st->mclk = AD7192_INT_FREQ_MHz; |
| 232 | break; |
| 233 | case AD7192_CLK_INT: |
| 234 | case AD7192_CLK_INT_CO: |
| 235 | if (pdata->ext_clk_Hz) |
| 236 | st->mclk = pdata->ext_clk_Hz; |
| 237 | else |
| 238 | st->mclk = AD7192_INT_FREQ_MHz; |
| 239 | break; |
| 240 | default: |
| 241 | ret = -EINVAL; |
| 242 | goto out; |
| 243 | } |
| 244 | |
| 245 | st->mode = AD7192_MODE_SEL(AD7192_MODE_IDLE) | |
| 246 | AD7192_MODE_CLKSRC(pdata->clock_source_sel) | |
| 247 | AD7192_MODE_RATE(480); |
| 248 | |
| 249 | st->conf = AD7192_CONF_GAIN(0); |
| 250 | |
| 251 | if (pdata->rej60_en) |
| 252 | st->mode |= AD7192_MODE_REJ60; |
| 253 | |
| 254 | if (pdata->sinc3_en) |
| 255 | st->mode |= AD7192_MODE_SINC3; |
| 256 | |
| 257 | if (pdata->refin2_en && (st->devid != ID_AD7195)) |
| 258 | st->conf |= AD7192_CONF_REFSEL; |
| 259 | |
| 260 | if (pdata->chop_en) { |
| 261 | st->conf |= AD7192_CONF_CHOP; |
| 262 | if (pdata->sinc3_en) |
| 263 | st->f_order = 3; /* SINC 3rd order */ |
| 264 | else |
| 265 | st->f_order = 4; /* SINC 4th order */ |
| 266 | } else { |
| 267 | st->f_order = 1; |
| 268 | } |
| 269 | |
| 270 | if (pdata->buf_en) |
| 271 | st->conf |= AD7192_CONF_BUF; |
| 272 | |
| 273 | if (pdata->unipolar_en) |
| 274 | st->conf |= AD7192_CONF_UNIPOLAR; |
| 275 | |
| 276 | if (pdata->burnout_curr_en) |
| 277 | st->conf |= AD7192_CONF_BURN; |
| 278 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 279 | ret = ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 280 | if (ret) |
| 281 | goto out; |
| 282 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 283 | ret = ad_sd_write_reg(&st->sd, AD7192_REG_CONF, 3, st->conf); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 284 | if (ret) |
| 285 | goto out; |
| 286 | |
| 287 | ret = ad7192_calibrate_all(st); |
| 288 | if (ret) |
| 289 | goto out; |
| 290 | |
| 291 | /* Populate available ADC input ranges */ |
| 292 | for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) { |
| 293 | scale_uv = ((u64)st->int_vref_mv * 100000000) |
| 294 | >> (indio_dev->channels[0].scan_type.realbits - |
| 295 | ((st->conf & AD7192_CONF_UNIPOLAR) ? 0 : 1)); |
| 296 | scale_uv >>= i; |
| 297 | |
| 298 | st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10; |
| 299 | st->scale_avail[i][0] = scale_uv; |
| 300 | } |
| 301 | |
| 302 | return 0; |
| 303 | out: |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 304 | dev_err(&st->sd.spi->dev, "setup failed\n"); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 305 | return ret; |
| 306 | } |
| 307 | |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 308 | static ssize_t ad7192_read_frequency(struct device *dev, |
| 309 | struct device_attribute *attr, |
| 310 | char *buf) |
| 311 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 312 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 313 | struct ad7192_state *st = iio_priv(indio_dev); |
| 314 | |
| 315 | return sprintf(buf, "%d\n", st->mclk / |
| 316 | (st->f_order * 1024 * AD7192_MODE_RATE(st->mode))); |
| 317 | } |
| 318 | |
| 319 | static ssize_t ad7192_write_frequency(struct device *dev, |
| 320 | struct device_attribute *attr, |
| 321 | const char *buf, |
| 322 | size_t len) |
| 323 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 324 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 325 | struct ad7192_state *st = iio_priv(indio_dev); |
| 326 | unsigned long lval; |
| 327 | int div, ret; |
| 328 | |
Aida Mynzhasova | f86f836 | 2013-05-07 00:04:41 +0400 | [diff] [blame] | 329 | ret = kstrtoul(buf, 10, &lval); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 330 | if (ret) |
| 331 | return ret; |
Dan Carpenter | 50d4b30 | 2012-08-18 09:48:00 +0100 | [diff] [blame] | 332 | if (lval == 0) |
| 333 | return -EINVAL; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 334 | |
| 335 | mutex_lock(&indio_dev->mlock); |
Jonathan Cameron | 14555b1 | 2011-09-21 11:15:57 +0100 | [diff] [blame] | 336 | if (iio_buffer_enabled(indio_dev)) { |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 337 | mutex_unlock(&indio_dev->mlock); |
| 338 | return -EBUSY; |
| 339 | } |
| 340 | |
| 341 | div = st->mclk / (lval * st->f_order * 1024); |
| 342 | if (div < 1 || div > 1023) { |
| 343 | ret = -EINVAL; |
| 344 | goto out; |
| 345 | } |
| 346 | |
| 347 | st->mode &= ~AD7192_MODE_RATE(-1); |
| 348 | st->mode |= AD7192_MODE_RATE(div); |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 349 | ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 350 | |
| 351 | out: |
| 352 | mutex_unlock(&indio_dev->mlock); |
| 353 | |
| 354 | return ret ? ret : len; |
| 355 | } |
| 356 | |
| 357 | static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, |
| 358 | ad7192_read_frequency, |
| 359 | ad7192_write_frequency); |
| 360 | |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 361 | static ssize_t ad7192_show_scale_available(struct device *dev, |
| 362 | struct device_attribute *attr, char *buf) |
| 363 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 364 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 365 | struct ad7192_state *st = iio_priv(indio_dev); |
| 366 | int i, len = 0; |
| 367 | |
| 368 | for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) |
| 369 | len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0], |
| 370 | st->scale_avail[i][1]); |
| 371 | |
| 372 | len += sprintf(buf + len, "\n"); |
| 373 | |
| 374 | return len; |
| 375 | } |
| 376 | |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 377 | static IIO_DEVICE_ATTR_NAMED(in_v_m_v_scale_available, |
| 378 | in_voltage-voltage_scale_available, |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 379 | S_IRUGO, ad7192_show_scale_available, NULL, 0); |
| 380 | |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 381 | static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO, |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 382 | ad7192_show_scale_available, NULL, 0); |
| 383 | |
| 384 | static ssize_t ad7192_show_ac_excitation(struct device *dev, |
| 385 | struct device_attribute *attr, |
| 386 | char *buf) |
| 387 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 388 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 389 | struct ad7192_state *st = iio_priv(indio_dev); |
| 390 | |
| 391 | return sprintf(buf, "%d\n", !!(st->mode & AD7192_MODE_ACX)); |
| 392 | } |
| 393 | |
| 394 | static ssize_t ad7192_show_bridge_switch(struct device *dev, |
| 395 | struct device_attribute *attr, |
| 396 | char *buf) |
| 397 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 398 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 399 | struct ad7192_state *st = iio_priv(indio_dev); |
| 400 | |
| 401 | return sprintf(buf, "%d\n", !!(st->gpocon & AD7192_GPOCON_BPDSW)); |
| 402 | } |
| 403 | |
| 404 | static ssize_t ad7192_set(struct device *dev, |
| 405 | struct device_attribute *attr, |
| 406 | const char *buf, |
| 407 | size_t len) |
| 408 | { |
Lars-Peter Clausen | 62c5183 | 2012-05-12 15:39:42 +0200 | [diff] [blame] | 409 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 410 | struct ad7192_state *st = iio_priv(indio_dev); |
| 411 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
| 412 | int ret; |
| 413 | bool val; |
| 414 | |
| 415 | ret = strtobool(buf, &val); |
| 416 | if (ret < 0) |
| 417 | return ret; |
| 418 | |
| 419 | mutex_lock(&indio_dev->mlock); |
Jonathan Cameron | 14555b1 | 2011-09-21 11:15:57 +0100 | [diff] [blame] | 420 | if (iio_buffer_enabled(indio_dev)) { |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 421 | mutex_unlock(&indio_dev->mlock); |
| 422 | return -EBUSY; |
| 423 | } |
| 424 | |
Michael Hennerich | e15fbc9 | 2011-10-25 10:51:04 +0200 | [diff] [blame] | 425 | switch ((u32) this_attr->address) { |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 426 | case AD7192_REG_GPOCON: |
| 427 | if (val) |
| 428 | st->gpocon |= AD7192_GPOCON_BPDSW; |
| 429 | else |
| 430 | st->gpocon &= ~AD7192_GPOCON_BPDSW; |
| 431 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 432 | ad_sd_write_reg(&st->sd, AD7192_REG_GPOCON, 1, st->gpocon); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 433 | break; |
| 434 | case AD7192_REG_MODE: |
| 435 | if (val) |
| 436 | st->mode |= AD7192_MODE_ACX; |
| 437 | else |
| 438 | st->mode &= ~AD7192_MODE_ACX; |
| 439 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 440 | ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 441 | break; |
| 442 | default: |
| 443 | ret = -EINVAL; |
| 444 | } |
| 445 | |
| 446 | mutex_unlock(&indio_dev->mlock); |
| 447 | |
| 448 | return ret ? ret : len; |
| 449 | } |
| 450 | |
| 451 | static IIO_DEVICE_ATTR(bridge_switch_en, S_IRUGO | S_IWUSR, |
| 452 | ad7192_show_bridge_switch, ad7192_set, |
| 453 | AD7192_REG_GPOCON); |
| 454 | |
| 455 | static IIO_DEVICE_ATTR(ac_excitation_en, S_IRUGO | S_IWUSR, |
| 456 | ad7192_show_ac_excitation, ad7192_set, |
| 457 | AD7192_REG_MODE); |
| 458 | |
| 459 | static struct attribute *ad7192_attributes[] = { |
| 460 | &iio_dev_attr_sampling_frequency.dev_attr.attr, |
Jonathan Cameron | 322c956 | 2011-09-14 13:01:23 +0100 | [diff] [blame] | 461 | &iio_dev_attr_in_v_m_v_scale_available.dev_attr.attr, |
| 462 | &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 463 | &iio_dev_attr_bridge_switch_en.dev_attr.attr, |
| 464 | &iio_dev_attr_ac_excitation_en.dev_attr.attr, |
| 465 | NULL |
| 466 | }; |
| 467 | |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 468 | static const struct attribute_group ad7192_attribute_group = { |
| 469 | .attrs = ad7192_attributes, |
Jonathan Cameron | 15bbb77 | 2012-01-29 11:07:00 +0000 | [diff] [blame] | 470 | }; |
| 471 | |
| 472 | static struct attribute *ad7195_attributes[] = { |
| 473 | &iio_dev_attr_sampling_frequency.dev_attr.attr, |
| 474 | &iio_dev_attr_in_v_m_v_scale_available.dev_attr.attr, |
| 475 | &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, |
| 476 | &iio_dev_attr_bridge_switch_en.dev_attr.attr, |
| 477 | NULL |
| 478 | }; |
| 479 | |
| 480 | static const struct attribute_group ad7195_attribute_group = { |
| 481 | .attrs = ad7195_attributes, |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 482 | }; |
| 483 | |
Lars-Peter Clausen | 4fcbcf9 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 484 | static unsigned int ad7192_get_temp_scale(bool unipolar) |
| 485 | { |
| 486 | return unipolar ? 2815 * 2 : 2815; |
| 487 | } |
| 488 | |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 489 | static int ad7192_read_raw(struct iio_dev *indio_dev, |
| 490 | struct iio_chan_spec const *chan, |
| 491 | int *val, |
| 492 | int *val2, |
| 493 | long m) |
| 494 | { |
| 495 | struct ad7192_state *st = iio_priv(indio_dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 496 | bool unipolar = !!(st->conf & AD7192_CONF_UNIPOLAR); |
| 497 | |
| 498 | switch (m) { |
Jonathan Cameron | b11f98f | 2012-04-15 17:41:18 +0100 | [diff] [blame] | 499 | case IIO_CHAN_INFO_RAW: |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 500 | return ad_sigma_delta_single_conversion(indio_dev, chan, val); |
Jonathan Cameron | c8a9f80 | 2011-10-26 17:41:36 +0100 | [diff] [blame] | 501 | case IIO_CHAN_INFO_SCALE: |
| 502 | switch (chan->type) { |
| 503 | case IIO_VOLTAGE: |
| 504 | mutex_lock(&indio_dev->mlock); |
| 505 | *val = st->scale_avail[AD7192_CONF_GAIN(st->conf)][0]; |
| 506 | *val2 = st->scale_avail[AD7192_CONF_GAIN(st->conf)][1]; |
| 507 | mutex_unlock(&indio_dev->mlock); |
| 508 | return IIO_VAL_INT_PLUS_NANO; |
| 509 | case IIO_TEMP: |
Lars-Peter Clausen | 4fcbcf9 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 510 | *val = 0; |
| 511 | *val2 = 1000000000 / ad7192_get_temp_scale(unipolar); |
| 512 | return IIO_VAL_INT_PLUS_NANO; |
Jonathan Cameron | c8a9f80 | 2011-10-26 17:41:36 +0100 | [diff] [blame] | 513 | default: |
| 514 | return -EINVAL; |
| 515 | } |
Lars-Peter Clausen | 58cdff6 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 516 | case IIO_CHAN_INFO_OFFSET: |
| 517 | if (!unipolar) |
Lars-Peter Clausen | 4fcbcf9 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 518 | *val = -(1 << (chan->scan_type.realbits - 1)); |
Lars-Peter Clausen | 58cdff6 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 519 | else |
| 520 | *val = 0; |
Lars-Peter Clausen | 4fcbcf9 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 521 | /* Kelvin to Celsius */ |
| 522 | if (chan->type == IIO_TEMP) |
| 523 | *val -= 273 * ad7192_get_temp_scale(unipolar); |
Lars-Peter Clausen | 58cdff6 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 524 | return IIO_VAL_INT; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 525 | } |
| 526 | |
| 527 | return -EINVAL; |
| 528 | } |
| 529 | |
| 530 | static int ad7192_write_raw(struct iio_dev *indio_dev, |
| 531 | struct iio_chan_spec const *chan, |
| 532 | int val, |
| 533 | int val2, |
| 534 | long mask) |
| 535 | { |
| 536 | struct ad7192_state *st = iio_priv(indio_dev); |
| 537 | int ret, i; |
| 538 | unsigned int tmp; |
| 539 | |
| 540 | mutex_lock(&indio_dev->mlock); |
Jonathan Cameron | 14555b1 | 2011-09-21 11:15:57 +0100 | [diff] [blame] | 541 | if (iio_buffer_enabled(indio_dev)) { |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 542 | mutex_unlock(&indio_dev->mlock); |
| 543 | return -EBUSY; |
| 544 | } |
| 545 | |
| 546 | switch (mask) { |
Jonathan Cameron | c8a9f80 | 2011-10-26 17:41:36 +0100 | [diff] [blame] | 547 | case IIO_CHAN_INFO_SCALE: |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 548 | ret = -EINVAL; |
| 549 | for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) |
| 550 | if (val2 == st->scale_avail[i][1]) { |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 551 | ret = 0; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 552 | tmp = st->conf; |
| 553 | st->conf &= ~AD7192_CONF_GAIN(-1); |
| 554 | st->conf |= AD7192_CONF_GAIN(i); |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 555 | if (tmp == st->conf) |
| 556 | break; |
| 557 | ad_sd_write_reg(&st->sd, AD7192_REG_CONF, |
| 558 | 3, st->conf); |
| 559 | ad7192_calibrate_all(st); |
| 560 | break; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 561 | } |
Lars-Peter Clausen | f09906f | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 562 | break; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 563 | default: |
| 564 | ret = -EINVAL; |
| 565 | } |
| 566 | |
| 567 | mutex_unlock(&indio_dev->mlock); |
| 568 | |
| 569 | return ret; |
| 570 | } |
| 571 | |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 572 | static int ad7192_write_raw_get_fmt(struct iio_dev *indio_dev, |
| 573 | struct iio_chan_spec const *chan, |
| 574 | long mask) |
| 575 | { |
| 576 | return IIO_VAL_INT_PLUS_NANO; |
| 577 | } |
| 578 | |
| 579 | static const struct iio_info ad7192_info = { |
| 580 | .read_raw = &ad7192_read_raw, |
| 581 | .write_raw = &ad7192_write_raw, |
| 582 | .write_raw_get_fmt = &ad7192_write_raw_get_fmt, |
| 583 | .attrs = &ad7192_attribute_group, |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 584 | .validate_trigger = ad_sd_validate_trigger, |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 585 | .driver_module = THIS_MODULE, |
| 586 | }; |
| 587 | |
Jonathan Cameron | 15bbb77 | 2012-01-29 11:07:00 +0000 | [diff] [blame] | 588 | static const struct iio_info ad7195_info = { |
| 589 | .read_raw = &ad7192_read_raw, |
| 590 | .write_raw = &ad7192_write_raw, |
| 591 | .write_raw_get_fmt = &ad7192_write_raw_get_fmt, |
| 592 | .attrs = &ad7195_attribute_group, |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 593 | .validate_trigger = ad_sd_validate_trigger, |
Jonathan Cameron | 15bbb77 | 2012-01-29 11:07:00 +0000 | [diff] [blame] | 594 | .driver_module = THIS_MODULE, |
| 595 | }; |
| 596 | |
Lars-Peter Clausen | f4e4b95 | 2012-08-09 08:51:00 +0100 | [diff] [blame] | 597 | static const struct iio_chan_spec ad7192_channels[] = { |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 598 | AD_SD_DIFF_CHANNEL(0, 1, 2, AD7192_CH_AIN1P_AIN2M, 24, 32, 0), |
| 599 | AD_SD_DIFF_CHANNEL(1, 3, 4, AD7192_CH_AIN3P_AIN4M, 24, 32, 0), |
| 600 | AD_SD_TEMP_CHANNEL(2, AD7192_CH_TEMP, 24, 32, 0), |
| 601 | AD_SD_SHORTED_CHANNEL(3, 2, AD7192_CH_AIN2P_AIN2M, 24, 32, 0), |
| 602 | AD_SD_CHANNEL(4, 1, AD7192_CH_AIN1, 24, 32, 0), |
| 603 | AD_SD_CHANNEL(5, 2, AD7192_CH_AIN2, 24, 32, 0), |
| 604 | AD_SD_CHANNEL(6, 3, AD7192_CH_AIN3, 24, 32, 0), |
| 605 | AD_SD_CHANNEL(7, 4, AD7192_CH_AIN4, 24, 32, 0), |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 606 | IIO_CHAN_SOFT_TIMESTAMP(8), |
| 607 | }; |
| 608 | |
Bill Pemberton | 4ae1c61 | 2012-11-19 13:21:57 -0500 | [diff] [blame] | 609 | static int ad7192_probe(struct spi_device *spi) |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 610 | { |
Lars-Peter Clausen | 49f8812 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 611 | const struct ad7192_platform_data *pdata = spi->dev.platform_data; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 612 | struct ad7192_state *st; |
| 613 | struct iio_dev *indio_dev; |
Lars-Peter Clausen | f6aea55 | 2012-07-09 10:00:00 +0100 | [diff] [blame] | 614 | int ret , voltage_uv = 0; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 615 | |
| 616 | if (!pdata) { |
| 617 | dev_err(&spi->dev, "no platform data?\n"); |
| 618 | return -ENODEV; |
| 619 | } |
| 620 | |
| 621 | if (!spi->irq) { |
| 622 | dev_err(&spi->dev, "no IRQ?\n"); |
| 623 | return -ENODEV; |
| 624 | } |
| 625 | |
Lars-Peter Clausen | 7cbb753 | 2012-04-26 13:35:01 +0200 | [diff] [blame] | 626 | indio_dev = iio_device_alloc(sizeof(*st)); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 627 | if (indio_dev == NULL) |
| 628 | return -ENOMEM; |
| 629 | |
| 630 | st = iio_priv(indio_dev); |
| 631 | |
| 632 | st->reg = regulator_get(&spi->dev, "vcc"); |
| 633 | if (!IS_ERR(st->reg)) { |
| 634 | ret = regulator_enable(st->reg); |
| 635 | if (ret) |
| 636 | goto error_put_reg; |
| 637 | |
| 638 | voltage_uv = regulator_get_voltage(st->reg); |
| 639 | } |
| 640 | |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 641 | if (pdata && pdata->vref_mv) |
| 642 | st->int_vref_mv = pdata->vref_mv; |
| 643 | else if (voltage_uv) |
| 644 | st->int_vref_mv = voltage_uv / 1000; |
| 645 | else |
| 646 | dev_warn(&spi->dev, "reference voltage undefined\n"); |
| 647 | |
| 648 | spi_set_drvdata(spi, indio_dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 649 | st->devid = spi_get_device_id(spi)->driver_data; |
| 650 | indio_dev->dev.parent = &spi->dev; |
| 651 | indio_dev->name = spi_get_device_id(spi)->name; |
| 652 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 653 | indio_dev->channels = ad7192_channels; |
| 654 | indio_dev->num_channels = ARRAY_SIZE(ad7192_channels); |
Jonathan Cameron | 15bbb77 | 2012-01-29 11:07:00 +0000 | [diff] [blame] | 655 | if (st->devid == ID_AD7195) |
| 656 | indio_dev->info = &ad7195_info; |
| 657 | else |
| 658 | indio_dev->info = &ad7192_info; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 659 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 660 | ad_sd_init(&st->sd, indio_dev, spi, &ad7192_sigma_delta_info); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 661 | |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 662 | ret = ad_sd_setup_buffer_and_trigger(indio_dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 663 | if (ret) |
| 664 | goto error_disable_reg; |
| 665 | |
Lars-Peter Clausen | 49f8812 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 666 | ret = ad7192_setup(st, pdata); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 667 | if (ret) |
| 668 | goto error_remove_trigger; |
| 669 | |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 670 | ret = iio_device_register(indio_dev); |
| 671 | if (ret < 0) |
Lars-Peter Clausen | a648232 | 2012-06-18 18:33:50 +0200 | [diff] [blame] | 672 | goto error_remove_trigger; |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 673 | return 0; |
| 674 | |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 675 | error_remove_trigger: |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 676 | ad_sd_cleanup_buffer_and_trigger(indio_dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 677 | error_disable_reg: |
| 678 | if (!IS_ERR(st->reg)) |
| 679 | regulator_disable(st->reg); |
| 680 | error_put_reg: |
| 681 | if (!IS_ERR(st->reg)) |
| 682 | regulator_put(st->reg); |
| 683 | |
Lars-Peter Clausen | 7cbb753 | 2012-04-26 13:35:01 +0200 | [diff] [blame] | 684 | iio_device_free(indio_dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 685 | |
| 686 | return ret; |
| 687 | } |
| 688 | |
Bill Pemberton | 447d4f2 | 2012-11-19 13:26:37 -0500 | [diff] [blame] | 689 | static int ad7192_remove(struct spi_device *spi) |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 690 | { |
| 691 | struct iio_dev *indio_dev = spi_get_drvdata(spi); |
| 692 | struct ad7192_state *st = iio_priv(indio_dev); |
| 693 | |
Jonathan Cameron | d2fffd6 | 2011-10-14 14:46:58 +0100 | [diff] [blame] | 694 | iio_device_unregister(indio_dev); |
Lars-Peter Clausen | 3f7c330 | 2012-08-10 17:36:00 +0100 | [diff] [blame] | 695 | ad_sd_cleanup_buffer_and_trigger(indio_dev); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 696 | |
| 697 | if (!IS_ERR(st->reg)) { |
| 698 | regulator_disable(st->reg); |
| 699 | regulator_put(st->reg); |
| 700 | } |
| 701 | |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 702 | return 0; |
| 703 | } |
| 704 | |
| 705 | static const struct spi_device_id ad7192_id[] = { |
| 706 | {"ad7190", ID_AD7190}, |
| 707 | {"ad7192", ID_AD7192}, |
| 708 | {"ad7195", ID_AD7195}, |
| 709 | {} |
| 710 | }; |
Lars-Peter Clausen | 55e4390 | 2011-11-16 08:53:31 +0100 | [diff] [blame] | 711 | MODULE_DEVICE_TABLE(spi, ad7192_id); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 712 | |
| 713 | static struct spi_driver ad7192_driver = { |
| 714 | .driver = { |
| 715 | .name = "ad7192", |
| 716 | .owner = THIS_MODULE, |
| 717 | }, |
| 718 | .probe = ad7192_probe, |
Bill Pemberton | e543acf | 2012-11-19 13:21:38 -0500 | [diff] [blame] | 719 | .remove = ad7192_remove, |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 720 | .id_table = ad7192_id, |
| 721 | }; |
Lars-Peter Clausen | ae6ae6f | 2011-11-16 10:13:39 +0100 | [diff] [blame] | 722 | module_spi_driver(ad7192_driver); |
Michael Hennerich | 7a27b04 | 2011-08-17 17:29:34 +0200 | [diff] [blame] | 723 | |
| 724 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); |
| 725 | MODULE_DESCRIPTION("Analog Devices AD7190, AD7192, AD7195 ADC"); |
| 726 | MODULE_LICENSE("GPL v2"); |