Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/ppc/platforms/pmac_feature.c |
| 3 | * |
| 4 | * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au) |
| 5 | * Ben. Herrenschmidt (benh@kernel.crashing.org) |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * as published by the Free Software Foundation; either version |
| 10 | * 2 of the License, or (at your option) any later version. |
| 11 | * |
| 12 | * TODO: |
| 13 | * |
| 14 | * - Replace mdelay with some schedule loop if possible |
| 15 | * - Shorten some obfuscated delays on some routines (like modem |
| 16 | * power) |
| 17 | * - Refcount some clocks (see darwin) |
| 18 | * - Split split split... |
| 19 | * |
| 20 | */ |
| 21 | #include <linux/config.h> |
| 22 | #include <linux/types.h> |
| 23 | #include <linux/init.h> |
| 24 | #include <linux/delay.h> |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/sched.h> |
| 27 | #include <linux/spinlock.h> |
| 28 | #include <linux/adb.h> |
| 29 | #include <linux/pmu.h> |
| 30 | #include <linux/ioport.h> |
| 31 | #include <linux/pci.h> |
| 32 | #include <asm/sections.h> |
| 33 | #include <asm/errno.h> |
| 34 | #include <asm/ohare.h> |
| 35 | #include <asm/heathrow.h> |
| 36 | #include <asm/keylargo.h> |
| 37 | #include <asm/uninorth.h> |
| 38 | #include <asm/io.h> |
| 39 | #include <asm/prom.h> |
| 40 | #include <asm/machdep.h> |
| 41 | #include <asm/pmac_feature.h> |
| 42 | #include <asm/dbdma.h> |
| 43 | #include <asm/pci-bridge.h> |
| 44 | #include <asm/pmac_low_i2c.h> |
| 45 | |
| 46 | #undef DEBUG_FEATURE |
| 47 | |
| 48 | #ifdef DEBUG_FEATURE |
| 49 | #define DBG(fmt,...) printk(KERN_DEBUG fmt) |
| 50 | #else |
| 51 | #define DBG(fmt,...) |
| 52 | #endif |
| 53 | |
| 54 | #ifdef CONFIG_6xx |
| 55 | extern int powersave_lowspeed; |
| 56 | #endif |
| 57 | |
| 58 | extern int powersave_nap; |
| 59 | extern struct device_node *k2_skiplist[2]; |
| 60 | |
| 61 | |
| 62 | /* |
| 63 | * We use a single global lock to protect accesses. Each driver has |
| 64 | * to take care of its own locking |
| 65 | */ |
| 66 | static DEFINE_SPINLOCK(feature_lock __pmacdata); |
| 67 | |
| 68 | #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); |
| 69 | #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); |
| 70 | |
| 71 | |
| 72 | /* |
| 73 | * Instance of some macio stuffs |
| 74 | */ |
| 75 | struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata; |
| 76 | |
Benjamin Herrenschmidt | 7bbd827 | 2005-04-16 15:24:32 -0700 | [diff] [blame] | 77 | struct macio_chip* __pmac macio_find(struct device_node* child, int type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | { |
| 79 | while(child) { |
| 80 | int i; |
| 81 | |
| 82 | for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++) |
| 83 | if (child == macio_chips[i].of_node && |
| 84 | (!type || macio_chips[i].type == type)) |
| 85 | return &macio_chips[i]; |
| 86 | child = child->parent; |
| 87 | } |
| 88 | return NULL; |
| 89 | } |
Benjamin Herrenschmidt | 7bbd827 | 2005-04-16 15:24:32 -0700 | [diff] [blame] | 90 | EXPORT_SYMBOL_GPL(macio_find); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | |
| 92 | static const char* macio_names[] __pmacdata = |
| 93 | { |
| 94 | "Unknown", |
| 95 | "Grand Central", |
| 96 | "OHare", |
| 97 | "OHareII", |
| 98 | "Heathrow", |
| 99 | "Gatwick", |
| 100 | "Paddington", |
| 101 | "Keylargo", |
| 102 | "Pangea", |
| 103 | "Intrepid", |
| 104 | "K2" |
| 105 | }; |
| 106 | |
| 107 | |
| 108 | |
| 109 | /* |
| 110 | * Uninorth reg. access. Note that Uni-N regs are big endian |
| 111 | */ |
| 112 | |
| 113 | #define UN_REG(r) (uninorth_base + ((r) >> 2)) |
| 114 | #define UN_IN(r) (in_be32(UN_REG(r))) |
| 115 | #define UN_OUT(r,v) (out_be32(UN_REG(r), (v))) |
| 116 | #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) |
| 117 | #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) |
| 118 | |
| 119 | static struct device_node* uninorth_node __pmacdata; |
| 120 | static u32 __iomem * uninorth_base __pmacdata; |
| 121 | static u32 uninorth_rev __pmacdata; |
| 122 | static int uninorth_u3 __pmacdata; |
| 123 | static void __iomem *u3_ht; |
| 124 | |
| 125 | /* |
| 126 | * For each motherboard family, we have a table of functions pointers |
| 127 | * that handle the various features. |
| 128 | */ |
| 129 | |
| 130 | typedef long (*feature_call)(struct device_node* node, long param, long value); |
| 131 | |
| 132 | struct feature_table_entry { |
| 133 | unsigned int selector; |
| 134 | feature_call function; |
| 135 | }; |
| 136 | |
| 137 | struct pmac_mb_def |
| 138 | { |
| 139 | const char* model_string; |
| 140 | const char* model_name; |
| 141 | int model_id; |
| 142 | struct feature_table_entry* features; |
| 143 | unsigned long board_flags; |
| 144 | }; |
| 145 | static struct pmac_mb_def pmac_mb __pmacdata; |
| 146 | |
| 147 | /* |
| 148 | * Here are the chip specific feature functions |
| 149 | */ |
| 150 | |
| 151 | static inline int __pmac |
| 152 | simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value) |
| 153 | { |
| 154 | struct macio_chip* macio; |
| 155 | unsigned long flags; |
| 156 | |
| 157 | macio = macio_find(node, type); |
| 158 | if (!macio) |
| 159 | return -ENODEV; |
| 160 | LOCK(flags); |
| 161 | if (value) |
| 162 | MACIO_BIS(reg, mask); |
| 163 | else |
| 164 | MACIO_BIC(reg, mask); |
| 165 | (void)MACIO_IN32(reg); |
| 166 | UNLOCK(flags); |
| 167 | |
| 168 | return 0; |
| 169 | } |
| 170 | |
| 171 | #ifndef CONFIG_POWER4 |
| 172 | |
| 173 | static long __pmac |
| 174 | ohare_htw_scc_enable(struct device_node* node, long param, long value) |
| 175 | { |
| 176 | struct macio_chip* macio; |
| 177 | unsigned long chan_mask; |
| 178 | unsigned long fcr; |
| 179 | unsigned long flags; |
| 180 | int htw, trans; |
| 181 | unsigned long rmask; |
| 182 | |
| 183 | macio = macio_find(node, 0); |
| 184 | if (!macio) |
| 185 | return -ENODEV; |
| 186 | if (!strcmp(node->name, "ch-a")) |
| 187 | chan_mask = MACIO_FLAG_SCCA_ON; |
| 188 | else if (!strcmp(node->name, "ch-b")) |
| 189 | chan_mask = MACIO_FLAG_SCCB_ON; |
| 190 | else |
| 191 | return -ENODEV; |
| 192 | |
| 193 | htw = (macio->type == macio_heathrow || macio->type == macio_paddington |
| 194 | || macio->type == macio_gatwick); |
| 195 | /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */ |
| 196 | trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && |
| 197 | pmac_mb.model_id != PMAC_TYPE_YIKES); |
| 198 | if (value) { |
| 199 | #ifdef CONFIG_ADB_PMU |
| 200 | if ((param & 0xfff) == PMAC_SCC_IRDA) |
| 201 | pmu_enable_irled(1); |
| 202 | #endif /* CONFIG_ADB_PMU */ |
| 203 | LOCK(flags); |
| 204 | fcr = MACIO_IN32(OHARE_FCR); |
| 205 | /* Check if scc cell need enabling */ |
| 206 | if (!(fcr & OH_SCC_ENABLE)) { |
| 207 | fcr |= OH_SCC_ENABLE; |
| 208 | if (htw) { |
| 209 | /* Side effect: this will also power up the |
| 210 | * modem, but it's too messy to figure out on which |
| 211 | * ports this controls the tranceiver and on which |
| 212 | * it controls the modem |
| 213 | */ |
| 214 | if (trans) |
| 215 | fcr &= ~HRW_SCC_TRANS_EN_N; |
| 216 | MACIO_OUT32(OHARE_FCR, fcr); |
| 217 | fcr |= (rmask = HRW_RESET_SCC); |
| 218 | MACIO_OUT32(OHARE_FCR, fcr); |
| 219 | } else { |
| 220 | fcr |= (rmask = OH_SCC_RESET); |
| 221 | MACIO_OUT32(OHARE_FCR, fcr); |
| 222 | } |
| 223 | UNLOCK(flags); |
| 224 | (void)MACIO_IN32(OHARE_FCR); |
| 225 | mdelay(15); |
| 226 | LOCK(flags); |
| 227 | fcr &= ~rmask; |
| 228 | MACIO_OUT32(OHARE_FCR, fcr); |
| 229 | } |
| 230 | if (chan_mask & MACIO_FLAG_SCCA_ON) |
| 231 | fcr |= OH_SCCA_IO; |
| 232 | if (chan_mask & MACIO_FLAG_SCCB_ON) |
| 233 | fcr |= OH_SCCB_IO; |
| 234 | MACIO_OUT32(OHARE_FCR, fcr); |
| 235 | macio->flags |= chan_mask; |
| 236 | UNLOCK(flags); |
| 237 | if (param & PMAC_SCC_FLAG_XMON) |
| 238 | macio->flags |= MACIO_FLAG_SCC_LOCKED; |
| 239 | } else { |
| 240 | if (macio->flags & MACIO_FLAG_SCC_LOCKED) |
| 241 | return -EPERM; |
| 242 | LOCK(flags); |
| 243 | fcr = MACIO_IN32(OHARE_FCR); |
| 244 | if (chan_mask & MACIO_FLAG_SCCA_ON) |
| 245 | fcr &= ~OH_SCCA_IO; |
| 246 | if (chan_mask & MACIO_FLAG_SCCB_ON) |
| 247 | fcr &= ~OH_SCCB_IO; |
| 248 | MACIO_OUT32(OHARE_FCR, fcr); |
| 249 | if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) { |
| 250 | fcr &= ~OH_SCC_ENABLE; |
| 251 | if (htw && trans) |
| 252 | fcr |= HRW_SCC_TRANS_EN_N; |
| 253 | MACIO_OUT32(OHARE_FCR, fcr); |
| 254 | } |
| 255 | macio->flags &= ~(chan_mask); |
| 256 | UNLOCK(flags); |
| 257 | mdelay(10); |
| 258 | #ifdef CONFIG_ADB_PMU |
| 259 | if ((param & 0xfff) == PMAC_SCC_IRDA) |
| 260 | pmu_enable_irled(0); |
| 261 | #endif /* CONFIG_ADB_PMU */ |
| 262 | } |
| 263 | return 0; |
| 264 | } |
| 265 | |
| 266 | static long __pmac |
| 267 | ohare_floppy_enable(struct device_node* node, long param, long value) |
| 268 | { |
| 269 | return simple_feature_tweak(node, macio_ohare, |
| 270 | OHARE_FCR, OH_FLOPPY_ENABLE, value); |
| 271 | } |
| 272 | |
| 273 | static long __pmac |
| 274 | ohare_mesh_enable(struct device_node* node, long param, long value) |
| 275 | { |
| 276 | return simple_feature_tweak(node, macio_ohare, |
| 277 | OHARE_FCR, OH_MESH_ENABLE, value); |
| 278 | } |
| 279 | |
| 280 | static long __pmac |
| 281 | ohare_ide_enable(struct device_node* node, long param, long value) |
| 282 | { |
| 283 | switch(param) { |
| 284 | case 0: |
| 285 | /* For some reason, setting the bit in set_initial_features() |
| 286 | * doesn't stick. I'm still investigating... --BenH. |
| 287 | */ |
| 288 | if (value) |
| 289 | simple_feature_tweak(node, macio_ohare, |
| 290 | OHARE_FCR, OH_IOBUS_ENABLE, 1); |
| 291 | return simple_feature_tweak(node, macio_ohare, |
| 292 | OHARE_FCR, OH_IDE0_ENABLE, value); |
| 293 | case 1: |
| 294 | return simple_feature_tweak(node, macio_ohare, |
| 295 | OHARE_FCR, OH_BAY_IDE_ENABLE, value); |
| 296 | default: |
| 297 | return -ENODEV; |
| 298 | } |
| 299 | } |
| 300 | |
| 301 | static long __pmac |
| 302 | ohare_ide_reset(struct device_node* node, long param, long value) |
| 303 | { |
| 304 | switch(param) { |
| 305 | case 0: |
| 306 | return simple_feature_tweak(node, macio_ohare, |
| 307 | OHARE_FCR, OH_IDE0_RESET_N, !value); |
| 308 | case 1: |
| 309 | return simple_feature_tweak(node, macio_ohare, |
| 310 | OHARE_FCR, OH_IDE1_RESET_N, !value); |
| 311 | default: |
| 312 | return -ENODEV; |
| 313 | } |
| 314 | } |
| 315 | |
| 316 | static long __pmac |
| 317 | ohare_sleep_state(struct device_node* node, long param, long value) |
| 318 | { |
| 319 | struct macio_chip* macio = &macio_chips[0]; |
| 320 | |
| 321 | if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) |
| 322 | return -EPERM; |
| 323 | if (value == 1) { |
| 324 | MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE); |
| 325 | } else if (value == 0) { |
| 326 | MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); |
| 327 | } |
| 328 | |
| 329 | return 0; |
| 330 | } |
| 331 | |
| 332 | static long __pmac |
| 333 | heathrow_modem_enable(struct device_node* node, long param, long value) |
| 334 | { |
| 335 | struct macio_chip* macio; |
| 336 | u8 gpio; |
| 337 | unsigned long flags; |
| 338 | |
| 339 | macio = macio_find(node, macio_unknown); |
| 340 | if (!macio) |
| 341 | return -ENODEV; |
| 342 | gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1; |
| 343 | if (!value) { |
| 344 | LOCK(flags); |
| 345 | MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); |
| 346 | UNLOCK(flags); |
| 347 | (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); |
| 348 | mdelay(250); |
| 349 | } |
| 350 | if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && |
| 351 | pmac_mb.model_id != PMAC_TYPE_YIKES) { |
| 352 | LOCK(flags); |
| 353 | if (value) |
| 354 | MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); |
| 355 | else |
| 356 | MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); |
| 357 | UNLOCK(flags); |
| 358 | (void)MACIO_IN32(HEATHROW_FCR); |
| 359 | mdelay(250); |
| 360 | } |
| 361 | if (value) { |
| 362 | LOCK(flags); |
| 363 | MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); |
| 364 | (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); |
| 365 | UNLOCK(flags); mdelay(250); LOCK(flags); |
| 366 | MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); |
| 367 | (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); |
| 368 | UNLOCK(flags); mdelay(250); LOCK(flags); |
| 369 | MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); |
| 370 | (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); |
| 371 | UNLOCK(flags); mdelay(250); |
| 372 | } |
| 373 | return 0; |
| 374 | } |
| 375 | |
| 376 | static long __pmac |
| 377 | heathrow_floppy_enable(struct device_node* node, long param, long value) |
| 378 | { |
| 379 | return simple_feature_tweak(node, macio_unknown, |
| 380 | HEATHROW_FCR, |
| 381 | HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE, |
| 382 | value); |
| 383 | } |
| 384 | |
| 385 | static long __pmac |
| 386 | heathrow_mesh_enable(struct device_node* node, long param, long value) |
| 387 | { |
| 388 | struct macio_chip* macio; |
| 389 | unsigned long flags; |
| 390 | |
| 391 | macio = macio_find(node, macio_unknown); |
| 392 | if (!macio) |
| 393 | return -ENODEV; |
| 394 | LOCK(flags); |
| 395 | /* Set clear mesh cell enable */ |
| 396 | if (value) |
| 397 | MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE); |
| 398 | else |
| 399 | MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE); |
| 400 | (void)MACIO_IN32(HEATHROW_FCR); |
| 401 | udelay(10); |
| 402 | /* Set/Clear termination power */ |
| 403 | if (value) |
| 404 | MACIO_BIC(HEATHROW_MBCR, 0x04000000); |
| 405 | else |
| 406 | MACIO_BIS(HEATHROW_MBCR, 0x04000000); |
| 407 | (void)MACIO_IN32(HEATHROW_MBCR); |
| 408 | udelay(10); |
| 409 | UNLOCK(flags); |
| 410 | |
| 411 | return 0; |
| 412 | } |
| 413 | |
| 414 | static long __pmac |
| 415 | heathrow_ide_enable(struct device_node* node, long param, long value) |
| 416 | { |
| 417 | switch(param) { |
| 418 | case 0: |
| 419 | return simple_feature_tweak(node, macio_unknown, |
| 420 | HEATHROW_FCR, HRW_IDE0_ENABLE, value); |
| 421 | case 1: |
| 422 | return simple_feature_tweak(node, macio_unknown, |
| 423 | HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value); |
| 424 | default: |
| 425 | return -ENODEV; |
| 426 | } |
| 427 | } |
| 428 | |
| 429 | static long __pmac |
| 430 | heathrow_ide_reset(struct device_node* node, long param, long value) |
| 431 | { |
| 432 | switch(param) { |
| 433 | case 0: |
| 434 | return simple_feature_tweak(node, macio_unknown, |
| 435 | HEATHROW_FCR, HRW_IDE0_RESET_N, !value); |
| 436 | case 1: |
| 437 | return simple_feature_tweak(node, macio_unknown, |
| 438 | HEATHROW_FCR, HRW_IDE1_RESET_N, !value); |
| 439 | default: |
| 440 | return -ENODEV; |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | static long __pmac |
| 445 | heathrow_bmac_enable(struct device_node* node, long param, long value) |
| 446 | { |
| 447 | struct macio_chip* macio; |
| 448 | unsigned long flags; |
| 449 | |
| 450 | macio = macio_find(node, 0); |
| 451 | if (!macio) |
| 452 | return -ENODEV; |
| 453 | if (value) { |
| 454 | LOCK(flags); |
| 455 | MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); |
| 456 | MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET); |
| 457 | UNLOCK(flags); |
| 458 | (void)MACIO_IN32(HEATHROW_FCR); |
| 459 | mdelay(10); |
| 460 | LOCK(flags); |
| 461 | MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET); |
| 462 | UNLOCK(flags); |
| 463 | (void)MACIO_IN32(HEATHROW_FCR); |
| 464 | mdelay(10); |
| 465 | } else { |
| 466 | LOCK(flags); |
| 467 | MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); |
| 468 | UNLOCK(flags); |
| 469 | } |
| 470 | return 0; |
| 471 | } |
| 472 | |
| 473 | static long __pmac |
| 474 | heathrow_sound_enable(struct device_node* node, long param, long value) |
| 475 | { |
| 476 | struct macio_chip* macio; |
| 477 | unsigned long flags; |
| 478 | |
| 479 | /* B&W G3 and Yikes don't support that properly (the |
| 480 | * sound appear to never come back after beeing shut down). |
| 481 | */ |
| 482 | if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE || |
| 483 | pmac_mb.model_id == PMAC_TYPE_YIKES) |
| 484 | return 0; |
| 485 | |
| 486 | macio = macio_find(node, 0); |
| 487 | if (!macio) |
| 488 | return -ENODEV; |
| 489 | if (value) { |
| 490 | LOCK(flags); |
| 491 | MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); |
| 492 | MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); |
| 493 | UNLOCK(flags); |
| 494 | (void)MACIO_IN32(HEATHROW_FCR); |
| 495 | } else { |
| 496 | LOCK(flags); |
| 497 | MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); |
| 498 | MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); |
| 499 | UNLOCK(flags); |
| 500 | } |
| 501 | return 0; |
| 502 | } |
| 503 | |
| 504 | static u32 save_fcr[6] __pmacdata; |
| 505 | static u32 save_mbcr __pmacdata; |
| 506 | static u32 save_gpio_levels[2] __pmacdata; |
| 507 | static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata; |
| 508 | static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata; |
| 509 | static u32 save_unin_clock_ctl __pmacdata; |
| 510 | static struct dbdma_regs save_dbdma[13] __pmacdata; |
| 511 | static struct dbdma_regs save_alt_dbdma[13] __pmacdata; |
| 512 | |
| 513 | static void __pmac |
| 514 | dbdma_save(struct macio_chip* macio, struct dbdma_regs* save) |
| 515 | { |
| 516 | int i; |
| 517 | |
| 518 | /* Save state & config of DBDMA channels */ |
| 519 | for (i=0; i<13; i++) { |
| 520 | volatile struct dbdma_regs __iomem * chan = (void __iomem *) |
| 521 | (macio->base + ((0x8000+i*0x100)>>2)); |
| 522 | save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi); |
| 523 | save[i].cmdptr = in_le32(&chan->cmdptr); |
| 524 | save[i].intr_sel = in_le32(&chan->intr_sel); |
| 525 | save[i].br_sel = in_le32(&chan->br_sel); |
| 526 | save[i].wait_sel = in_le32(&chan->wait_sel); |
| 527 | } |
| 528 | } |
| 529 | |
| 530 | static void __pmac |
| 531 | dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save) |
| 532 | { |
| 533 | int i; |
| 534 | |
| 535 | /* Save state & config of DBDMA channels */ |
| 536 | for (i=0; i<13; i++) { |
| 537 | volatile struct dbdma_regs __iomem * chan = (void __iomem *) |
| 538 | (macio->base + ((0x8000+i*0x100)>>2)); |
| 539 | out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16); |
| 540 | while (in_le32(&chan->status) & ACTIVE) |
| 541 | mb(); |
| 542 | out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi); |
| 543 | out_le32(&chan->cmdptr, save[i].cmdptr); |
| 544 | out_le32(&chan->intr_sel, save[i].intr_sel); |
| 545 | out_le32(&chan->br_sel, save[i].br_sel); |
| 546 | out_le32(&chan->wait_sel, save[i].wait_sel); |
| 547 | } |
| 548 | } |
| 549 | |
| 550 | static void __pmac |
| 551 | heathrow_sleep(struct macio_chip* macio, int secondary) |
| 552 | { |
| 553 | if (secondary) { |
| 554 | dbdma_save(macio, save_alt_dbdma); |
| 555 | save_fcr[2] = MACIO_IN32(0x38); |
| 556 | save_fcr[3] = MACIO_IN32(0x3c); |
| 557 | } else { |
| 558 | dbdma_save(macio, save_dbdma); |
| 559 | save_fcr[0] = MACIO_IN32(0x38); |
| 560 | save_fcr[1] = MACIO_IN32(0x3c); |
| 561 | save_mbcr = MACIO_IN32(0x34); |
| 562 | /* Make sure sound is shut down */ |
| 563 | MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); |
| 564 | MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); |
| 565 | /* This seems to be necessary as well or the fan |
| 566 | * keeps coming up and battery drains fast */ |
| 567 | MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE); |
| 568 | MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N); |
| 569 | /* Make sure eth is down even if module or sleep |
| 570 | * won't work properly */ |
| 571 | MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET); |
| 572 | } |
| 573 | /* Make sure modem is shut down */ |
| 574 | MACIO_OUT8(HRW_GPIO_MODEM_RESET, |
| 575 | MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1); |
| 576 | MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); |
| 577 | MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE); |
| 578 | |
| 579 | /* Let things settle */ |
| 580 | (void)MACIO_IN32(HEATHROW_FCR); |
| 581 | } |
| 582 | |
| 583 | static void __pmac |
| 584 | heathrow_wakeup(struct macio_chip* macio, int secondary) |
| 585 | { |
| 586 | if (secondary) { |
| 587 | MACIO_OUT32(0x38, save_fcr[2]); |
| 588 | (void)MACIO_IN32(0x38); |
| 589 | mdelay(1); |
| 590 | MACIO_OUT32(0x3c, save_fcr[3]); |
| 591 | (void)MACIO_IN32(0x38); |
| 592 | mdelay(10); |
| 593 | dbdma_restore(macio, save_alt_dbdma); |
| 594 | } else { |
| 595 | MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE); |
| 596 | (void)MACIO_IN32(0x38); |
| 597 | mdelay(1); |
| 598 | MACIO_OUT32(0x3c, save_fcr[1]); |
| 599 | (void)MACIO_IN32(0x38); |
| 600 | mdelay(1); |
| 601 | MACIO_OUT32(0x34, save_mbcr); |
| 602 | (void)MACIO_IN32(0x38); |
| 603 | mdelay(10); |
| 604 | dbdma_restore(macio, save_dbdma); |
| 605 | } |
| 606 | } |
| 607 | |
| 608 | static long __pmac |
| 609 | heathrow_sleep_state(struct device_node* node, long param, long value) |
| 610 | { |
| 611 | if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) |
| 612 | return -EPERM; |
| 613 | if (value == 1) { |
| 614 | if (macio_chips[1].type == macio_gatwick) |
| 615 | heathrow_sleep(&macio_chips[0], 1); |
| 616 | heathrow_sleep(&macio_chips[0], 0); |
| 617 | } else if (value == 0) { |
| 618 | heathrow_wakeup(&macio_chips[0], 0); |
| 619 | if (macio_chips[1].type == macio_gatwick) |
| 620 | heathrow_wakeup(&macio_chips[0], 1); |
| 621 | } |
| 622 | return 0; |
| 623 | } |
| 624 | |
| 625 | static long __pmac |
| 626 | core99_scc_enable(struct device_node* node, long param, long value) |
| 627 | { |
| 628 | struct macio_chip* macio; |
| 629 | unsigned long flags; |
| 630 | unsigned long chan_mask; |
| 631 | u32 fcr; |
| 632 | |
| 633 | macio = macio_find(node, 0); |
| 634 | if (!macio) |
| 635 | return -ENODEV; |
| 636 | if (!strcmp(node->name, "ch-a")) |
| 637 | chan_mask = MACIO_FLAG_SCCA_ON; |
| 638 | else if (!strcmp(node->name, "ch-b")) |
| 639 | chan_mask = MACIO_FLAG_SCCB_ON; |
| 640 | else |
| 641 | return -ENODEV; |
| 642 | |
| 643 | if (value) { |
| 644 | int need_reset_scc = 0; |
| 645 | int need_reset_irda = 0; |
| 646 | |
| 647 | LOCK(flags); |
| 648 | fcr = MACIO_IN32(KEYLARGO_FCR0); |
| 649 | /* Check if scc cell need enabling */ |
| 650 | if (!(fcr & KL0_SCC_CELL_ENABLE)) { |
| 651 | fcr |= KL0_SCC_CELL_ENABLE; |
| 652 | need_reset_scc = 1; |
| 653 | } |
| 654 | if (chan_mask & MACIO_FLAG_SCCA_ON) { |
| 655 | fcr |= KL0_SCCA_ENABLE; |
| 656 | /* Don't enable line drivers for I2S modem */ |
| 657 | if ((param & 0xfff) == PMAC_SCC_I2S1) |
| 658 | fcr &= ~KL0_SCC_A_INTF_ENABLE; |
| 659 | else |
| 660 | fcr |= KL0_SCC_A_INTF_ENABLE; |
| 661 | } |
| 662 | if (chan_mask & MACIO_FLAG_SCCB_ON) { |
| 663 | fcr |= KL0_SCCB_ENABLE; |
| 664 | /* Perform irda specific inits */ |
| 665 | if ((param & 0xfff) == PMAC_SCC_IRDA) { |
| 666 | fcr &= ~KL0_SCC_B_INTF_ENABLE; |
| 667 | fcr |= KL0_IRDA_ENABLE; |
| 668 | fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE; |
| 669 | fcr |= KL0_IRDA_SOURCE1_SEL; |
| 670 | fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); |
| 671 | fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); |
| 672 | need_reset_irda = 1; |
| 673 | } else |
| 674 | fcr |= KL0_SCC_B_INTF_ENABLE; |
| 675 | } |
| 676 | MACIO_OUT32(KEYLARGO_FCR0, fcr); |
| 677 | macio->flags |= chan_mask; |
| 678 | if (need_reset_scc) { |
| 679 | MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET); |
| 680 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 681 | UNLOCK(flags); |
| 682 | mdelay(15); |
| 683 | LOCK(flags); |
| 684 | MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET); |
| 685 | } |
| 686 | if (need_reset_irda) { |
| 687 | MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET); |
| 688 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 689 | UNLOCK(flags); |
| 690 | mdelay(15); |
| 691 | LOCK(flags); |
| 692 | MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET); |
| 693 | } |
| 694 | UNLOCK(flags); |
| 695 | if (param & PMAC_SCC_FLAG_XMON) |
| 696 | macio->flags |= MACIO_FLAG_SCC_LOCKED; |
| 697 | } else { |
| 698 | if (macio->flags & MACIO_FLAG_SCC_LOCKED) |
| 699 | return -EPERM; |
| 700 | LOCK(flags); |
| 701 | fcr = MACIO_IN32(KEYLARGO_FCR0); |
| 702 | if (chan_mask & MACIO_FLAG_SCCA_ON) |
| 703 | fcr &= ~KL0_SCCA_ENABLE; |
| 704 | if (chan_mask & MACIO_FLAG_SCCB_ON) { |
| 705 | fcr &= ~KL0_SCCB_ENABLE; |
| 706 | /* Perform irda specific clears */ |
| 707 | if ((param & 0xfff) == PMAC_SCC_IRDA) { |
| 708 | fcr &= ~KL0_IRDA_ENABLE; |
| 709 | fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE); |
| 710 | fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); |
| 711 | fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); |
| 712 | } |
| 713 | } |
| 714 | MACIO_OUT32(KEYLARGO_FCR0, fcr); |
| 715 | if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) { |
| 716 | fcr &= ~KL0_SCC_CELL_ENABLE; |
| 717 | MACIO_OUT32(KEYLARGO_FCR0, fcr); |
| 718 | } |
| 719 | macio->flags &= ~(chan_mask); |
| 720 | UNLOCK(flags); |
| 721 | mdelay(10); |
| 722 | } |
| 723 | return 0; |
| 724 | } |
| 725 | |
| 726 | static long __pmac |
| 727 | core99_modem_enable(struct device_node* node, long param, long value) |
| 728 | { |
| 729 | struct macio_chip* macio; |
| 730 | u8 gpio; |
| 731 | unsigned long flags; |
| 732 | |
| 733 | /* Hack for internal USB modem */ |
| 734 | if (node == NULL) { |
| 735 | if (macio_chips[0].type != macio_keylargo) |
| 736 | return -ENODEV; |
| 737 | node = macio_chips[0].of_node; |
| 738 | } |
| 739 | macio = macio_find(node, 0); |
| 740 | if (!macio) |
| 741 | return -ENODEV; |
| 742 | gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 743 | gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; |
| 744 | gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; |
| 745 | |
| 746 | if (!value) { |
| 747 | LOCK(flags); |
| 748 | MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); |
| 749 | UNLOCK(flags); |
| 750 | (void)MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 751 | mdelay(250); |
| 752 | } |
| 753 | LOCK(flags); |
| 754 | if (value) { |
| 755 | MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); |
| 756 | UNLOCK(flags); |
| 757 | (void)MACIO_IN32(KEYLARGO_FCR2); |
| 758 | mdelay(250); |
| 759 | } else { |
| 760 | MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); |
| 761 | UNLOCK(flags); |
| 762 | } |
| 763 | if (value) { |
| 764 | LOCK(flags); |
| 765 | MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); |
| 766 | (void)MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 767 | UNLOCK(flags); mdelay(250); LOCK(flags); |
| 768 | MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); |
| 769 | (void)MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 770 | UNLOCK(flags); mdelay(250); LOCK(flags); |
| 771 | MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); |
| 772 | (void)MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 773 | UNLOCK(flags); mdelay(250); |
| 774 | } |
| 775 | return 0; |
| 776 | } |
| 777 | |
| 778 | static long __pmac |
| 779 | pangea_modem_enable(struct device_node* node, long param, long value) |
| 780 | { |
| 781 | struct macio_chip* macio; |
| 782 | u8 gpio; |
| 783 | unsigned long flags; |
| 784 | |
| 785 | /* Hack for internal USB modem */ |
| 786 | if (node == NULL) { |
| 787 | if (macio_chips[0].type != macio_pangea && |
| 788 | macio_chips[0].type != macio_intrepid) |
| 789 | return -ENODEV; |
| 790 | node = macio_chips[0].of_node; |
| 791 | } |
| 792 | macio = macio_find(node, 0); |
| 793 | if (!macio) |
| 794 | return -ENODEV; |
| 795 | gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 796 | gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; |
| 797 | gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; |
| 798 | |
| 799 | if (!value) { |
| 800 | LOCK(flags); |
| 801 | MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); |
| 802 | UNLOCK(flags); |
| 803 | (void)MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 804 | mdelay(250); |
| 805 | } |
| 806 | LOCK(flags); |
| 807 | if (value) { |
| 808 | MACIO_OUT8(KL_GPIO_MODEM_POWER, |
| 809 | KEYLARGO_GPIO_OUTPUT_ENABLE); |
| 810 | UNLOCK(flags); |
| 811 | (void)MACIO_IN32(KEYLARGO_FCR2); |
| 812 | mdelay(250); |
| 813 | } else { |
| 814 | MACIO_OUT8(KL_GPIO_MODEM_POWER, |
| 815 | KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA); |
| 816 | UNLOCK(flags); |
| 817 | } |
| 818 | if (value) { |
| 819 | LOCK(flags); |
| 820 | MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); |
| 821 | (void)MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 822 | UNLOCK(flags); mdelay(250); LOCK(flags); |
| 823 | MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); |
| 824 | (void)MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 825 | UNLOCK(flags); mdelay(250); LOCK(flags); |
| 826 | MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); |
| 827 | (void)MACIO_IN8(KL_GPIO_MODEM_RESET); |
| 828 | UNLOCK(flags); mdelay(250); |
| 829 | } |
| 830 | return 0; |
| 831 | } |
| 832 | |
| 833 | static long __pmac |
| 834 | core99_ata100_enable(struct device_node* node, long value) |
| 835 | { |
| 836 | unsigned long flags; |
| 837 | struct pci_dev *pdev = NULL; |
| 838 | u8 pbus, pid; |
| 839 | |
| 840 | if (uninorth_rev < 0x24) |
| 841 | return -ENODEV; |
| 842 | |
| 843 | LOCK(flags); |
| 844 | if (value) |
| 845 | UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100); |
| 846 | else |
| 847 | UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100); |
| 848 | (void)UN_IN(UNI_N_CLOCK_CNTL); |
| 849 | UNLOCK(flags); |
| 850 | udelay(20); |
| 851 | |
| 852 | if (value) { |
| 853 | if (pci_device_from_OF_node(node, &pbus, &pid) == 0) |
| 854 | pdev = pci_find_slot(pbus, pid); |
| 855 | if (pdev == NULL) |
| 856 | return 0; |
| 857 | pci_enable_device(pdev); |
| 858 | pci_set_master(pdev); |
| 859 | } |
| 860 | return 0; |
| 861 | } |
| 862 | |
| 863 | static long __pmac |
| 864 | core99_ide_enable(struct device_node* node, long param, long value) |
| 865 | { |
| 866 | /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2 |
| 867 | * based ata-100 |
| 868 | */ |
| 869 | switch(param) { |
| 870 | case 0: |
| 871 | return simple_feature_tweak(node, macio_unknown, |
| 872 | KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value); |
| 873 | case 1: |
| 874 | return simple_feature_tweak(node, macio_unknown, |
| 875 | KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value); |
| 876 | case 2: |
| 877 | return simple_feature_tweak(node, macio_unknown, |
| 878 | KEYLARGO_FCR1, KL1_UIDE_ENABLE, value); |
| 879 | case 3: |
| 880 | return core99_ata100_enable(node, value); |
| 881 | default: |
| 882 | return -ENODEV; |
| 883 | } |
| 884 | } |
| 885 | |
| 886 | static long __pmac |
| 887 | core99_ide_reset(struct device_node* node, long param, long value) |
| 888 | { |
| 889 | switch(param) { |
| 890 | case 0: |
| 891 | return simple_feature_tweak(node, macio_unknown, |
| 892 | KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value); |
| 893 | case 1: |
| 894 | return simple_feature_tweak(node, macio_unknown, |
| 895 | KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value); |
| 896 | case 2: |
| 897 | return simple_feature_tweak(node, macio_unknown, |
| 898 | KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value); |
| 899 | default: |
| 900 | return -ENODEV; |
| 901 | } |
| 902 | } |
| 903 | |
| 904 | static long __pmac |
| 905 | core99_gmac_enable(struct device_node* node, long param, long value) |
| 906 | { |
| 907 | unsigned long flags; |
| 908 | |
| 909 | LOCK(flags); |
| 910 | if (value) |
| 911 | UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); |
| 912 | else |
| 913 | UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); |
| 914 | (void)UN_IN(UNI_N_CLOCK_CNTL); |
| 915 | UNLOCK(flags); |
| 916 | udelay(20); |
| 917 | |
| 918 | return 0; |
| 919 | } |
| 920 | |
| 921 | static long __pmac |
| 922 | core99_gmac_phy_reset(struct device_node* node, long param, long value) |
| 923 | { |
| 924 | unsigned long flags; |
| 925 | struct macio_chip* macio; |
| 926 | |
| 927 | macio = &macio_chips[0]; |
| 928 | if (macio->type != macio_keylargo && macio->type != macio_pangea && |
| 929 | macio->type != macio_intrepid) |
| 930 | return -ENODEV; |
| 931 | |
| 932 | LOCK(flags); |
| 933 | MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE); |
| 934 | (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET); |
| 935 | UNLOCK(flags); |
| 936 | mdelay(10); |
| 937 | LOCK(flags); |
| 938 | MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */ |
| 939 | KEYLARGO_GPIO_OUTOUT_DATA); |
| 940 | UNLOCK(flags); |
| 941 | mdelay(10); |
| 942 | |
| 943 | return 0; |
| 944 | } |
| 945 | |
| 946 | static long __pmac |
| 947 | core99_sound_chip_enable(struct device_node* node, long param, long value) |
| 948 | { |
| 949 | struct macio_chip* macio; |
| 950 | unsigned long flags; |
| 951 | |
| 952 | macio = macio_find(node, 0); |
| 953 | if (!macio) |
| 954 | return -ENODEV; |
| 955 | |
| 956 | /* Do a better probe code, screamer G4 desktops & |
| 957 | * iMacs can do that too, add a recalibrate in |
| 958 | * the driver as well |
| 959 | */ |
| 960 | if (pmac_mb.model_id == PMAC_TYPE_PISMO || |
| 961 | pmac_mb.model_id == PMAC_TYPE_TITANIUM) { |
| 962 | LOCK(flags); |
| 963 | if (value) |
| 964 | MACIO_OUT8(KL_GPIO_SOUND_POWER, |
| 965 | KEYLARGO_GPIO_OUTPUT_ENABLE | |
| 966 | KEYLARGO_GPIO_OUTOUT_DATA); |
| 967 | else |
| 968 | MACIO_OUT8(KL_GPIO_SOUND_POWER, |
| 969 | KEYLARGO_GPIO_OUTPUT_ENABLE); |
| 970 | (void)MACIO_IN8(KL_GPIO_SOUND_POWER); |
| 971 | UNLOCK(flags); |
| 972 | } |
| 973 | return 0; |
| 974 | } |
| 975 | |
| 976 | static long __pmac |
| 977 | core99_airport_enable(struct device_node* node, long param, long value) |
| 978 | { |
| 979 | struct macio_chip* macio; |
| 980 | unsigned long flags; |
| 981 | int state; |
| 982 | |
| 983 | macio = macio_find(node, 0); |
| 984 | if (!macio) |
| 985 | return -ENODEV; |
| 986 | |
| 987 | /* Hint: we allow passing of macio itself for the sake of the |
| 988 | * sleep code |
| 989 | */ |
| 990 | if (node != macio->of_node && |
| 991 | (!node->parent || node->parent != macio->of_node)) |
| 992 | return -ENODEV; |
| 993 | state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0; |
| 994 | if (value == state) |
| 995 | return 0; |
| 996 | if (value) { |
| 997 | /* This code is a reproduction of OF enable-cardslot |
| 998 | * and init-wireless methods, slightly hacked until |
| 999 | * I got it working. |
| 1000 | */ |
| 1001 | LOCK(flags); |
| 1002 | MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5); |
| 1003 | (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); |
| 1004 | UNLOCK(flags); |
| 1005 | mdelay(10); |
| 1006 | LOCK(flags); |
| 1007 | MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4); |
| 1008 | (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); |
| 1009 | UNLOCK(flags); |
| 1010 | |
| 1011 | mdelay(10); |
| 1012 | |
| 1013 | LOCK(flags); |
| 1014 | MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); |
| 1015 | (void)MACIO_IN32(KEYLARGO_FCR2); |
| 1016 | udelay(10); |
| 1017 | MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0); |
| 1018 | (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb); |
| 1019 | udelay(10); |
| 1020 | MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28); |
| 1021 | (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa); |
| 1022 | udelay(10); |
| 1023 | MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28); |
| 1024 | (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd); |
| 1025 | udelay(10); |
| 1026 | MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28); |
| 1027 | (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd); |
| 1028 | udelay(10); |
| 1029 | MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28); |
| 1030 | (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe); |
| 1031 | UNLOCK(flags); |
| 1032 | udelay(10); |
| 1033 | MACIO_OUT32(0x1c000, 0); |
| 1034 | mdelay(1); |
| 1035 | MACIO_OUT8(0x1a3e0, 0x41); |
| 1036 | (void)MACIO_IN8(0x1a3e0); |
| 1037 | udelay(10); |
| 1038 | LOCK(flags); |
| 1039 | MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16); |
| 1040 | (void)MACIO_IN32(KEYLARGO_FCR2); |
| 1041 | UNLOCK(flags); |
| 1042 | mdelay(100); |
| 1043 | |
| 1044 | macio->flags |= MACIO_FLAG_AIRPORT_ON; |
| 1045 | } else { |
| 1046 | LOCK(flags); |
| 1047 | MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); |
| 1048 | (void)MACIO_IN32(KEYLARGO_FCR2); |
| 1049 | MACIO_OUT8(KL_GPIO_AIRPORT_0, 0); |
| 1050 | MACIO_OUT8(KL_GPIO_AIRPORT_1, 0); |
| 1051 | MACIO_OUT8(KL_GPIO_AIRPORT_2, 0); |
| 1052 | MACIO_OUT8(KL_GPIO_AIRPORT_3, 0); |
| 1053 | MACIO_OUT8(KL_GPIO_AIRPORT_4, 0); |
| 1054 | (void)MACIO_IN8(KL_GPIO_AIRPORT_4); |
| 1055 | UNLOCK(flags); |
| 1056 | |
| 1057 | macio->flags &= ~MACIO_FLAG_AIRPORT_ON; |
| 1058 | } |
| 1059 | return 0; |
| 1060 | } |
| 1061 | |
| 1062 | #ifdef CONFIG_SMP |
| 1063 | static long __pmac |
| 1064 | core99_reset_cpu(struct device_node* node, long param, long value) |
| 1065 | { |
| 1066 | unsigned int reset_io = 0; |
| 1067 | unsigned long flags; |
| 1068 | struct macio_chip* macio; |
| 1069 | struct device_node* np; |
| 1070 | const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0, |
| 1071 | KL_GPIO_RESET_CPU1, |
| 1072 | KL_GPIO_RESET_CPU2, |
| 1073 | KL_GPIO_RESET_CPU3 }; |
| 1074 | |
| 1075 | macio = &macio_chips[0]; |
| 1076 | if (macio->type != macio_keylargo) |
| 1077 | return -ENODEV; |
| 1078 | |
| 1079 | np = find_path_device("/cpus"); |
| 1080 | if (np == NULL) |
| 1081 | return -ENODEV; |
| 1082 | for (np = np->child; np != NULL; np = np->sibling) { |
| 1083 | u32* num = (u32 *)get_property(np, "reg", NULL); |
| 1084 | u32* rst = (u32 *)get_property(np, "soft-reset", NULL); |
| 1085 | if (num == NULL || rst == NULL) |
| 1086 | continue; |
| 1087 | if (param == *num) { |
| 1088 | reset_io = *rst; |
| 1089 | break; |
| 1090 | } |
| 1091 | } |
| 1092 | if (np == NULL || reset_io == 0) |
| 1093 | reset_io = dflt_reset_lines[param]; |
| 1094 | |
| 1095 | LOCK(flags); |
| 1096 | MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); |
| 1097 | (void)MACIO_IN8(reset_io); |
| 1098 | udelay(1); |
| 1099 | MACIO_OUT8(reset_io, 0); |
| 1100 | (void)MACIO_IN8(reset_io); |
| 1101 | UNLOCK(flags); |
| 1102 | |
| 1103 | return 0; |
| 1104 | } |
| 1105 | #endif /* CONFIG_SMP */ |
| 1106 | |
| 1107 | static long __pmac |
| 1108 | core99_usb_enable(struct device_node* node, long param, long value) |
| 1109 | { |
| 1110 | struct macio_chip* macio; |
| 1111 | unsigned long flags; |
| 1112 | char* prop; |
| 1113 | int number; |
| 1114 | u32 reg; |
| 1115 | |
| 1116 | macio = &macio_chips[0]; |
| 1117 | if (macio->type != macio_keylargo && macio->type != macio_pangea && |
| 1118 | macio->type != macio_intrepid) |
| 1119 | return -ENODEV; |
| 1120 | |
| 1121 | prop = (char *)get_property(node, "AAPL,clock-id", NULL); |
| 1122 | if (!prop) |
| 1123 | return -ENODEV; |
| 1124 | if (strncmp(prop, "usb0u048", 8) == 0) |
| 1125 | number = 0; |
| 1126 | else if (strncmp(prop, "usb1u148", 8) == 0) |
| 1127 | number = 2; |
| 1128 | else if (strncmp(prop, "usb2u248", 8) == 0) |
| 1129 | number = 4; |
| 1130 | else |
| 1131 | return -ENODEV; |
| 1132 | |
| 1133 | /* Sorry for the brute-force locking, but this is only used during |
| 1134 | * sleep and the timing seem to be critical |
| 1135 | */ |
| 1136 | LOCK(flags); |
| 1137 | if (value) { |
| 1138 | /* Turn ON */ |
| 1139 | if (number == 0) { |
| 1140 | MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); |
| 1141 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 1142 | UNLOCK(flags); |
| 1143 | mdelay(1); |
| 1144 | LOCK(flags); |
| 1145 | MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); |
| 1146 | } else if (number == 2) { |
| 1147 | MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); |
| 1148 | UNLOCK(flags); |
| 1149 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 1150 | mdelay(1); |
| 1151 | LOCK(flags); |
| 1152 | MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); |
| 1153 | } else if (number == 4) { |
| 1154 | MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1)); |
| 1155 | UNLOCK(flags); |
| 1156 | (void)MACIO_IN32(KEYLARGO_FCR1); |
| 1157 | mdelay(1); |
| 1158 | LOCK(flags); |
| 1159 | MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE); |
| 1160 | } |
| 1161 | if (number < 4) { |
| 1162 | reg = MACIO_IN32(KEYLARGO_FCR4); |
| 1163 | reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | |
| 1164 | KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number)); |
| 1165 | reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | |
| 1166 | KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1)); |
| 1167 | MACIO_OUT32(KEYLARGO_FCR4, reg); |
| 1168 | (void)MACIO_IN32(KEYLARGO_FCR4); |
| 1169 | udelay(10); |
| 1170 | } else { |
| 1171 | reg = MACIO_IN32(KEYLARGO_FCR3); |
| 1172 | reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) | |
| 1173 | KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0)); |
| 1174 | reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) | |
| 1175 | KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1)); |
| 1176 | MACIO_OUT32(KEYLARGO_FCR3, reg); |
| 1177 | (void)MACIO_IN32(KEYLARGO_FCR3); |
| 1178 | udelay(10); |
| 1179 | } |
| 1180 | if (macio->type == macio_intrepid) { |
| 1181 | /* wait for clock stopped bits to clear */ |
| 1182 | u32 test0 = 0, test1 = 0; |
| 1183 | u32 status0, status1; |
| 1184 | int timeout = 1000; |
| 1185 | |
| 1186 | UNLOCK(flags); |
| 1187 | switch (number) { |
| 1188 | case 0: |
| 1189 | test0 = UNI_N_CLOCK_STOPPED_USB0; |
| 1190 | test1 = UNI_N_CLOCK_STOPPED_USB0PCI; |
| 1191 | break; |
| 1192 | case 2: |
| 1193 | test0 = UNI_N_CLOCK_STOPPED_USB1; |
| 1194 | test1 = UNI_N_CLOCK_STOPPED_USB1PCI; |
| 1195 | break; |
| 1196 | case 4: |
| 1197 | test0 = UNI_N_CLOCK_STOPPED_USB2; |
| 1198 | test1 = UNI_N_CLOCK_STOPPED_USB2PCI; |
| 1199 | break; |
| 1200 | } |
| 1201 | do { |
| 1202 | if (--timeout <= 0) { |
| 1203 | printk(KERN_ERR "core99_usb_enable: " |
| 1204 | "Timeout waiting for clocks\n"); |
| 1205 | break; |
| 1206 | } |
| 1207 | mdelay(1); |
| 1208 | status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0); |
| 1209 | status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1); |
| 1210 | } while ((status0 & test0) | (status1 & test1)); |
| 1211 | LOCK(flags); |
| 1212 | } |
| 1213 | } else { |
| 1214 | /* Turn OFF */ |
| 1215 | if (number < 4) { |
| 1216 | reg = MACIO_IN32(KEYLARGO_FCR4); |
| 1217 | reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | |
| 1218 | KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number); |
| 1219 | reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | |
| 1220 | KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1); |
| 1221 | MACIO_OUT32(KEYLARGO_FCR4, reg); |
| 1222 | (void)MACIO_IN32(KEYLARGO_FCR4); |
| 1223 | udelay(1); |
| 1224 | } else { |
| 1225 | reg = MACIO_IN32(KEYLARGO_FCR3); |
| 1226 | reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) | |
| 1227 | KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0); |
| 1228 | reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) | |
| 1229 | KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1); |
| 1230 | MACIO_OUT32(KEYLARGO_FCR3, reg); |
| 1231 | (void)MACIO_IN32(KEYLARGO_FCR3); |
| 1232 | udelay(1); |
| 1233 | } |
| 1234 | if (number == 0) { |
| 1235 | if (macio->type != macio_intrepid) |
| 1236 | MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); |
| 1237 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 1238 | udelay(1); |
| 1239 | MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); |
| 1240 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 1241 | } else if (number == 2) { |
| 1242 | if (macio->type != macio_intrepid) |
| 1243 | MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); |
| 1244 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 1245 | udelay(1); |
| 1246 | MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); |
| 1247 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 1248 | } else if (number == 4) { |
| 1249 | udelay(1); |
| 1250 | MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1)); |
| 1251 | (void)MACIO_IN32(KEYLARGO_FCR1); |
| 1252 | } |
| 1253 | udelay(1); |
| 1254 | } |
| 1255 | UNLOCK(flags); |
| 1256 | |
| 1257 | return 0; |
| 1258 | } |
| 1259 | |
| 1260 | static long __pmac |
| 1261 | core99_firewire_enable(struct device_node* node, long param, long value) |
| 1262 | { |
| 1263 | unsigned long flags; |
| 1264 | struct macio_chip* macio; |
| 1265 | |
| 1266 | macio = &macio_chips[0]; |
| 1267 | if (macio->type != macio_keylargo && macio->type != macio_pangea && |
| 1268 | macio->type != macio_intrepid) |
| 1269 | return -ENODEV; |
| 1270 | if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) |
| 1271 | return -ENODEV; |
| 1272 | |
| 1273 | LOCK(flags); |
| 1274 | if (value) { |
| 1275 | UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); |
| 1276 | (void)UN_IN(UNI_N_CLOCK_CNTL); |
| 1277 | } else { |
| 1278 | UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); |
| 1279 | (void)UN_IN(UNI_N_CLOCK_CNTL); |
| 1280 | } |
| 1281 | UNLOCK(flags); |
| 1282 | mdelay(1); |
| 1283 | |
| 1284 | return 0; |
| 1285 | } |
| 1286 | |
| 1287 | static long __pmac |
| 1288 | core99_firewire_cable_power(struct device_node* node, long param, long value) |
| 1289 | { |
| 1290 | unsigned long flags; |
| 1291 | struct macio_chip* macio; |
| 1292 | |
| 1293 | /* Trick: we allow NULL node */ |
| 1294 | if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0) |
| 1295 | return -ENODEV; |
| 1296 | macio = &macio_chips[0]; |
| 1297 | if (macio->type != macio_keylargo && macio->type != macio_pangea && |
| 1298 | macio->type != macio_intrepid) |
| 1299 | return -ENODEV; |
| 1300 | if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) |
| 1301 | return -ENODEV; |
| 1302 | |
| 1303 | LOCK(flags); |
| 1304 | if (value) { |
| 1305 | MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0); |
| 1306 | MACIO_IN8(KL_GPIO_FW_CABLE_POWER); |
| 1307 | udelay(10); |
| 1308 | } else { |
| 1309 | MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4); |
| 1310 | MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10); |
| 1311 | } |
| 1312 | UNLOCK(flags); |
| 1313 | mdelay(1); |
| 1314 | |
| 1315 | return 0; |
| 1316 | } |
| 1317 | |
| 1318 | static long __pmac |
| 1319 | intrepid_aack_delay_enable(struct device_node* node, long param, long value) |
| 1320 | { |
| 1321 | unsigned long flags; |
| 1322 | |
| 1323 | if (uninorth_rev < 0xd2) |
| 1324 | return -ENODEV; |
| 1325 | |
| 1326 | LOCK(flags); |
| 1327 | if (param) |
| 1328 | UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE); |
| 1329 | else |
| 1330 | UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE); |
| 1331 | UNLOCK(flags); |
| 1332 | |
| 1333 | return 0; |
| 1334 | } |
| 1335 | |
| 1336 | |
| 1337 | #endif /* CONFIG_POWER4 */ |
| 1338 | |
| 1339 | static long __pmac |
| 1340 | core99_read_gpio(struct device_node* node, long param, long value) |
| 1341 | { |
| 1342 | struct macio_chip* macio = &macio_chips[0]; |
| 1343 | |
| 1344 | return MACIO_IN8(param); |
| 1345 | } |
| 1346 | |
| 1347 | |
| 1348 | static long __pmac |
| 1349 | core99_write_gpio(struct device_node* node, long param, long value) |
| 1350 | { |
| 1351 | struct macio_chip* macio = &macio_chips[0]; |
| 1352 | |
| 1353 | MACIO_OUT8(param, (u8)(value & 0xff)); |
| 1354 | return 0; |
| 1355 | } |
| 1356 | |
| 1357 | #ifdef CONFIG_POWER4 |
| 1358 | |
| 1359 | static long __pmac |
| 1360 | g5_gmac_enable(struct device_node* node, long param, long value) |
| 1361 | { |
| 1362 | struct macio_chip* macio = &macio_chips[0]; |
| 1363 | unsigned long flags; |
| 1364 | u8 pbus, pid; |
| 1365 | |
| 1366 | LOCK(flags); |
| 1367 | if (value) { |
| 1368 | MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE); |
| 1369 | mb(); |
| 1370 | k2_skiplist[0] = NULL; |
| 1371 | } else { |
| 1372 | k2_skiplist[0] = node; |
| 1373 | mb(); |
| 1374 | MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE); |
| 1375 | } |
| 1376 | |
| 1377 | UNLOCK(flags); |
| 1378 | mdelay(1); |
| 1379 | |
| 1380 | return 0; |
| 1381 | } |
| 1382 | |
| 1383 | static long __pmac |
| 1384 | g5_fw_enable(struct device_node* node, long param, long value) |
| 1385 | { |
| 1386 | struct macio_chip* macio = &macio_chips[0]; |
| 1387 | unsigned long flags; |
| 1388 | |
| 1389 | LOCK(flags); |
| 1390 | if (value) { |
| 1391 | MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE); |
| 1392 | mb(); |
| 1393 | k2_skiplist[1] = NULL; |
| 1394 | } else { |
| 1395 | k2_skiplist[1] = node; |
| 1396 | mb(); |
| 1397 | MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE); |
| 1398 | } |
| 1399 | |
| 1400 | UNLOCK(flags); |
| 1401 | mdelay(1); |
| 1402 | |
| 1403 | return 0; |
| 1404 | } |
| 1405 | |
| 1406 | static long __pmac |
| 1407 | g5_mpic_enable(struct device_node* node, long param, long value) |
| 1408 | { |
| 1409 | unsigned long flags; |
| 1410 | |
| 1411 | if (node->parent == NULL || strcmp(node->parent->name, "u3")) |
| 1412 | return 0; |
| 1413 | |
| 1414 | LOCK(flags); |
| 1415 | UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE); |
| 1416 | UNLOCK(flags); |
| 1417 | |
| 1418 | return 0; |
| 1419 | } |
| 1420 | |
| 1421 | #ifdef CONFIG_SMP |
| 1422 | static long __pmac |
| 1423 | g5_reset_cpu(struct device_node* node, long param, long value) |
| 1424 | { |
| 1425 | unsigned int reset_io = 0; |
| 1426 | unsigned long flags; |
| 1427 | struct macio_chip* macio; |
| 1428 | struct device_node* np; |
| 1429 | |
| 1430 | macio = &macio_chips[0]; |
| 1431 | if (macio->type != macio_keylargo2) |
| 1432 | return -ENODEV; |
| 1433 | |
| 1434 | np = find_path_device("/cpus"); |
| 1435 | if (np == NULL) |
| 1436 | return -ENODEV; |
| 1437 | for (np = np->child; np != NULL; np = np->sibling) { |
| 1438 | u32* num = (u32 *)get_property(np, "reg", NULL); |
| 1439 | u32* rst = (u32 *)get_property(np, "soft-reset", NULL); |
| 1440 | if (num == NULL || rst == NULL) |
| 1441 | continue; |
| 1442 | if (param == *num) { |
| 1443 | reset_io = *rst; |
| 1444 | break; |
| 1445 | } |
| 1446 | } |
| 1447 | if (np == NULL || reset_io == 0) |
| 1448 | return -ENODEV; |
| 1449 | |
| 1450 | LOCK(flags); |
| 1451 | MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); |
| 1452 | (void)MACIO_IN8(reset_io); |
| 1453 | udelay(1); |
| 1454 | MACIO_OUT8(reset_io, 0); |
| 1455 | (void)MACIO_IN8(reset_io); |
| 1456 | UNLOCK(flags); |
| 1457 | |
| 1458 | return 0; |
| 1459 | } |
| 1460 | #endif /* CONFIG_SMP */ |
| 1461 | |
| 1462 | /* |
| 1463 | * This can be called from pmac_smp so isn't static |
| 1464 | * |
| 1465 | * This takes the second CPU off the bus on dual CPU machines |
| 1466 | * running UP |
| 1467 | */ |
| 1468 | void __pmac g5_phy_disable_cpu1(void) |
| 1469 | { |
| 1470 | UN_OUT(U3_API_PHY_CONFIG_1, 0); |
| 1471 | } |
| 1472 | |
| 1473 | #endif /* CONFIG_POWER4 */ |
| 1474 | |
| 1475 | #ifndef CONFIG_POWER4 |
| 1476 | |
| 1477 | static void __pmac |
| 1478 | keylargo_shutdown(struct macio_chip* macio, int sleep_mode) |
| 1479 | { |
| 1480 | u32 temp; |
| 1481 | |
| 1482 | if (sleep_mode) { |
| 1483 | mdelay(1); |
| 1484 | MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND); |
| 1485 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 1486 | mdelay(1); |
| 1487 | } |
| 1488 | |
| 1489 | MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | |
| 1490 | KL0_SCC_CELL_ENABLE | |
| 1491 | KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE | |
| 1492 | KL0_IRDA_CLK19_ENABLE); |
| 1493 | |
| 1494 | MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK); |
| 1495 | MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE); |
| 1496 | |
| 1497 | MACIO_BIC(KEYLARGO_FCR1, |
| 1498 | KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | |
| 1499 | KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | |
| 1500 | KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | |
| 1501 | KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | |
| 1502 | KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | |
| 1503 | KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N | |
| 1504 | KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N | |
| 1505 | KL1_UIDE_ENABLE); |
| 1506 | |
| 1507 | MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); |
| 1508 | MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE); |
| 1509 | |
| 1510 | temp = MACIO_IN32(KEYLARGO_FCR3); |
| 1511 | if (macio->rev >= 2) { |
| 1512 | temp |= KL3_SHUTDOWN_PLL2X; |
| 1513 | if (sleep_mode) |
| 1514 | temp |= KL3_SHUTDOWN_PLL_TOTAL; |
| 1515 | } |
| 1516 | |
| 1517 | temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | |
| 1518 | KL3_SHUTDOWN_PLLKW35; |
| 1519 | if (sleep_mode) |
| 1520 | temp |= KL3_SHUTDOWN_PLLKW12; |
| 1521 | temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
| 1522 | | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE); |
| 1523 | if (sleep_mode) |
| 1524 | temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE); |
| 1525 | MACIO_OUT32(KEYLARGO_FCR3, temp); |
| 1526 | |
| 1527 | /* Flush posted writes & wait a bit */ |
| 1528 | (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); |
| 1529 | } |
| 1530 | |
| 1531 | static void __pmac |
| 1532 | pangea_shutdown(struct macio_chip* macio, int sleep_mode) |
| 1533 | { |
| 1534 | u32 temp; |
| 1535 | |
| 1536 | MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | |
| 1537 | KL0_SCC_CELL_ENABLE | |
| 1538 | KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE); |
| 1539 | |
| 1540 | MACIO_BIC(KEYLARGO_FCR1, |
| 1541 | KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | |
| 1542 | KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | |
| 1543 | KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | |
| 1544 | KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | |
| 1545 | KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | |
| 1546 | KL1_UIDE_ENABLE); |
| 1547 | if (pmac_mb.board_flags & PMAC_MB_MOBILE) |
| 1548 | MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N); |
| 1549 | |
| 1550 | MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); |
| 1551 | |
| 1552 | temp = MACIO_IN32(KEYLARGO_FCR3); |
| 1553 | temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | |
| 1554 | KL3_SHUTDOWN_PLLKW35; |
| 1555 | temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE |
| 1556 | | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE); |
| 1557 | if (sleep_mode) |
| 1558 | temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE); |
| 1559 | MACIO_OUT32(KEYLARGO_FCR3, temp); |
| 1560 | |
| 1561 | /* Flush posted writes & wait a bit */ |
| 1562 | (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); |
| 1563 | } |
| 1564 | |
| 1565 | static void __pmac |
| 1566 | intrepid_shutdown(struct macio_chip* macio, int sleep_mode) |
| 1567 | { |
| 1568 | u32 temp; |
| 1569 | |
| 1570 | MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | |
| 1571 | KL0_SCC_CELL_ENABLE); |
| 1572 | |
| 1573 | MACIO_BIC(KEYLARGO_FCR1, |
| 1574 | /*KL1_USB2_CELL_ENABLE |*/ |
| 1575 | KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | |
| 1576 | KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | |
| 1577 | KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE); |
| 1578 | if (pmac_mb.board_flags & PMAC_MB_MOBILE) |
| 1579 | MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N); |
| 1580 | |
| 1581 | temp = MACIO_IN32(KEYLARGO_FCR3); |
| 1582 | temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | |
| 1583 | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE); |
| 1584 | if (sleep_mode) |
| 1585 | temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE); |
| 1586 | MACIO_OUT32(KEYLARGO_FCR3, temp); |
| 1587 | |
| 1588 | /* Flush posted writes & wait a bit */ |
| 1589 | (void)MACIO_IN32(KEYLARGO_FCR0); |
| 1590 | mdelay(10); |
| 1591 | } |
| 1592 | |
Benjamin Herrenschmidt | b20cc8a | 2005-05-01 08:58:42 -0700 | [diff] [blame] | 1593 | |
Benjamin Herrenschmidt | e521dca | 2005-05-02 16:12:00 +1000 | [diff] [blame^] | 1594 | void __pmac pmac_tweak_clock_spreading(int enable) |
Benjamin Herrenschmidt | b20cc8a | 2005-05-01 08:58:42 -0700 | [diff] [blame] | 1595 | { |
Benjamin Herrenschmidt | e521dca | 2005-05-02 16:12:00 +1000 | [diff] [blame^] | 1596 | struct macio_chip* macio = &macio_chips[0]; |
| 1597 | |
Benjamin Herrenschmidt | b20cc8a | 2005-05-01 08:58:42 -0700 | [diff] [blame] | 1598 | /* Hack for doing clock spreading on some machines PowerBooks and |
| 1599 | * iBooks. This implements the "platform-do-clockspreading" OF |
| 1600 | * property as decoded manually on various models. For safety, we also |
| 1601 | * check the product ID in the device-tree in cases we'll whack the i2c |
| 1602 | * chip to make reasonably sure we won't set wrong values in there |
| 1603 | * |
| 1604 | * Of course, ultimately, we have to implement a real parser for |
| 1605 | * the platform-do-* stuff... |
| 1606 | */ |
| 1607 | |
| 1608 | if (macio->type == macio_intrepid) { |
| 1609 | if (enable) |
| 1610 | UN_OUT(UNI_N_CLOCK_SPREADING, 2); |
| 1611 | else |
| 1612 | UN_OUT(UNI_N_CLOCK_SPREADING, 0); |
| 1613 | mdelay(40); |
| 1614 | } |
| 1615 | |
| 1616 | while (machine_is_compatible("PowerBook5,2") || |
| 1617 | machine_is_compatible("PowerBook5,3") || |
| 1618 | machine_is_compatible("PowerBook6,2") || |
| 1619 | machine_is_compatible("PowerBook6,3")) { |
| 1620 | struct device_node *ui2c = of_find_node_by_type(NULL, "i2c"); |
| 1621 | struct device_node *dt = of_find_node_by_name(NULL, "device-tree"); |
| 1622 | u8 buffer[9]; |
| 1623 | u32 *productID; |
| 1624 | int i, rc, changed = 0; |
| 1625 | |
| 1626 | if (dt == NULL) |
| 1627 | break; |
| 1628 | productID = (u32 *)get_property(dt, "pid#", NULL); |
| 1629 | if (productID == NULL) |
| 1630 | break; |
| 1631 | while(ui2c) { |
| 1632 | struct device_node *p = of_get_parent(ui2c); |
| 1633 | if (p && !strcmp(p->name, "uni-n")) |
| 1634 | break; |
| 1635 | ui2c = of_find_node_by_type(ui2c, "i2c"); |
| 1636 | } |
| 1637 | if (ui2c == NULL) |
| 1638 | break; |
| 1639 | DBG("Trying to bump clock speed for PID: %08x...\n", *productID); |
| 1640 | rc = pmac_low_i2c_open(ui2c, 1); |
| 1641 | if (rc != 0) |
| 1642 | break; |
| 1643 | pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined); |
| 1644 | rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9); |
| 1645 | DBG("read result: %d,", rc); |
| 1646 | if (rc != 0) { |
| 1647 | pmac_low_i2c_close(ui2c); |
| 1648 | break; |
| 1649 | } |
| 1650 | for (i=0; i<9; i++) |
| 1651 | DBG(" %02x", buffer[i]); |
| 1652 | DBG("\n"); |
| 1653 | |
| 1654 | switch(*productID) { |
| 1655 | case 0x1182: /* AlBook 12" rev 2 */ |
| 1656 | case 0x1183: /* iBook G4 12" */ |
| 1657 | buffer[0] = (buffer[0] & 0x8f) | 0x70; |
| 1658 | buffer[2] = (buffer[2] & 0x7f) | 0x00; |
| 1659 | buffer[5] = (buffer[5] & 0x80) | 0x31; |
| 1660 | buffer[6] = (buffer[6] & 0x40) | 0xb0; |
| 1661 | buffer[7] = (buffer[7] & 0x00) | (enable ? 0xc0 : 0xba); |
| 1662 | buffer[8] = (buffer[8] & 0x00) | 0x30; |
| 1663 | changed = 1; |
| 1664 | break; |
| 1665 | case 0x3142: /* AlBook 15" (ATI M10) */ |
| 1666 | case 0x3143: /* AlBook 17" (ATI M10) */ |
| 1667 | buffer[0] = (buffer[0] & 0xaf) | 0x50; |
| 1668 | buffer[2] = (buffer[2] & 0x7f) | 0x00; |
| 1669 | buffer[5] = (buffer[5] & 0x80) | 0x31; |
| 1670 | buffer[6] = (buffer[6] & 0x40) | 0xb0; |
| 1671 | buffer[7] = (buffer[7] & 0x00) | (enable ? 0xd0 : 0xc0); |
| 1672 | buffer[8] = (buffer[8] & 0x00) | 0x30; |
| 1673 | changed = 1; |
| 1674 | break; |
| 1675 | default: |
| 1676 | DBG("i2c-hwclock: Machine model not handled\n"); |
| 1677 | break; |
| 1678 | } |
| 1679 | if (!changed) { |
| 1680 | pmac_low_i2c_close(ui2c); |
| 1681 | break; |
| 1682 | } |
| 1683 | pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_stdsub); |
| 1684 | rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_write, 0x80, buffer, 9); |
| 1685 | DBG("write result: %d,", rc); |
| 1686 | pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined); |
| 1687 | rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9); |
| 1688 | DBG("read result: %d,", rc); |
| 1689 | if (rc != 0) { |
| 1690 | pmac_low_i2c_close(ui2c); |
| 1691 | break; |
| 1692 | } |
| 1693 | for (i=0; i<9; i++) |
| 1694 | DBG(" %02x", buffer[i]); |
| 1695 | pmac_low_i2c_close(ui2c); |
| 1696 | break; |
| 1697 | } |
| 1698 | } |
| 1699 | |
| 1700 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1701 | static int __pmac |
| 1702 | core99_sleep(void) |
| 1703 | { |
| 1704 | struct macio_chip* macio; |
| 1705 | int i; |
| 1706 | |
| 1707 | macio = &macio_chips[0]; |
| 1708 | if (macio->type != macio_keylargo && macio->type != macio_pangea && |
| 1709 | macio->type != macio_intrepid) |
| 1710 | return -ENODEV; |
| 1711 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1712 | /* We power off the wireless slot in case it was not done |
| 1713 | * by the driver. We don't power it on automatically however |
| 1714 | */ |
| 1715 | if (macio->flags & MACIO_FLAG_AIRPORT_ON) |
| 1716 | core99_airport_enable(macio->of_node, 0, 0); |
| 1717 | |
| 1718 | /* We power off the FW cable. Should be done by the driver... */ |
| 1719 | if (macio->flags & MACIO_FLAG_FW_SUPPORTED) { |
| 1720 | core99_firewire_enable(NULL, 0, 0); |
| 1721 | core99_firewire_cable_power(NULL, 0, 0); |
| 1722 | } |
| 1723 | |
| 1724 | /* We make sure int. modem is off (in case driver lost it) */ |
| 1725 | if (macio->type == macio_keylargo) |
| 1726 | core99_modem_enable(macio->of_node, 0, 0); |
| 1727 | else |
| 1728 | pangea_modem_enable(macio->of_node, 0, 0); |
| 1729 | |
| 1730 | /* We make sure the sound is off as well */ |
| 1731 | core99_sound_chip_enable(macio->of_node, 0, 0); |
| 1732 | |
| 1733 | /* |
| 1734 | * Save various bits of KeyLargo |
| 1735 | */ |
| 1736 | |
| 1737 | /* Save the state of the various GPIOs */ |
| 1738 | save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0); |
| 1739 | save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1); |
| 1740 | for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) |
| 1741 | save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i); |
| 1742 | for (i=0; i<KEYLARGO_GPIO_CNT; i++) |
| 1743 | save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i); |
| 1744 | |
| 1745 | /* Save the FCRs */ |
| 1746 | if (macio->type == macio_keylargo) |
| 1747 | save_mbcr = MACIO_IN32(KEYLARGO_MBCR); |
| 1748 | save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0); |
| 1749 | save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1); |
| 1750 | save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2); |
| 1751 | save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3); |
| 1752 | save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4); |
| 1753 | if (macio->type == macio_pangea || macio->type == macio_intrepid) |
| 1754 | save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5); |
| 1755 | |
| 1756 | /* Save state & config of DBDMA channels */ |
| 1757 | dbdma_save(macio, save_dbdma); |
| 1758 | |
| 1759 | /* |
| 1760 | * Turn off as much as we can |
| 1761 | */ |
| 1762 | if (macio->type == macio_pangea) |
| 1763 | pangea_shutdown(macio, 1); |
| 1764 | else if (macio->type == macio_intrepid) |
| 1765 | intrepid_shutdown(macio, 1); |
| 1766 | else if (macio->type == macio_keylargo) |
| 1767 | keylargo_shutdown(macio, 1); |
| 1768 | |
| 1769 | /* |
| 1770 | * Put the host bridge to sleep |
| 1771 | */ |
| 1772 | |
| 1773 | save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL); |
| 1774 | /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it |
| 1775 | * enabled ! |
| 1776 | */ |
| 1777 | UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl & |
| 1778 | ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/)); |
| 1779 | udelay(100); |
| 1780 | UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); |
| 1781 | UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP); |
| 1782 | mdelay(10); |
| 1783 | |
| 1784 | /* |
| 1785 | * FIXME: A bit of black magic with OpenPIC (don't ask me why) |
| 1786 | */ |
| 1787 | if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { |
| 1788 | MACIO_BIS(0x506e0, 0x00400000); |
| 1789 | MACIO_BIS(0x506e0, 0x80000000); |
| 1790 | } |
| 1791 | return 0; |
| 1792 | } |
| 1793 | |
| 1794 | static int __pmac |
| 1795 | core99_wake_up(void) |
| 1796 | { |
| 1797 | struct macio_chip* macio; |
| 1798 | int i; |
| 1799 | |
| 1800 | macio = &macio_chips[0]; |
| 1801 | if (macio->type != macio_keylargo && macio->type != macio_pangea && |
| 1802 | macio->type != macio_intrepid) |
| 1803 | return -ENODEV; |
| 1804 | |
| 1805 | /* |
| 1806 | * Wakeup the host bridge |
| 1807 | */ |
| 1808 | UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); |
| 1809 | udelay(10); |
| 1810 | UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); |
| 1811 | udelay(10); |
| 1812 | |
| 1813 | /* |
| 1814 | * Restore KeyLargo |
| 1815 | */ |
| 1816 | |
| 1817 | if (macio->type == macio_keylargo) { |
| 1818 | MACIO_OUT32(KEYLARGO_MBCR, save_mbcr); |
| 1819 | (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10); |
| 1820 | } |
| 1821 | MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]); |
| 1822 | (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10); |
| 1823 | MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]); |
| 1824 | (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10); |
| 1825 | MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]); |
| 1826 | (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10); |
| 1827 | MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]); |
| 1828 | (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10); |
| 1829 | MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]); |
| 1830 | (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10); |
| 1831 | if (macio->type == macio_pangea || macio->type == macio_intrepid) { |
| 1832 | MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]); |
| 1833 | (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10); |
| 1834 | } |
| 1835 | |
| 1836 | dbdma_restore(macio, save_dbdma); |
| 1837 | |
| 1838 | MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]); |
| 1839 | MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]); |
| 1840 | for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) |
| 1841 | MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]); |
| 1842 | for (i=0; i<KEYLARGO_GPIO_CNT; i++) |
| 1843 | MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]); |
| 1844 | |
| 1845 | /* FIXME more black magic with OpenPIC ... */ |
| 1846 | if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { |
| 1847 | MACIO_BIC(0x506e0, 0x00400000); |
| 1848 | MACIO_BIC(0x506e0, 0x80000000); |
| 1849 | } |
| 1850 | |
| 1851 | UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl); |
| 1852 | udelay(100); |
| 1853 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1854 | return 0; |
| 1855 | } |
| 1856 | |
| 1857 | static long __pmac |
| 1858 | core99_sleep_state(struct device_node* node, long param, long value) |
| 1859 | { |
| 1860 | /* Param == 1 means to enter the "fake sleep" mode that is |
| 1861 | * used for CPU speed switch |
| 1862 | */ |
| 1863 | if (param == 1) { |
| 1864 | if (value == 1) { |
| 1865 | UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); |
| 1866 | UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2); |
| 1867 | } else { |
| 1868 | UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); |
| 1869 | udelay(10); |
| 1870 | UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); |
| 1871 | udelay(10); |
| 1872 | } |
| 1873 | return 0; |
| 1874 | } |
| 1875 | if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) |
| 1876 | return -EPERM; |
| 1877 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1878 | if (value == 1) |
| 1879 | return core99_sleep(); |
| 1880 | else if (value == 0) |
| 1881 | return core99_wake_up(); |
| 1882 | return 0; |
| 1883 | } |
| 1884 | |
| 1885 | #endif /* CONFIG_POWER4 */ |
| 1886 | |
| 1887 | static long __pmac |
| 1888 | generic_dev_can_wake(struct device_node* node, long param, long value) |
| 1889 | { |
| 1890 | /* Todo: eventually check we are really dealing with on-board |
| 1891 | * video device ... |
| 1892 | */ |
| 1893 | |
| 1894 | if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP) |
| 1895 | pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP; |
| 1896 | return 0; |
| 1897 | } |
| 1898 | |
| 1899 | static long __pmac |
| 1900 | generic_get_mb_info(struct device_node* node, long param, long value) |
| 1901 | { |
| 1902 | switch(param) { |
| 1903 | case PMAC_MB_INFO_MODEL: |
| 1904 | return pmac_mb.model_id; |
| 1905 | case PMAC_MB_INFO_FLAGS: |
| 1906 | return pmac_mb.board_flags; |
| 1907 | case PMAC_MB_INFO_NAME: |
| 1908 | /* hack hack hack... but should work */ |
| 1909 | *((const char **)value) = pmac_mb.model_name; |
| 1910 | return 0; |
| 1911 | } |
| 1912 | return -EINVAL; |
| 1913 | } |
| 1914 | |
| 1915 | |
| 1916 | /* |
| 1917 | * Table definitions |
| 1918 | */ |
| 1919 | |
| 1920 | /* Used on any machine |
| 1921 | */ |
| 1922 | static struct feature_table_entry any_features[] __pmacdata = { |
| 1923 | { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, |
| 1924 | { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake }, |
| 1925 | { 0, NULL } |
| 1926 | }; |
| 1927 | |
| 1928 | #ifndef CONFIG_POWER4 |
| 1929 | |
| 1930 | /* OHare based motherboards. Currently, we only use these on the |
| 1931 | * 2400,3400 and 3500 series powerbooks. Some older desktops seem |
| 1932 | * to have issues with turning on/off those asic cells |
| 1933 | */ |
| 1934 | static struct feature_table_entry ohare_features[] __pmacdata = { |
| 1935 | { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, |
| 1936 | { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable }, |
| 1937 | { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable }, |
| 1938 | { PMAC_FTR_IDE_ENABLE, ohare_ide_enable}, |
| 1939 | { PMAC_FTR_IDE_RESET, ohare_ide_reset}, |
| 1940 | { PMAC_FTR_SLEEP_STATE, ohare_sleep_state }, |
| 1941 | { 0, NULL } |
| 1942 | }; |
| 1943 | |
| 1944 | /* Heathrow desktop machines (Beige G3). |
| 1945 | * Separated as some features couldn't be properly tested |
| 1946 | * and the serial port control bits appear to confuse it. |
| 1947 | */ |
| 1948 | static struct feature_table_entry heathrow_desktop_features[] __pmacdata = { |
| 1949 | { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, |
| 1950 | { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, |
| 1951 | { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, |
| 1952 | { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, |
| 1953 | { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, |
| 1954 | { 0, NULL } |
| 1955 | }; |
| 1956 | |
| 1957 | /* Heathrow based laptop, that is the Wallstreet and mainstreet |
| 1958 | * powerbooks. |
| 1959 | */ |
| 1960 | static struct feature_table_entry heathrow_laptop_features[] __pmacdata = { |
| 1961 | { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, |
| 1962 | { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, |
| 1963 | { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, |
| 1964 | { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, |
| 1965 | { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, |
| 1966 | { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, |
| 1967 | { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, |
| 1968 | { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, |
| 1969 | { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, |
| 1970 | { 0, NULL } |
| 1971 | }; |
| 1972 | |
| 1973 | /* Paddington based machines |
| 1974 | * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4. |
| 1975 | */ |
| 1976 | static struct feature_table_entry paddington_features[] __pmacdata = { |
| 1977 | { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, |
| 1978 | { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, |
| 1979 | { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, |
| 1980 | { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, |
| 1981 | { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, |
| 1982 | { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, |
| 1983 | { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, |
| 1984 | { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, |
| 1985 | { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, |
| 1986 | { 0, NULL } |
| 1987 | }; |
| 1988 | |
| 1989 | /* Core99 & MacRISC 2 machines (all machines released since the |
| 1990 | * iBook (included), that is all AGP machines, except pangea |
| 1991 | * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo |
| 1992 | * used on iBook2 & iMac "flow power". |
| 1993 | */ |
| 1994 | static struct feature_table_entry core99_features[] __pmacdata = { |
| 1995 | { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, |
| 1996 | { PMAC_FTR_MODEM_ENABLE, core99_modem_enable }, |
| 1997 | { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, |
| 1998 | { PMAC_FTR_IDE_RESET, core99_ide_reset }, |
| 1999 | { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, |
| 2000 | { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, |
| 2001 | { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, |
| 2002 | { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, |
| 2003 | { PMAC_FTR_USB_ENABLE, core99_usb_enable }, |
| 2004 | { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, |
| 2005 | { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, |
| 2006 | { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, |
| 2007 | #ifdef CONFIG_SMP |
| 2008 | { PMAC_FTR_RESET_CPU, core99_reset_cpu }, |
| 2009 | #endif /* CONFIG_SMP */ |
| 2010 | { PMAC_FTR_READ_GPIO, core99_read_gpio }, |
| 2011 | { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, |
| 2012 | { 0, NULL } |
| 2013 | }; |
| 2014 | |
| 2015 | /* RackMac |
| 2016 | */ |
| 2017 | static struct feature_table_entry rackmac_features[] __pmacdata = { |
| 2018 | { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, |
| 2019 | { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, |
| 2020 | { PMAC_FTR_IDE_RESET, core99_ide_reset }, |
| 2021 | { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, |
| 2022 | { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, |
| 2023 | { PMAC_FTR_USB_ENABLE, core99_usb_enable }, |
| 2024 | { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, |
| 2025 | { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, |
| 2026 | { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, |
| 2027 | #ifdef CONFIG_SMP |
| 2028 | { PMAC_FTR_RESET_CPU, core99_reset_cpu }, |
| 2029 | #endif /* CONFIG_SMP */ |
| 2030 | { PMAC_FTR_READ_GPIO, core99_read_gpio }, |
| 2031 | { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, |
| 2032 | { 0, NULL } |
| 2033 | }; |
| 2034 | |
| 2035 | /* Pangea features |
| 2036 | */ |
| 2037 | static struct feature_table_entry pangea_features[] __pmacdata = { |
| 2038 | { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, |
| 2039 | { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, |
| 2040 | { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, |
| 2041 | { PMAC_FTR_IDE_RESET, core99_ide_reset }, |
| 2042 | { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, |
| 2043 | { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, |
| 2044 | { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, |
| 2045 | { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, |
| 2046 | { PMAC_FTR_USB_ENABLE, core99_usb_enable }, |
| 2047 | { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, |
| 2048 | { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, |
| 2049 | { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, |
| 2050 | { PMAC_FTR_READ_GPIO, core99_read_gpio }, |
| 2051 | { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, |
| 2052 | { 0, NULL } |
| 2053 | }; |
| 2054 | |
| 2055 | /* Intrepid features |
| 2056 | */ |
| 2057 | static struct feature_table_entry intrepid_features[] __pmacdata = { |
| 2058 | { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, |
| 2059 | { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, |
| 2060 | { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, |
| 2061 | { PMAC_FTR_IDE_RESET, core99_ide_reset }, |
| 2062 | { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, |
| 2063 | { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, |
| 2064 | { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, |
| 2065 | { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, |
| 2066 | { PMAC_FTR_USB_ENABLE, core99_usb_enable }, |
| 2067 | { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, |
| 2068 | { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, |
| 2069 | { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, |
| 2070 | { PMAC_FTR_READ_GPIO, core99_read_gpio }, |
| 2071 | { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, |
| 2072 | { PMAC_FTR_AACK_DELAY_ENABLE, intrepid_aack_delay_enable }, |
| 2073 | { 0, NULL } |
| 2074 | }; |
| 2075 | |
| 2076 | #else /* CONFIG_POWER4 */ |
| 2077 | |
| 2078 | /* G5 features |
| 2079 | */ |
| 2080 | static struct feature_table_entry g5_features[] __pmacdata = { |
| 2081 | { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable }, |
| 2082 | { PMAC_FTR_1394_ENABLE, g5_fw_enable }, |
| 2083 | { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable }, |
| 2084 | #ifdef CONFIG_SMP |
| 2085 | { PMAC_FTR_RESET_CPU, g5_reset_cpu }, |
| 2086 | #endif /* CONFIG_SMP */ |
| 2087 | { PMAC_FTR_READ_GPIO, core99_read_gpio }, |
| 2088 | { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, |
| 2089 | { 0, NULL } |
| 2090 | }; |
| 2091 | |
| 2092 | #endif /* CONFIG_POWER4 */ |
| 2093 | |
| 2094 | static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { |
| 2095 | #ifndef CONFIG_POWER4 |
| 2096 | /* |
| 2097 | * Desktops |
| 2098 | */ |
| 2099 | |
| 2100 | { "AAPL,8500", "PowerMac 8500/8600", |
| 2101 | PMAC_TYPE_PSURGE, NULL, |
| 2102 | 0 |
| 2103 | }, |
| 2104 | { "AAPL,9500", "PowerMac 9500/9600", |
| 2105 | PMAC_TYPE_PSURGE, NULL, |
| 2106 | 0 |
| 2107 | }, |
| 2108 | { "AAPL,7200", "PowerMac 7200", |
| 2109 | PMAC_TYPE_PSURGE, NULL, |
| 2110 | 0 |
| 2111 | }, |
| 2112 | { "AAPL,7300", "PowerMac 7200/7300", |
| 2113 | PMAC_TYPE_PSURGE, NULL, |
| 2114 | 0 |
| 2115 | }, |
| 2116 | { "AAPL,7500", "PowerMac 7500", |
| 2117 | PMAC_TYPE_PSURGE, NULL, |
| 2118 | 0 |
| 2119 | }, |
| 2120 | { "AAPL,ShinerESB", "Apple Network Server", |
| 2121 | PMAC_TYPE_ANS, NULL, |
| 2122 | 0 |
| 2123 | }, |
| 2124 | { "AAPL,e407", "Alchemy", |
| 2125 | PMAC_TYPE_ALCHEMY, NULL, |
| 2126 | 0 |
| 2127 | }, |
| 2128 | { "AAPL,e411", "Gazelle", |
| 2129 | PMAC_TYPE_GAZELLE, NULL, |
| 2130 | 0 |
| 2131 | }, |
| 2132 | { "AAPL,Gossamer", "PowerMac G3 (Gossamer)", |
| 2133 | PMAC_TYPE_GOSSAMER, heathrow_desktop_features, |
| 2134 | 0 |
| 2135 | }, |
| 2136 | { "AAPL,PowerMac G3", "PowerMac G3 (Silk)", |
| 2137 | PMAC_TYPE_SILK, heathrow_desktop_features, |
| 2138 | 0 |
| 2139 | }, |
| 2140 | { "PowerMac1,1", "Blue&White G3", |
| 2141 | PMAC_TYPE_YOSEMITE, paddington_features, |
| 2142 | 0 |
| 2143 | }, |
| 2144 | { "PowerMac1,2", "PowerMac G4 PCI Graphics", |
| 2145 | PMAC_TYPE_YIKES, paddington_features, |
| 2146 | 0 |
| 2147 | }, |
| 2148 | { "PowerMac2,1", "iMac FireWire", |
| 2149 | PMAC_TYPE_FW_IMAC, core99_features, |
| 2150 | PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 |
| 2151 | }, |
| 2152 | { "PowerMac2,2", "iMac FireWire", |
| 2153 | PMAC_TYPE_FW_IMAC, core99_features, |
| 2154 | PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 |
| 2155 | }, |
| 2156 | { "PowerMac3,1", "PowerMac G4 AGP Graphics", |
| 2157 | PMAC_TYPE_SAWTOOTH, core99_features, |
| 2158 | PMAC_MB_OLD_CORE99 |
| 2159 | }, |
| 2160 | { "PowerMac3,2", "PowerMac G4 AGP Graphics", |
| 2161 | PMAC_TYPE_SAWTOOTH, core99_features, |
| 2162 | PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 |
| 2163 | }, |
| 2164 | { "PowerMac3,3", "PowerMac G4 AGP Graphics", |
| 2165 | PMAC_TYPE_SAWTOOTH, core99_features, |
| 2166 | PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 |
| 2167 | }, |
| 2168 | { "PowerMac3,4", "PowerMac G4 Silver", |
| 2169 | PMAC_TYPE_QUICKSILVER, core99_features, |
| 2170 | PMAC_MB_MAY_SLEEP |
| 2171 | }, |
| 2172 | { "PowerMac3,5", "PowerMac G4 Silver", |
| 2173 | PMAC_TYPE_QUICKSILVER, core99_features, |
| 2174 | PMAC_MB_MAY_SLEEP |
| 2175 | }, |
| 2176 | { "PowerMac3,6", "PowerMac G4 Windtunnel", |
| 2177 | PMAC_TYPE_WINDTUNNEL, core99_features, |
| 2178 | PMAC_MB_MAY_SLEEP, |
| 2179 | }, |
| 2180 | { "PowerMac4,1", "iMac \"Flower Power\"", |
| 2181 | PMAC_TYPE_PANGEA_IMAC, pangea_features, |
| 2182 | PMAC_MB_MAY_SLEEP |
| 2183 | }, |
| 2184 | { "PowerMac4,2", "Flat panel iMac", |
| 2185 | PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features, |
| 2186 | PMAC_MB_CAN_SLEEP |
| 2187 | }, |
| 2188 | { "PowerMac4,4", "eMac", |
| 2189 | PMAC_TYPE_EMAC, core99_features, |
| 2190 | PMAC_MB_MAY_SLEEP |
| 2191 | }, |
| 2192 | { "PowerMac5,1", "PowerMac G4 Cube", |
| 2193 | PMAC_TYPE_CUBE, core99_features, |
| 2194 | PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 |
| 2195 | }, |
| 2196 | { "PowerMac6,1", "Flat panel iMac", |
| 2197 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2198 | PMAC_MB_MAY_SLEEP, |
| 2199 | }, |
| 2200 | { "PowerMac6,3", "Flat panel iMac", |
| 2201 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2202 | PMAC_MB_MAY_SLEEP, |
| 2203 | }, |
| 2204 | { "PowerMac6,4", "eMac", |
| 2205 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2206 | PMAC_MB_MAY_SLEEP, |
| 2207 | }, |
| 2208 | { "PowerMac10,1", "Mac mini", |
| 2209 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2210 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER, |
| 2211 | }, |
| 2212 | { "iMac,1", "iMac (first generation)", |
| 2213 | PMAC_TYPE_ORIG_IMAC, paddington_features, |
| 2214 | 0 |
| 2215 | }, |
| 2216 | |
| 2217 | /* |
| 2218 | * Xserve's |
| 2219 | */ |
| 2220 | |
| 2221 | { "RackMac1,1", "XServe", |
| 2222 | PMAC_TYPE_RACKMAC, rackmac_features, |
| 2223 | 0, |
| 2224 | }, |
| 2225 | { "RackMac1,2", "XServe rev. 2", |
| 2226 | PMAC_TYPE_RACKMAC, rackmac_features, |
| 2227 | 0, |
| 2228 | }, |
| 2229 | |
| 2230 | /* |
| 2231 | * Laptops |
| 2232 | */ |
| 2233 | |
| 2234 | { "AAPL,3400/2400", "PowerBook 3400", |
| 2235 | PMAC_TYPE_HOOPER, ohare_features, |
| 2236 | PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE |
| 2237 | }, |
| 2238 | { "AAPL,3500", "PowerBook 3500", |
| 2239 | PMAC_TYPE_KANGA, ohare_features, |
| 2240 | PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE |
| 2241 | }, |
| 2242 | { "AAPL,PowerBook1998", "PowerBook Wallstreet", |
| 2243 | PMAC_TYPE_WALLSTREET, heathrow_laptop_features, |
| 2244 | PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE |
| 2245 | }, |
| 2246 | { "PowerBook1,1", "PowerBook 101 (Lombard)", |
| 2247 | PMAC_TYPE_101_PBOOK, paddington_features, |
Benjamin Herrenschmidt | f0f5397 | 2005-05-01 19:43:54 -0700 | [diff] [blame] | 2248 | PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2249 | }, |
| 2250 | { "PowerBook2,1", "iBook (first generation)", |
| 2251 | PMAC_TYPE_ORIG_IBOOK, core99_features, |
| 2252 | PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE |
| 2253 | }, |
| 2254 | { "PowerBook2,2", "iBook FireWire", |
| 2255 | PMAC_TYPE_FW_IBOOK, core99_features, |
| 2256 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | |
| 2257 | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE |
| 2258 | }, |
| 2259 | { "PowerBook3,1", "PowerBook Pismo", |
| 2260 | PMAC_TYPE_PISMO, core99_features, |
| 2261 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | |
| 2262 | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE |
| 2263 | }, |
| 2264 | { "PowerBook3,2", "PowerBook Titanium", |
| 2265 | PMAC_TYPE_TITANIUM, core99_features, |
| 2266 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE |
| 2267 | }, |
| 2268 | { "PowerBook3,3", "PowerBook Titanium II", |
| 2269 | PMAC_TYPE_TITANIUM2, core99_features, |
| 2270 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE |
| 2271 | }, |
| 2272 | { "PowerBook3,4", "PowerBook Titanium III", |
| 2273 | PMAC_TYPE_TITANIUM3, core99_features, |
| 2274 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE |
| 2275 | }, |
| 2276 | { "PowerBook3,5", "PowerBook Titanium IV", |
| 2277 | PMAC_TYPE_TITANIUM4, core99_features, |
| 2278 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE |
| 2279 | }, |
| 2280 | { "PowerBook4,1", "iBook 2", |
| 2281 | PMAC_TYPE_IBOOK2, pangea_features, |
| 2282 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE |
| 2283 | }, |
| 2284 | { "PowerBook4,2", "iBook 2", |
| 2285 | PMAC_TYPE_IBOOK2, pangea_features, |
| 2286 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE |
| 2287 | }, |
| 2288 | { "PowerBook4,3", "iBook 2 rev. 2", |
| 2289 | PMAC_TYPE_IBOOK2, pangea_features, |
| 2290 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE |
| 2291 | }, |
| 2292 | { "PowerBook5,1", "PowerBook G4 17\"", |
| 2293 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2294 | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2295 | }, |
| 2296 | { "PowerBook5,2", "PowerBook G4 15\"", |
| 2297 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2298 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2299 | }, |
| 2300 | { "PowerBook5,3", "PowerBook G4 17\"", |
| 2301 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2302 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2303 | }, |
| 2304 | { "PowerBook5,4", "PowerBook G4 15\"", |
| 2305 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2306 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2307 | }, |
| 2308 | { "PowerBook5,5", "PowerBook G4 17\"", |
| 2309 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2310 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2311 | }, |
| 2312 | { "PowerBook5,6", "PowerBook G4 15\"", |
| 2313 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2314 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2315 | }, |
| 2316 | { "PowerBook5,7", "PowerBook G4 17\"", |
| 2317 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2318 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2319 | }, |
| 2320 | { "PowerBook6,1", "PowerBook G4 12\"", |
| 2321 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2322 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2323 | }, |
| 2324 | { "PowerBook6,2", "PowerBook G4", |
| 2325 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2326 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2327 | }, |
| 2328 | { "PowerBook6,3", "iBook G4", |
| 2329 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2330 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2331 | }, |
| 2332 | { "PowerBook6,4", "PowerBook G4 12\"", |
| 2333 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2334 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2335 | }, |
| 2336 | { "PowerBook6,5", "iBook G4", |
| 2337 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2338 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2339 | }, |
| 2340 | { "PowerBook6,8", "PowerBook G4 12\"", |
| 2341 | PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, |
| 2342 | PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, |
| 2343 | }, |
| 2344 | #else /* CONFIG_POWER4 */ |
| 2345 | { "PowerMac7,2", "PowerMac G5", |
| 2346 | PMAC_TYPE_POWERMAC_G5, g5_features, |
| 2347 | 0, |
| 2348 | }, |
| 2349 | #endif /* CONFIG_POWER4 */ |
| 2350 | }; |
| 2351 | |
| 2352 | /* |
| 2353 | * The toplevel feature_call callback |
| 2354 | */ |
| 2355 | long __pmac |
| 2356 | pmac_do_feature_call(unsigned int selector, ...) |
| 2357 | { |
| 2358 | struct device_node* node; |
| 2359 | long param, value; |
| 2360 | int i; |
| 2361 | feature_call func = NULL; |
| 2362 | va_list args; |
| 2363 | |
| 2364 | if (pmac_mb.features) |
| 2365 | for (i=0; pmac_mb.features[i].function; i++) |
| 2366 | if (pmac_mb.features[i].selector == selector) { |
| 2367 | func = pmac_mb.features[i].function; |
| 2368 | break; |
| 2369 | } |
| 2370 | if (!func) |
| 2371 | for (i=0; any_features[i].function; i++) |
| 2372 | if (any_features[i].selector == selector) { |
| 2373 | func = any_features[i].function; |
| 2374 | break; |
| 2375 | } |
| 2376 | if (!func) |
| 2377 | return -ENODEV; |
| 2378 | |
| 2379 | va_start(args, selector); |
| 2380 | node = (struct device_node*)va_arg(args, void*); |
| 2381 | param = va_arg(args, long); |
| 2382 | value = va_arg(args, long); |
| 2383 | va_end(args); |
| 2384 | |
| 2385 | return func(node, param, value); |
| 2386 | } |
| 2387 | |
| 2388 | static int __init |
| 2389 | probe_motherboard(void) |
| 2390 | { |
| 2391 | int i; |
| 2392 | struct macio_chip* macio = &macio_chips[0]; |
| 2393 | const char* model = NULL; |
| 2394 | struct device_node *dt; |
| 2395 | |
| 2396 | /* Lookup known motherboard type in device-tree. First try an |
| 2397 | * exact match on the "model" property, then try a "compatible" |
| 2398 | * match is none is found. |
| 2399 | */ |
| 2400 | dt = find_devices("device-tree"); |
| 2401 | if (dt != NULL) |
| 2402 | model = (const char *) get_property(dt, "model", NULL); |
| 2403 | for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { |
| 2404 | if (strcmp(model, pmac_mb_defs[i].model_string) == 0) { |
| 2405 | pmac_mb = pmac_mb_defs[i]; |
| 2406 | goto found; |
| 2407 | } |
| 2408 | } |
| 2409 | for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { |
| 2410 | if (machine_is_compatible(pmac_mb_defs[i].model_string)) { |
| 2411 | pmac_mb = pmac_mb_defs[i]; |
| 2412 | goto found; |
| 2413 | } |
| 2414 | } |
| 2415 | |
| 2416 | /* Fallback to selection depending on mac-io chip type */ |
| 2417 | switch(macio->type) { |
| 2418 | #ifndef CONFIG_POWER4 |
| 2419 | case macio_grand_central: |
| 2420 | pmac_mb.model_id = PMAC_TYPE_PSURGE; |
| 2421 | pmac_mb.model_name = "Unknown PowerSurge"; |
| 2422 | break; |
| 2423 | case macio_ohare: |
| 2424 | pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE; |
| 2425 | pmac_mb.model_name = "Unknown OHare-based"; |
| 2426 | break; |
| 2427 | case macio_heathrow: |
| 2428 | pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW; |
| 2429 | pmac_mb.model_name = "Unknown Heathrow-based"; |
| 2430 | pmac_mb.features = heathrow_desktop_features; |
| 2431 | break; |
| 2432 | case macio_paddington: |
| 2433 | pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON; |
| 2434 | pmac_mb.model_name = "Unknown Paddington-based"; |
| 2435 | pmac_mb.features = paddington_features; |
| 2436 | break; |
| 2437 | case macio_keylargo: |
| 2438 | pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99; |
| 2439 | pmac_mb.model_name = "Unknown Keylargo-based"; |
| 2440 | pmac_mb.features = core99_features; |
| 2441 | break; |
| 2442 | case macio_pangea: |
| 2443 | pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA; |
| 2444 | pmac_mb.model_name = "Unknown Pangea-based"; |
| 2445 | pmac_mb.features = pangea_features; |
| 2446 | break; |
| 2447 | case macio_intrepid: |
| 2448 | pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID; |
| 2449 | pmac_mb.model_name = "Unknown Intrepid-based"; |
| 2450 | pmac_mb.features = intrepid_features; |
| 2451 | break; |
| 2452 | #else /* CONFIG_POWER4 */ |
| 2453 | case macio_keylargo2: |
| 2454 | pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2; |
| 2455 | pmac_mb.model_name = "Unknown G5"; |
| 2456 | pmac_mb.features = g5_features; |
| 2457 | break; |
| 2458 | #endif /* CONFIG_POWER4 */ |
| 2459 | default: |
| 2460 | return -ENODEV; |
| 2461 | } |
| 2462 | found: |
| 2463 | #ifndef CONFIG_POWER4 |
| 2464 | /* Fixup Hooper vs. Comet */ |
| 2465 | if (pmac_mb.model_id == PMAC_TYPE_HOOPER) { |
| 2466 | u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4); |
| 2467 | if (!mach_id_ptr) |
| 2468 | return -ENODEV; |
| 2469 | /* Here, I used to disable the media-bay on comet. It |
| 2470 | * appears this is wrong, the floppy connector is actually |
| 2471 | * a kind of media-bay and works with the current driver. |
| 2472 | */ |
| 2473 | if (__raw_readl(mach_id_ptr) & 0x20000000UL) |
| 2474 | pmac_mb.model_id = PMAC_TYPE_COMET; |
| 2475 | iounmap(mach_id_ptr); |
| 2476 | } |
| 2477 | #endif /* CONFIG_POWER4 */ |
| 2478 | |
| 2479 | #ifdef CONFIG_6xx |
| 2480 | /* Set default value of powersave_nap on machines that support it. |
| 2481 | * It appears that uninorth rev 3 has a problem with it, we don't |
| 2482 | * enable it on those. In theory, the flush-on-lock property is |
| 2483 | * supposed to be set when not supported, but I'm not very confident |
| 2484 | * that all Apple OF revs did it properly, I do it the paranoid way. |
| 2485 | */ |
| 2486 | while (uninorth_base && uninorth_rev > 3) { |
| 2487 | struct device_node* np = find_path_device("/cpus"); |
| 2488 | if (!np || !np->child) { |
| 2489 | printk(KERN_WARNING "Can't find CPU(s) in device tree !\n"); |
| 2490 | break; |
| 2491 | } |
| 2492 | np = np->child; |
| 2493 | /* Nap mode not supported on SMP */ |
| 2494 | if (np->sibling) |
| 2495 | break; |
| 2496 | /* Nap mode not supported if flush-on-lock property is present */ |
| 2497 | if (get_property(np, "flush-on-lock", NULL)) |
| 2498 | break; |
| 2499 | powersave_nap = 1; |
| 2500 | printk(KERN_INFO "Processor NAP mode on idle enabled.\n"); |
| 2501 | break; |
| 2502 | } |
| 2503 | |
| 2504 | /* On CPUs that support it (750FX), lowspeed by default during |
| 2505 | * NAP mode |
| 2506 | */ |
| 2507 | powersave_lowspeed = 1; |
| 2508 | #endif /* CONFIG_6xx */ |
| 2509 | #ifdef CONFIG_POWER4 |
| 2510 | powersave_nap = 1; |
| 2511 | #endif |
| 2512 | /* Check for "mobile" machine */ |
| 2513 | if (model && (strncmp(model, "PowerBook", 9) == 0 |
| 2514 | || strncmp(model, "iBook", 5) == 0)) |
| 2515 | pmac_mb.board_flags |= PMAC_MB_MOBILE; |
| 2516 | |
| 2517 | |
| 2518 | printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name); |
| 2519 | return 0; |
| 2520 | } |
| 2521 | |
| 2522 | /* Initialize the Core99 UniNorth host bridge and memory controller |
| 2523 | */ |
| 2524 | static void __init |
| 2525 | probe_uninorth(void) |
| 2526 | { |
| 2527 | unsigned long actrl; |
| 2528 | |
| 2529 | /* Locate core99 Uni-N */ |
| 2530 | uninorth_node = of_find_node_by_name(NULL, "uni-n"); |
| 2531 | /* Locate G5 u3 */ |
| 2532 | if (uninorth_node == NULL) { |
| 2533 | uninorth_node = of_find_node_by_name(NULL, "u3"); |
| 2534 | uninorth_u3 = 1; |
| 2535 | } |
| 2536 | if (uninorth_node && uninorth_node->n_addrs > 0) { |
| 2537 | unsigned long address = uninorth_node->addrs[0].address; |
| 2538 | uninorth_base = ioremap(address, 0x40000); |
| 2539 | uninorth_rev = in_be32(UN_REG(UNI_N_VERSION)); |
| 2540 | if (uninorth_u3) |
| 2541 | u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000); |
| 2542 | } else |
| 2543 | uninorth_node = NULL; |
| 2544 | |
| 2545 | if (!uninorth_node) |
| 2546 | return; |
| 2547 | |
| 2548 | printk(KERN_INFO "Found %s memory controller & host bridge, revision: %d\n", |
| 2549 | uninorth_u3 ? "U3" : "UniNorth", uninorth_rev); |
| 2550 | printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base); |
| 2551 | |
| 2552 | /* Set the arbitrer QAck delay according to what Apple does |
| 2553 | */ |
| 2554 | if (uninorth_rev < 0x11) { |
| 2555 | actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK; |
| 2556 | actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 : |
| 2557 | UNI_N_ARB_CTRL_QACK_DELAY) << UNI_N_ARB_CTRL_QACK_DELAY_SHIFT; |
| 2558 | UN_OUT(UNI_N_ARB_CTRL, actrl); |
| 2559 | } |
| 2560 | |
| 2561 | /* Some more magic as done by them in recent MacOS X on UniNorth |
| 2562 | * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI |
| 2563 | * memory timeout |
| 2564 | */ |
| 2565 | if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) || uninorth_rev == 0xc0) |
| 2566 | UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff); |
| 2567 | } |
| 2568 | |
| 2569 | static void __init |
| 2570 | probe_one_macio(const char* name, const char* compat, int type) |
| 2571 | { |
| 2572 | struct device_node* node; |
| 2573 | int i; |
| 2574 | volatile u32 __iomem * base; |
| 2575 | u32* revp; |
| 2576 | |
| 2577 | node = find_devices(name); |
| 2578 | if (!node || !node->n_addrs) |
| 2579 | return; |
| 2580 | if (compat) |
| 2581 | do { |
| 2582 | if (device_is_compatible(node, compat)) |
| 2583 | break; |
| 2584 | node = node->next; |
| 2585 | } while (node); |
| 2586 | if (!node) |
| 2587 | return; |
| 2588 | for(i=0; i<MAX_MACIO_CHIPS; i++) { |
| 2589 | if (!macio_chips[i].of_node) |
| 2590 | break; |
| 2591 | if (macio_chips[i].of_node == node) |
| 2592 | return; |
| 2593 | } |
| 2594 | if (i >= MAX_MACIO_CHIPS) { |
| 2595 | printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n"); |
| 2596 | printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name); |
| 2597 | return; |
| 2598 | } |
| 2599 | base = ioremap(node->addrs[0].address, node->addrs[0].size); |
| 2600 | if (!base) { |
| 2601 | printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n"); |
| 2602 | return; |
| 2603 | } |
| 2604 | if (type == macio_keylargo) { |
| 2605 | u32* did = (u32 *)get_property(node, "device-id", NULL); |
| 2606 | if (*did == 0x00000025) |
| 2607 | type = macio_pangea; |
| 2608 | if (*did == 0x0000003e) |
| 2609 | type = macio_intrepid; |
| 2610 | } |
| 2611 | macio_chips[i].of_node = node; |
| 2612 | macio_chips[i].type = type; |
| 2613 | macio_chips[i].base = base; |
| 2614 | macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON; |
| 2615 | macio_chips[i].name = macio_names[type]; |
| 2616 | revp = (u32 *)get_property(node, "revision-id", NULL); |
| 2617 | if (revp) |
| 2618 | macio_chips[i].rev = *revp; |
| 2619 | printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n", |
| 2620 | macio_names[type], macio_chips[i].rev, macio_chips[i].base); |
| 2621 | } |
| 2622 | |
| 2623 | static int __init |
| 2624 | probe_macios(void) |
| 2625 | { |
| 2626 | /* Warning, ordering is important */ |
| 2627 | probe_one_macio("gc", NULL, macio_grand_central); |
| 2628 | probe_one_macio("ohare", NULL, macio_ohare); |
| 2629 | probe_one_macio("pci106b,7", NULL, macio_ohareII); |
| 2630 | probe_one_macio("mac-io", "keylargo", macio_keylargo); |
| 2631 | probe_one_macio("mac-io", "paddington", macio_paddington); |
| 2632 | probe_one_macio("mac-io", "gatwick", macio_gatwick); |
| 2633 | probe_one_macio("mac-io", "heathrow", macio_heathrow); |
| 2634 | probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2); |
| 2635 | |
| 2636 | /* Make sure the "main" macio chip appear first */ |
| 2637 | if (macio_chips[0].type == macio_gatwick |
| 2638 | && macio_chips[1].type == macio_heathrow) { |
| 2639 | struct macio_chip temp = macio_chips[0]; |
| 2640 | macio_chips[0] = macio_chips[1]; |
| 2641 | macio_chips[1] = temp; |
| 2642 | } |
| 2643 | if (macio_chips[0].type == macio_ohareII |
| 2644 | && macio_chips[1].type == macio_ohare) { |
| 2645 | struct macio_chip temp = macio_chips[0]; |
| 2646 | macio_chips[0] = macio_chips[1]; |
| 2647 | macio_chips[1] = temp; |
| 2648 | } |
| 2649 | macio_chips[0].lbus.index = 0; |
| 2650 | macio_chips[1].lbus.index = 1; |
| 2651 | |
| 2652 | return (macio_chips[0].of_node == NULL) ? -ENODEV : 0; |
| 2653 | } |
| 2654 | |
| 2655 | static void __init |
| 2656 | initial_serial_shutdown(struct device_node* np) |
| 2657 | { |
| 2658 | int len; |
| 2659 | struct slot_names_prop { |
| 2660 | int count; |
| 2661 | char name[1]; |
| 2662 | } *slots; |
| 2663 | char *conn; |
| 2664 | int port_type = PMAC_SCC_ASYNC; |
| 2665 | int modem = 0; |
| 2666 | |
| 2667 | slots = (struct slot_names_prop *)get_property(np, "slot-names", &len); |
| 2668 | conn = get_property(np, "AAPL,connector", &len); |
| 2669 | if (conn && (strcmp(conn, "infrared") == 0)) |
| 2670 | port_type = PMAC_SCC_IRDA; |
| 2671 | else if (device_is_compatible(np, "cobalt")) |
| 2672 | modem = 1; |
| 2673 | else if (slots && slots->count > 0) { |
| 2674 | if (strcmp(slots->name, "IrDA") == 0) |
| 2675 | port_type = PMAC_SCC_IRDA; |
| 2676 | else if (strcmp(slots->name, "Modem") == 0) |
| 2677 | modem = 1; |
| 2678 | } |
| 2679 | if (modem) |
| 2680 | pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0); |
| 2681 | pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0); |
| 2682 | } |
| 2683 | |
| 2684 | static void __init |
| 2685 | set_initial_features(void) |
| 2686 | { |
| 2687 | struct device_node* np; |
| 2688 | |
| 2689 | /* That hack appears to be necessary for some StarMax motherboards |
| 2690 | * but I'm not too sure it was audited for side-effects on other |
| 2691 | * ohare based machines... |
| 2692 | * Since I still have difficulties figuring the right way to |
| 2693 | * differenciate them all and since that hack was there for a long |
| 2694 | * time, I'll keep it around |
| 2695 | */ |
| 2696 | if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) { |
| 2697 | struct macio_chip* macio = &macio_chips[0]; |
| 2698 | MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES); |
| 2699 | } else if (macio_chips[0].type == macio_ohare) { |
| 2700 | struct macio_chip* macio = &macio_chips[0]; |
| 2701 | MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); |
| 2702 | } else if (macio_chips[1].type == macio_ohare) { |
| 2703 | struct macio_chip* macio = &macio_chips[1]; |
| 2704 | MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); |
| 2705 | } |
| 2706 | |
| 2707 | #ifdef CONFIG_POWER4 |
| 2708 | if (macio_chips[0].type == macio_keylargo2) { |
| 2709 | #ifndef CONFIG_SMP |
| 2710 | /* On SMP machines running UP, we have the second CPU eating |
| 2711 | * bus cycles. We need to take it off the bus. This is done |
| 2712 | * from pmac_smp for SMP kernels running on one CPU |
| 2713 | */ |
| 2714 | np = of_find_node_by_type(NULL, "cpu"); |
| 2715 | if (np != NULL) |
| 2716 | np = of_find_node_by_type(np, "cpu"); |
| 2717 | if (np != NULL) { |
| 2718 | g5_phy_disable_cpu1(); |
| 2719 | of_node_put(np); |
| 2720 | } |
| 2721 | #endif /* CONFIG_SMP */ |
| 2722 | /* Enable GMAC for now for PCI probing. It will be disabled |
| 2723 | * later on after PCI probe |
| 2724 | */ |
| 2725 | np = of_find_node_by_name(NULL, "ethernet"); |
| 2726 | while(np) { |
| 2727 | if (device_is_compatible(np, "K2-GMAC")) |
| 2728 | g5_gmac_enable(np, 0, 1); |
| 2729 | np = of_find_node_by_name(np, "ethernet"); |
| 2730 | } |
| 2731 | |
| 2732 | /* Enable FW before PCI probe. Will be disabled later on |
| 2733 | * Note: We should have a batter way to check that we are |
| 2734 | * dealing with uninorth internal cell and not a PCI cell |
| 2735 | * on the external PCI. The code below works though. |
| 2736 | */ |
| 2737 | np = of_find_node_by_name(NULL, "firewire"); |
| 2738 | while(np) { |
| 2739 | if (device_is_compatible(np, "pci106b,5811")) { |
| 2740 | macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED; |
| 2741 | g5_fw_enable(np, 0, 1); |
| 2742 | } |
| 2743 | np = of_find_node_by_name(np, "firewire"); |
| 2744 | } |
| 2745 | } |
| 2746 | #else /* CONFIG_POWER4 */ |
| 2747 | |
| 2748 | if (macio_chips[0].type == macio_keylargo || |
| 2749 | macio_chips[0].type == macio_pangea || |
| 2750 | macio_chips[0].type == macio_intrepid) { |
| 2751 | /* Enable GMAC for now for PCI probing. It will be disabled |
| 2752 | * later on after PCI probe |
| 2753 | */ |
| 2754 | np = of_find_node_by_name(NULL, "ethernet"); |
| 2755 | while(np) { |
| 2756 | if (np->parent |
| 2757 | && device_is_compatible(np->parent, "uni-north") |
| 2758 | && device_is_compatible(np, "gmac")) |
| 2759 | core99_gmac_enable(np, 0, 1); |
| 2760 | np = of_find_node_by_name(np, "ethernet"); |
| 2761 | } |
| 2762 | |
| 2763 | /* Enable FW before PCI probe. Will be disabled later on |
| 2764 | * Note: We should have a batter way to check that we are |
| 2765 | * dealing with uninorth internal cell and not a PCI cell |
| 2766 | * on the external PCI. The code below works though. |
| 2767 | */ |
| 2768 | np = of_find_node_by_name(NULL, "firewire"); |
| 2769 | while(np) { |
| 2770 | if (np->parent |
| 2771 | && device_is_compatible(np->parent, "uni-north") |
| 2772 | && (device_is_compatible(np, "pci106b,18") || |
| 2773 | device_is_compatible(np, "pci106b,30") || |
| 2774 | device_is_compatible(np, "pci11c1,5811"))) { |
| 2775 | macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED; |
| 2776 | core99_firewire_enable(np, 0, 1); |
| 2777 | } |
| 2778 | np = of_find_node_by_name(np, "firewire"); |
| 2779 | } |
| 2780 | |
| 2781 | /* Enable ATA-100 before PCI probe. */ |
| 2782 | np = of_find_node_by_name(NULL, "ata-6"); |
| 2783 | while(np) { |
| 2784 | if (np->parent |
| 2785 | && device_is_compatible(np->parent, "uni-north") |
| 2786 | && device_is_compatible(np, "kauai-ata")) { |
| 2787 | core99_ata100_enable(np, 1); |
| 2788 | } |
| 2789 | np = of_find_node_by_name(np, "ata-6"); |
| 2790 | } |
| 2791 | |
| 2792 | /* Switch airport off */ |
| 2793 | np = find_devices("radio"); |
| 2794 | while(np) { |
| 2795 | if (np && np->parent == macio_chips[0].of_node) { |
| 2796 | macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON; |
| 2797 | core99_airport_enable(np, 0, 0); |
| 2798 | } |
| 2799 | np = np->next; |
| 2800 | } |
| 2801 | } |
| 2802 | |
| 2803 | /* On all machines that support sound PM, switch sound off */ |
| 2804 | if (macio_chips[0].of_node) |
| 2805 | pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE, |
| 2806 | macio_chips[0].of_node, 0, 0); |
| 2807 | |
| 2808 | /* While on some desktop G3s, we turn it back on */ |
| 2809 | if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow |
| 2810 | && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER || |
| 2811 | pmac_mb.model_id == PMAC_TYPE_SILK)) { |
| 2812 | struct macio_chip* macio = &macio_chips[0]; |
| 2813 | MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); |
| 2814 | MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); |
| 2815 | } |
| 2816 | |
Benjamin Herrenschmidt | b20cc8a | 2005-05-01 08:58:42 -0700 | [diff] [blame] | 2817 | /* Some machine models need the clock chip to be properly setup for |
| 2818 | * clock spreading now. This should be a platform function but we |
| 2819 | * don't do these at the moment |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2820 | */ |
Benjamin Herrenschmidt | e521dca | 2005-05-02 16:12:00 +1000 | [diff] [blame^] | 2821 | pmac_tweak_clock_spreading(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2822 | |
| 2823 | #endif /* CONFIG_POWER4 */ |
| 2824 | |
| 2825 | /* On all machines, switch modem & serial ports off */ |
| 2826 | np = find_devices("ch-a"); |
| 2827 | while(np) { |
| 2828 | initial_serial_shutdown(np); |
| 2829 | np = np->next; |
| 2830 | } |
| 2831 | np = find_devices("ch-b"); |
| 2832 | while(np) { |
| 2833 | initial_serial_shutdown(np); |
| 2834 | np = np->next; |
| 2835 | } |
| 2836 | } |
| 2837 | |
| 2838 | void __init |
| 2839 | pmac_feature_init(void) |
| 2840 | { |
| 2841 | /* Detect the UniNorth memory controller */ |
| 2842 | probe_uninorth(); |
| 2843 | |
| 2844 | /* Probe mac-io controllers */ |
| 2845 | if (probe_macios()) { |
| 2846 | printk(KERN_WARNING "No mac-io chip found\n"); |
| 2847 | return; |
| 2848 | } |
| 2849 | |
| 2850 | /* Setup low-level i2c stuffs */ |
| 2851 | pmac_init_low_i2c(); |
| 2852 | |
| 2853 | /* Probe machine type */ |
| 2854 | if (probe_motherboard()) |
| 2855 | printk(KERN_WARNING "Unknown PowerMac !\n"); |
| 2856 | |
| 2857 | /* Set some initial features (turn off some chips that will |
| 2858 | * be later turned on) |
| 2859 | */ |
| 2860 | set_initial_features(); |
| 2861 | } |
| 2862 | |
| 2863 | int __init |
| 2864 | pmac_feature_late_init(void) |
| 2865 | { |
| 2866 | struct device_node* np; |
| 2867 | |
| 2868 | /* Request some resources late */ |
| 2869 | if (uninorth_node) |
| 2870 | request_OF_resource(uninorth_node, 0, NULL); |
| 2871 | np = find_devices("hammerhead"); |
| 2872 | if (np) |
| 2873 | request_OF_resource(np, 0, NULL); |
| 2874 | np = find_devices("interrupt-controller"); |
| 2875 | if (np) |
| 2876 | request_OF_resource(np, 0, NULL); |
| 2877 | return 0; |
| 2878 | } |
| 2879 | |
| 2880 | device_initcall(pmac_feature_late_init); |
| 2881 | |
| 2882 | #ifdef CONFIG_POWER4 |
| 2883 | |
| 2884 | static void dump_HT_speeds(char *name, u32 cfg, u32 frq) |
| 2885 | { |
| 2886 | int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 }; |
| 2887 | int bits[8] = { 8,16,0,32,2,4,0,0 }; |
| 2888 | int freq = (frq >> 8) & 0xf; |
| 2889 | |
| 2890 | if (freqs[freq] == 0) |
| 2891 | printk("%s: Unknown HT link frequency %x\n", name, freq); |
| 2892 | else |
| 2893 | printk("%s: %d MHz on main link, (%d in / %d out) bits width\n", |
| 2894 | name, freqs[freq], |
| 2895 | bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]); |
| 2896 | } |
| 2897 | |
| 2898 | void __init pmac_check_ht_link(void) |
| 2899 | { |
| 2900 | u32 ufreq, freq, ucfg, cfg; |
| 2901 | struct device_node *pcix_node; |
| 2902 | u8 px_bus, px_devfn; |
| 2903 | struct pci_controller *px_hose; |
| 2904 | |
| 2905 | (void)in_be32(u3_ht + U3_HT_LINK_COMMAND); |
| 2906 | ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG); |
| 2907 | ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ); |
| 2908 | dump_HT_speeds("U3 HyperTransport", cfg, freq); |
| 2909 | |
| 2910 | pcix_node = of_find_compatible_node(NULL, "pci", "pci-x"); |
| 2911 | if (pcix_node == NULL) { |
| 2912 | printk("No PCI-X bridge found\n"); |
| 2913 | return; |
| 2914 | } |
| 2915 | if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) { |
| 2916 | printk("PCI-X bridge found but not matched to pci\n"); |
| 2917 | return; |
| 2918 | } |
| 2919 | px_hose = pci_find_hose_for_OF_device(pcix_node); |
| 2920 | if (px_hose == NULL) { |
| 2921 | printk("PCI-X bridge found but not matched to host\n"); |
| 2922 | return; |
| 2923 | } |
| 2924 | early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg); |
| 2925 | early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq); |
| 2926 | dump_HT_speeds("PCI-X HT Uplink", cfg, freq); |
| 2927 | early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg); |
| 2928 | early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq); |
| 2929 | dump_HT_speeds("PCI-X HT Downlink", cfg, freq); |
| 2930 | } |
| 2931 | |
| 2932 | #endif /* CONFIG_POWER4 */ |
| 2933 | |
| 2934 | /* |
| 2935 | * Early video resume hook |
| 2936 | */ |
| 2937 | |
| 2938 | static void (*pmac_early_vresume_proc)(void *data) __pmacdata; |
| 2939 | static void *pmac_early_vresume_data __pmacdata; |
| 2940 | |
| 2941 | void pmac_set_early_video_resume(void (*proc)(void *data), void *data) |
| 2942 | { |
| 2943 | if (_machine != _MACH_Pmac) |
| 2944 | return; |
| 2945 | preempt_disable(); |
| 2946 | pmac_early_vresume_proc = proc; |
| 2947 | pmac_early_vresume_data = data; |
| 2948 | preempt_enable(); |
| 2949 | } |
| 2950 | EXPORT_SYMBOL(pmac_set_early_video_resume); |
| 2951 | |
| 2952 | void __pmac pmac_call_early_video_resume(void) |
| 2953 | { |
| 2954 | if (pmac_early_vresume_proc) |
| 2955 | pmac_early_vresume_proc(pmac_early_vresume_data); |
| 2956 | } |
Benjamin Herrenschmidt | 0c541b4 | 2005-04-16 15:24:19 -0700 | [diff] [blame] | 2957 | |
| 2958 | /* |
| 2959 | * AGP related suspend/resume code |
| 2960 | */ |
| 2961 | |
| 2962 | static struct pci_dev *pmac_agp_bridge __pmacdata; |
| 2963 | static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata; |
| 2964 | static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata; |
| 2965 | |
| 2966 | void __pmac pmac_register_agp_pm(struct pci_dev *bridge, |
| 2967 | int (*suspend)(struct pci_dev *bridge), |
| 2968 | int (*resume)(struct pci_dev *bridge)) |
| 2969 | { |
| 2970 | if (suspend || resume) { |
| 2971 | pmac_agp_bridge = bridge; |
| 2972 | pmac_agp_suspend = suspend; |
| 2973 | pmac_agp_resume = resume; |
| 2974 | return; |
| 2975 | } |
| 2976 | if (bridge != pmac_agp_bridge) |
| 2977 | return; |
| 2978 | pmac_agp_suspend = pmac_agp_resume = NULL; |
| 2979 | return; |
| 2980 | } |
| 2981 | EXPORT_SYMBOL(pmac_register_agp_pm); |
| 2982 | |
| 2983 | void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev) |
| 2984 | { |
| 2985 | if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL) |
| 2986 | return; |
| 2987 | if (pmac_agp_bridge->bus != dev->bus) |
| 2988 | return; |
| 2989 | pmac_agp_suspend(pmac_agp_bridge); |
| 2990 | } |
| 2991 | EXPORT_SYMBOL(pmac_suspend_agp_for_card); |
| 2992 | |
| 2993 | void __pmac pmac_resume_agp_for_card(struct pci_dev *dev) |
| 2994 | { |
| 2995 | if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL) |
| 2996 | return; |
| 2997 | if (pmac_agp_bridge->bus != dev->bus) |
| 2998 | return; |
| 2999 | pmac_agp_resume(pmac_agp_bridge); |
| 3000 | } |
| 3001 | EXPORT_SYMBOL(pmac_resume_agp_for_card); |