blob: 89c22184e1396211016bf4af9f9f7788bd700f18 [file] [log] [blame]
Hirokazu Takata23680862005-06-21 17:16:10 -07001# .gdbinit file
2# $Id: dot.gdbinit,v 1.1 2005/04/11 02:21:08 sakugawa Exp $
3
4# setting
5set width 0d70
6set radix 0d16
7use_debug_dma
8
9# Initialize SDRAM controller for Mappi
10define sdram_init
11 # SDIR0
12 set *(unsigned long *)0x00ef6008 = 0x00000182
13 # SDIR1
14 set *(unsigned long *)0x00ef600c = 0x00000001
15 # Initialize wait
16 shell sleep 0.1
17 # MOD
18 set *(unsigned long *)0x00ef602c = 0x00000020
19 set *(unsigned long *)0x00ef604c = 0x00000020
20 # TR
21 set *(unsigned long *)0x00ef6028 = 0x00051502
22 set *(unsigned long *)0x00ef6048 = 0x00051502
23 # ADR
24 set *(unsigned long *)0x00ef6020 = 0x08000004
25 set *(unsigned long *)0x00ef6040 = 0x0c000004
26 # AutoRef On
27 set *(unsigned long *)0x00ef6004 = 0x00010517
28 # Access enable
29 set *(unsigned long *)0x00ef6024 = 0x00000001
30 set *(unsigned long *)0x00ef6044 = 0x00000001
31end
32
33# Initialize LAN controller for Mappi
34define lanc_init
35 # Set BSEL4
36 #set *(unsigned long *)0x00ef5004 = 0x0fff330f
37 #set *(unsigned long *)0x00ef5004 = 0x01113301
38
39# set *(unsigned long *)0x00ef5004 = 0x02011101
40# set *(unsigned long *)0x00ef5004 = 0x04441104
41end
42
43define clock_init
44 set *(unsigned long *)0x00ef4010 = 2
45 set *(unsigned long *)0x00ef4014 = 2
46 set *(unsigned long *)0x00ef4020 = 3
47 set *(unsigned long *)0x00ef4024 = 3
48 set *(unsigned long *)0x00ef4004 = 0x7
49# shell sleep 0.1
50# set *(unsigned long *)0x00ef4004 = 0x5
51 shell sleep 0.1
52 set *(unsigned long *)0x00ef4008 = 0x0200
53end
54
55define port_init
56 set $sfrbase = 0x00ef0000
57 set *(unsigned short *)0x00ef1060 = 0x5555
58 set *(unsigned short *)0x00ef1062 = 0x5555
59 set *(unsigned short *)0x00ef1064 = 0x5555
60 set *(unsigned short *)0x00ef1066 = 0x5555
61 set *(unsigned short *)0x00ef1068 = 0x5555
62 set *(unsigned short *)0x00ef106a = 0x0000
63 set *(unsigned short *)0x00ef106e = 0x5555
64 set *(unsigned short *)0x00ef1070 = 0x5555
65end
66
67# MMU enable
68define mmu_enable
69 set $evb=0x88000000
70 set *(unsigned long *)0xffff0024=1
71end
72
73# MMU disable
74define mmu_disable
75 set $evb=0
76 set *(unsigned long *)0xffff0024=0
77end
78
79# Show TLB entries
80define show_tlb_entries
81 set $i = 0
82 set $addr = $arg0
83 while ($i < 0d16 )
84 set $tlb_tag = *(unsigned long*)$addr
85 set $tlb_data = *(unsigned long*)($addr + 4)
86 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
87 set $i = $i + 1
88 set $addr = $addr + 8
89 end
90end
91define itlb
92 set $itlb=0xfe000000
93 show_tlb_entries $itlb
94end
95define dtlb
96 set $dtlb=0xfe000800
97 show_tlb_entries $dtlb
98end
99
100# Cache ON
101define set_cache_type
102 set $mctype = (void*)0xfffffff8
103# chaos
104# set *(unsigned long *)($mctype) = 0x0000c000
105# m32102 i-cache only
106 set *(unsigned long *)($mctype) = 0x00008000
107# m32102 d-cache only
108# set *(unsigned long *)($mctype) = 0x00004000
109end
110define cache_on
111 set $param = (void*)0x08001000
112 set *(unsigned long *)($param) = 0x60ff6102
113end
114
115
116# Show current task structure
117define show_current
118 set $current = $spi & 0xffffe000
119 printf "$current=0x%08lX\n",$current
120 print *(struct task_struct *)$current
121end
122
123# Show user assigned task structure
124define show_task
125 set $task = $arg0 & 0xffffe000
126 printf "$task=0x%08lX\n",$task
127 print *(struct task_struct *)$task
128end
129document show_task
130 Show user assigned task structure
131 arg0 : task structure address
132end
133
134# Show M32R registers
135define show_regs
136 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
137 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
138 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
139 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
140 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
141 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
142 printf "EVB[0x%08lX]\n",$evb
143
144 set $mests = *(unsigned long *)0xffff000c
145 set $mdeva = *(unsigned long *)0xffff0010
146 printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva
147end
148
149
150# Setup all
151define setup
152 clock_init
153 shell sleep 0.1
154 port_init
155 sdram_init
156# lanc_init
157# dispc_init
158# set $evb=0x08000000
159end
160
161# Load modules
162define load_modules
163 use_debug_dma
164 load
165# load busybox.mot
166end
167
168# Set kernel parameters
169define set_kernel_parameters
170 set $param = (void*)0x08001000
171
172 ## MOUNT_ROOT_RDONLY
173 set {long}($param+0x00)=0
174 ## RAMDISK_FLAGS
175 #set {long}($param+0x04)=0
176 ## ORIG_ROOT_DEV
177 #set {long}($param+0x08)=0x00000100
178 ## LOADER_TYPE
179 #set {long}($param+0x0C)=0
180 ## INITRD_START
181 set {long}($param+0x10)=0x082a0000
182 ## INITRD_SIZE
183 set {long}($param+0x14)=0d6200000
184
185 # M32R_CPUCLK
186 set *(unsigned long *)($param + 0x0018) = 0d100000000
187 # M32R_BUSCLK
188 set *(unsigned long *)($param + 0x001c) = 0d50000000
189 # M32R_TIMER_DIVIDE
190 set *(unsigned long *)($param + 0x0020) = 0d128
191
192
193 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6_04 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0"
194
195
196end
197
198# Boot
199define boot
200 set_kernel_parameters
201 debug_chaos
202 set *(unsigned long *)0x00f00000=0x08002000
203 set $pc=0x08002000
204 set $fp=0
205 del b
206 si
207end
208
209# Restart
210define restart
211 sdireset
212 sdireset
213 setup
214 load_modules
215 boot
216end
217
218sdireset
219sdireset
220file vmlinux
221target m32rsdi
222
223restart
224boot