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Eric Bénard21744f12010-06-10 16:07:50 +02001/*
2 * Copyright (C) 2010 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm970-baseboard.c which is :
5 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21
22#include <linux/types.h>
23#include <linux/init.h>
24
25#include <linux/gpio.h>
26#include <linux/interrupt.h>
27#include <linux/leds.h>
28#include <linux/platform_device.h>
Eric Bénard21744f12010-06-10 16:07:50 +020029#include <linux/input.h>
Eric Bénard0e189852012-05-08 09:20:19 +020030#include <linux/spi/spi.h>
Eric Bénard21744f12010-06-10 16:07:50 +020031#include <video/platform_lcd.h>
32#include <linux/i2c.h>
33
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/time.h>
37#include <asm/mach/map.h>
38
Eric Bénard21744f12010-06-10 16:07:50 +020039#include <mach/hardware.h>
40#include <mach/common.h>
Eric Bénard21744f12010-06-10 16:07:50 +020041#include <mach/iomux-mx35.h>
Eric Bénard21744f12010-06-10 16:07:50 +020042
Uwe Kleine-König2dcf78c2010-06-30 12:16:24 +020043#include "devices-imx35.h"
Eric Bénard21744f12010-06-10 16:07:50 +020044
45static const struct fb_videomode fb_modedb[] = {
46 {
Eric Bénardc0550c42010-10-08 10:56:10 +020047 .name = "CMO-QVGA",
Eric Bénard21744f12010-06-10 16:07:50 +020048 .refresh = 60,
49 .xres = 320,
50 .yres = 240,
51 .pixclock = KHZ2PICOS(6500),
52 .left_margin = 68,
53 .right_margin = 20,
54 .upper_margin = 15,
55 .lower_margin = 4,
56 .hsync_len = 30,
57 .vsync_len = 3,
58 .sync = 0,
59 .vmode = FB_VMODE_NONINTERLACED,
60 .flag = 0,
61 },
Eric Bénardc0550c42010-10-08 10:56:10 +020062 {
63 .name = "DVI-VGA",
64 .refresh = 60,
65 .xres = 640,
66 .yres = 480,
67 .pixclock = 32000,
68 .left_margin = 100,
69 .right_margin = 100,
70 .upper_margin = 7,
71 .lower_margin = 100,
72 .hsync_len = 7,
73 .vsync_len = 7,
74 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
75 FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
76 .vmode = FB_VMODE_NONINTERLACED,
77 .flag = 0,
78 },
79 {
80 .name = "DVI-SVGA",
81 .refresh = 60,
82 .xres = 800,
83 .yres = 600,
84 .pixclock = 25000,
85 .left_margin = 75,
86 .right_margin = 75,
87 .upper_margin = 7,
88 .lower_margin = 75,
89 .hsync_len = 7,
90 .vsync_len = 7,
91 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
92 FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
93 .vmode = FB_VMODE_NONINTERLACED,
94 .flag = 0,
95 },
Eric Bénard21744f12010-06-10 16:07:50 +020096};
97
Uwe Kleine-Königafa77ef2011-03-03 21:32:02 +010098static const struct ipu_platform_data mx3_ipu_data __initconst = {
Eric Bénard21744f12010-06-10 16:07:50 +020099 .irq_base = MXC_IPU_IRQ_START,
100};
101
Uwe Kleine-Königafa77ef2011-03-03 21:32:02 +0100102static struct mx3fb_platform_data mx3fb_pdata __initdata = {
Eric Bénardc0550c42010-10-08 10:56:10 +0200103 .name = "CMO-QVGA",
Eric Bénard21744f12010-06-10 16:07:50 +0200104 .mode = fb_modedb,
105 .num_modes = ARRAY_SIZE(fb_modedb),
106};
107
Lothar Waßmann8f5260c2010-10-26 14:28:31 +0200108static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
Eric Bénard21744f12010-06-10 16:07:50 +0200109 /* LCD */
110 MX35_PAD_LD0__IPU_DISPB_DAT_0,
111 MX35_PAD_LD1__IPU_DISPB_DAT_1,
112 MX35_PAD_LD2__IPU_DISPB_DAT_2,
113 MX35_PAD_LD3__IPU_DISPB_DAT_3,
114 MX35_PAD_LD4__IPU_DISPB_DAT_4,
115 MX35_PAD_LD5__IPU_DISPB_DAT_5,
116 MX35_PAD_LD6__IPU_DISPB_DAT_6,
117 MX35_PAD_LD7__IPU_DISPB_DAT_7,
118 MX35_PAD_LD8__IPU_DISPB_DAT_8,
119 MX35_PAD_LD9__IPU_DISPB_DAT_9,
120 MX35_PAD_LD10__IPU_DISPB_DAT_10,
121 MX35_PAD_LD11__IPU_DISPB_DAT_11,
122 MX35_PAD_LD12__IPU_DISPB_DAT_12,
123 MX35_PAD_LD13__IPU_DISPB_DAT_13,
124 MX35_PAD_LD14__IPU_DISPB_DAT_14,
125 MX35_PAD_LD15__IPU_DISPB_DAT_15,
126 MX35_PAD_LD16__IPU_DISPB_DAT_16,
127 MX35_PAD_LD17__IPU_DISPB_DAT_17,
128 MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
129 MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
130 MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
131 MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
132 /* Backlight */
133 MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
134 /* LCD_PWR */
135 MX35_PAD_D3_CLS__GPIO1_4,
136 /* LED */
137 MX35_PAD_LD23__GPIO3_29,
138 /* SWITCH */
139 MX35_PAD_LD19__GPIO3_25,
140 /* UART2 */
141 MX35_PAD_CTS2__UART2_CTS,
142 MX35_PAD_RTS2__UART2_RTS,
143 MX35_PAD_TXD2__UART2_TXD_MUX,
144 MX35_PAD_RXD2__UART2_RXD_MUX,
145 /* I2S */
146 MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
147 MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
148 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
149 MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
Eric Bénard438a4d62010-10-02 17:15:27 +0200150 /* CAN2 */
151 MX35_PAD_TX5_RX0__CAN2_TXCAN,
152 MX35_PAD_TX4_RX1__CAN2_RXCAN,
153 /* SDCARD */
154 MX35_PAD_SD1_CMD__ESDHC1_CMD,
155 MX35_PAD_SD1_CLK__ESDHC1_CLK,
156 MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
157 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
158 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
159 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
Eric Bénardd335cf92011-02-25 13:49:58 +0100160 /* SD1 CD */
161 MX35_PAD_LD18__GPIO3_24,
Eric Bénard0e189852012-05-08 09:20:19 +0200162 /* SPI */
163 MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,
164 MX35_PAD_CSPI1_MISO__CSPI1_MISO,
165 MX35_PAD_CSPI1_SS0__GPIO1_18,
166 MX35_PAD_CSPI1_SS1__GPIO1_19,
167 MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,
168 MX35_PAD_CSPI1_SPI_RDY__GPIO3_5,
Eric Bénard21744f12010-06-10 16:07:50 +0200169};
170
Wolfram Sangd4abe932011-02-23 14:51:58 +0100171#define GPIO_LED1 IMX_GPIO_NR(3, 29)
172#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25)
Eric Bénardda8db3a2011-02-25 13:49:57 +0100173#define GPIO_LCDPWR IMX_GPIO_NR(1, 4)
Eric Bénardd335cf92011-02-25 13:49:58 +0100174#define GPIO_SD1CD IMX_GPIO_NR(3, 24)
Eric Bénard0e189852012-05-08 09:20:19 +0200175#define GPIO_SPI1_SS0 IMX_GPIO_NR(1, 18)
176#define GPIO_SPI1_SS1 IMX_GPIO_NR(1, 19)
177#define GPIO_SPI1_IRQ IMX_GPIO_NR(3, 5)
Eric Bénard21744f12010-06-10 16:07:50 +0200178
179static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
180 unsigned int power)
181{
182 if (power)
183 gpio_direction_output(GPIO_LCDPWR, 1);
184 else
185 gpio_direction_output(GPIO_LCDPWR, 0);
186}
187
188static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
189 .set_power = eukrea_mbimxsd_lcd_power_set,
190};
191
192static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
193 .name = "platform-lcd",
194 .dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
195};
196
197static struct gpio_led eukrea_mbimxsd_leds[] = {
198 {
199 .name = "led1",
200 .default_trigger = "heartbeat",
201 .active_low = 1,
202 .gpio = GPIO_LED1,
203 },
204};
205
Uwe Kleine-König47e837b2011-05-28 21:05:01 +0200206static const struct gpio_led_platform_data
207 eukrea_mbimxsd_led_info __initconst = {
Eric Bénard21744f12010-06-10 16:07:50 +0200208 .leds = eukrea_mbimxsd_leds,
209 .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
210};
211
Eric Bénard21744f12010-06-10 16:07:50 +0200212static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
213 {
214 .gpio = GPIO_SWITCH1,
215 .code = BTN_0,
216 .desc = "BP1",
217 .active_low = 1,
218 .wakeup = 1,
219 },
220};
221
Uwe Kleine-König53094982011-02-28 18:04:33 +0100222static const struct gpio_keys_platform_data
223 eukrea_mbimxsd_button_data __initconst = {
Eric Bénard21744f12010-06-10 16:07:50 +0200224 .buttons = eukrea_mbimxsd_gpio_buttons,
225 .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
226};
227
Eric Bénard21744f12010-06-10 16:07:50 +0200228static struct platform_device *platform_devices[] __initdata = {
Eric Bénard21744f12010-06-10 16:07:50 +0200229 &eukrea_mbimxsd_lcd_powerdev,
230};
231
Uwe Kleine-König2dcf78c2010-06-30 12:16:24 +0200232static const struct imxuart_platform_data uart_pdata __initconst = {
Eric Bénard21744f12010-06-10 16:07:50 +0200233 .flags = IMXUART_HAVE_RTSCTS,
234};
235
236static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
237 {
238 I2C_BOARD_INFO("tlv320aic23", 0x1a),
239 },
240};
241
Uwe Kleine-König4697bb92010-08-25 17:37:45 +0200242static const
243struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
Eric Bénard21744f12010-06-10 16:07:50 +0200244 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
245};
246
Eric Bénardd335cf92011-02-25 13:49:58 +0100247static struct esdhc_platform_data sd1_pdata = {
248 .cd_gpio = GPIO_SD1CD,
Shawn Guo913413c2011-06-21 22:41:51 +0800249 .cd_type = ESDHC_CD_GPIO,
250 .wp_type = ESDHC_WP_NONE,
Eric Bénardd335cf92011-02-25 13:49:58 +0100251};
252
Eric Bénard0e189852012-05-08 09:20:19 +0200253static struct spi_board_info eukrea_mbimxsd35_spi_board_info[] __initdata = {
254 {
255 .modalias = "spidev",
256 .max_speed_hz = 20000000,
257 .bus_num = 0,
258 .chip_select = 0,
259 .mode = SPI_MODE_0,
260 },
261 {
262 .modalias = "spidev",
263 .max_speed_hz = 20000000,
264 .bus_num = 0,
265 .chip_select = 1,
266 .mode = SPI_MODE_0,
267 },
268};
269
270static int eukrea_mbimxsd35_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};
271
272static const struct spi_imx_master eukrea_mbimxsd35_spi0_data __initconst = {
273 .chipselect = eukrea_mbimxsd35_spi_cs,
274 .num_chipselect = ARRAY_SIZE(eukrea_mbimxsd35_spi_cs),
275};
276
Eric Bénard21744f12010-06-10 16:07:50 +0200277/*
278 * system init for baseboard usage. Will be called by cpuimx35 init.
279 *
280 * Add platform devices present on this baseboard and init
281 * them from CPU side as far as required to use them later on
282 */
Eric Bénardec53fe32010-07-30 22:58:40 +0200283void __init eukrea_mbimxsd35_baseboard_init(void)
Eric Bénard21744f12010-06-10 16:07:50 +0200284{
285 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
286 ARRAY_SIZE(eukrea_mbimxsd_pads)))
287 printk(KERN_ERR "error setting mbimxsd pads !\n");
288
Uwe Kleine-König2dcf78c2010-06-30 12:16:24 +0200289 imx35_add_imx_uart1(&uart_pdata);
Uwe Kleine-Königafa77ef2011-03-03 21:32:02 +0100290 imx35_add_ipu_core(&mx3_ipu_data);
291 imx35_add_mx3_sdc_fb(&mx3fb_pdata);
Eric Bénard21744f12010-06-10 16:07:50 +0200292
Uwe Kleine-König4697bb92010-08-25 17:37:45 +0200293 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
Eric Bénard21744f12010-06-10 16:07:50 +0200294
Eric Bénard438a4d62010-10-02 17:15:27 +0200295 imx35_add_flexcan1(NULL);
Eric Bénardd335cf92011-02-25 13:49:58 +0100296 imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
Eric Bénard438a4d62010-10-02 17:15:27 +0200297
Eric Bénard21744f12010-06-10 16:07:50 +0200298 gpio_request(GPIO_LED1, "LED1");
299 gpio_direction_output(GPIO_LED1, 1);
300 gpio_free(GPIO_LED1);
301
302 gpio_request(GPIO_SWITCH1, "SWITCH1");
303 gpio_direction_input(GPIO_SWITCH1);
304 gpio_free(GPIO_SWITCH1);
305
306 gpio_request(GPIO_LCDPWR, "LCDPWR");
307 gpio_direction_output(GPIO_LCDPWR, 1);
Eric Bénard21744f12010-06-10 16:07:50 +0200308
309 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
310 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
311
Eric Bénard0e189852012-05-08 09:20:19 +0200312 gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");
313 gpio_direction_input(GPIO_SPI1_IRQ);
314 gpio_free(GPIO_SPI1_IRQ);
315 imx35_add_spi_imx0(&eukrea_mbimxsd35_spi0_data);
316 spi_register_board_info(eukrea_mbimxsd35_spi_board_info,
317 ARRAY_SIZE(eukrea_mbimxsd35_spi_board_info));
318
Eric Bénard21744f12010-06-10 16:07:50 +0200319 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
Uwe Kleine-König47e837b2011-05-28 21:05:01 +0200320 gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
Uwe Kleine-König53094982011-02-28 18:04:33 +0100321 imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
Eric Bénard21744f12010-06-10 16:07:50 +0200322}