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Boris BREZILLONc8a76ca2014-05-15 10:55:11 +02001/*
2 * Copyright (C) 2014 Free Electrons
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
6 *
7 * Allwinner A31 APB0 clock gates driver
8 *
9 */
10
11#include <linux/clk-provider.h>
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080012#include <linux/clkdev.h>
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020013#include <linux/module.h>
14#include <linux/of.h>
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080015#include <linux/of_device.h>
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020016#include <linux/platform_device.h>
17
18#define SUN6I_APB0_GATES_MAX_SIZE 32
19
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080020struct gates_data {
21 DECLARE_BITMAP(mask, SUN6I_APB0_GATES_MAX_SIZE);
22};
23
24static const struct gates_data sun6i_a31_apb0_gates __initconst = {
25 .mask = {0x7F},
26};
27
Chen-Yu Tsai6c1d66f2014-07-09 15:54:35 +080028static const struct gates_data sun8i_a23_apb0_gates __initconst = {
29 .mask = {0x5D},
30};
31
Emilio López381c1cc2014-07-28 00:49:43 -030032static const struct of_device_id sun6i_a31_apb0_gates_clk_dt_ids[] = {
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080033 { .compatible = "allwinner,sun6i-a31-apb0-gates-clk", .data = &sun6i_a31_apb0_gates },
Chen-Yu Tsai6c1d66f2014-07-09 15:54:35 +080034 { .compatible = "allwinner,sun8i-a23-apb0-gates-clk", .data = &sun8i_a23_apb0_gates },
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080035 { /* sentinel */ }
36};
37
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020038static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev)
39{
40 struct device_node *np = pdev->dev.of_node;
41 struct clk_onecell_data *clk_data;
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080042 const struct of_device_id *device;
43 const struct gates_data *data;
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020044 const char *clk_parent;
45 const char *clk_name;
46 struct resource *r;
47 void __iomem *reg;
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020048 int ngates;
49 int i;
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080050 int j = 0;
51
52 if (!np)
53 return -ENODEV;
54
55 device = of_match_device(sun6i_a31_apb0_gates_clk_dt_ids, &pdev->dev);
56 if (!device)
57 return -ENODEV;
58 data = device->data;
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020059
60 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
61 reg = devm_ioremap_resource(&pdev->dev, r);
Himangi Saraogic3dcac82014-06-28 22:53:55 +053062 if (IS_ERR(reg))
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020063 return PTR_ERR(reg);
64
65 clk_parent = of_clk_get_parent_name(np, 0);
66 if (!clk_parent)
67 return -EINVAL;
68
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020069 clk_data = devm_kzalloc(&pdev->dev, sizeof(struct clk_onecell_data),
70 GFP_KERNEL);
71 if (!clk_data)
72 return -ENOMEM;
73
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080074 /* Worst-case size approximation and memory allocation */
75 ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE);
76 clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1),
77 sizeof(struct clk *), GFP_KERNEL);
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020078 if (!clk_data->clks)
79 return -ENOMEM;
80
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080081 for_each_set_bit(i, data->mask, SUN6I_APB0_GATES_MAX_SIZE) {
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020082 of_property_read_string_index(np, "clock-output-names",
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080083 j, &clk_name);
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020084
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080085 clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
86 clk_parent, 0, reg, i,
87 0, NULL);
88 WARN_ON(IS_ERR(clk_data->clks[i]));
89 clk_register_clkdev(clk_data->clks[i], clk_name, NULL);
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020090
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080091 j++;
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020092 }
93
Chen-Yu Tsaib72efd02014-07-09 15:54:34 +080094 clk_data->clk_num = ngates + 1;
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020095
96 return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
97}
98
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +020099static struct platform_driver sun6i_a31_apb0_gates_clk_driver = {
100 .driver = {
101 .name = "sun6i-a31-apb0-gates-clk",
Boris BREZILLONc8a76ca2014-05-15 10:55:11 +0200102 .of_match_table = sun6i_a31_apb0_gates_clk_dt_ids,
103 },
104 .probe = sun6i_a31_apb0_gates_clk_probe,
105};
106module_platform_driver(sun6i_a31_apb0_gates_clk_driver);
107
108MODULE_AUTHOR("Boris BREZILLON <boris.brezillon@free-electrons.com>");
109MODULE_DESCRIPTION("Allwinner A31 APB0 gate clocks driver");
110MODULE_LICENSE("GPL v2");