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Johannes Berg8ca151b2013-01-24 14:25:36 +01001/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
Emmanuel Grumbach410dc5a2013-02-18 09:22:28 +020025 * in the file called COPYING.
Johannes Berg8ca151b2013-01-24 14:25:36 +010026 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
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32 *
33 * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
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62 *****************************************************************************/
63
64#ifndef __fw_api_h__
65#define __fw_api_h__
66
67#include "fw-api-rs.h"
68#include "fw-api-tx.h"
69#include "fw-api-sta.h"
70#include "fw-api-mac.h"
71#include "fw-api-power.h"
72#include "fw-api-d3.h"
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +020073#include "fw-api-bt-coex.h"
Johannes Berg8ca151b2013-01-24 14:25:36 +010074
75/* queue and FIFO numbers by usage */
76enum {
77 IWL_MVM_OFFCHANNEL_QUEUE = 8,
78 IWL_MVM_CMD_QUEUE = 9,
79 IWL_MVM_AUX_QUEUE = 15,
80 IWL_MVM_FIRST_AGG_QUEUE = 16,
81 IWL_MVM_NUM_QUEUES = 20,
82 IWL_MVM_LAST_AGG_QUEUE = IWL_MVM_NUM_QUEUES - 1,
83 IWL_MVM_CMD_FIFO = 7
84};
85
86#define IWL_MVM_STATION_COUNT 16
87
88/* commands */
89enum {
90 MVM_ALIVE = 0x1,
91 REPLY_ERROR = 0x2,
92
93 INIT_COMPLETE_NOTIF = 0x4,
94
95 /* PHY context commands */
96 PHY_CONTEXT_CMD = 0x8,
97 DBG_CFG = 0x9,
98
99 /* station table */
100 ADD_STA = 0x18,
101 REMOVE_STA = 0x19,
102
103 /* TX */
104 TX_CMD = 0x1c,
105 TXPATH_FLUSH = 0x1e,
106 MGMT_MCAST_KEY = 0x1f,
107
108 /* global key */
109 WEP_KEY = 0x20,
110
111 /* MAC and Binding commands */
112 MAC_CONTEXT_CMD = 0x28,
113 TIME_EVENT_CMD = 0x29, /* both CMD and response */
114 TIME_EVENT_NOTIFICATION = 0x2a,
115 BINDING_CONTEXT_CMD = 0x2b,
116 TIME_QUOTA_CMD = 0x2c,
117
118 LQ_CMD = 0x4e,
119
120 /* Calibration */
121 TEMPERATURE_NOTIFICATION = 0x62,
122 CALIBRATION_CFG_CMD = 0x65,
123 CALIBRATION_RES_NOTIFICATION = 0x66,
124 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
125 RADIO_VERSION_NOTIFICATION = 0x68,
126
127 /* Scan offload */
128 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
129 SCAN_OFFLOAD_ABORT_CMD = 0x52,
130 SCAN_OFFLOAD_COMPLETE = 0x6D,
131 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
132 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
133
134 /* Phy */
135 PHY_CONFIGURATION_CMD = 0x6a,
136 CALIB_RES_NOTIF_PHY_DB = 0x6b,
137 /* PHY_DB_CMD = 0x6c, */
138
Alexander Bondare811ada2013-03-10 15:29:44 +0200139 /* Power - legacy power table command */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100140 POWER_TABLE_CMD = 0x77,
141
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +0300142 /* Thermal Throttling*/
143 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
144
Johannes Berg8ca151b2013-01-24 14:25:36 +0100145 /* Scanning */
146 SCAN_REQUEST_CMD = 0x80,
147 SCAN_ABORT_CMD = 0x81,
148 SCAN_START_NOTIFICATION = 0x82,
149 SCAN_RESULTS_NOTIFICATION = 0x83,
150 SCAN_COMPLETE_NOTIFICATION = 0x84,
151
152 /* NVM */
153 NVM_ACCESS_CMD = 0x88,
154
155 SET_CALIB_DEFAULT_CMD = 0x8e,
156
Ilan Peer571765c2013-03-05 15:26:03 +0200157 BEACON_NOTIFICATION = 0x90,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100158 BEACON_TEMPLATE_CMD = 0x91,
159 TX_ANT_CONFIGURATION_CMD = 0x98,
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200160 BT_CONFIG = 0x9b,
Johannes Berg8ca151b2013-01-24 14:25:36 +0100161 STATISTICS_NOTIFICATION = 0x9d,
162
163 /* RF-KILL commands and notifications */
164 CARD_STATE_CMD = 0xa0,
165 CARD_STATE_NOTIFICATION = 0xa1,
166
Hila Gonend64048e2013-03-13 18:00:03 +0200167 MISSED_BEACONS_NOTIFICATION = 0xa2,
168
Alexander Bondare811ada2013-03-10 15:29:44 +0200169 /* Power - new power table command */
170 MAC_PM_POWER_TABLE = 0xa9,
171
Johannes Berg8ca151b2013-01-24 14:25:36 +0100172 REPLY_RX_PHY_CMD = 0xc0,
173 REPLY_RX_MPDU_CMD = 0xc1,
174 BA_NOTIF = 0xc5,
175
Emmanuel Grumbachfb3ceb82013-01-14 15:04:01 +0200176 /* BT Coex */
177 BT_COEX_PRIO_TABLE = 0xcc,
178 BT_COEX_PROT_ENV = 0xcd,
179 BT_PROFILE_NOTIFICATION = 0xce,
180
Hila Gonen7df15b12012-12-12 11:16:19 +0200181 REPLY_BEACON_FILTERING_CMD = 0xd2,
182
Johannes Berg8ca151b2013-01-24 14:25:36 +0100183 REPLY_DEBUG_CMD = 0xf0,
184 DEBUG_LOG_MSG = 0xf7,
185
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +0300186 MCAST_FILTER_CMD = 0xd0,
187
Johannes Berg8ca151b2013-01-24 14:25:36 +0100188 /* D3 commands/notifications */
189 D3_CONFIG_CMD = 0xd3,
190 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
191 OFFLOADS_QUERY_CMD = 0xd5,
192 REMOTE_WAKE_CONFIG_CMD = 0xd6,
193
194 /* for WoWLAN in particular */
195 WOWLAN_PATTERNS = 0xe0,
196 WOWLAN_CONFIGURATION = 0xe1,
197 WOWLAN_TSC_RSC_PARAM = 0xe2,
198 WOWLAN_TKIP_PARAM = 0xe3,
199 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
200 WOWLAN_GET_STATUSES = 0xe5,
201 WOWLAN_TX_POWER_PER_DB = 0xe6,
202
203 /* and for NetDetect */
204 NET_DETECT_CONFIG_CMD = 0x54,
205 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
206 NET_DETECT_PROFILES_CMD = 0x57,
207 NET_DETECT_HOTSPOTS_CMD = 0x58,
208 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
209
210 REPLY_MAX = 0xff,
211};
212
213/**
214 * struct iwl_cmd_response - generic response struct for most commands
215 * @status: status of the command asked, changes for each one
216 */
217struct iwl_cmd_response {
218 __le32 status;
219};
220
221/*
222 * struct iwl_tx_ant_cfg_cmd
223 * @valid: valid antenna configuration
224 */
225struct iwl_tx_ant_cfg_cmd {
226 __le32 valid;
227} __packed;
228
229/*
230 * Calibration control struct.
231 * Sent as part of the phy configuration command.
232 * @flow_trigger: bitmap for which calibrations to perform according to
233 * flow triggers.
234 * @event_trigger: bitmap for which calibrations to perform according to
235 * event triggers.
236 */
237struct iwl_calib_ctrl {
238 __le32 flow_trigger;
239 __le32 event_trigger;
240} __packed;
241
242/* This enum defines the bitmap of various calibrations to enable in both
243 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
244 */
245enum iwl_calib_cfg {
246 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
247 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
248 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
249 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
250 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
251 IWL_CALIB_CFG_DC_IDX = BIT(5),
252 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
253 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
254 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
255 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
256 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
257 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
258 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
259 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
260 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
261 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
262 IWL_CALIB_CFG_DAC_IDX = BIT(16),
263 IWL_CALIB_CFG_ABS_IDX = BIT(17),
264 IWL_CALIB_CFG_AGC_IDX = BIT(18),
265};
266
267/*
268 * Phy configuration command.
269 */
270struct iwl_phy_cfg_cmd {
271 __le32 phy_cfg;
272 struct iwl_calib_ctrl calib_control;
273} __packed;
274
275#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
276#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
277#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
278#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
279#define PHY_CFG_TX_CHAIN_A BIT(8)
280#define PHY_CFG_TX_CHAIN_B BIT(9)
281#define PHY_CFG_TX_CHAIN_C BIT(10)
282#define PHY_CFG_RX_CHAIN_A BIT(12)
283#define PHY_CFG_RX_CHAIN_B BIT(13)
284#define PHY_CFG_RX_CHAIN_C BIT(14)
285
286
287/* Target of the NVM_ACCESS_CMD */
288enum {
289 NVM_ACCESS_TARGET_CACHE = 0,
290 NVM_ACCESS_TARGET_OTP = 1,
291 NVM_ACCESS_TARGET_EEPROM = 2,
292};
293
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200294/* Section types for NVM_ACCESS_CMD */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100295enum {
296 NVM_SECTION_TYPE_HW = 0,
297 NVM_SECTION_TYPE_SW,
298 NVM_SECTION_TYPE_PAPD,
299 NVM_SECTION_TYPE_BT,
300 NVM_SECTION_TYPE_CALIBRATION,
301 NVM_SECTION_TYPE_PRODUCTION,
302 NVM_SECTION_TYPE_POST_FCS_CALIB,
303 NVM_NUM_OF_SECTIONS,
304};
305
306/**
307 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
308 * @op_code: 0 - read, 1 - write
309 * @target: NVM_ACCESS_TARGET_*
310 * @type: NVM_SECTION_TYPE_*
311 * @offset: offset in bytes into the section
312 * @length: in bytes, to read/write
313 * @data: if write operation, the data to write. On read its empty
314 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200315struct iwl_nvm_access_cmd {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100316 u8 op_code;
317 u8 target;
318 __le16 type;
319 __le16 offset;
320 __le16 length;
321 u8 data[];
322} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
323
324/**
325 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
326 * @offset: offset in bytes into the section
327 * @length: in bytes, either how much was written or read
328 * @type: NVM_SECTION_TYPE_*
329 * @status: 0 for success, fail otherwise
330 * @data: if read operation, the data returned. Empty on write.
331 */
Emmanuel Grumbachb9545b42013-03-06 11:34:44 +0200332struct iwl_nvm_access_resp {
Johannes Berg8ca151b2013-01-24 14:25:36 +0100333 __le16 offset;
334 __le16 length;
335 __le16 type;
336 __le16 status;
337 u8 data[];
338} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
339
340/* MVM_ALIVE 0x1 */
341
342/* alive response is_valid values */
343#define ALIVE_RESP_UCODE_OK BIT(0)
344#define ALIVE_RESP_RFKILL BIT(1)
345
346/* alive response ver_type values */
347enum {
348 FW_TYPE_HW = 0,
349 FW_TYPE_PROT = 1,
350 FW_TYPE_AP = 2,
351 FW_TYPE_WOWLAN = 3,
352 FW_TYPE_TIMING = 4,
353 FW_TYPE_WIPAN = 5
354};
355
356/* alive response ver_subtype values */
357enum {
358 FW_SUBTYPE_FULL_FEATURE = 0,
359 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
360 FW_SUBTYPE_REDUCED = 2,
361 FW_SUBTYPE_ALIVE_ONLY = 3,
362 FW_SUBTYPE_WOWLAN = 4,
363 FW_SUBTYPE_AP_SUBTYPE = 5,
364 FW_SUBTYPE_WIPAN = 6,
365 FW_SUBTYPE_INITIALIZE = 9
366};
367
368#define IWL_ALIVE_STATUS_ERR 0xDEAD
369#define IWL_ALIVE_STATUS_OK 0xCAFE
370
371#define IWL_ALIVE_FLG_RFKILL BIT(0)
372
373struct mvm_alive_resp {
374 __le16 status;
375 __le16 flags;
376 u8 ucode_minor;
377 u8 ucode_major;
378 __le16 id;
379 u8 api_minor;
380 u8 api_major;
381 u8 ver_subtype;
382 u8 ver_type;
383 u8 mac;
384 u8 opt;
385 __le16 reserved2;
386 __le32 timestamp;
387 __le32 error_event_table_ptr; /* SRAM address for error log */
388 __le32 log_event_table_ptr; /* SRAM address for event log */
389 __le32 cpu_register_ptr;
390 __le32 dbgm_config_ptr;
391 __le32 alive_counter_ptr;
392 __le32 scd_base_ptr; /* SRAM address for SCD */
393} __packed; /* ALIVE_RES_API_S_VER_1 */
394
395/* Error response/notification */
396enum {
397 FW_ERR_UNKNOWN_CMD = 0x0,
398 FW_ERR_INVALID_CMD_PARAM = 0x1,
399 FW_ERR_SERVICE = 0x2,
400 FW_ERR_ARC_MEMORY = 0x3,
401 FW_ERR_ARC_CODE = 0x4,
402 FW_ERR_WATCH_DOG = 0x5,
403 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
404 FW_ERR_WEP_KEY_SIZE = 0x11,
405 FW_ERR_OBSOLETE_FUNC = 0x12,
406 FW_ERR_UNEXPECTED = 0xFE,
407 FW_ERR_FATAL = 0xFF
408};
409
410/**
411 * struct iwl_error_resp - FW error indication
412 * ( REPLY_ERROR = 0x2 )
413 * @error_type: one of FW_ERR_*
414 * @cmd_id: the command ID for which the error occured
415 * @bad_cmd_seq_num: sequence number of the erroneous command
416 * @error_service: which service created the error, applicable only if
417 * error_type = 2, otherwise 0
418 * @timestamp: TSF in usecs.
419 */
420struct iwl_error_resp {
421 __le32 error_type;
422 u8 cmd_id;
423 u8 reserved1;
424 __le16 bad_cmd_seq_num;
425 __le32 error_service;
426 __le64 timestamp;
427} __packed;
428
429
430/* Common PHY, MAC and Bindings definitions */
431
432#define MAX_MACS_IN_BINDING (3)
433#define MAX_BINDINGS (4)
434#define AUX_BINDING_INDEX (3)
435#define MAX_PHYS (4)
436
437/* Used to extract ID and color from the context dword */
438#define FW_CTXT_ID_POS (0)
439#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
440#define FW_CTXT_COLOR_POS (8)
441#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
442#define FW_CTXT_INVALID (0xffffffff)
443
444#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
445 (_color << FW_CTXT_COLOR_POS))
446
447/* Possible actions on PHYs, MACs and Bindings */
448enum {
449 FW_CTXT_ACTION_STUB = 0,
450 FW_CTXT_ACTION_ADD,
451 FW_CTXT_ACTION_MODIFY,
452 FW_CTXT_ACTION_REMOVE,
453 FW_CTXT_ACTION_NUM
454}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
455
456/* Time Events */
457
458/* Time Event types, according to MAC type */
459enum iwl_time_event_type {
460 /* BSS Station Events */
461 TE_BSS_STA_AGGRESSIVE_ASSOC,
462 TE_BSS_STA_ASSOC,
463 TE_BSS_EAP_DHCP_PROT,
464 TE_BSS_QUIET_PERIOD,
465
466 /* P2P Device Events */
467 TE_P2P_DEVICE_DISCOVERABLE,
468 TE_P2P_DEVICE_LISTEN,
469 TE_P2P_DEVICE_ACTION_SCAN,
470 TE_P2P_DEVICE_FULL_SCAN,
471
472 /* P2P Client Events */
473 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
474 TE_P2P_CLIENT_ASSOC,
475 TE_P2P_CLIENT_QUIET_PERIOD,
476
477 /* P2P GO Events */
478 TE_P2P_GO_ASSOC_PROT,
479 TE_P2P_GO_REPETITIVE_NOA,
480 TE_P2P_GO_CT_WINDOW,
481
482 /* WiDi Sync Events */
483 TE_WIDI_TX_SYNC,
484
485 TE_MAX
486}; /* MAC_EVENT_TYPE_API_E_VER_1 */
487
488/* Time Event dependencies: none, on another TE, or in a specific time */
489enum {
490 TE_INDEPENDENT = 0,
491 TE_DEP_OTHER = 1,
492 TE_DEP_TSF = 2,
493 TE_EVENT_SOCIOPATHIC = 4,
494}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
Ilan Peer1da80e82013-03-19 16:28:56 +0200495/*
496 * Supported Time event notifications configuration.
497 * A notification (both event and fragment) includes a status indicating weather
498 * the FW was able to schedule the event or not. For fragment start/end
499 * notification the status is always success. There is no start/end fragment
500 * notification for monolithic events.
501 *
502 * @TE_NOTIF_NONE: no notifications
503 * @TE_NOTIF_HOST_EVENT_START: request/receive notification on event start
504 * @TE_NOTIF_HOST_EVENT_END:request/receive notification on event end
505 * @TE_NOTIF_INTERNAL_EVENT_START: internal FW use
506 * @TE_NOTIF_INTERNAL_EVENT_END: internal FW use.
507 * @TE_NOTIF_HOST_FRAG_START: request/receive notification on frag start
508 * @TE_NOTIF_HOST_FRAG_END:request/receive notification on frag end
509 * @TE_NOTIF_INTERNAL_FRAG_START: internal FW use.
510 * @TE_NOTIF_INTERNAL_FRAG_END: internal FW use.
511 */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100512enum {
513 TE_NOTIF_NONE = 0,
Ilan Peer1da80e82013-03-19 16:28:56 +0200514 TE_NOTIF_HOST_EVENT_START = 0x1,
515 TE_NOTIF_HOST_EVENT_END = 0x2,
516 TE_NOTIF_INTERNAL_EVENT_START = 0x4,
517 TE_NOTIF_INTERNAL_EVENT_END = 0x8,
518 TE_NOTIF_HOST_FRAG_START = 0x10,
519 TE_NOTIF_HOST_FRAG_END = 0x20,
520 TE_NOTIF_INTERNAL_FRAG_START = 0x40,
521 TE_NOTIF_INTERNAL_FRAG_END = 0x80
522}; /* MAC_EVENT_ACTION_API_E_VER_2 */
Johannes Berg8ca151b2013-01-24 14:25:36 +0100523
524/*
525 * @TE_FRAG_NONE: fragmentation of the time event is NOT allowed.
526 * @TE_FRAG_SINGLE: fragmentation of the time event is allowed, but only
527 * the first fragment is scheduled.
528 * @TE_FRAG_DUAL: fragmentation of the time event is allowed, but only
529 * the first 2 fragments are scheduled.
530 * @TE_FRAG_ENDLESS: fragmentation of the time event is allowed, and any number
531 * of fragments are valid.
532 *
533 * Other than the constant defined above, specifying a fragmentation value 'x'
534 * means that the event can be fragmented but only the first 'x' will be
535 * scheduled.
536 */
537enum {
538 TE_FRAG_NONE = 0,
539 TE_FRAG_SINGLE = 1,
540 TE_FRAG_DUAL = 2,
541 TE_FRAG_ENDLESS = 0xffffffff
542};
543
544/* Repeat the time event endlessly (until removed) */
545#define TE_REPEAT_ENDLESS (0xffffffff)
546/* If a Time Event has bounded repetitions, this is the maximal value */
547#define TE_REPEAT_MAX_MSK (0x0fffffff)
548/* If a Time Event can be fragmented, this is the max number of fragments */
549#define TE_FRAG_MAX_MSK (0x0fffffff)
550
551/**
552 * struct iwl_time_event_cmd - configuring Time Events
553 * ( TIME_EVENT_CMD = 0x29 )
554 * @id_and_color: ID and color of the relevant MAC
555 * @action: action to perform, one of FW_CTXT_ACTION_*
556 * @id: this field has two meanings, depending on the action:
557 * If the action is ADD, then it means the type of event to add.
558 * For all other actions it is the unique event ID assigned when the
559 * event was added by the FW.
560 * @apply_time: When to start the Time Event (in GP2)
561 * @max_delay: maximum delay to event's start (apply time), in TU
562 * @depends_on: the unique ID of the event we depend on (if any)
563 * @interval: interval between repetitions, in TU
564 * @interval_reciprocal: 2^32 / interval
565 * @duration: duration of event in TU
566 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
567 * @dep_policy: one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
568 * @is_present: 0 or 1, are we present or absent during the Time Event
569 * @max_frags: maximal number of fragments the Time Event can be divided to
570 * @notify: notifications using TE_NOTIF_* (whom to notify when)
571 */
572struct iwl_time_event_cmd {
573 /* COMMON_INDEX_HDR_API_S_VER_1 */
574 __le32 id_and_color;
575 __le32 action;
576 __le32 id;
577 /* MAC_TIME_EVENT_DATA_API_S_VER_1 */
578 __le32 apply_time;
579 __le32 max_delay;
580 __le32 dep_policy;
581 __le32 depends_on;
582 __le32 is_present;
583 __le32 max_frags;
584 __le32 interval;
585 __le32 interval_reciprocal;
586 __le32 duration;
587 __le32 repeat;
588 __le32 notify;
589} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_1 */
590
591/**
592 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
593 * @status: bit 0 indicates success, all others specify errors
594 * @id: the Time Event type
595 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
596 * @id_and_color: ID and color of the relevant MAC
597 */
598struct iwl_time_event_resp {
599 __le32 status;
600 __le32 id;
601 __le32 unique_id;
602 __le32 id_and_color;
603} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
604
605/**
606 * struct iwl_time_event_notif - notifications of time event start/stop
607 * ( TIME_EVENT_NOTIFICATION = 0x2a )
608 * @timestamp: action timestamp in GP2
609 * @session_id: session's unique id
610 * @unique_id: unique id of the Time Event itself
611 * @id_and_color: ID and color of the relevant MAC
612 * @action: one of TE_NOTIF_START or TE_NOTIF_END
613 * @status: true if scheduled, false otherwise (not executed)
614 */
615struct iwl_time_event_notif {
616 __le32 timestamp;
617 __le32 session_id;
618 __le32 unique_id;
619 __le32 id_and_color;
620 __le32 action;
621 __le32 status;
622} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
623
624
625/* Bindings and Time Quota */
626
627/**
628 * struct iwl_binding_cmd - configuring bindings
629 * ( BINDING_CONTEXT_CMD = 0x2b )
630 * @id_and_color: ID and color of the relevant Binding
631 * @action: action to perform, one of FW_CTXT_ACTION_*
632 * @macs: array of MAC id and colors which belong to the binding
633 * @phy: PHY id and color which belongs to the binding
634 */
635struct iwl_binding_cmd {
636 /* COMMON_INDEX_HDR_API_S_VER_1 */
637 __le32 id_and_color;
638 __le32 action;
639 /* BINDING_DATA_API_S_VER_1 */
640 __le32 macs[MAX_MACS_IN_BINDING];
641 __le32 phy;
642} __packed; /* BINDING_CMD_API_S_VER_1 */
643
Ilan Peer35adfd62013-02-04 13:16:24 +0200644/* The maximal number of fragments in the FW's schedule session */
645#define IWL_MVM_MAX_QUOTA 128
646
Johannes Berg8ca151b2013-01-24 14:25:36 +0100647/**
648 * struct iwl_time_quota_data - configuration of time quota per binding
649 * @id_and_color: ID and color of the relevant Binding
650 * @quota: absolute time quota in TU. The scheduler will try to divide the
651 * remainig quota (after Time Events) according to this quota.
652 * @max_duration: max uninterrupted context duration in TU
653 */
654struct iwl_time_quota_data {
655 __le32 id_and_color;
656 __le32 quota;
657 __le32 max_duration;
658} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
659
660/**
661 * struct iwl_time_quota_cmd - configuration of time quota between bindings
662 * ( TIME_QUOTA_CMD = 0x2c )
663 * @quotas: allocations per binding
664 */
665struct iwl_time_quota_cmd {
666 struct iwl_time_quota_data quotas[MAX_BINDINGS];
667} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
668
669
670/* PHY context */
671
672/* Supported bands */
673#define PHY_BAND_5 (0)
674#define PHY_BAND_24 (1)
675
676/* Supported channel width, vary if there is VHT support */
677#define PHY_VHT_CHANNEL_MODE20 (0x0)
678#define PHY_VHT_CHANNEL_MODE40 (0x1)
679#define PHY_VHT_CHANNEL_MODE80 (0x2)
680#define PHY_VHT_CHANNEL_MODE160 (0x3)
681
682/*
683 * Control channel position:
684 * For legacy set bit means upper channel, otherwise lower.
685 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
686 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
687 * center_freq
688 * |
689 * 40Mhz |_______|_______|
690 * 80Mhz |_______|_______|_______|_______|
691 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
692 * code 011 010 001 000 | 100 101 110 111
693 */
694#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
695#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
696#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
697#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
698#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
699#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
700#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
701#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
702
703/*
704 * @band: PHY_BAND_*
705 * @channel: channel number
706 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
707 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
708 */
709struct iwl_fw_channel_info {
710 u8 band;
711 u8 channel;
712 u8 width;
713 u8 ctrl_pos;
714} __packed;
715
716#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
717#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
718 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
719#define PHY_RX_CHAIN_VALID_POS (1)
720#define PHY_RX_CHAIN_VALID_MSK \
721 (0x7 << PHY_RX_CHAIN_VALID_POS)
722#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
723#define PHY_RX_CHAIN_FORCE_SEL_MSK \
724 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
725#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
726#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
727 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
728#define PHY_RX_CHAIN_CNT_POS (10)
729#define PHY_RX_CHAIN_CNT_MSK \
730 (0x3 << PHY_RX_CHAIN_CNT_POS)
731#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
732#define PHY_RX_CHAIN_MIMO_CNT_MSK \
733 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
734#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
735#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
736 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
737
738/* TODO: fix the value, make it depend on firmware at runtime? */
739#define NUM_PHY_CTX 3
740
741/* TODO: complete missing documentation */
742/**
743 * struct iwl_phy_context_cmd - config of the PHY context
744 * ( PHY_CONTEXT_CMD = 0x8 )
745 * @id_and_color: ID and color of the relevant Binding
746 * @action: action to perform, one of FW_CTXT_ACTION_*
747 * @apply_time: 0 means immediate apply and context switch.
748 * other value means apply new params after X usecs
749 * @tx_param_color: ???
750 * @channel_info:
751 * @txchain_info: ???
752 * @rxchain_info: ???
753 * @acquisition_data: ???
754 * @dsp_cfg_flags: set to 0
755 */
756struct iwl_phy_context_cmd {
757 /* COMMON_INDEX_HDR_API_S_VER_1 */
758 __le32 id_and_color;
759 __le32 action;
760 /* PHY_CONTEXT_DATA_API_S_VER_1 */
761 __le32 apply_time;
762 __le32 tx_param_color;
763 struct iwl_fw_channel_info ci;
764 __le32 txchain_info;
765 __le32 rxchain_info;
766 __le32 acquisition_data;
767 __le32 dsp_cfg_flags;
768} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
769
770#define IWL_RX_INFO_PHY_CNT 8
771#define IWL_RX_INFO_AGC_IDX 1
772#define IWL_RX_INFO_RSSI_AB_IDX 2
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200773#define IWL_OFDM_AGC_A_MSK 0x0000007f
774#define IWL_OFDM_AGC_A_POS 0
775#define IWL_OFDM_AGC_B_MSK 0x00003f80
776#define IWL_OFDM_AGC_B_POS 7
777#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
778#define IWL_OFDM_AGC_CODE_POS 20
Johannes Berg8ca151b2013-01-24 14:25:36 +0100779#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
Johannes Berg8ca151b2013-01-24 14:25:36 +0100780#define IWL_OFDM_RSSI_A_POS 0
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200781#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
782#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
Johannes Berg8ca151b2013-01-24 14:25:36 +0100783#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
Johannes Berg8ca151b2013-01-24 14:25:36 +0100784#define IWL_OFDM_RSSI_B_POS 16
Emmanuel Grumbach8101a7f2013-02-28 11:54:28 +0200785#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
786#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
Johannes Berg8ca151b2013-01-24 14:25:36 +0100787
788/**
789 * struct iwl_rx_phy_info - phy info
790 * (REPLY_RX_PHY_CMD = 0xc0)
791 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
792 * @cfg_phy_cnt: configurable DSP phy data byte count
793 * @stat_id: configurable DSP phy data set ID
794 * @reserved1:
795 * @system_timestamp: GP2 at on air rise
796 * @timestamp: TSF at on air rise
797 * @beacon_time_stamp: beacon at on-air rise
798 * @phy_flags: general phy flags: band, modulation, ...
799 * @channel: channel number
800 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
801 * @rate_n_flags: RATE_MCS_*
802 * @byte_count: frame's byte-count
803 * @frame_time: frame's time on the air, based on byte count and frame rate
804 * calculation
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +0200805 * @mac_active_msk: what MACs were active when the frame was received
Johannes Berg8ca151b2013-01-24 14:25:36 +0100806 *
807 * Before each Rx, the device sends this data. It contains PHY information
808 * about the reception of the packet.
809 */
810struct iwl_rx_phy_info {
811 u8 non_cfg_phy_cnt;
812 u8 cfg_phy_cnt;
813 u8 stat_id;
814 u8 reserved1;
815 __le32 system_timestamp;
816 __le64 timestamp;
817 __le32 beacon_time_stamp;
818 __le16 phy_flags;
819 __le16 channel;
820 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
821 __le32 rate_n_flags;
822 __le32 byte_count;
Emmanuel Grumbach6bfcb7e2013-03-03 10:19:45 +0200823 __le16 mac_active_msk;
Johannes Berg8ca151b2013-01-24 14:25:36 +0100824 __le16 frame_time;
825} __packed;
826
827struct iwl_rx_mpdu_res_start {
828 __le16 byte_count;
829 __le16 reserved;
830} __packed;
831
832/**
833 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
834 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
835 * @RX_RES_PHY_FLAGS_MOD_CCK:
836 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
837 * @RX_RES_PHY_FLAGS_NARROW_BAND:
838 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
839 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
840 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
841 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
842 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
843 */
844enum iwl_rx_phy_flags {
845 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
846 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
847 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
848 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
849 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
850 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
851 RX_RES_PHY_FLAGS_AGG = BIT(7),
852 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
853 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
854 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
855};
856
857/**
858 * enum iwl_mvm_rx_status - written by fw for each Rx packet
859 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
860 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
861 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
862 * @RX_MPDU_RES_STATUS_KEY_VALID:
863 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
864 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
865 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
866 * in the driver.
867 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
868 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
869 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
870 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
871 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
872 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
873 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
874 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
875 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
876 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
877 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
878 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
879 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
880 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
881 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
882 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
883 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
884 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
885 * @RX_MPDU_RES_STATUS_RRF_KILL:
886 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
887 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
888 */
889enum iwl_mvm_rx_status {
890 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
891 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
892 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
893 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
894 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
895 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
896 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
897 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
898 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
899 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
900 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
901 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
902 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
903 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
904 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
905 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
906 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
907 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
908 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
909 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
910 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
911 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
912 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
913 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
914 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
915 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
916};
917
918/**
919 * struct iwl_radio_version_notif - information on the radio version
920 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
921 * @radio_flavor:
922 * @radio_step:
923 * @radio_dash:
924 */
925struct iwl_radio_version_notif {
926 __le32 radio_flavor;
927 __le32 radio_step;
928 __le32 radio_dash;
929} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
930
931enum iwl_card_state_flags {
932 CARD_ENABLED = 0x00,
933 HW_CARD_DISABLED = 0x01,
934 SW_CARD_DISABLED = 0x02,
935 CT_KILL_CARD_DISABLED = 0x04,
936 HALT_CARD_DISABLED = 0x08,
937 CARD_DISABLED_MSK = 0x0f,
938 CARD_IS_RX_ON = 0x10,
939};
940
941/**
942 * struct iwl_radio_version_notif - information on the radio version
943 * ( CARD_STATE_NOTIFICATION = 0xa1 )
944 * @flags: %iwl_card_state_flags
945 */
946struct iwl_card_state_notif {
947 __le32 flags;
948} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
949
950/**
Hila Gonend64048e2013-03-13 18:00:03 +0200951 * struct iwl_missed_beacons_notif - information on missed beacons
952 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
953 * @mac_id: interface ID
954 * @consec_missed_beacons_since_last_rx: number of consecutive missed
955 * beacons since last RX.
956 * @consec_missed_beacons: number of consecutive missed beacons
957 * @num_expected_beacons:
958 * @num_recvd_beacons:
959 */
960struct iwl_missed_beacons_notif {
961 __le32 mac_id;
962 __le32 consec_missed_beacons_since_last_rx;
963 __le32 consec_missed_beacons;
964 __le32 num_expected_beacons;
965 __le32 num_recvd_beacons;
966} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
967
968/**
Johannes Berg8ca151b2013-01-24 14:25:36 +0100969 * struct iwl_set_calib_default_cmd - set default value for calibration.
970 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
971 * @calib_index: the calibration to set value for
972 * @length: of data
973 * @data: the value to set for the calibration result
974 */
975struct iwl_set_calib_default_cmd {
976 __le16 calib_index;
977 __le16 length;
978 u8 data[0];
979} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
980
Emmanuel Grumbach51b6b9e2013-05-02 15:01:24 +0300981#define MAX_PORT_ID_NUM 2
982
983/**
984 * struct iwl_mcast_filter_cmd - configure multicast filter.
985 * @filter_own: Set 1 to filter out multicast packets sent by station itself
986 * @port_id: Multicast MAC addresses array specifier. This is a strange way
987 * to identify network interface adopted in host-device IF.
988 * It is used by FW as index in array of addresses. This array has
989 * MAX_PORT_ID_NUM members.
990 * @count: Number of MAC addresses in the array
991 * @pass_all: Set 1 to pass all multicast packets.
992 * @bssid: current association BSSID.
993 * @addr_list: Place holder for array of MAC addresses.
994 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
995 */
996struct iwl_mcast_filter_cmd {
997 u8 filter_own;
998 u8 port_id;
999 u8 count;
1000 u8 pass_all;
1001 u8 bssid[6];
1002 u8 reserved[2];
1003 u8 addr_list[0];
1004} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1005
Eytan Lifshitz9ee718a2013-05-19 19:14:41 +03001006struct mvm_statistics_dbg {
1007 __le32 burst_check;
1008 __le32 burst_count;
1009 __le32 wait_for_silence_timeout_cnt;
1010 __le32 reserved[3];
1011} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1012
1013struct mvm_statistics_div {
1014 __le32 tx_on_a;
1015 __le32 tx_on_b;
1016 __le32 exec_time;
1017 __le32 probe_time;
1018 __le32 rssi_ant;
1019 __le32 reserved2;
1020} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1021
1022struct mvm_statistics_general_common {
1023 __le32 temperature; /* radio temperature */
1024 __le32 temperature_m; /* radio voltage */
1025 struct mvm_statistics_dbg dbg;
1026 __le32 sleep_time;
1027 __le32 slots_out;
1028 __le32 slots_idle;
1029 __le32 ttl_timestamp;
1030 struct mvm_statistics_div div;
1031 __le32 rx_enable_counter;
1032 /*
1033 * num_of_sos_states:
1034 * count the number of times we have to re-tune
1035 * in order to get out of bad PHY status
1036 */
1037 __le32 num_of_sos_states;
1038} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1039
1040struct mvm_statistics_rx_non_phy {
1041 __le32 bogus_cts; /* CTS received when not expecting CTS */
1042 __le32 bogus_ack; /* ACK received when not expecting ACK */
1043 __le32 non_bssid_frames; /* number of frames with BSSID that
1044 * doesn't belong to the STA BSSID */
1045 __le32 filtered_frames; /* count frames that were dumped in the
1046 * filtering process */
1047 __le32 non_channel_beacons; /* beacons with our bss id but not on
1048 * our serving channel */
1049 __le32 channel_beacons; /* beacons with our bss id and in our
1050 * serving channel */
1051 __le32 num_missed_bcon; /* number of missed beacons */
1052 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1053 * ADC was in saturation */
1054 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1055 * for INA */
1056 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1057 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1058 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1059 __le32 interference_data_flag; /* flag for interference data
1060 * availability. 1 when data is
1061 * available. */
1062 __le32 channel_load; /* counts RX Enable time in uSec */
1063 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1064 * and CCK) counter */
1065 __le32 beacon_rssi_a;
1066 __le32 beacon_rssi_b;
1067 __le32 beacon_rssi_c;
1068 __le32 beacon_energy_a;
1069 __le32 beacon_energy_b;
1070 __le32 beacon_energy_c;
1071 __le32 num_bt_kills;
1072 __le32 mac_id;
1073 __le32 directed_data_mpdu;
1074} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1075
1076struct mvm_statistics_rx_phy {
1077 __le32 ina_cnt;
1078 __le32 fina_cnt;
1079 __le32 plcp_err;
1080 __le32 crc32_err;
1081 __le32 overrun_err;
1082 __le32 early_overrun_err;
1083 __le32 crc32_good;
1084 __le32 false_alarm_cnt;
1085 __le32 fina_sync_err_cnt;
1086 __le32 sfd_timeout;
1087 __le32 fina_timeout;
1088 __le32 unresponded_rts;
1089 __le32 rxe_frame_limit_overrun;
1090 __le32 sent_ack_cnt;
1091 __le32 sent_cts_cnt;
1092 __le32 sent_ba_rsp_cnt;
1093 __le32 dsp_self_kill;
1094 __le32 mh_format_err;
1095 __le32 re_acq_main_rssi_sum;
1096 __le32 reserved;
1097} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1098
1099struct mvm_statistics_rx_ht_phy {
1100 __le32 plcp_err;
1101 __le32 overrun_err;
1102 __le32 early_overrun_err;
1103 __le32 crc32_good;
1104 __le32 crc32_err;
1105 __le32 mh_format_err;
1106 __le32 agg_crc32_good;
1107 __le32 agg_mpdu_cnt;
1108 __le32 agg_cnt;
1109 __le32 unsupport_mcs;
1110} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1111
1112#define MAX_CHAINS 3
1113
1114struct mvm_statistics_tx_non_phy_agg {
1115 __le32 ba_timeout;
1116 __le32 ba_reschedule_frames;
1117 __le32 scd_query_agg_frame_cnt;
1118 __le32 scd_query_no_agg;
1119 __le32 scd_query_agg;
1120 __le32 scd_query_mismatch;
1121 __le32 frame_not_ready;
1122 __le32 underrun;
1123 __le32 bt_prio_kill;
1124 __le32 rx_ba_rsp_cnt;
1125 __s8 txpower[MAX_CHAINS];
1126 __s8 reserved;
1127 __le32 reserved2;
1128} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1129
1130struct mvm_statistics_tx_channel_width {
1131 __le32 ext_cca_narrow_ch20[1];
1132 __le32 ext_cca_narrow_ch40[2];
1133 __le32 ext_cca_narrow_ch80[3];
1134 __le32 ext_cca_narrow_ch160[4];
1135 __le32 last_tx_ch_width_indx;
1136 __le32 rx_detected_per_ch_width[4];
1137 __le32 success_per_ch_width[4];
1138 __le32 fail_per_ch_width[4];
1139}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1140
1141struct mvm_statistics_tx {
1142 __le32 preamble_cnt;
1143 __le32 rx_detected_cnt;
1144 __le32 bt_prio_defer_cnt;
1145 __le32 bt_prio_kill_cnt;
1146 __le32 few_bytes_cnt;
1147 __le32 cts_timeout;
1148 __le32 ack_timeout;
1149 __le32 expected_ack_cnt;
1150 __le32 actual_ack_cnt;
1151 __le32 dump_msdu_cnt;
1152 __le32 burst_abort_next_frame_mismatch_cnt;
1153 __le32 burst_abort_missing_next_frame_cnt;
1154 __le32 cts_timeout_collision;
1155 __le32 ack_or_ba_timeout_collision;
1156 struct mvm_statistics_tx_non_phy_agg agg;
1157 struct mvm_statistics_tx_channel_width channel_width;
1158} __packed; /* STATISTICS_TX_API_S_VER_4 */
1159
1160
1161struct mvm_statistics_bt_activity {
1162 __le32 hi_priority_tx_req_cnt;
1163 __le32 hi_priority_tx_denied_cnt;
1164 __le32 lo_priority_tx_req_cnt;
1165 __le32 lo_priority_tx_denied_cnt;
1166 __le32 hi_priority_rx_req_cnt;
1167 __le32 hi_priority_rx_denied_cnt;
1168 __le32 lo_priority_rx_req_cnt;
1169 __le32 lo_priority_rx_denied_cnt;
1170} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1171
1172struct mvm_statistics_general {
1173 struct mvm_statistics_general_common common;
1174 __le32 beacon_filtered;
1175 __le32 missed_beacons;
1176 __s8 beacon_filter_everage_energy;
1177 __s8 beacon_filter_reason;
1178 __s8 beacon_filter_current_energy;
1179 __s8 beacon_filter_reserved;
1180 __le32 beacon_filter_delta_time;
1181 struct mvm_statistics_bt_activity bt_activity;
1182} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1183
1184struct mvm_statistics_rx {
1185 struct mvm_statistics_rx_phy ofdm;
1186 struct mvm_statistics_rx_phy cck;
1187 struct mvm_statistics_rx_non_phy general;
1188 struct mvm_statistics_rx_ht_phy ofdm_ht;
1189} __packed; /* STATISTICS_RX_API_S_VER_3 */
1190
1191/*
1192 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1193 *
1194 * By default, uCode issues this notification after receiving a beacon
1195 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1196 * REPLY_STATISTICS_CMD 0x9c, above.
1197 *
1198 * Statistics counters continue to increment beacon after beacon, but are
1199 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1200 * 0x9c with CLEAR_STATS bit set (see above).
1201 *
1202 * uCode also issues this notification during scans. uCode clears statistics
1203 * appropriately so that each notification contains statistics for only the
1204 * one channel that has just been scanned.
1205 */
1206
1207struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */
1208 __le32 flag;
1209 struct mvm_statistics_rx rx;
1210 struct mvm_statistics_tx tx;
1211 struct mvm_statistics_general general;
1212} __packed;
1213
Johannes Berg8ca151b2013-01-24 14:25:36 +01001214#endif /* __fw_api_h__ */