Yue Ma | 3eb5562 | 2018-02-22 12:14:00 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef _CNSS_MAIN_H |
| 14 | #define _CNSS_MAIN_H |
| 15 | |
| 16 | #include <linux/esoc_client.h> |
| 17 | #include <linux/etherdevice.h> |
| 18 | #include <linux/msm-bus.h> |
| 19 | #include <linux/pm_qos.h> |
| 20 | #include <net/cnss2.h> |
| 21 | #include <soc/qcom/memory_dump.h> |
| 22 | #include <soc/qcom/subsystem_restart.h> |
| 23 | |
| 24 | #include "qmi.h" |
| 25 | |
| 26 | #define MAX_NO_OF_MAC_ADDR 4 |
| 27 | |
| 28 | #define CNSS_EVENT_SYNC BIT(0) |
| 29 | #define CNSS_EVENT_UNINTERRUPTIBLE BIT(1) |
| 30 | #define CNSS_EVENT_SYNC_UNINTERRUPTIBLE (CNSS_EVENT_SYNC | \ |
| 31 | CNSS_EVENT_UNINTERRUPTIBLE) |
| 32 | |
| 33 | enum cnss_dev_bus_type { |
| 34 | CNSS_BUS_NONE = -1, |
| 35 | CNSS_BUS_PCI, |
| 36 | }; |
| 37 | |
| 38 | struct cnss_vreg_info { |
| 39 | struct regulator *reg; |
| 40 | const char *name; |
| 41 | u32 min_uv; |
| 42 | u32 max_uv; |
| 43 | u32 load_ua; |
| 44 | u32 delay_us; |
| 45 | }; |
| 46 | |
| 47 | struct cnss_pinctrl_info { |
| 48 | struct pinctrl *pinctrl; |
| 49 | struct pinctrl_state *bootstrap_active; |
| 50 | struct pinctrl_state *wlan_en_active; |
| 51 | struct pinctrl_state *wlan_en_sleep; |
| 52 | }; |
| 53 | |
| 54 | struct cnss_subsys_info { |
| 55 | struct subsys_device *subsys_device; |
| 56 | struct subsys_desc subsys_desc; |
| 57 | void *subsys_handle; |
| 58 | }; |
| 59 | |
| 60 | struct cnss_ramdump_info { |
| 61 | struct ramdump_device *ramdump_dev; |
| 62 | unsigned long ramdump_size; |
| 63 | void *ramdump_va; |
| 64 | phys_addr_t ramdump_pa; |
| 65 | struct msm_dump_data dump_data; |
| 66 | }; |
| 67 | |
| 68 | struct cnss_dump_seg { |
| 69 | unsigned long address; |
| 70 | void *v_address; |
| 71 | unsigned long size; |
| 72 | u32 type; |
| 73 | }; |
| 74 | |
| 75 | struct cnss_dump_data { |
| 76 | u32 version; |
| 77 | u32 magic; |
| 78 | char name[32]; |
| 79 | phys_addr_t paddr; |
| 80 | int nentries; |
| 81 | u32 seg_version; |
| 82 | }; |
| 83 | |
| 84 | struct cnss_ramdump_info_v2 { |
| 85 | struct ramdump_device *ramdump_dev; |
| 86 | unsigned long ramdump_size; |
| 87 | void *dump_data_vaddr; |
| 88 | bool dump_data_valid; |
| 89 | struct cnss_dump_data dump_data; |
| 90 | }; |
| 91 | |
| 92 | struct cnss_esoc_info { |
| 93 | struct esoc_desc *esoc_desc; |
| 94 | bool notify_modem_status; |
| 95 | void *modem_notify_handler; |
| 96 | int modem_current_status; |
| 97 | }; |
| 98 | |
| 99 | struct cnss_bus_bw_info { |
| 100 | struct msm_bus_scale_pdata *bus_scale_table; |
| 101 | u32 bus_client; |
| 102 | int current_bw_vote; |
| 103 | }; |
| 104 | |
| 105 | struct cnss_fw_mem { |
| 106 | size_t size; |
| 107 | void *va; |
| 108 | phys_addr_t pa; |
| 109 | bool valid; |
Yue Ma | a3e1503 | 2018-02-15 15:56:12 -0800 | [diff] [blame] | 110 | u32 type; |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 111 | }; |
| 112 | |
Yue Ma | 3eb5562 | 2018-02-22 12:14:00 -0800 | [diff] [blame] | 113 | enum cnss_fw_dump_type { |
| 114 | CNSS_FW_IMAGE, |
| 115 | CNSS_FW_RDDM, |
| 116 | CNSS_FW_REMOTE_HEAP, |
| 117 | }; |
| 118 | |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 119 | enum cnss_driver_event_type { |
| 120 | CNSS_DRIVER_EVENT_SERVER_ARRIVE, |
| 121 | CNSS_DRIVER_EVENT_SERVER_EXIT, |
| 122 | CNSS_DRIVER_EVENT_REQUEST_MEM, |
| 123 | CNSS_DRIVER_EVENT_FW_MEM_READY, |
| 124 | CNSS_DRIVER_EVENT_FW_READY, |
| 125 | CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START, |
| 126 | CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE, |
| 127 | CNSS_DRIVER_EVENT_REGISTER_DRIVER, |
| 128 | CNSS_DRIVER_EVENT_UNREGISTER_DRIVER, |
| 129 | CNSS_DRIVER_EVENT_RECOVERY, |
| 130 | CNSS_DRIVER_EVENT_FORCE_FW_ASSERT, |
| 131 | CNSS_DRIVER_EVENT_POWER_UP, |
| 132 | CNSS_DRIVER_EVENT_POWER_DOWN, |
| 133 | CNSS_DRIVER_EVENT_MAX, |
| 134 | }; |
| 135 | |
| 136 | enum cnss_driver_state { |
| 137 | CNSS_QMI_WLFW_CONNECTED, |
| 138 | CNSS_FW_MEM_READY, |
| 139 | CNSS_FW_READY, |
| 140 | CNSS_COLD_BOOT_CAL, |
| 141 | CNSS_DRIVER_LOADING, |
| 142 | CNSS_DRIVER_UNLOADING, |
| 143 | CNSS_DRIVER_PROBED, |
| 144 | CNSS_DRIVER_RECOVERY, |
| 145 | CNSS_FW_BOOT_RECOVERY, |
| 146 | CNSS_DEV_ERR_NOTIFY, |
| 147 | CNSS_DRIVER_DEBUG, |
| 148 | }; |
| 149 | |
| 150 | struct cnss_recovery_data { |
| 151 | enum cnss_recovery_reason reason; |
| 152 | }; |
| 153 | |
| 154 | enum cnss_pins { |
| 155 | CNSS_WLAN_EN, |
| 156 | CNSS_PCIE_TXP, |
| 157 | CNSS_PCIE_TXN, |
| 158 | CNSS_PCIE_RXP, |
| 159 | CNSS_PCIE_RXN, |
| 160 | CNSS_PCIE_REFCLKP, |
| 161 | CNSS_PCIE_REFCLKN, |
| 162 | CNSS_PCIE_RST, |
| 163 | CNSS_PCIE_WAKE, |
| 164 | }; |
| 165 | |
| 166 | struct cnss_pin_connect_result { |
| 167 | u32 fw_pwr_pin_result; |
| 168 | u32 fw_phy_io_pin_result; |
| 169 | u32 fw_rf_pin_result; |
| 170 | u32 host_pin_result; |
| 171 | }; |
| 172 | |
Yue Ma | e83a0eff | 2018-05-04 14:15:54 -0700 | [diff] [blame^] | 173 | enum cnss_debug_quirks { |
| 174 | LINK_DOWN_SELF_RECOVERY, |
| 175 | SKIP_DEVICE_BOOT, |
| 176 | USE_CORE_ONLY_FW, |
| 177 | SKIP_RECOVERY, |
| 178 | }; |
| 179 | |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 180 | struct cnss_plat_data { |
| 181 | struct platform_device *plat_dev; |
| 182 | void *bus_priv; |
Yue Ma | fcf6042 | 2018-05-01 16:59:56 -0700 | [diff] [blame] | 183 | enum cnss_dev_bus_type bus_type; |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 184 | struct cnss_vreg_info *vreg_info; |
| 185 | struct cnss_pinctrl_info pinctrl_info; |
| 186 | struct cnss_subsys_info subsys_info; |
| 187 | struct cnss_ramdump_info ramdump_info; |
| 188 | struct cnss_ramdump_info_v2 ramdump_info_v2; |
| 189 | struct cnss_esoc_info esoc_info; |
| 190 | struct cnss_bus_bw_info bus_bw_info; |
| 191 | struct notifier_block modem_nb; |
| 192 | struct cnss_platform_cap cap; |
| 193 | struct pm_qos_request qos_request; |
| 194 | unsigned long device_id; |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 195 | enum cnss_driver_status driver_status; |
| 196 | u32 recovery_count; |
| 197 | unsigned long driver_state; |
| 198 | struct list_head event_list; |
| 199 | spinlock_t event_lock; /* spinlock for driver work event handling */ |
| 200 | struct work_struct event_work; |
| 201 | struct workqueue_struct *event_wq; |
| 202 | struct qmi_handle *qmi_wlfw_clnt; |
| 203 | struct work_struct qmi_recv_msg_work; |
| 204 | struct notifier_block qmi_wlfw_clnt_nb; |
| 205 | struct wlfw_rf_chip_info_s_v01 chip_info; |
| 206 | struct wlfw_rf_board_info_s_v01 board_info; |
| 207 | struct wlfw_soc_info_s_v01 soc_info; |
| 208 | struct wlfw_fw_version_info_s_v01 fw_version_info; |
Yue Ma | a3e1503 | 2018-02-15 15:56:12 -0800 | [diff] [blame] | 209 | u32 fw_mem_seg_len; |
| 210 | struct cnss_fw_mem fw_mem[QMI_WLFW_MAX_NUM_MEM_SEG_V01]; |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 211 | struct cnss_fw_mem m3_mem; |
| 212 | struct cnss_pin_connect_result pin_result; |
| 213 | struct dentry *root_dentry; |
| 214 | atomic_t pm_count; |
| 215 | struct timer_list fw_boot_timer; |
| 216 | struct completion power_up_complete; |
| 217 | struct mutex dev_lock; /* mutex for register access through debugfs */ |
| 218 | u32 diag_reg_read_addr; |
| 219 | u32 diag_reg_read_mem_type; |
| 220 | u32 diag_reg_read_len; |
| 221 | u8 *diag_reg_read_buf; |
Yue Ma | a3e1503 | 2018-02-15 15:56:12 -0800 | [diff] [blame] | 222 | bool cal_done; |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 223 | }; |
| 224 | |
Yue Ma | e83a0eff | 2018-05-04 14:15:54 -0700 | [diff] [blame^] | 225 | struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev); |
| 226 | bool *cnss_get_qmi_bypass(void); |
| 227 | unsigned long *cnss_get_debug_quirks(void); |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 228 | int cnss_driver_event_post(struct cnss_plat_data *plat_priv, |
| 229 | enum cnss_driver_event_type type, |
| 230 | u32 flags, void *data); |
| 231 | int cnss_get_vreg(struct cnss_plat_data *plat_priv); |
| 232 | int cnss_get_pinctrl(struct cnss_plat_data *plat_priv); |
| 233 | int cnss_power_on_device(struct cnss_plat_data *plat_priv); |
| 234 | void cnss_power_off_device(struct cnss_plat_data *plat_priv); |
| 235 | int cnss_register_subsys(struct cnss_plat_data *plat_priv); |
| 236 | void cnss_unregister_subsys(struct cnss_plat_data *plat_priv); |
| 237 | int cnss_register_ramdump(struct cnss_plat_data *plat_priv); |
| 238 | void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv); |
| 239 | void cnss_set_pin_connect_status(struct cnss_plat_data *plat_priv); |
Yue Ma | 0317e4a | 2018-01-10 11:48:32 -0800 | [diff] [blame] | 240 | |
| 241 | #endif /* _CNSS_MAIN_H */ |