Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1 | /* |
| 2 | * SuperTrak EX Series Storage Controller driver for Linux |
| 3 | * |
| 4 | * Copyright (C) 2005, 2006 Promise Technology Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * Written By: |
| 12 | * Ed Lin <promise_linux@promise.com> |
| 13 | * |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/errno.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/delay.h> |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 20 | #include <linux/time.h> |
| 21 | #include <linux/pci.h> |
| 22 | #include <linux/blkdev.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/types.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/spinlock.h> |
| 27 | #include <asm/io.h> |
| 28 | #include <asm/irq.h> |
| 29 | #include <asm/byteorder.h> |
| 30 | #include <scsi/scsi.h> |
| 31 | #include <scsi/scsi_device.h> |
| 32 | #include <scsi/scsi_cmnd.h> |
| 33 | #include <scsi/scsi_host.h> |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 34 | #include <scsi/scsi_tcq.h> |
Ed Lin | c25da0a | 2007-05-09 20:50:42 -0800 | [diff] [blame] | 35 | #include <scsi/scsi_dbg.h> |
FUJITA Tomonori | 11002fb | 2008-03-25 09:26:52 +0900 | [diff] [blame] | 36 | #include <scsi/scsi_eh.h> |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 37 | |
| 38 | #define DRV_NAME "stex" |
Ed Lin | c25da0a | 2007-05-09 20:50:42 -0800 | [diff] [blame] | 39 | #define ST_DRIVER_VERSION "3.6.0000.1" |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 40 | #define ST_VER_MAJOR 3 |
Ed Lin | c25da0a | 2007-05-09 20:50:42 -0800 | [diff] [blame] | 41 | #define ST_VER_MINOR 6 |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 42 | #define ST_OEM 0 |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 43 | #define ST_BUILD_VER 1 |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 44 | |
| 45 | enum { |
| 46 | /* MU register offset */ |
| 47 | IMR0 = 0x10, /* MU_INBOUND_MESSAGE_REG0 */ |
| 48 | IMR1 = 0x14, /* MU_INBOUND_MESSAGE_REG1 */ |
| 49 | OMR0 = 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */ |
| 50 | OMR1 = 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */ |
| 51 | IDBL = 0x20, /* MU_INBOUND_DOORBELL */ |
| 52 | IIS = 0x24, /* MU_INBOUND_INTERRUPT_STATUS */ |
| 53 | IIM = 0x28, /* MU_INBOUND_INTERRUPT_MASK */ |
| 54 | ODBL = 0x2c, /* MU_OUTBOUND_DOORBELL */ |
| 55 | OIS = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */ |
| 56 | OIM = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */ |
| 57 | |
| 58 | /* MU register value */ |
| 59 | MU_INBOUND_DOORBELL_HANDSHAKE = 1, |
| 60 | MU_INBOUND_DOORBELL_REQHEADCHANGED = 2, |
| 61 | MU_INBOUND_DOORBELL_STATUSTAILCHANGED = 4, |
| 62 | MU_INBOUND_DOORBELL_HMUSTOPPED = 8, |
| 63 | MU_INBOUND_DOORBELL_RESET = 16, |
| 64 | |
| 65 | MU_OUTBOUND_DOORBELL_HANDSHAKE = 1, |
| 66 | MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED = 2, |
| 67 | MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED = 4, |
| 68 | MU_OUTBOUND_DOORBELL_BUSCHANGE = 8, |
| 69 | MU_OUTBOUND_DOORBELL_HASEVENT = 16, |
| 70 | |
| 71 | /* MU status code */ |
| 72 | MU_STATE_STARTING = 1, |
| 73 | MU_STATE_FMU_READY_FOR_HANDSHAKE = 2, |
| 74 | MU_STATE_SEND_HANDSHAKE_FRAME = 3, |
| 75 | MU_STATE_STARTED = 4, |
| 76 | MU_STATE_RESETTING = 5, |
| 77 | |
Ed Lin | 76fbf96f | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 78 | MU_MAX_DELAY = 120, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 79 | MU_HANDSHAKE_SIGNATURE = 0x55aaaa55, |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 80 | MU_HANDSHAKE_SIGNATURE_HALF = 0x5a5a0000, |
Ed Lin | 76fbf96f | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 81 | MU_HARD_RESET_WAIT = 30000, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 82 | HMU_PARTNER_TYPE = 2, |
| 83 | |
| 84 | /* firmware returned values */ |
| 85 | SRB_STATUS_SUCCESS = 0x01, |
| 86 | SRB_STATUS_ERROR = 0x04, |
| 87 | SRB_STATUS_BUSY = 0x05, |
| 88 | SRB_STATUS_INVALID_REQUEST = 0x06, |
| 89 | SRB_STATUS_SELECTION_TIMEOUT = 0x0A, |
| 90 | SRB_SEE_SENSE = 0x80, |
| 91 | |
| 92 | /* task attribute */ |
| 93 | TASK_ATTRIBUTE_SIMPLE = 0x0, |
| 94 | TASK_ATTRIBUTE_HEADOFQUEUE = 0x1, |
| 95 | TASK_ATTRIBUTE_ORDERED = 0x2, |
| 96 | TASK_ATTRIBUTE_ACA = 0x4, |
| 97 | |
| 98 | /* request count, etc. */ |
| 99 | MU_MAX_REQUEST = 32, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 100 | |
| 101 | /* one message wasted, use MU_MAX_REQUEST+1 |
| 102 | to handle MU_MAX_REQUEST messages */ |
| 103 | MU_REQ_COUNT = (MU_MAX_REQUEST + 1), |
| 104 | MU_STATUS_COUNT = (MU_MAX_REQUEST + 1), |
| 105 | |
| 106 | STEX_CDB_LENGTH = MAX_COMMAND_SIZE, |
| 107 | REQ_VARIABLE_LEN = 1024, |
| 108 | STATUS_VAR_LEN = 128, |
| 109 | ST_CAN_QUEUE = MU_MAX_REQUEST, |
| 110 | ST_CMD_PER_LUN = MU_MAX_REQUEST, |
| 111 | ST_MAX_SG = 32, |
| 112 | |
| 113 | /* sg flags */ |
| 114 | SG_CF_EOT = 0x80, /* end of table */ |
| 115 | SG_CF_64B = 0x40, /* 64 bit item */ |
| 116 | SG_CF_HOST = 0x20, /* sg in host memory */ |
| 117 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 118 | st_shasta = 0, |
| 119 | st_vsc = 1, |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 120 | st_vsc1 = 2, |
| 121 | st_yosemite = 3, |
Ed Lin - PTU | 62e5b3d | 2009-01-26 02:40:29 -0800 | [diff] [blame] | 122 | st_seq = 4, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 123 | |
| 124 | PASSTHRU_REQ_TYPE = 0x00000001, |
| 125 | PASSTHRU_REQ_NO_WAKEUP = 0x00000100, |
| 126 | ST_INTERNAL_TIMEOUT = 30, |
| 127 | |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 128 | ST_TO_CMD = 0, |
| 129 | ST_FROM_CMD = 1, |
| 130 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 131 | /* vendor specific commands of Promise */ |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 132 | MGT_CMD = 0xd8, |
| 133 | SINBAND_MGT_CMD = 0xd9, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 134 | ARRAY_CMD = 0xe0, |
| 135 | CONTROLLER_CMD = 0xe1, |
| 136 | DEBUGGING_CMD = 0xe2, |
| 137 | PASSTHRU_CMD = 0xe3, |
| 138 | |
| 139 | PASSTHRU_GET_ADAPTER = 0x05, |
| 140 | PASSTHRU_GET_DRVVER = 0x10, |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 141 | |
| 142 | CTLR_CONFIG_CMD = 0x03, |
| 143 | CTLR_SHUTDOWN = 0x0d, |
| 144 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 145 | CTLR_POWER_STATE_CHANGE = 0x0e, |
| 146 | CTLR_POWER_SAVING = 0x01, |
| 147 | |
| 148 | PASSTHRU_SIGNATURE = 0x4e415041, |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 149 | MGT_CMD_SIGNATURE = 0xba, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 150 | |
| 151 | INQUIRY_EVPD = 0x01, |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 152 | |
| 153 | ST_ADDITIONAL_MEM = 0x200000, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 154 | }; |
| 155 | |
| 156 | struct st_sgitem { |
| 157 | u8 ctrl; /* SG_CF_xxx */ |
| 158 | u8 reserved[3]; |
| 159 | __le32 count; |
| 160 | __le32 addr; |
| 161 | __le32 addr_hi; |
| 162 | }; |
| 163 | |
| 164 | struct st_sgtable { |
| 165 | __le16 sg_count; |
| 166 | __le16 max_sg_count; |
| 167 | __le32 sz_in_byte; |
| 168 | struct st_sgitem table[ST_MAX_SG]; |
| 169 | }; |
| 170 | |
| 171 | struct handshake_frame { |
| 172 | __le32 rb_phy; /* request payload queue physical address */ |
| 173 | __le32 rb_phy_hi; |
| 174 | __le16 req_sz; /* size of each request payload */ |
| 175 | __le16 req_cnt; /* count of reqs the buffer can hold */ |
| 176 | __le16 status_sz; /* size of each status payload */ |
| 177 | __le16 status_cnt; /* count of status the buffer can hold */ |
| 178 | __le32 hosttime; /* seconds from Jan 1, 1970 (GMT) */ |
| 179 | __le32 hosttime_hi; |
| 180 | u8 partner_type; /* who sends this frame */ |
| 181 | u8 reserved0[7]; |
| 182 | __le32 partner_ver_major; |
| 183 | __le32 partner_ver_minor; |
| 184 | __le32 partner_ver_oem; |
| 185 | __le32 partner_ver_build; |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 186 | __le32 extra_offset; /* NEW */ |
| 187 | __le32 extra_size; /* NEW */ |
| 188 | u32 reserved1[2]; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 189 | }; |
| 190 | |
| 191 | struct req_msg { |
| 192 | __le16 tag; |
| 193 | u8 lun; |
| 194 | u8 target; |
| 195 | u8 task_attr; |
| 196 | u8 task_manage; |
| 197 | u8 prd_entry; |
Ed Lin | f903d7b7 | 2006-09-27 19:23:33 +0800 | [diff] [blame] | 198 | u8 payload_sz; /* payload size in 4-byte, not used */ |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 199 | u8 cdb[STEX_CDB_LENGTH]; |
| 200 | u8 variable[REQ_VARIABLE_LEN]; |
| 201 | }; |
| 202 | |
| 203 | struct status_msg { |
| 204 | __le16 tag; |
| 205 | u8 lun; |
| 206 | u8 target; |
| 207 | u8 srb_status; |
| 208 | u8 scsi_status; |
| 209 | u8 reserved; |
| 210 | u8 payload_sz; /* payload size in 4-byte */ |
| 211 | u8 variable[STATUS_VAR_LEN]; |
| 212 | }; |
| 213 | |
| 214 | struct ver_info { |
| 215 | u32 major; |
| 216 | u32 minor; |
| 217 | u32 oem; |
| 218 | u32 build; |
| 219 | u32 reserved[2]; |
| 220 | }; |
| 221 | |
| 222 | struct st_frame { |
| 223 | u32 base[6]; |
| 224 | u32 rom_addr; |
| 225 | |
| 226 | struct ver_info drv_ver; |
| 227 | struct ver_info bios_ver; |
| 228 | |
| 229 | u32 bus; |
| 230 | u32 slot; |
| 231 | u32 irq_level; |
| 232 | u32 irq_vec; |
| 233 | u32 id; |
| 234 | u32 subid; |
| 235 | |
| 236 | u32 dimm_size; |
| 237 | u8 dimm_type; |
| 238 | u8 reserved[3]; |
| 239 | |
| 240 | u32 channel; |
| 241 | u32 reserved1; |
| 242 | }; |
| 243 | |
| 244 | struct st_drvver { |
| 245 | u32 major; |
| 246 | u32 minor; |
| 247 | u32 oem; |
| 248 | u32 build; |
| 249 | u32 signature[2]; |
| 250 | u8 console_id; |
| 251 | u8 host_no; |
| 252 | u8 reserved0[2]; |
| 253 | u32 reserved[3]; |
| 254 | }; |
| 255 | |
| 256 | #define MU_REQ_BUFFER_SIZE (MU_REQ_COUNT * sizeof(struct req_msg)) |
| 257 | #define MU_STATUS_BUFFER_SIZE (MU_STATUS_COUNT * sizeof(struct status_msg)) |
| 258 | #define MU_BUFFER_SIZE (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE) |
Ed Lin - PTU | e8a091b | 2009-01-26 02:40:50 -0800 | [diff] [blame^] | 259 | #define STEX_EXTRA_SIZE sizeof(struct st_frame) |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 260 | #define STEX_BUFFER_SIZE (MU_BUFFER_SIZE + STEX_EXTRA_SIZE) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 261 | |
| 262 | struct st_ccb { |
| 263 | struct req_msg *req; |
| 264 | struct scsi_cmnd *cmd; |
| 265 | |
| 266 | void *sense_buffer; |
| 267 | unsigned int sense_bufflen; |
| 268 | int sg_count; |
| 269 | |
| 270 | u32 req_type; |
| 271 | u8 srb_status; |
| 272 | u8 scsi_status; |
| 273 | }; |
| 274 | |
| 275 | struct st_hba { |
| 276 | void __iomem *mmio_base; /* iomapped PCI memory space */ |
| 277 | void *dma_mem; |
| 278 | dma_addr_t dma_handle; |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 279 | size_t dma_size; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 280 | |
| 281 | struct Scsi_Host *host; |
| 282 | struct pci_dev *pdev; |
| 283 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 284 | u32 req_head; |
| 285 | u32 req_tail; |
| 286 | u32 status_head; |
| 287 | u32 status_tail; |
| 288 | |
| 289 | struct status_msg *status_buffer; |
| 290 | void *copy_buffer; /* temp buffer for driver-handled commands */ |
| 291 | struct st_ccb ccb[MU_MAX_REQUEST]; |
| 292 | struct st_ccb *wait_ccb; |
| 293 | wait_queue_head_t waitq; |
| 294 | |
| 295 | unsigned int mu_status; |
| 296 | int out_req_cnt; |
| 297 | |
| 298 | unsigned int cardtype; |
| 299 | }; |
| 300 | |
| 301 | static const char console_inq_page[] = |
| 302 | { |
| 303 | 0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30, |
| 304 | 0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20, /* "Promise " */ |
| 305 | 0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E, /* "RAID Con" */ |
| 306 | 0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20, /* "sole " */ |
| 307 | 0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20, /* "1.00 " */ |
| 308 | 0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D, /* "SX/RSAF-" */ |
| 309 | 0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20, /* "TE1.00 " */ |
| 310 | 0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20 |
| 311 | }; |
| 312 | |
| 313 | MODULE_AUTHOR("Ed Lin"); |
| 314 | MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers"); |
| 315 | MODULE_LICENSE("GPL"); |
| 316 | MODULE_VERSION(ST_DRIVER_VERSION); |
| 317 | |
| 318 | static void stex_gettime(__le32 *time) |
| 319 | { |
| 320 | struct timeval tv; |
| 321 | do_gettimeofday(&tv); |
| 322 | |
| 323 | *time = cpu_to_le32(tv.tv_sec & 0xffffffff); |
| 324 | *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16); |
| 325 | } |
| 326 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 327 | static struct status_msg *stex_get_status(struct st_hba *hba) |
| 328 | { |
| 329 | struct status_msg *status = |
| 330 | hba->status_buffer + hba->status_tail; |
| 331 | |
| 332 | ++hba->status_tail; |
| 333 | hba->status_tail %= MU_STATUS_COUNT; |
| 334 | |
| 335 | return status; |
| 336 | } |
| 337 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 338 | static void stex_invalid_field(struct scsi_cmnd *cmd, |
| 339 | void (*done)(struct scsi_cmnd *)) |
| 340 | { |
FUJITA Tomonori | 11002fb | 2008-03-25 09:26:52 +0900 | [diff] [blame] | 341 | cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION; |
| 342 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 343 | /* "Invalid field in cbd" */ |
FUJITA Tomonori | 11002fb | 2008-03-25 09:26:52 +0900 | [diff] [blame] | 344 | scsi_build_sense_buffer(0, cmd->sense_buffer, ILLEGAL_REQUEST, 0x24, |
| 345 | 0x0); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 346 | done(cmd); |
| 347 | } |
| 348 | |
| 349 | static struct req_msg *stex_alloc_req(struct st_hba *hba) |
| 350 | { |
| 351 | struct req_msg *req = ((struct req_msg *)hba->dma_mem) + |
| 352 | hba->req_head; |
| 353 | |
| 354 | ++hba->req_head; |
| 355 | hba->req_head %= MU_REQ_COUNT; |
| 356 | |
| 357 | return req; |
| 358 | } |
| 359 | |
| 360 | static int stex_map_sg(struct st_hba *hba, |
| 361 | struct req_msg *req, struct st_ccb *ccb) |
| 362 | { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 363 | struct scsi_cmnd *cmd; |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 364 | struct scatterlist *sg; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 365 | struct st_sgtable *dst; |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 366 | int i, nseg; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 367 | |
| 368 | cmd = ccb->cmd; |
| 369 | dst = (struct st_sgtable *)req->variable; |
| 370 | dst->max_sg_count = cpu_to_le16(ST_MAX_SG); |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 371 | dst->sz_in_byte = cpu_to_le32(scsi_bufflen(cmd)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 372 | |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 373 | nseg = scsi_dma_map(cmd); |
| 374 | if (nseg < 0) |
| 375 | return -EIO; |
| 376 | if (nseg) { |
| 377 | ccb->sg_count = nseg; |
| 378 | dst->sg_count = cpu_to_le16((u16)nseg); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 379 | |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 380 | scsi_for_each_sg(cmd, sg, nseg, i) { |
| 381 | dst->table[i].count = cpu_to_le32((u32)sg_dma_len(sg)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 382 | dst->table[i].addr = |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 383 | cpu_to_le32(sg_dma_address(sg) & 0xffffffff); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 384 | dst->table[i].addr_hi = |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 385 | cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 386 | dst->table[i].ctrl = SG_CF_64B | SG_CF_HOST; |
| 387 | } |
| 388 | dst->table[--i].ctrl |= SG_CF_EOT; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 389 | } |
| 390 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 391 | return 0; |
| 392 | } |
| 393 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 394 | static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb) |
| 395 | { |
| 396 | struct st_frame *p; |
| 397 | size_t count = sizeof(struct st_frame); |
| 398 | |
| 399 | p = hba->copy_buffer; |
FUJITA Tomonori | 31fe47d | 2008-03-09 13:44:35 +0900 | [diff] [blame] | 400 | count = scsi_sg_copy_to_buffer(ccb->cmd, p, count); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 401 | memset(p->base, 0, sizeof(u32)*6); |
| 402 | *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0); |
| 403 | p->rom_addr = 0; |
| 404 | |
| 405 | p->drv_ver.major = ST_VER_MAJOR; |
| 406 | p->drv_ver.minor = ST_VER_MINOR; |
| 407 | p->drv_ver.oem = ST_OEM; |
| 408 | p->drv_ver.build = ST_BUILD_VER; |
| 409 | |
| 410 | p->bus = hba->pdev->bus->number; |
| 411 | p->slot = hba->pdev->devfn; |
| 412 | p->irq_level = 0; |
| 413 | p->irq_vec = hba->pdev->irq; |
| 414 | p->id = hba->pdev->vendor << 16 | hba->pdev->device; |
| 415 | p->subid = |
| 416 | hba->pdev->subsystem_vendor << 16 | hba->pdev->subsystem_device; |
| 417 | |
FUJITA Tomonori | 31fe47d | 2008-03-09 13:44:35 +0900 | [diff] [blame] | 418 | count = scsi_sg_copy_from_buffer(ccb->cmd, p, count); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 419 | } |
| 420 | |
| 421 | static void |
| 422 | stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag) |
| 423 | { |
| 424 | req->tag = cpu_to_le16(tag); |
| 425 | req->task_attr = TASK_ATTRIBUTE_SIMPLE; |
| 426 | req->task_manage = 0; /* not supported yet */ |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 427 | |
| 428 | hba->ccb[tag].req = req; |
| 429 | hba->out_req_cnt++; |
| 430 | |
| 431 | writel(hba->req_head, hba->mmio_base + IMR0); |
| 432 | writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL); |
| 433 | readl(hba->mmio_base + IDBL); /* flush */ |
| 434 | } |
| 435 | |
| 436 | static int |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 437 | stex_slave_alloc(struct scsi_device *sdev) |
| 438 | { |
| 439 | /* Cheat: usually extracted from Inquiry data */ |
| 440 | sdev->tagged_supported = 1; |
| 441 | |
Mike Christie | 5d90027 | 2008-07-11 19:50:34 -0500 | [diff] [blame] | 442 | scsi_activate_tcq(sdev, ST_CMD_PER_LUN); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 443 | |
| 444 | return 0; |
| 445 | } |
| 446 | |
| 447 | static int |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 448 | stex_slave_config(struct scsi_device *sdev) |
| 449 | { |
| 450 | sdev->use_10_for_rw = 1; |
| 451 | sdev->use_10_for_ms = 1; |
James Bottomley | dc5c49b | 2008-11-30 10:38:08 -0600 | [diff] [blame] | 452 | blk_queue_rq_timeout(sdev->request_queue, 60 * HZ); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 453 | sdev->tagged_supported = 1; |
| 454 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 455 | return 0; |
| 456 | } |
| 457 | |
| 458 | static void |
| 459 | stex_slave_destroy(struct scsi_device *sdev) |
| 460 | { |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 461 | scsi_deactivate_tcq(sdev, 1); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 462 | } |
| 463 | |
| 464 | static int |
| 465 | stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *)) |
| 466 | { |
| 467 | struct st_hba *hba; |
| 468 | struct Scsi_Host *host; |
| 469 | unsigned int id,lun; |
| 470 | struct req_msg *req; |
| 471 | u16 tag; |
| 472 | host = cmd->device->host; |
| 473 | id = cmd->device->id; |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 474 | lun = cmd->device->lun; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 475 | hba = (struct st_hba *) &host->hostdata[0]; |
| 476 | |
| 477 | switch (cmd->cmnd[0]) { |
| 478 | case MODE_SENSE_10: |
| 479 | { |
| 480 | static char ms10_caching_page[12] = |
| 481 | { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 }; |
| 482 | unsigned char page; |
| 483 | page = cmd->cmnd[2] & 0x3f; |
| 484 | if (page == 0x8 || page == 0x3f) { |
FUJITA Tomonori | 31fe47d | 2008-03-09 13:44:35 +0900 | [diff] [blame] | 485 | scsi_sg_copy_from_buffer(cmd, ms10_caching_page, |
| 486 | sizeof(ms10_caching_page)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 487 | cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8; |
| 488 | done(cmd); |
| 489 | } else |
| 490 | stex_invalid_field(cmd, done); |
| 491 | return 0; |
| 492 | } |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 493 | case REPORT_LUNS: |
| 494 | /* |
| 495 | * The shasta firmware does not report actual luns in the |
| 496 | * target, so fail the command to force sequential lun scan. |
| 497 | * Also, the console device does not support this command. |
| 498 | */ |
| 499 | if (hba->cardtype == st_shasta || id == host->max_id - 1) { |
| 500 | stex_invalid_field(cmd, done); |
| 501 | return 0; |
| 502 | } |
| 503 | break; |
Ed Lin | d116a7b | 2007-05-09 20:50:40 -0800 | [diff] [blame] | 504 | case TEST_UNIT_READY: |
| 505 | if (id == host->max_id - 1) { |
| 506 | cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8; |
| 507 | done(cmd); |
| 508 | return 0; |
| 509 | } |
| 510 | break; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 511 | case INQUIRY: |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 512 | if (id != host->max_id - 1) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 513 | break; |
| 514 | if (lun == 0 && (cmd->cmnd[1] & INQUIRY_EVPD) == 0) { |
FUJITA Tomonori | 31fe47d | 2008-03-09 13:44:35 +0900 | [diff] [blame] | 515 | scsi_sg_copy_from_buffer(cmd, (void *)console_inq_page, |
| 516 | sizeof(console_inq_page)); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 517 | cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8; |
| 518 | done(cmd); |
| 519 | } else |
| 520 | stex_invalid_field(cmd, done); |
| 521 | return 0; |
| 522 | case PASSTHRU_CMD: |
| 523 | if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) { |
| 524 | struct st_drvver ver; |
FUJITA Tomonori | 26106e3 | 2008-02-22 23:11:03 +0900 | [diff] [blame] | 525 | size_t cp_len = sizeof(ver); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 526 | ver.major = ST_VER_MAJOR; |
| 527 | ver.minor = ST_VER_MINOR; |
| 528 | ver.oem = ST_OEM; |
| 529 | ver.build = ST_BUILD_VER; |
| 530 | ver.signature[0] = PASSTHRU_SIGNATURE; |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 531 | ver.console_id = host->max_id - 1; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 532 | ver.host_no = hba->host->host_no; |
FUJITA Tomonori | 31fe47d | 2008-03-09 13:44:35 +0900 | [diff] [blame] | 533 | cp_len = scsi_sg_copy_from_buffer(cmd, &ver, cp_len); |
FUJITA Tomonori | 26106e3 | 2008-02-22 23:11:03 +0900 | [diff] [blame] | 534 | cmd->result = sizeof(ver) == cp_len ? |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 535 | DID_OK << 16 | COMMAND_COMPLETE << 8 : |
| 536 | DID_ERROR << 16 | COMMAND_COMPLETE << 8; |
| 537 | done(cmd); |
| 538 | return 0; |
| 539 | } |
| 540 | default: |
| 541 | break; |
| 542 | } |
| 543 | |
| 544 | cmd->scsi_done = done; |
| 545 | |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 546 | tag = cmd->request->tag; |
| 547 | |
| 548 | if (unlikely(tag >= host->can_queue)) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 549 | return SCSI_MLQUEUE_HOST_BUSY; |
| 550 | |
| 551 | req = stex_alloc_req(hba); |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 552 | |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 553 | req->lun = lun; |
| 554 | req->target = id; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 555 | |
| 556 | /* cdb */ |
| 557 | memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH); |
| 558 | |
| 559 | hba->ccb[tag].cmd = cmd; |
| 560 | hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE; |
| 561 | hba->ccb[tag].sense_buffer = cmd->sense_buffer; |
| 562 | hba->ccb[tag].req_type = 0; |
| 563 | |
| 564 | if (cmd->sc_data_direction != DMA_NONE) |
| 565 | stex_map_sg(hba, req, &hba->ccb[tag]); |
| 566 | |
| 567 | stex_send_cmd(hba, req, tag); |
| 568 | return 0; |
| 569 | } |
| 570 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 571 | static void stex_scsi_done(struct st_ccb *ccb) |
| 572 | { |
| 573 | struct scsi_cmnd *cmd = ccb->cmd; |
| 574 | int result; |
| 575 | |
| 576 | if (ccb->srb_status == SRB_STATUS_SUCCESS || ccb->srb_status == 0) { |
| 577 | result = ccb->scsi_status; |
| 578 | switch (ccb->scsi_status) { |
| 579 | case SAM_STAT_GOOD: |
| 580 | result |= DID_OK << 16 | COMMAND_COMPLETE << 8; |
| 581 | break; |
| 582 | case SAM_STAT_CHECK_CONDITION: |
| 583 | result |= DRIVER_SENSE << 24; |
| 584 | break; |
| 585 | case SAM_STAT_BUSY: |
| 586 | result |= DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8; |
| 587 | break; |
| 588 | default: |
| 589 | result |= DID_ERROR << 16 | COMMAND_COMPLETE << 8; |
| 590 | break; |
| 591 | } |
| 592 | } |
| 593 | else if (ccb->srb_status & SRB_SEE_SENSE) |
| 594 | result = DRIVER_SENSE << 24 | SAM_STAT_CHECK_CONDITION; |
| 595 | else switch (ccb->srb_status) { |
| 596 | case SRB_STATUS_SELECTION_TIMEOUT: |
| 597 | result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8; |
| 598 | break; |
| 599 | case SRB_STATUS_BUSY: |
| 600 | result = DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8; |
| 601 | break; |
| 602 | case SRB_STATUS_INVALID_REQUEST: |
| 603 | case SRB_STATUS_ERROR: |
| 604 | default: |
| 605 | result = DID_ERROR << 16 | COMMAND_COMPLETE << 8; |
| 606 | break; |
| 607 | } |
| 608 | |
| 609 | cmd->result = result; |
| 610 | cmd->scsi_done(cmd); |
| 611 | } |
| 612 | |
| 613 | static void stex_copy_data(struct st_ccb *ccb, |
| 614 | struct status_msg *resp, unsigned int variable) |
| 615 | { |
| 616 | size_t count = variable; |
| 617 | if (resp->scsi_status != SAM_STAT_GOOD) { |
| 618 | if (ccb->sense_buffer != NULL) |
| 619 | memcpy(ccb->sense_buffer, resp->variable, |
| 620 | min(variable, ccb->sense_bufflen)); |
| 621 | return; |
| 622 | } |
| 623 | |
| 624 | if (ccb->cmd == NULL) |
| 625 | return; |
FUJITA Tomonori | 31fe47d | 2008-03-09 13:44:35 +0900 | [diff] [blame] | 626 | count = scsi_sg_copy_from_buffer(ccb->cmd, resp->variable, count); |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 627 | } |
| 628 | |
| 629 | static void stex_ys_commands(struct st_hba *hba, |
| 630 | struct st_ccb *ccb, struct status_msg *resp) |
| 631 | { |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 632 | if (ccb->cmd->cmnd[0] == MGT_CMD && |
| 633 | resp->scsi_status != SAM_STAT_CHECK_CONDITION) { |
Ed Lin | 968a576 | 2007-07-05 12:09:06 -0700 | [diff] [blame] | 634 | scsi_set_resid(ccb->cmd, scsi_bufflen(ccb->cmd) - |
| 635 | le32_to_cpu(*(__le32 *)&resp->variable[0])); |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 636 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 637 | } |
| 638 | |
| 639 | static void stex_mu_intr(struct st_hba *hba, u32 doorbell) |
| 640 | { |
| 641 | void __iomem *base = hba->mmio_base; |
| 642 | struct status_msg *resp; |
| 643 | struct st_ccb *ccb; |
| 644 | unsigned int size; |
| 645 | u16 tag; |
| 646 | |
| 647 | if (!(doorbell & MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED)) |
| 648 | return; |
| 649 | |
| 650 | /* status payloads */ |
| 651 | hba->status_head = readl(base + OMR1); |
| 652 | if (unlikely(hba->status_head >= MU_STATUS_COUNT)) { |
| 653 | printk(KERN_WARNING DRV_NAME "(%s): invalid status head\n", |
| 654 | pci_name(hba->pdev)); |
| 655 | return; |
| 656 | } |
| 657 | |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 658 | /* |
| 659 | * it's not a valid status payload if: |
| 660 | * 1. there are no pending requests(e.g. during init stage) |
| 661 | * 2. there are some pending requests, but the controller is in |
| 662 | * reset status, and its type is not st_yosemite |
| 663 | * firmware of st_yosemite in reset status will return pending requests |
| 664 | * to driver, so we allow it to pass |
| 665 | */ |
| 666 | if (unlikely(hba->out_req_cnt <= 0 || |
| 667 | (hba->mu_status == MU_STATE_RESETTING && |
| 668 | hba->cardtype != st_yosemite))) { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 669 | hba->status_tail = hba->status_head; |
| 670 | goto update_status; |
| 671 | } |
| 672 | |
| 673 | while (hba->status_tail != hba->status_head) { |
| 674 | resp = stex_get_status(hba); |
| 675 | tag = le16_to_cpu(resp->tag); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 676 | if (unlikely(tag >= hba->host->can_queue)) { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 677 | printk(KERN_WARNING DRV_NAME |
| 678 | "(%s): invalid tag\n", pci_name(hba->pdev)); |
| 679 | continue; |
| 680 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 681 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 682 | ccb = &hba->ccb[tag]; |
| 683 | if (hba->wait_ccb == ccb) |
| 684 | hba->wait_ccb = NULL; |
| 685 | if (unlikely(ccb->req == NULL)) { |
| 686 | printk(KERN_WARNING DRV_NAME |
| 687 | "(%s): lagging req\n", pci_name(hba->pdev)); |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 688 | hba->out_req_cnt--; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 689 | continue; |
| 690 | } |
| 691 | |
| 692 | size = resp->payload_sz * sizeof(u32); /* payload size */ |
| 693 | if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN || |
| 694 | size > sizeof(*resp))) { |
| 695 | printk(KERN_WARNING DRV_NAME "(%s): bad status size\n", |
| 696 | pci_name(hba->pdev)); |
| 697 | } else { |
| 698 | size -= sizeof(*resp) - STATUS_VAR_LEN; /* copy size */ |
| 699 | if (size) |
| 700 | stex_copy_data(ccb, resp, size); |
| 701 | } |
| 702 | |
Ed Lin - PTU | dd48ebf | 2009-01-26 02:40:11 -0800 | [diff] [blame] | 703 | ccb->req = NULL; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 704 | ccb->srb_status = resp->srb_status; |
| 705 | ccb->scsi_status = resp->scsi_status; |
| 706 | |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 707 | if (likely(ccb->cmd != NULL)) { |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 708 | if (hba->cardtype == st_yosemite) |
| 709 | stex_ys_commands(hba, ccb, resp); |
| 710 | |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 711 | if (unlikely(ccb->cmd->cmnd[0] == PASSTHRU_CMD && |
| 712 | ccb->cmd->cmnd[1] == PASSTHRU_GET_ADAPTER)) |
| 713 | stex_controller_info(hba, ccb); |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 714 | |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 715 | scsi_dma_unmap(ccb->cmd); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 716 | stex_scsi_done(ccb); |
| 717 | hba->out_req_cnt--; |
| 718 | } else if (ccb->req_type & PASSTHRU_REQ_TYPE) { |
| 719 | hba->out_req_cnt--; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 720 | if (ccb->req_type & PASSTHRU_REQ_NO_WAKEUP) { |
| 721 | ccb->req_type = 0; |
| 722 | continue; |
| 723 | } |
| 724 | ccb->req_type = 0; |
| 725 | if (waitqueue_active(&hba->waitq)) |
| 726 | wake_up(&hba->waitq); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 727 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 728 | } |
| 729 | |
| 730 | update_status: |
| 731 | writel(hba->status_head, base + IMR1); |
| 732 | readl(base + IMR1); /* flush */ |
| 733 | } |
| 734 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 735 | static irqreturn_t stex_intr(int irq, void *__hba) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 736 | { |
| 737 | struct st_hba *hba = __hba; |
| 738 | void __iomem *base = hba->mmio_base; |
| 739 | u32 data; |
| 740 | unsigned long flags; |
| 741 | int handled = 0; |
| 742 | |
| 743 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 744 | |
| 745 | data = readl(base + ODBL); |
| 746 | |
| 747 | if (data && data != 0xffffffff) { |
| 748 | /* clear the interrupt */ |
| 749 | writel(data, base + ODBL); |
| 750 | readl(base + ODBL); /* flush */ |
| 751 | stex_mu_intr(hba, data); |
| 752 | handled = 1; |
| 753 | } |
| 754 | |
| 755 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 756 | |
| 757 | return IRQ_RETVAL(handled); |
| 758 | } |
| 759 | |
| 760 | static int stex_handshake(struct st_hba *hba) |
| 761 | { |
| 762 | void __iomem *base = hba->mmio_base; |
| 763 | struct handshake_frame *h; |
| 764 | dma_addr_t status_phys; |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 765 | u32 data; |
Ed Lin | 76fbf96f | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 766 | unsigned long before; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 767 | |
| 768 | if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) { |
| 769 | writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL); |
| 770 | readl(base + IDBL); |
Ed Lin | 76fbf96f | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 771 | before = jiffies; |
| 772 | while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) { |
| 773 | if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) { |
| 774 | printk(KERN_ERR DRV_NAME |
| 775 | "(%s): no handshake signature\n", |
| 776 | pci_name(hba->pdev)); |
| 777 | return -1; |
| 778 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 779 | rmb(); |
| 780 | msleep(1); |
| 781 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 782 | } |
| 783 | |
| 784 | udelay(10); |
| 785 | |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 786 | data = readl(base + OMR1); |
| 787 | if ((data & 0xffff0000) == MU_HANDSHAKE_SIGNATURE_HALF) { |
| 788 | data &= 0x0000ffff; |
| 789 | if (hba->host->can_queue > data) |
| 790 | hba->host->can_queue = data; |
| 791 | } |
| 792 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 793 | h = (struct handshake_frame *)(hba->dma_mem + MU_REQ_BUFFER_SIZE); |
| 794 | h->rb_phy = cpu_to_le32(hba->dma_handle); |
| 795 | h->rb_phy_hi = cpu_to_le32((hba->dma_handle >> 16) >> 16); |
| 796 | h->req_sz = cpu_to_le16(sizeof(struct req_msg)); |
| 797 | h->req_cnt = cpu_to_le16(MU_REQ_COUNT); |
| 798 | h->status_sz = cpu_to_le16(sizeof(struct status_msg)); |
| 799 | h->status_cnt = cpu_to_le16(MU_STATUS_COUNT); |
| 800 | stex_gettime(&h->hosttime); |
| 801 | h->partner_type = HMU_PARTNER_TYPE; |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 802 | if (hba->dma_size > STEX_BUFFER_SIZE) { |
| 803 | h->extra_offset = cpu_to_le32(STEX_BUFFER_SIZE); |
| 804 | h->extra_size = cpu_to_le32(ST_ADDITIONAL_MEM); |
| 805 | } else |
| 806 | h->extra_offset = h->extra_size = 0; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 807 | |
| 808 | status_phys = hba->dma_handle + MU_REQ_BUFFER_SIZE; |
| 809 | writel(status_phys, base + IMR0); |
| 810 | readl(base + IMR0); |
| 811 | writel((status_phys >> 16) >> 16, base + IMR1); |
| 812 | readl(base + IMR1); |
| 813 | |
| 814 | writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */ |
| 815 | readl(base + OMR0); |
| 816 | writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL); |
| 817 | readl(base + IDBL); /* flush */ |
| 818 | |
| 819 | udelay(10); |
Ed Lin | 76fbf96f | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 820 | before = jiffies; |
| 821 | while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) { |
| 822 | if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) { |
| 823 | printk(KERN_ERR DRV_NAME |
| 824 | "(%s): no signature after handshake frame\n", |
| 825 | pci_name(hba->pdev)); |
| 826 | return -1; |
| 827 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 828 | rmb(); |
| 829 | msleep(1); |
| 830 | } |
| 831 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 832 | writel(0, base + IMR0); |
| 833 | readl(base + IMR0); |
| 834 | writel(0, base + OMR0); |
| 835 | readl(base + OMR0); |
| 836 | writel(0, base + IMR1); |
| 837 | readl(base + IMR1); |
| 838 | writel(0, base + OMR1); |
| 839 | readl(base + OMR1); /* flush */ |
| 840 | hba->mu_status = MU_STATE_STARTED; |
| 841 | return 0; |
| 842 | } |
| 843 | |
| 844 | static int stex_abort(struct scsi_cmnd *cmd) |
| 845 | { |
| 846 | struct Scsi_Host *host = cmd->device->host; |
| 847 | struct st_hba *hba = (struct st_hba *)host->hostdata; |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 848 | u16 tag = cmd->request->tag; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 849 | void __iomem *base; |
| 850 | u32 data; |
| 851 | int result = SUCCESS; |
| 852 | unsigned long flags; |
Ed Lin | c25da0a | 2007-05-09 20:50:42 -0800 | [diff] [blame] | 853 | |
| 854 | printk(KERN_INFO DRV_NAME |
| 855 | "(%s): aborting command\n", pci_name(hba->pdev)); |
| 856 | scsi_print_command(cmd); |
| 857 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 858 | base = hba->mmio_base; |
| 859 | spin_lock_irqsave(host->host_lock, flags); |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 860 | if (tag < host->can_queue && hba->ccb[tag].cmd == cmd) |
| 861 | hba->wait_ccb = &hba->ccb[tag]; |
| 862 | else { |
| 863 | for (tag = 0; tag < host->can_queue; tag++) |
| 864 | if (hba->ccb[tag].cmd == cmd) { |
| 865 | hba->wait_ccb = &hba->ccb[tag]; |
| 866 | break; |
| 867 | } |
| 868 | if (tag >= host->can_queue) |
| 869 | goto out; |
| 870 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 871 | |
| 872 | data = readl(base + ODBL); |
| 873 | if (data == 0 || data == 0xffffffff) |
| 874 | goto fail_out; |
| 875 | |
| 876 | writel(data, base + ODBL); |
| 877 | readl(base + ODBL); /* flush */ |
| 878 | |
| 879 | stex_mu_intr(hba, data); |
| 880 | |
| 881 | if (hba->wait_ccb == NULL) { |
| 882 | printk(KERN_WARNING DRV_NAME |
| 883 | "(%s): lost interrupt\n", pci_name(hba->pdev)); |
| 884 | goto out; |
| 885 | } |
| 886 | |
| 887 | fail_out: |
FUJITA Tomonori | d5587d5 | 2007-05-26 10:01:24 +0900 | [diff] [blame] | 888 | scsi_dma_unmap(cmd); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 889 | hba->wait_ccb->req = NULL; /* nullify the req's future return */ |
| 890 | hba->wait_ccb = NULL; |
| 891 | result = FAILED; |
| 892 | out: |
| 893 | spin_unlock_irqrestore(host->host_lock, flags); |
| 894 | return result; |
| 895 | } |
| 896 | |
| 897 | static void stex_hard_reset(struct st_hba *hba) |
| 898 | { |
| 899 | struct pci_bus *bus; |
| 900 | int i; |
| 901 | u16 pci_cmd; |
| 902 | u8 pci_bctl; |
| 903 | |
| 904 | for (i = 0; i < 16; i++) |
| 905 | pci_read_config_dword(hba->pdev, i * 4, |
| 906 | &hba->pdev->saved_config_space[i]); |
| 907 | |
| 908 | /* Reset secondary bus. Our controller(MU/ATU) is the only device on |
| 909 | secondary bus. Consult Intel 80331/3 developer's manual for detail */ |
| 910 | bus = hba->pdev->bus; |
| 911 | pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl); |
| 912 | pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET; |
| 913 | pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl); |
Ed Lin | 69f4a51 | 2007-05-09 20:50:37 -0800 | [diff] [blame] | 914 | |
| 915 | /* |
| 916 | * 1 ms may be enough for 8-port controllers. But 16-port controllers |
| 917 | * require more time to finish bus reset. Use 100 ms here for safety |
| 918 | */ |
| 919 | msleep(100); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 920 | pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET; |
| 921 | pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl); |
| 922 | |
Ed Lin | 76fbf96f | 2006-12-04 17:49:42 -0800 | [diff] [blame] | 923 | for (i = 0; i < MU_HARD_RESET_WAIT; i++) { |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 924 | pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd); |
Ed Lin | 47c4f99 | 2006-12-04 17:49:31 -0800 | [diff] [blame] | 925 | if (pci_cmd != 0xffff && (pci_cmd & PCI_COMMAND_MASTER)) |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 926 | break; |
| 927 | msleep(1); |
| 928 | } |
| 929 | |
| 930 | ssleep(5); |
| 931 | for (i = 0; i < 16; i++) |
| 932 | pci_write_config_dword(hba->pdev, i * 4, |
| 933 | hba->pdev->saved_config_space[i]); |
| 934 | } |
| 935 | |
| 936 | static int stex_reset(struct scsi_cmnd *cmd) |
| 937 | { |
| 938 | struct st_hba *hba; |
| 939 | unsigned long flags; |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 940 | unsigned long before; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 941 | hba = (struct st_hba *) &cmd->device->host->hostdata[0]; |
| 942 | |
Ed Lin | c25da0a | 2007-05-09 20:50:42 -0800 | [diff] [blame] | 943 | printk(KERN_INFO DRV_NAME |
| 944 | "(%s): resetting host\n", pci_name(hba->pdev)); |
| 945 | scsi_print_command(cmd); |
| 946 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 947 | hba->mu_status = MU_STATE_RESETTING; |
| 948 | |
| 949 | if (hba->cardtype == st_shasta) |
| 950 | stex_hard_reset(hba); |
| 951 | |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 952 | if (hba->cardtype != st_yosemite) { |
| 953 | if (stex_handshake(hba)) { |
| 954 | printk(KERN_WARNING DRV_NAME |
| 955 | "(%s): resetting: handshake failed\n", |
| 956 | pci_name(hba->pdev)); |
| 957 | return FAILED; |
| 958 | } |
| 959 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 960 | hba->req_head = 0; |
| 961 | hba->req_tail = 0; |
| 962 | hba->status_head = 0; |
| 963 | hba->status_tail = 0; |
| 964 | hba->out_req_cnt = 0; |
| 965 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 966 | return SUCCESS; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 967 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 968 | |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 969 | /* st_yosemite */ |
| 970 | writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL); |
| 971 | readl(hba->mmio_base + IDBL); /* flush */ |
| 972 | before = jiffies; |
| 973 | while (hba->out_req_cnt > 0) { |
| 974 | if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) { |
| 975 | printk(KERN_WARNING DRV_NAME |
| 976 | "(%s): reset timeout\n", pci_name(hba->pdev)); |
| 977 | return FAILED; |
| 978 | } |
| 979 | msleep(1); |
| 980 | } |
| 981 | |
| 982 | hba->mu_status = MU_STATE_STARTED; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 983 | return SUCCESS; |
| 984 | } |
| 985 | |
| 986 | static int stex_biosparam(struct scsi_device *sdev, |
| 987 | struct block_device *bdev, sector_t capacity, int geom[]) |
| 988 | { |
Ed Lin | b4b8bed | 2006-12-04 17:49:24 -0800 | [diff] [blame] | 989 | int heads = 255, sectors = 63; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 990 | |
| 991 | if (capacity < 0x200000) { |
| 992 | heads = 64; |
| 993 | sectors = 32; |
| 994 | } |
| 995 | |
Ed Lin | b4b8bed | 2006-12-04 17:49:24 -0800 | [diff] [blame] | 996 | sector_div(capacity, heads * sectors); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 997 | |
| 998 | geom[0] = heads; |
| 999 | geom[1] = sectors; |
Ed Lin | b4b8bed | 2006-12-04 17:49:24 -0800 | [diff] [blame] | 1000 | geom[2] = capacity; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1001 | |
| 1002 | return 0; |
| 1003 | } |
| 1004 | |
| 1005 | static struct scsi_host_template driver_template = { |
| 1006 | .module = THIS_MODULE, |
| 1007 | .name = DRV_NAME, |
| 1008 | .proc_name = DRV_NAME, |
| 1009 | .bios_param = stex_biosparam, |
| 1010 | .queuecommand = stex_queuecommand, |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1011 | .slave_alloc = stex_slave_alloc, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1012 | .slave_configure = stex_slave_config, |
| 1013 | .slave_destroy = stex_slave_destroy, |
| 1014 | .eh_abort_handler = stex_abort, |
| 1015 | .eh_host_reset_handler = stex_reset, |
| 1016 | .can_queue = ST_CAN_QUEUE, |
| 1017 | .this_id = -1, |
| 1018 | .sg_tablesize = ST_MAX_SG, |
| 1019 | .cmd_per_lun = ST_CMD_PER_LUN, |
| 1020 | }; |
| 1021 | |
| 1022 | static int stex_set_dma_mask(struct pci_dev * pdev) |
| 1023 | { |
| 1024 | int ret; |
| 1025 | if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) |
| 1026 | && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) |
| 1027 | return 0; |
| 1028 | ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
| 1029 | if (!ret) |
| 1030 | ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); |
| 1031 | return ret; |
| 1032 | } |
| 1033 | |
| 1034 | static int __devinit |
| 1035 | stex_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
| 1036 | { |
| 1037 | struct st_hba *hba; |
| 1038 | struct Scsi_Host *host; |
| 1039 | int err; |
| 1040 | |
| 1041 | err = pci_enable_device(pdev); |
| 1042 | if (err) |
| 1043 | return err; |
| 1044 | |
| 1045 | pci_set_master(pdev); |
| 1046 | |
| 1047 | host = scsi_host_alloc(&driver_template, sizeof(struct st_hba)); |
| 1048 | |
| 1049 | if (!host) { |
| 1050 | printk(KERN_ERR DRV_NAME "(%s): scsi_host_alloc failed\n", |
| 1051 | pci_name(pdev)); |
| 1052 | err = -ENOMEM; |
| 1053 | goto out_disable; |
| 1054 | } |
| 1055 | |
| 1056 | hba = (struct st_hba *)host->hostdata; |
| 1057 | memset(hba, 0, sizeof(struct st_hba)); |
| 1058 | |
| 1059 | err = pci_request_regions(pdev, DRV_NAME); |
| 1060 | if (err < 0) { |
| 1061 | printk(KERN_ERR DRV_NAME "(%s): request regions failed\n", |
| 1062 | pci_name(pdev)); |
| 1063 | goto out_scsi_host_put; |
| 1064 | } |
| 1065 | |
Arjan van de Ven | 25729a7 | 2008-09-28 16:18:02 -0700 | [diff] [blame] | 1066 | hba->mmio_base = pci_ioremap_bar(pdev, 0); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1067 | if ( !hba->mmio_base) { |
| 1068 | printk(KERN_ERR DRV_NAME "(%s): memory map failed\n", |
| 1069 | pci_name(pdev)); |
| 1070 | err = -ENOMEM; |
| 1071 | goto out_release_regions; |
| 1072 | } |
| 1073 | |
| 1074 | err = stex_set_dma_mask(pdev); |
| 1075 | if (err) { |
| 1076 | printk(KERN_ERR DRV_NAME "(%s): set dma mask failed\n", |
| 1077 | pci_name(pdev)); |
| 1078 | goto out_iounmap; |
| 1079 | } |
| 1080 | |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1081 | hba->cardtype = (unsigned int) id->driver_data; |
| 1082 | if (hba->cardtype == st_vsc && (pdev->subsystem_device & 0xf) == 0x1) |
| 1083 | hba->cardtype = st_vsc1; |
Ed Lin - PTU | 62e5b3d | 2009-01-26 02:40:29 -0800 | [diff] [blame] | 1084 | hba->dma_size = (hba->cardtype == st_vsc1 || hba->cardtype == st_seq) ? |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1085 | (STEX_BUFFER_SIZE + ST_ADDITIONAL_MEM) : (STEX_BUFFER_SIZE); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1086 | hba->dma_mem = dma_alloc_coherent(&pdev->dev, |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1087 | hba->dma_size, &hba->dma_handle, GFP_KERNEL); |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1088 | if (!hba->dma_mem) { |
| 1089 | err = -ENOMEM; |
| 1090 | printk(KERN_ERR DRV_NAME "(%s): dma mem alloc failed\n", |
| 1091 | pci_name(pdev)); |
| 1092 | goto out_iounmap; |
| 1093 | } |
| 1094 | |
| 1095 | hba->status_buffer = |
| 1096 | (struct status_msg *)(hba->dma_mem + MU_REQ_BUFFER_SIZE); |
| 1097 | hba->copy_buffer = hba->dma_mem + MU_BUFFER_SIZE; |
| 1098 | hba->mu_status = MU_STATE_STARTING; |
| 1099 | |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 1100 | if (hba->cardtype == st_shasta) { |
| 1101 | host->max_lun = 8; |
| 1102 | host->max_id = 16 + 1; |
| 1103 | } else if (hba->cardtype == st_yosemite) { |
Ed Lin - PTU | e8a091b | 2009-01-26 02:40:50 -0800 | [diff] [blame^] | 1104 | host->max_lun = 256; |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 1105 | host->max_id = 1 + 1; |
| 1106 | } else { |
Ed Lin - PTU | 62e5b3d | 2009-01-26 02:40:29 -0800 | [diff] [blame] | 1107 | /* st_vsc , st_vsc1 and st_seq */ |
Ed Lin | e0b2e59 | 2007-05-09 20:50:33 -0800 | [diff] [blame] | 1108 | host->max_lun = 1; |
| 1109 | host->max_id = 128 + 1; |
| 1110 | } |
| 1111 | host->max_channel = 0; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1112 | host->unique_id = host->host_no; |
| 1113 | host->max_cmd_len = STEX_CDB_LENGTH; |
| 1114 | |
| 1115 | hba->host = host; |
| 1116 | hba->pdev = pdev; |
| 1117 | init_waitqueue_head(&hba->waitq); |
| 1118 | |
| 1119 | err = request_irq(pdev->irq, stex_intr, IRQF_SHARED, DRV_NAME, hba); |
| 1120 | if (err) { |
| 1121 | printk(KERN_ERR DRV_NAME "(%s): request irq failed\n", |
| 1122 | pci_name(pdev)); |
| 1123 | goto out_pci_free; |
| 1124 | } |
| 1125 | |
| 1126 | err = stex_handshake(hba); |
| 1127 | if (err) |
| 1128 | goto out_free_irq; |
| 1129 | |
Ed Lin | 529e7a6 | 2006-12-04 17:49:34 -0800 | [diff] [blame] | 1130 | err = scsi_init_shared_tag_map(host, host->can_queue); |
James Bottomley | deb81d8 | 2006-09-01 09:28:48 -0400 | [diff] [blame] | 1131 | if (err) { |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1132 | printk(KERN_ERR DRV_NAME "(%s): init shared queue failed\n", |
| 1133 | pci_name(pdev)); |
| 1134 | goto out_free_irq; |
| 1135 | } |
| 1136 | |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1137 | pci_set_drvdata(pdev, hba); |
| 1138 | |
| 1139 | err = scsi_add_host(host, &pdev->dev); |
| 1140 | if (err) { |
| 1141 | printk(KERN_ERR DRV_NAME "(%s): scsi_add_host failed\n", |
| 1142 | pci_name(pdev)); |
| 1143 | goto out_free_irq; |
| 1144 | } |
| 1145 | |
| 1146 | scsi_scan_host(host); |
| 1147 | |
| 1148 | return 0; |
| 1149 | |
| 1150 | out_free_irq: |
| 1151 | free_irq(pdev->irq, hba); |
| 1152 | out_pci_free: |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1153 | dma_free_coherent(&pdev->dev, hba->dma_size, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1154 | hba->dma_mem, hba->dma_handle); |
| 1155 | out_iounmap: |
| 1156 | iounmap(hba->mmio_base); |
| 1157 | out_release_regions: |
| 1158 | pci_release_regions(pdev); |
| 1159 | out_scsi_host_put: |
| 1160 | scsi_host_put(host); |
| 1161 | out_disable: |
| 1162 | pci_disable_device(pdev); |
| 1163 | |
| 1164 | return err; |
| 1165 | } |
| 1166 | |
| 1167 | static void stex_hba_stop(struct st_hba *hba) |
| 1168 | { |
| 1169 | struct req_msg *req; |
| 1170 | unsigned long flags; |
| 1171 | unsigned long before; |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1172 | u16 tag = 0; |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1173 | |
| 1174 | spin_lock_irqsave(hba->host->host_lock, flags); |
| 1175 | req = stex_alloc_req(hba); |
| 1176 | memset(req->cdb, 0, STEX_CDB_LENGTH); |
| 1177 | |
Ed Lin | fb4f66b | 2006-09-27 19:23:41 +0800 | [diff] [blame] | 1178 | if (hba->cardtype == st_yosemite) { |
| 1179 | req->cdb[0] = MGT_CMD; |
| 1180 | req->cdb[1] = MGT_CMD_SIGNATURE; |
| 1181 | req->cdb[2] = CTLR_CONFIG_CMD; |
| 1182 | req->cdb[3] = CTLR_SHUTDOWN; |
| 1183 | } else { |
| 1184 | req->cdb[0] = CONTROLLER_CMD; |
| 1185 | req->cdb[1] = CTLR_POWER_STATE_CHANGE; |
| 1186 | req->cdb[2] = CTLR_POWER_SAVING; |
| 1187 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1188 | |
| 1189 | hba->ccb[tag].cmd = NULL; |
| 1190 | hba->ccb[tag].sg_count = 0; |
| 1191 | hba->ccb[tag].sense_bufflen = 0; |
| 1192 | hba->ccb[tag].sense_buffer = NULL; |
| 1193 | hba->ccb[tag].req_type |= PASSTHRU_REQ_TYPE; |
| 1194 | |
| 1195 | stex_send_cmd(hba, req, tag); |
| 1196 | spin_unlock_irqrestore(hba->host->host_lock, flags); |
| 1197 | |
Ed Lin | cf35588 | 2006-09-01 14:31:51 +0800 | [diff] [blame] | 1198 | before = jiffies; |
| 1199 | while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) { |
| 1200 | if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) |
| 1201 | return; |
| 1202 | msleep(10); |
| 1203 | } |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1204 | } |
| 1205 | |
| 1206 | static void stex_hba_free(struct st_hba *hba) |
| 1207 | { |
| 1208 | free_irq(hba->pdev->irq, hba); |
| 1209 | |
| 1210 | iounmap(hba->mmio_base); |
| 1211 | |
| 1212 | pci_release_regions(hba->pdev); |
| 1213 | |
Ed Lin | 94e9108 | 2006-12-04 17:49:39 -0800 | [diff] [blame] | 1214 | dma_free_coherent(&hba->pdev->dev, hba->dma_size, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1215 | hba->dma_mem, hba->dma_handle); |
| 1216 | } |
| 1217 | |
| 1218 | static void stex_remove(struct pci_dev *pdev) |
| 1219 | { |
| 1220 | struct st_hba *hba = pci_get_drvdata(pdev); |
| 1221 | |
| 1222 | scsi_remove_host(hba->host); |
| 1223 | |
| 1224 | pci_set_drvdata(pdev, NULL); |
| 1225 | |
| 1226 | stex_hba_stop(hba); |
| 1227 | |
| 1228 | stex_hba_free(hba); |
| 1229 | |
| 1230 | scsi_host_put(hba->host); |
| 1231 | |
| 1232 | pci_disable_device(pdev); |
| 1233 | } |
| 1234 | |
| 1235 | static void stex_shutdown(struct pci_dev *pdev) |
| 1236 | { |
| 1237 | struct st_hba *hba = pci_get_drvdata(pdev); |
| 1238 | |
| 1239 | stex_hba_stop(hba); |
| 1240 | } |
| 1241 | |
| 1242 | static struct pci_device_id stex_pci_tbl[] = { |
Ed Lin | ee926b2 | 2006-12-04 17:49:36 -0800 | [diff] [blame] | 1243 | /* st_shasta */ |
| 1244 | { 0x105a, 0x8350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 1245 | st_shasta }, /* SuperTrak EX8350/8300/16350/16300 */ |
| 1246 | { 0x105a, 0xc350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 1247 | st_shasta }, /* SuperTrak EX12350 */ |
| 1248 | { 0x105a, 0x4302, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 1249 | st_shasta }, /* SuperTrak EX4350 */ |
| 1250 | { 0x105a, 0xe350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 1251 | st_shasta }, /* SuperTrak EX24350 */ |
| 1252 | |
| 1253 | /* st_vsc */ |
| 1254 | { 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc }, |
| 1255 | |
| 1256 | /* st_yosemite */ |
Ed Lin - PTU | e8a091b | 2009-01-26 02:40:50 -0800 | [diff] [blame^] | 1257 | { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_yosemite }, |
Ed Lin - PTU | 62e5b3d | 2009-01-26 02:40:29 -0800 | [diff] [blame] | 1258 | |
| 1259 | /* st_seq */ |
| 1260 | { 0x105a, 0x3360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_seq }, |
Jeff Garzik | 5a25ba1 | 2006-09-01 03:12:19 -0400 | [diff] [blame] | 1261 | { } /* terminate list */ |
| 1262 | }; |
| 1263 | MODULE_DEVICE_TABLE(pci, stex_pci_tbl); |
| 1264 | |
| 1265 | static struct pci_driver stex_pci_driver = { |
| 1266 | .name = DRV_NAME, |
| 1267 | .id_table = stex_pci_tbl, |
| 1268 | .probe = stex_probe, |
| 1269 | .remove = __devexit_p(stex_remove), |
| 1270 | .shutdown = stex_shutdown, |
| 1271 | }; |
| 1272 | |
| 1273 | static int __init stex_init(void) |
| 1274 | { |
| 1275 | printk(KERN_INFO DRV_NAME |
| 1276 | ": Promise SuperTrak EX Driver version: %s\n", |
| 1277 | ST_DRIVER_VERSION); |
| 1278 | |
| 1279 | return pci_register_driver(&stex_pci_driver); |
| 1280 | } |
| 1281 | |
| 1282 | static void __exit stex_exit(void) |
| 1283 | { |
| 1284 | pci_unregister_driver(&stex_pci_driver); |
| 1285 | } |
| 1286 | |
| 1287 | module_init(stex_init); |
| 1288 | module_exit(stex_exit); |