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Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -07001/*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
Shrikrishna Khare190af102016-06-16 10:51:53 -07004 * Copyright (C) 2008-2016, VMware, Inc. All Rights Reserved.
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -07005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
Shrikrishna Khare190af102016-06-16 10:51:53 -070023 * Maintained by: pv-drivers@vmware.com
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070024 *
25 */
26
27#ifndef _VMXNET3_INT_H
28#define _VMXNET3_INT_H
29
Jesse Gross72e85c42011-06-23 13:04:39 +000030#include <linux/bitops.h>
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070031#include <linux/ethtool.h>
32#include <linux/delay.h>
33#include <linux/netdevice.h>
34#include <linux/pci.h>
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070035#include <linux/compiler.h>
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070036#include <linux/slab.h>
37#include <linux/spinlock.h>
38#include <linux/ioport.h>
39#include <linux/highmem.h>
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070040#include <linux/timer.h>
41#include <linux/skbuff.h>
42#include <linux/interrupt.h>
43#include <linux/workqueue.h>
44#include <linux/uaccess.h>
45#include <asm/dma.h>
46#include <asm/page.h>
47
48#include <linux/tcp.h>
49#include <linux/udp.h>
50#include <linux/ip.h>
51#include <linux/ipv6.h>
52#include <linux/in.h>
53#include <linux/etherdevice.h>
54#include <asm/checksum.h>
55#include <linux/if_vlan.h>
56#include <linux/if_arp.h>
57#include <linux/inetdevice.h>
Shreyas Bhatewaraeebb02b2011-07-07 00:25:52 -070058#include <linux/log2.h>
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070059
60#include "vmxnet3_defs.h"
61
62#ifdef DEBUG
63# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
64#else
65# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
66#endif
67
68
69/*
70 * Version numbers
71 */
Shrikrishna Khareff2e7d52016-08-19 10:33:42 -070072#define VMXNET3_DRIVER_VERSION_STRING "1.4.a.0-k"
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070073
74/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
Shrikrishna Khareff2e7d52016-08-19 10:33:42 -070075#define VMXNET3_DRIVER_VERSION_NUM 0x01040a00
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070076
Shreyas Bhatewara09c50882010-11-19 10:55:24 +000077#if defined(CONFIG_PCI_MSI)
78 /* RSS only makes sense if MSI-X is supported. */
79 #define VMXNET3_RSS
80#endif
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070081
Shrikrishna Khare190af102016-06-16 10:51:53 -070082#define VMXNET3_REV_3 2 /* Vmxnet3 Rev. 3 */
83#define VMXNET3_REV_2 1 /* Vmxnet3 Rev. 2 */
84#define VMXNET3_REV_1 0 /* Vmxnet3 Rev. 1 */
85
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -070086/*
87 * Capabilities
88 */
89
90enum {
91 VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */
92 VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over
93 * IPv4 */
94 VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */
95 VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */
96 VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */
97 VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation
98 * offload */
99 VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */
100 VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */
101 VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */
102 VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */
103 VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */
104 VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
105 VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */
106 VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */
107 VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries
108 * for a pkt */
109 VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */
110 VMNET_CAP_LPD = 0x10000, /* large pkt delivery */
111 VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/
112 VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
113 /* pages transmits */
114 VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */
115 VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */
116 VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */
117 /* pkts up to 256kB. */
118 VMNET_CAP_UPT = 0x400000 /* Support UPT */
119};
120
121/*
122 * PCI vendor and device IDs.
123 */
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700124#define PCI_DEVICE_ID_VMWARE_VMXNET3 0x07B0
125#define MAX_ETHERNET_CARDS 10
126#define MAX_PCI_PASSTHRU_DEVICE 6
127
128struct vmxnet3_cmd_ring {
129 union Vmxnet3_GenericDesc *base;
130 u32 size;
131 u32 next2fill;
132 u32 next2comp;
133 u8 gen;
134 dma_addr_t basePA;
135};
136
137static inline void
138vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
139{
140 ring->next2fill++;
141 if (unlikely(ring->next2fill == ring->size)) {
142 ring->next2fill = 0;
143 VMXNET3_FLIP_RING_GEN(ring->gen);
144 }
145}
146
147static inline void
148vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
149{
150 VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
151}
152
153static inline int
154vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
155{
156 return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
157 ring->next2comp - ring->next2fill - 1;
158}
159
160struct vmxnet3_comp_ring {
161 union Vmxnet3_GenericDesc *base;
162 u32 size;
163 u32 next2proc;
164 u8 gen;
165 u8 intr_idx;
166 dma_addr_t basePA;
167};
168
169static inline void
170vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
171{
172 ring->next2proc++;
173 if (unlikely(ring->next2proc == ring->size)) {
174 ring->next2proc = 0;
175 VMXNET3_FLIP_RING_GEN(ring->gen);
176 }
177}
178
179struct vmxnet3_tx_data_ring {
180 struct Vmxnet3_TxDataDesc *base;
181 u32 size;
182 dma_addr_t basePA;
183};
184
185enum vmxnet3_buf_map_type {
186 VMXNET3_MAP_INVALID = 0,
187 VMXNET3_MAP_NONE,
188 VMXNET3_MAP_SINGLE,
189 VMXNET3_MAP_PAGE,
190};
191
192struct vmxnet3_tx_buf_info {
193 u32 map_type;
194 u16 len;
195 u16 sop_idx;
196 dma_addr_t dma_addr;
197 struct sk_buff *skb;
198};
199
200struct vmxnet3_tq_driver_stats {
201 u64 drop_total; /* # of pkts dropped by the driver, the
202 * counters below track droppings due to
203 * different reasons
204 */
205 u64 drop_too_many_frags;
206 u64 drop_oversized_hdr;
207 u64 drop_hdr_inspect_err;
208 u64 drop_tso;
209
210 u64 tx_ring_full;
211 u64 linearized; /* # of pkts linearized */
212 u64 copy_skb_header; /* # of times we have to copy skb header */
213 u64 oversized_hdr;
214};
215
216struct vmxnet3_tx_ctx {
217 bool ipv4;
Shrikrishna Khare759c9352015-02-28 20:33:09 -0800218 bool ipv6;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700219 u16 mss;
220 u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum
221 * offloading
222 */
223 u32 l4_hdr_size; /* only valid if mss != 0 */
224 u32 copy_size; /* # of bytes copied into the data ring */
225 union Vmxnet3_GenericDesc *sop_txd;
226 union Vmxnet3_GenericDesc *eop_txd;
227};
228
229struct vmxnet3_tx_queue {
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000230 char name[IFNAMSIZ+8]; /* To identify interrupt */
231 struct vmxnet3_adapter *adapter;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700232 spinlock_t tx_lock;
233 struct vmxnet3_cmd_ring tx_ring;
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000234 struct vmxnet3_tx_buf_info *buf_info;
Andy Kingb0eb57c2013-08-23 09:33:49 -0700235 dma_addr_t buf_info_pa;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700236 struct vmxnet3_tx_data_ring data_ring;
237 struct vmxnet3_comp_ring comp_ring;
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000238 struct Vmxnet3_TxQueueCtrl *shared;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700239 struct vmxnet3_tq_driver_stats stats;
240 bool stopped;
241 int num_stop; /* # of times the queue is
242 * stopped */
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000243 int qid;
Shrikrishna Khare3c8b3ef2016-06-16 10:51:55 -0700244 u16 txdata_desc_size;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700245} __attribute__((__aligned__(SMP_CACHE_BYTES)));
246
247enum vmxnet3_rx_buf_type {
248 VMXNET3_RX_BUF_NONE = 0,
249 VMXNET3_RX_BUF_SKB = 1,
250 VMXNET3_RX_BUF_PAGE = 2
251};
252
253struct vmxnet3_rx_buf_info {
254 enum vmxnet3_rx_buf_type buf_type;
255 u16 len;
256 union {
257 struct sk_buff *skb;
258 struct page *page;
259 };
260 dma_addr_t dma_addr;
261};
262
263struct vmxnet3_rx_ctx {
264 struct sk_buff *skb;
265 u32 sop_idx;
266};
267
268struct vmxnet3_rq_driver_stats {
269 u64 drop_total;
270 u64 drop_err;
271 u64 drop_fcs;
272 u64 rx_buf_alloc_failure;
273};
274
Shrikrishna Khare50a5ce32016-06-16 10:51:56 -0700275struct vmxnet3_rx_data_ring {
276 Vmxnet3_RxDataDesc *base;
277 dma_addr_t basePA;
278 u16 desc_size;
279};
280
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700281struct vmxnet3_rx_queue {
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000282 char name[IFNAMSIZ + 8]; /* To identify interrupt */
283 struct vmxnet3_adapter *adapter;
284 struct napi_struct napi;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700285 struct vmxnet3_cmd_ring rx_ring[2];
Shrikrishna Khare50a5ce32016-06-16 10:51:56 -0700286 struct vmxnet3_rx_data_ring data_ring;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700287 struct vmxnet3_comp_ring comp_ring;
288 struct vmxnet3_rx_ctx rx_ctx;
289 u32 qid; /* rqID in RCD for buffer from 1st ring */
290 u32 qid2; /* rqID in RCD for buffer from 2nd ring */
Shrikrishna Khare50a5ce32016-06-16 10:51:56 -0700291 u32 dataRingQid; /* rqID in RCD for buffer from data ring */
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700292 struct vmxnet3_rx_buf_info *buf_info[2];
Andy Kingb0eb57c2013-08-23 09:33:49 -0700293 dma_addr_t buf_info_pa;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700294 struct Vmxnet3_RxQueueCtrl *shared;
295 struct vmxnet3_rq_driver_stats stats;
296} __attribute__((__aligned__(SMP_CACHE_BYTES)));
297
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000298#define VMXNET3_DEVICE_MAX_TX_QUEUES 8
299#define VMXNET3_DEVICE_MAX_RX_QUEUES 8 /* Keep this value as a power of 2 */
300
301/* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
302#define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)
303
304#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \
305 VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
Shreyas Bhatewara7e96fbf2011-01-14 15:00:03 +0000306#define VMXNET3_LINUX_MIN_MSIX_VECT 2 /* 1 for tx-rx pair and 1 for event */
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000307
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700308
309struct vmxnet3_intr {
310 enum vmxnet3_intr_mask_mode mask_mode;
311 enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */
312 u8 num_intrs; /* # of intr vectors */
313 u8 event_intr_idx; /* idx of the intr vector for event */
314 u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000315 char event_msi_vector_name[IFNAMSIZ+11];
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700316#ifdef CONFIG_PCI_MSI
317 struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
318#endif
319};
320
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000321/* Interrupt sharing schemes, share_intr */
322#define VMXNET3_INTR_BUDDYSHARE 0 /* Corresponding tx,rx queues share irq */
323#define VMXNET3_INTR_TXSHARE 1 /* All tx queues share one irq */
324#define VMXNET3_INTR_DONTSHARE 2 /* each queue has its own irq */
325
326
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700327#define VMXNET3_STATE_BIT_RESETTING 0
328#define VMXNET3_STATE_BIT_QUIESCED 1
329struct vmxnet3_adapter {
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000330 struct vmxnet3_tx_queue tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
331 struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
Jesse Gross72e85c42011-06-23 13:04:39 +0000332 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000333 struct vmxnet3_intr intr;
Shreyas Bhatewara83d0fef2011-01-14 14:59:57 +0000334 spinlock_t cmd_lock;
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000335 struct Vmxnet3_DriverShared *shared;
336 struct Vmxnet3_PMConf *pm_conf;
337 struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */
338 struct Vmxnet3_RxQueueDesc *rqd_start; /* all rx queue desc */
339 struct net_device *netdev;
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000340 struct pci_dev *pdev;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700341
Harvey Harrison81e8e562010-10-21 18:05:33 +0000342 u8 __iomem *hw_addr0; /* for BAR 0 */
343 u8 __iomem *hw_addr1; /* for BAR 1 */
Shreyas Bhatewara45dac1d2015-06-19 13:38:29 -0700344 u8 version;
345
346 bool rxcsum;
347 bool lro;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700348
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000349#ifdef VMXNET3_RSS
350 struct UPT1_RSSConf *rss_conf;
351 bool rss;
352#endif
353 u32 num_rx_queues;
354 u32 num_tx_queues;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700355
356 /* rx buffer related */
357 unsigned skb_buf_size;
358 int rx_buf_per_pkt; /* only apply to the 1st ring */
359 dma_addr_t shared_pa;
360 dma_addr_t queue_desc_pa;
Shrikrishna Khare4edef402016-06-16 10:51:57 -0700361 dma_addr_t coal_conf_pa;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700362
363 /* Wake-on-LAN */
364 u32 wol;
365
366 /* Link speed */
367 u32 link_speed; /* in mbps */
368
369 u64 tx_timeout_count;
Neil Hormanf00e2b02014-06-13 10:03:21 -0400370
371 /* Ring sizes */
372 u32 tx_ring_size;
373 u32 rx_ring_size;
Shrikrishna Khare53831aa2015-01-06 09:20:15 -0800374 u32 rx_ring2_size;
Neil Hormanf00e2b02014-06-13 10:03:21 -0400375
Shrikrishna Khare3c8b3ef2016-06-16 10:51:55 -0700376 /* Size of buffer in the data ring */
377 u16 txdata_desc_size;
Shrikrishna Khare50a5ce32016-06-16 10:51:56 -0700378 u16 rxdata_desc_size;
379
380 bool rxdataring_enabled;
Shrikrishna Khare3c8b3ef2016-06-16 10:51:55 -0700381
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700382 struct work_struct work;
383
384 unsigned long state; /* VMXNET3_STATE_BIT_xxx */
385
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000386 int share_intr;
Andy Kingb0eb57c2013-08-23 09:33:49 -0700387
Shrikrishna Khare4edef402016-06-16 10:51:57 -0700388 struct Vmxnet3_CoalesceScheme *coal_conf;
389 bool default_coal_mode;
390
Andy Kingb0eb57c2013-08-23 09:33:49 -0700391 dma_addr_t adapter_pa;
392 dma_addr_t pm_conf_pa;
393 dma_addr_t rss_conf_pa;
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700394};
395
396#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \
Harvey Harrisonb8744ca2010-10-30 16:19:18 -0700397 writel((val), (adapter)->hw_addr0 + (reg))
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700398#define VMXNET3_READ_BAR0_REG(adapter, reg) \
Harvey Harrisonb8744ca2010-10-30 16:19:18 -0700399 readl((adapter)->hw_addr0 + (reg))
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700400
401#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \
Harvey Harrisonb8744ca2010-10-30 16:19:18 -0700402 writel((val), (adapter)->hw_addr1 + (reg))
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700403#define VMXNET3_READ_BAR1_REG(adapter, reg) \
Harvey Harrisonb8744ca2010-10-30 16:19:18 -0700404 readl((adapter)->hw_addr1 + (reg))
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700405
406#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5)
407#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
408 ((rq)->rx_ring[ring_idx].size >> 3)
409
410#define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma))
411#define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32))
412
Shrikrishna Khare190af102016-06-16 10:51:53 -0700413#define VMXNET3_VERSION_GE_2(adapter) \
414 (adapter->version >= VMXNET3_REV_2 + 1)
415#define VMXNET3_VERSION_GE_3(adapter) \
416 (adapter->version >= VMXNET3_REV_3 + 1)
417
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700418/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
419#define VMXNET3_DEF_TX_RING_SIZE 512
420#define VMXNET3_DEF_RX_RING_SIZE 256
Shrikrishna Khare53831aa2015-01-06 09:20:15 -0800421#define VMXNET3_DEF_RX_RING2_SIZE 128
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700422
Shrikrishna Khare50a5ce32016-06-16 10:51:56 -0700423#define VMXNET3_DEF_RXDATA_DESC_SIZE 128
424
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700425#define VMXNET3_MAX_ETH_HDR_SIZE 22
426#define VMXNET3_MAX_SKB_BUF_SIZE (3*1024)
427
Shrikrishna Khare50a5ce32016-06-16 10:51:56 -0700428#define VMXNET3_GET_RING_IDX(adapter, rqID) \
429 ((rqID >= adapter->num_rx_queues && \
430 rqID < 2 * adapter->num_rx_queues) ? 1 : 0) \
431
432#define VMXNET3_RX_DATA_RING(adapter, rqID) \
433 (rqID >= 2 * adapter->num_rx_queues && \
434 rqID < 3 * adapter->num_rx_queues) \
435
Shrikrishna Khare4edef402016-06-16 10:51:57 -0700436#define VMXNET3_COAL_STATIC_DEFAULT_DEPTH 64
437
438#define VMXNET3_COAL_RBC_RATE(usecs) (1000000 / usecs)
439#define VMXNET3_COAL_RBC_USECS(rbc_rate) (1000000 / rbc_rate)
440
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700441int
442vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
443
444int
445vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
446
447void
448vmxnet3_force_close(struct vmxnet3_adapter *adapter);
449
450void
451vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
452
453void
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000454vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700455
456void
Shreyas Bhatewara09c50882010-11-19 10:55:24 +0000457vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700458
459int
Michał Mirosławc8f44af2011-11-15 15:29:55 +0000460vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
Michał Mirosława0d27302011-04-18 13:31:21 +0000461
462int
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700463vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
Shrikrishna Khare3c8b3ef2016-06-16 10:51:55 -0700464 u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size,
Shrikrishna Khare50a5ce32016-06-16 10:51:56 -0700465 u16 txdata_desc_size, u16 rxdata_desc_size);
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700466
Joe Perchesd8dea1e2013-09-23 11:37:59 -0700467void vmxnet3_set_ethtool_ops(struct net_device *netdev);
stephen hemminger95305f62011-06-08 14:53:57 +0000468
Joe Perchesd8dea1e2013-09-23 11:37:59 -0700469struct rtnl_link_stats64 *
stephen hemminger95305f62011-06-08 14:53:57 +0000470vmxnet3_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats);
Shreyas Bhatewarad1a890fa2009-10-13 00:15:51 -0700471
472extern char vmxnet3_driver_name[];
473#endif