Deepak Kushwah | a56fa31 | 2018-01-24 12:25:40 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | &soc { |
| 14 | qcom,vidc@1d00000 { |
| 15 | compatible = "qcom,msm-vidc"; |
| 16 | reg = <0x01d00000 0xff000>, |
| 17 | <0x000a4124 0x4>, |
| 18 | <0x000a0164 0x4>; |
| 19 | reg-names = "vidc", "efuse", "efuse2"; |
| 20 | qcom,platform-version = <0x00180000 0x13>; |
| 21 | qcom,capability-version = <0x00002000 0x0d>; |
| 22 | interrupts = <0 44 0>; |
| 23 | /* Regulators */ |
| 24 | venus-supply = <&gdsc_venus>; |
| 25 | venus-core0-supply = <&gdsc_venus_core0>; |
| 26 | /* Clocks */ |
| 27 | clocks = <&clock_gcc clk_gcc_venus0_vcodec0_clk>, |
| 28 | <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>, |
| 29 | <&clock_gcc clk_gcc_venus0_ahb_clk>, |
| 30 | <&clock_gcc clk_gcc_venus0_axi_clk>; |
| 31 | clock-names = "core_clk", "core0_clk", "iface_clk", "bus_clk"; |
| 32 | qcom,clock-configs = <0x1 0x0 0x0 0x0 0x0>; |
| 33 | qcom,hfi = "venus"; |
| 34 | qcom,hfi-version = "3xx"; |
| 35 | qcom,reg-presets = <0xe0020 0x05555556>, |
| 36 | <0xe0024 0x05555556>, |
| 37 | <0x80124 0x00000003>; |
| 38 | qcom,qdss-presets = <0x825000 0x1000>, |
| 39 | <0x826000 0x1000>, |
| 40 | <0x821000 0x1000>, |
| 41 | <0x802000 0x1000>, |
| 42 | <0x9180000 0x1000>, |
| 43 | <0x9181000 0x1000>; |
| 44 | qcom,max-hw-load = <1044480>; /* 4096 x 2176 @ 30 fps */ |
| 45 | qcom,slave-side-cp; |
| 46 | qcom,sw-power-collapse; |
| 47 | qcom,firmware-name = "venus"; |
| 48 | qcom,pm-qos-latency-us = <213>; |
| 49 | qcom,dcvs-tbl = |
| 50 | /* Dec UHD@30 H.264, HEVC, VP8, VP9 - NOM to NOM+*/ |
| 51 | <816000 816000 979200 0x3f00000c>, |
| 52 | |
| 53 | /* Enc 3840x1920@30 H.264/HEVC Turbo to Nom+ */ |
| 54 | <855000 821100 979200 0x4000004>, |
| 55 | |
| 56 | /* Enc True4K@24 H.264/HEVC Nom to Nom+ */ |
| 57 | <816000 720000 835584 0x4000004>; |
| 58 | qcom,dcvs-limit = |
| 59 | <28800 24>, /* Encoder 3840x1920 */ |
| 60 | <32400 24>; /* Decoder UHD */ |
| 61 | qcom,allowed-clock-rates = <465000000 400000000 |
| 62 | 360000000 310000000 228570000 114290000>; |
| 63 | qcom,clock-freq-tbl { |
| 64 | qcom,profile-enc { |
| 65 | qcom,codec-mask = <0x55555555>; |
| 66 | qcom,cycles-per-mb = <863>; |
| 67 | qcom,low-power-mode-factor = <35616>; |
| 68 | }; |
| 69 | qcom,profile-dec { |
| 70 | qcom,codec-mask = <0xf3ffffff>; |
| 71 | qcom,cycles-per-mb = <355>; |
| 72 | }; |
| 73 | qcom,profile-hevcdec { |
| 74 | qcom,codec-mask = <0x0c000000>; |
| 75 | qcom,cycles-per-mb = <400>; |
| 76 | }; |
| 77 | }; |
| 78 | |
| 79 | /* MMUs */ |
| 80 | non_secure_cb { |
| 81 | compatible = "qcom,msm-vidc,context-bank"; |
| 82 | label = "venus_ns"; |
| 83 | iommus = <&apps_iommu 0x800 0x01>, |
| 84 | <&apps_iommu 0x807 0x00>, |
| 85 | <&apps_iommu 0x808 0x07>, |
| 86 | <&apps_iommu 0x810 0x01>, |
| 87 | <&apps_iommu 0x828 0x01>, |
| 88 | <&apps_iommu 0x82c 0x01>, |
| 89 | <&apps_iommu 0x821 0x10>; |
| 90 | buffer-types = <0xfff>; |
| 91 | virtual-addr-pool = <0x5dc00000 0x7f000000 |
| 92 | 0xdcc00000 0x1000000>; |
| 93 | }; |
| 94 | |
| 95 | secure_bitstream_cb { |
| 96 | compatible = "qcom,msm-vidc,context-bank"; |
| 97 | label = "venus_sec_bitstream"; |
| 98 | iommus = <&apps_iommu 0x900 0x0>, |
| 99 | <&apps_iommu 0x902 0x8>, |
| 100 | <&apps_iommu 0x909 0x2>, |
| 101 | <&apps_iommu 0x90e 0x0>, |
| 102 | <&apps_iommu 0x926 0x0>, |
| 103 | <&apps_iommu 0x929 0x2>; |
| 104 | buffer-types = <0x241>; |
| 105 | virtual-addr-pool = <0x4b000000 0x12c00000>; |
| 106 | qcom,secure-context-bank; |
| 107 | }; |
| 108 | |
| 109 | secure_pixel_cb { |
| 110 | compatible = "qcom,msm-vidc,context-bank"; |
| 111 | label = "venus_sec_pixel"; |
| 112 | iommus = <&apps_iommu 0x904 0x8>, |
| 113 | <&apps_iommu 0x910 0x0>, |
| 114 | <&apps_iommu 0x92c 0x0>; |
| 115 | buffer-types = <0x106>; |
| 116 | virtual-addr-pool = <0x25800000 0x25800000>; |
| 117 | qcom,secure-context-bank; |
| 118 | }; |
| 119 | |
| 120 | secure_non_pixel_cb { |
| 121 | compatible = "qcom,msm-vidc,context-bank"; |
| 122 | label = "venus_sec_non_pixel"; |
| 123 | iommus = <&apps_iommu 0x908 0x0>, |
| 124 | <&apps_iommu 0x905 0xa>, |
| 125 | <&apps_iommu 0x925 0x8>, |
| 126 | <&apps_iommu 0x928 0x0>; |
| 127 | buffer-types = <0x480>; |
| 128 | virtual-addr-pool = <0x1000000 0x24800000>; |
| 129 | qcom,secure-context-bank; |
| 130 | }; |
| 131 | |
| 132 | /* Buses */ |
| 133 | venus_bus_ddr { |
| 134 | compatible = "qcom,msm-vidc,bus"; |
| 135 | label = "venus-ddr"; |
| 136 | qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>; |
| 137 | qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; |
| 138 | qcom,bus-governor = "venus-ddr-gov"; |
| 139 | qcom,bus-range-kbps = <1000 2365000>; |
| 140 | }; |
| 141 | |
| 142 | arm9_bus_ddr { |
| 143 | compatible = "qcom,msm-vidc,bus"; |
| 144 | label = "venus-arm9-ddr"; |
| 145 | qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>; |
| 146 | qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; |
| 147 | qcom,bus-governor = "performance"; |
| 148 | qcom,bus-range-kbps = <1 1>; |
| 149 | }; |
| 150 | }; |
| 151 | |
| 152 | venus-ddr-gov { |
| 153 | compatible = "qcom,msm-vidc,governor,table"; |
| 154 | name = "venus-ddr-gov"; |
| 155 | status = "ok"; |
| 156 | qcom,bus-freq-table { |
| 157 | qcom,profile-enc { |
| 158 | qcom,codec-mask = <0x55555555>; |
| 159 | qcom,load-busfreq-tbl = |
| 160 | <979200 1044000>, /* UHD30E */ |
| 161 | <864000 887000>, /* 720p240LPE */ |
| 162 | <489600 666000>, /* 1080p60E */ |
| 163 | <432000 578000>, /* 720p120E */ |
| 164 | <244800 346000>, /* 1080p30E */ |
| 165 | <216000 293000>, /* 720p60E */ |
| 166 | <108000 151000>, /* 720p30E */ |
| 167 | <0 0>; |
| 168 | }; |
| 169 | qcom,profile-dec { |
| 170 | qcom,codec-mask = <0xffffffff>; |
| 171 | qcom,load-busfreq-tbl = |
| 172 | <979200 2365000>, /* UHD30D */ |
| 173 | <864000 1978000>, /* 720p240D */ |
| 174 | <489600 1133000>, /* 1080p60D */ |
| 175 | <432000 994000>, /* 720p120D */ |
| 176 | <244800 580000>, /* 1080p30D */ |
| 177 | <216000 501000>, /* 720p60E */ |
| 178 | <108000 255000>, /* 720p30D */ |
| 179 | <0 0>; |
| 180 | }; |
| 181 | qcom,profile-dec-ubwc { |
| 182 | qcom,codec-mask = <0xffffffff>; |
| 183 | qcom,ubwc-mode; |
| 184 | qcom,load-busfreq-tbl = |
| 185 | <979200 1892000>, /* UHD30D */ |
| 186 | <864000 1554000>, /* 720p240D */ |
| 187 | <489600 895000>, /* 1080p60D */ |
| 188 | <432000 781000>, /* 720p120D */ |
| 189 | <244800 460000>, /* 1080p30D */ |
| 190 | <216000 301000>, /* 720p60E */ |
| 191 | <108000 202000>, /* 720p30D */ |
| 192 | <0 0>; |
| 193 | }; |
| 194 | }; |
| 195 | }; |
| 196 | |
| 197 | }; |