Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2014-2016 The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | #define pr_fmt(fmt) "SMBCHG: %s: " fmt, __func__ |
| 13 | |
| 14 | #include <linux/regmap.h> |
| 15 | #include <linux/spinlock.h> |
| 16 | #include <linux/gpio.h> |
| 17 | #include <linux/errno.h> |
| 18 | #include <linux/delay.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/slab.h> |
| 22 | #include <linux/sched.h> |
| 23 | #include <linux/power_supply.h> |
| 24 | #include <linux/of.h> |
| 25 | #include <linux/of_gpio.h> |
| 26 | #include <linux/of_irq.h> |
| 27 | #include <linux/bitops.h> |
| 28 | #include <linux/regulator/consumer.h> |
| 29 | #include <linux/regulator/driver.h> |
| 30 | #include <linux/regulator/of_regulator.h> |
| 31 | #include <linux/regulator/machine.h> |
| 32 | #include <linux/spmi.h> |
| 33 | #include <linux/platform_device.h> |
| 34 | #include <linux/printk.h> |
| 35 | #include <linux/ratelimit.h> |
| 36 | #include <linux/debugfs.h> |
| 37 | #include <linux/leds.h> |
| 38 | #include <linux/rtc.h> |
| 39 | #include <linux/qpnp/qpnp-adc.h> |
| 40 | #include <linux/batterydata-lib.h> |
| 41 | #include <linux/of_batterydata.h> |
| 42 | #include <linux/msm_bcl.h> |
| 43 | #include <linux/ktime.h> |
| 44 | #include <linux/extcon.h> |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 45 | #include <linux/pmic-voter.h> |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 46 | |
| 47 | /* Mask/Bit helpers */ |
| 48 | #define _SMB_MASK(BITS, POS) \ |
| 49 | ((unsigned char)(((1 << (BITS)) - 1) << (POS))) |
| 50 | #define SMB_MASK(LEFT_BIT_POS, RIGHT_BIT_POS) \ |
| 51 | _SMB_MASK((LEFT_BIT_POS) - (RIGHT_BIT_POS) + 1, \ |
| 52 | (RIGHT_BIT_POS)) |
| 53 | /* Config registers */ |
| 54 | struct smbchg_regulator { |
| 55 | struct regulator_desc rdesc; |
| 56 | struct regulator_dev *rdev; |
| 57 | }; |
| 58 | |
| 59 | struct parallel_usb_cfg { |
| 60 | struct power_supply *psy; |
| 61 | int min_current_thr_ma; |
| 62 | int min_9v_current_thr_ma; |
| 63 | int allowed_lowering_ma; |
| 64 | int current_max_ma; |
| 65 | bool avail; |
| 66 | struct mutex lock; |
| 67 | int initial_aicl_ma; |
| 68 | ktime_t last_disabled; |
| 69 | bool enabled_once; |
| 70 | }; |
| 71 | |
| 72 | struct ilim_entry { |
| 73 | int vmin_uv; |
| 74 | int vmax_uv; |
| 75 | int icl_pt_ma; |
| 76 | int icl_lv_ma; |
| 77 | int icl_hv_ma; |
| 78 | }; |
| 79 | |
| 80 | struct ilim_map { |
| 81 | int num; |
| 82 | struct ilim_entry *entries; |
| 83 | }; |
| 84 | |
| 85 | struct smbchg_version_tables { |
| 86 | const int *dc_ilim_ma_table; |
| 87 | int dc_ilim_ma_len; |
| 88 | const int *usb_ilim_ma_table; |
| 89 | int usb_ilim_ma_len; |
| 90 | const int *iterm_ma_table; |
| 91 | int iterm_ma_len; |
| 92 | const int *fcc_comp_table; |
| 93 | int fcc_comp_len; |
| 94 | const int *aicl_rerun_period_table; |
| 95 | int aicl_rerun_period_len; |
| 96 | int rchg_thr_mv; |
| 97 | }; |
| 98 | |
| 99 | struct smbchg_chip { |
| 100 | struct device *dev; |
| 101 | struct platform_device *pdev; |
| 102 | struct regmap *regmap; |
| 103 | int schg_version; |
| 104 | |
| 105 | /* peripheral register address bases */ |
| 106 | u16 chgr_base; |
| 107 | u16 bat_if_base; |
| 108 | u16 usb_chgpth_base; |
| 109 | u16 dc_chgpth_base; |
| 110 | u16 otg_base; |
| 111 | u16 misc_base; |
| 112 | |
| 113 | int fake_battery_soc; |
| 114 | u8 revision[4]; |
| 115 | |
| 116 | /* configuration parameters */ |
| 117 | int iterm_ma; |
| 118 | int usb_max_current_ma; |
| 119 | int typec_current_ma; |
| 120 | int dc_max_current_ma; |
| 121 | int dc_target_current_ma; |
| 122 | int cfg_fastchg_current_ma; |
| 123 | int fastchg_current_ma; |
| 124 | int vfloat_mv; |
| 125 | int fastchg_current_comp; |
| 126 | int float_voltage_comp; |
| 127 | int resume_delta_mv; |
| 128 | int safety_time; |
| 129 | int prechg_safety_time; |
| 130 | int bmd_pin_src; |
| 131 | int jeita_temp_hard_limit; |
| 132 | int aicl_rerun_period_s; |
| 133 | bool use_vfloat_adjustments; |
| 134 | bool iterm_disabled; |
| 135 | bool bmd_algo_disabled; |
| 136 | bool soft_vfloat_comp_disabled; |
| 137 | bool chg_enabled; |
| 138 | bool charge_unknown_battery; |
| 139 | bool chg_inhibit_en; |
| 140 | bool chg_inhibit_source_fg; |
| 141 | bool low_volt_dcin; |
| 142 | bool cfg_chg_led_support; |
| 143 | bool cfg_chg_led_sw_ctrl; |
| 144 | bool vbat_above_headroom; |
| 145 | bool force_aicl_rerun; |
| 146 | bool hvdcp3_supported; |
Subbaraman Narayanamurthy | 986bff5 | 2016-03-21 15:55:19 -0700 | [diff] [blame] | 147 | bool allow_hvdcp3_detection; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 148 | bool restricted_charging; |
| 149 | bool skip_usb_suspend_for_fake_battery; |
| 150 | bool hvdcp_not_supported; |
| 151 | bool otg_pinctrl; |
| 152 | u8 original_usbin_allowance; |
| 153 | struct parallel_usb_cfg parallel; |
| 154 | struct delayed_work parallel_en_work; |
| 155 | struct dentry *debug_root; |
| 156 | struct smbchg_version_tables tables; |
| 157 | |
| 158 | /* wipower params */ |
| 159 | struct ilim_map wipower_default; |
| 160 | struct ilim_map wipower_pt; |
| 161 | struct ilim_map wipower_div2; |
| 162 | struct qpnp_vadc_chip *vadc_dev; |
| 163 | bool wipower_dyn_icl_avail; |
| 164 | struct ilim_entry current_ilim; |
| 165 | struct mutex wipower_config; |
| 166 | bool wipower_configured; |
| 167 | struct qpnp_adc_tm_btm_param param; |
| 168 | |
| 169 | /* flash current prediction */ |
| 170 | int rpara_uohm; |
| 171 | int rslow_uohm; |
| 172 | int vled_max_uv; |
| 173 | |
| 174 | /* vfloat adjustment */ |
| 175 | int max_vbat_sample; |
| 176 | int n_vbat_samples; |
| 177 | |
| 178 | /* status variables */ |
Anirudh Ghayal | 88c9197 | 2016-08-04 08:15:39 +0530 | [diff] [blame] | 179 | int max_pulse_allowed; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 180 | int wake_reasons; |
| 181 | int previous_soc; |
| 182 | int usb_online; |
| 183 | bool dc_present; |
| 184 | bool usb_present; |
| 185 | bool batt_present; |
| 186 | int otg_retries; |
| 187 | ktime_t otg_enable_time; |
| 188 | bool aicl_deglitch_short; |
| 189 | bool safety_timer_en; |
| 190 | bool aicl_complete; |
| 191 | bool usb_ov_det; |
| 192 | bool otg_pulse_skip_dis; |
| 193 | const char *battery_type; |
| 194 | enum power_supply_type usb_supply_type; |
| 195 | bool very_weak_charger; |
| 196 | bool parallel_charger_detected; |
| 197 | bool chg_otg_enabled; |
| 198 | bool flash_triggered; |
| 199 | bool flash_active; |
| 200 | bool icl_disabled; |
| 201 | u32 wa_flags; |
| 202 | int usb_icl_delta; |
| 203 | bool typec_dfp; |
| 204 | unsigned int usb_current_max; |
| 205 | unsigned int usb_health; |
| 206 | |
| 207 | /* jeita and temperature */ |
| 208 | bool batt_hot; |
| 209 | bool batt_cold; |
| 210 | bool batt_warm; |
| 211 | bool batt_cool; |
| 212 | unsigned int thermal_levels; |
| 213 | unsigned int therm_lvl_sel; |
| 214 | unsigned int *thermal_mitigation; |
| 215 | |
| 216 | /* irqs */ |
| 217 | int batt_hot_irq; |
| 218 | int batt_warm_irq; |
| 219 | int batt_cool_irq; |
| 220 | int batt_cold_irq; |
| 221 | int batt_missing_irq; |
| 222 | int vbat_low_irq; |
| 223 | int chg_hot_irq; |
| 224 | int chg_term_irq; |
| 225 | int taper_irq; |
| 226 | bool taper_irq_enabled; |
| 227 | struct mutex taper_irq_lock; |
| 228 | int recharge_irq; |
| 229 | int fastchg_irq; |
| 230 | int wdog_timeout_irq; |
| 231 | int power_ok_irq; |
| 232 | int dcin_uv_irq; |
| 233 | int usbin_uv_irq; |
| 234 | int usbin_ov_irq; |
| 235 | int src_detect_irq; |
| 236 | int otg_fail_irq; |
| 237 | int otg_oc_irq; |
| 238 | int aicl_done_irq; |
| 239 | int usbid_change_irq; |
| 240 | int chg_error_irq; |
| 241 | bool enable_aicl_wake; |
| 242 | |
| 243 | /* psy */ |
| 244 | struct power_supply_desc usb_psy_d; |
| 245 | struct power_supply *usb_psy; |
| 246 | struct power_supply_desc batt_psy_d; |
| 247 | struct power_supply *batt_psy; |
| 248 | struct power_supply_desc dc_psy_d; |
| 249 | struct power_supply *dc_psy; |
| 250 | struct power_supply *bms_psy; |
| 251 | struct power_supply *typec_psy; |
| 252 | int dc_psy_type; |
| 253 | const char *bms_psy_name; |
| 254 | const char *battery_psy_name; |
| 255 | |
| 256 | struct regulator *dpdm_reg; |
| 257 | struct smbchg_regulator otg_vreg; |
| 258 | struct smbchg_regulator ext_otg_vreg; |
| 259 | struct work_struct usb_set_online_work; |
| 260 | struct delayed_work vfloat_adjust_work; |
| 261 | struct delayed_work hvdcp_det_work; |
| 262 | spinlock_t sec_access_lock; |
| 263 | struct mutex therm_lvl_lock; |
| 264 | struct mutex usb_set_online_lock; |
| 265 | struct mutex pm_lock; |
| 266 | /* aicl deglitch workaround */ |
| 267 | unsigned long first_aicl_seconds; |
| 268 | int aicl_irq_count; |
| 269 | struct mutex usb_status_lock; |
| 270 | bool hvdcp_3_det_ignore_uv; |
| 271 | struct completion src_det_lowered; |
| 272 | struct completion src_det_raised; |
| 273 | struct completion usbin_uv_lowered; |
| 274 | struct completion usbin_uv_raised; |
| 275 | int pulse_cnt; |
| 276 | struct led_classdev led_cdev; |
| 277 | bool skip_usb_notification; |
| 278 | u32 vchg_adc_channel; |
| 279 | struct qpnp_vadc_chip *vchg_vadc_dev; |
| 280 | |
| 281 | /* voters */ |
| 282 | struct votable *fcc_votable; |
| 283 | struct votable *usb_icl_votable; |
| 284 | struct votable *dc_icl_votable; |
| 285 | struct votable *usb_suspend_votable; |
| 286 | struct votable *dc_suspend_votable; |
| 287 | struct votable *battchg_suspend_votable; |
| 288 | struct votable *hw_aicl_rerun_disable_votable; |
| 289 | struct votable *hw_aicl_rerun_enable_indirect_votable; |
| 290 | struct votable *aicl_deglitch_short_votable; |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 291 | struct votable *hvdcp_enable_votable; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 292 | /* extcon for VBUS / ID notification to USB */ |
| 293 | struct extcon_dev *extcon; |
| 294 | }; |
| 295 | |
| 296 | enum qpnp_schg { |
| 297 | QPNP_SCHG, |
| 298 | QPNP_SCHG_LITE, |
| 299 | }; |
| 300 | |
| 301 | static char *version_str[] = { |
| 302 | [QPNP_SCHG] = "SCHG", |
| 303 | [QPNP_SCHG_LITE] = "SCHG_LITE", |
| 304 | }; |
| 305 | |
| 306 | enum pmic_subtype { |
| 307 | PMI8994 = 10, |
| 308 | PMI8950 = 17, |
| 309 | PMI8996 = 19, |
| 310 | PMI8937 = 55, |
| 311 | }; |
| 312 | |
| 313 | enum smbchg_wa { |
| 314 | SMBCHG_AICL_DEGLITCH_WA = BIT(0), |
| 315 | SMBCHG_HVDCP_9V_EN_WA = BIT(1), |
| 316 | SMBCHG_USB100_WA = BIT(2), |
| 317 | SMBCHG_BATT_OV_WA = BIT(3), |
| 318 | SMBCHG_CC_ESR_WA = BIT(4), |
| 319 | SMBCHG_FLASH_ICL_DISABLE_WA = BIT(5), |
| 320 | SMBCHG_RESTART_WA = BIT(6), |
| 321 | SMBCHG_FLASH_BUCK_SWITCH_FREQ_WA = BIT(7), |
| 322 | }; |
| 323 | |
| 324 | enum print_reason { |
| 325 | PR_REGISTER = BIT(0), |
| 326 | PR_INTERRUPT = BIT(1), |
| 327 | PR_STATUS = BIT(2), |
| 328 | PR_DUMP = BIT(3), |
| 329 | PR_PM = BIT(4), |
| 330 | PR_MISC = BIT(5), |
| 331 | PR_WIPOWER = BIT(6), |
| 332 | PR_TYPEC = BIT(7), |
| 333 | }; |
| 334 | |
| 335 | enum wake_reason { |
| 336 | PM_PARALLEL_CHECK = BIT(0), |
| 337 | PM_REASON_VFLOAT_ADJUST = BIT(1), |
| 338 | PM_ESR_PULSE = BIT(2), |
| 339 | PM_PARALLEL_TAPER = BIT(3), |
| 340 | PM_DETECT_HVDCP = BIT(4), |
| 341 | }; |
| 342 | |
| 343 | /* fcc_voters */ |
| 344 | #define ESR_PULSE_FCC_VOTER "ESR_PULSE_FCC_VOTER" |
| 345 | #define BATT_TYPE_FCC_VOTER "BATT_TYPE_FCC_VOTER" |
| 346 | #define RESTRICTED_CHG_FCC_VOTER "RESTRICTED_CHG_FCC_VOTER" |
| 347 | |
| 348 | /* ICL VOTERS */ |
| 349 | #define PSY_ICL_VOTER "PSY_ICL_VOTER" |
| 350 | #define THERMAL_ICL_VOTER "THERMAL_ICL_VOTER" |
| 351 | #define HVDCP_ICL_VOTER "HVDCP_ICL_VOTER" |
| 352 | #define USER_ICL_VOTER "USER_ICL_VOTER" |
| 353 | #define WEAK_CHARGER_ICL_VOTER "WEAK_CHARGER_ICL_VOTER" |
| 354 | #define SW_AICL_ICL_VOTER "SW_AICL_ICL_VOTER" |
| 355 | #define CHG_SUSPEND_WORKAROUND_ICL_VOTER "CHG_SUSPEND_WORKAROUND_ICL_VOTER" |
Abhijeet Dharmapurikar | 59384b1 | 2016-04-27 15:20:29 -0700 | [diff] [blame] | 356 | #define SHUTDOWN_WORKAROUND_ICL_VOTER "SHUTDOWN_WORKAROUND_ICL_VOTER" |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 357 | |
| 358 | /* USB SUSPEND VOTERS */ |
| 359 | /* userspace has suspended charging altogether */ |
| 360 | #define USER_EN_VOTER "USER_EN_VOTER" |
| 361 | /* |
| 362 | * this specific path has been suspended through the power supply |
| 363 | * framework |
| 364 | */ |
| 365 | #define POWER_SUPPLY_EN_VOTER "POWER_SUPPLY_EN_VOTER" |
| 366 | /* |
| 367 | * the usb driver has suspended this path by setting a current limit |
| 368 | * of < 2MA |
| 369 | */ |
| 370 | #define USB_EN_VOTER "USB_EN_VOTER" |
| 371 | /* |
| 372 | * the thermal daemon can suspend a charge path when the system |
| 373 | * temperature levels rise |
| 374 | */ |
| 375 | #define THERMAL_EN_VOTER "THERMAL_EN_VOTER" |
| 376 | /* |
| 377 | * an external OTG supply is being used, suspend charge path so the |
| 378 | * charger does not accidentally try to charge from the external supply. |
| 379 | */ |
| 380 | #define OTG_EN_VOTER "OTG_EN_VOTER" |
| 381 | /* |
| 382 | * the charger is very weak, do not draw any current from it |
| 383 | */ |
| 384 | #define WEAK_CHARGER_EN_VOTER "WEAK_CHARGER_EN_VOTER" |
| 385 | /* |
| 386 | * fake battery voter, if battery id-resistance around 7.5 Kohm |
| 387 | */ |
| 388 | #define FAKE_BATTERY_EN_VOTER "FAKE_BATTERY_EN_VOTER" |
| 389 | |
| 390 | /* battchg_enable_voters */ |
| 391 | /* userspace has disabled battery charging */ |
| 392 | #define BATTCHG_USER_EN_VOTER "BATTCHG_USER_EN_VOTER" |
| 393 | /* battery charging disabled while loading battery profiles */ |
| 394 | #define BATTCHG_UNKNOWN_BATTERY_EN_VOTER "BATTCHG_UNKNOWN_BATTERY_EN_VOTER" |
| 395 | |
| 396 | /* hw_aicl_rerun_enable_indirect_voters */ |
| 397 | /* enabled via device tree */ |
| 398 | #define DEFAULT_CONFIG_HW_AICL_VOTER "DEFAULT_CONFIG_HW_AICL_VOTER" |
| 399 | /* Varb workaround voter */ |
| 400 | #define VARB_WORKAROUND_VOTER "VARB_WORKAROUND_VOTER" |
| 401 | /* SHUTDOWN workaround voter */ |
| 402 | #define SHUTDOWN_WORKAROUND_VOTER "SHUTDOWN_WORKAROUND_VOTER" |
| 403 | |
| 404 | /* hw_aicl_rerun_disable_voters */ |
| 405 | /* the results from enabling clients */ |
| 406 | #define HW_AICL_RERUN_ENABLE_INDIRECT_VOTER \ |
| 407 | "HW_AICL_RERUN_ENABLE_INDIRECT_VOTER" |
| 408 | /* Weak charger voter */ |
| 409 | #define WEAK_CHARGER_HW_AICL_VOTER "WEAK_CHARGER_HW_AICL_VOTER" |
| 410 | |
| 411 | /* aicl_short_deglitch_voters */ |
| 412 | /* Varb workaround voter */ |
| 413 | #define VARB_WORKAROUND_SHORT_DEGLITCH_VOTER \ |
| 414 | "VARB_WRKARND_SHORT_DEGLITCH_VOTER" |
| 415 | /* QC 2.0 */ |
| 416 | #define HVDCP_SHORT_DEGLITCH_VOTER "HVDCP_SHORT_DEGLITCH_VOTER" |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 417 | /* Hvdcp enable voters*/ |
| 418 | #define HVDCP_PMIC_VOTER "HVDCP_PMIC_VOTER" |
| 419 | #define HVDCP_OTG_VOTER "HVDCP_OTG_VOTER" |
| 420 | #define HVDCP_PULSING_VOTER "HVDCP_PULSING_VOTER" |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 421 | |
| 422 | static const unsigned int smbchg_extcon_cable[] = { |
| 423 | EXTCON_USB, |
| 424 | EXTCON_USB_HOST, |
| 425 | EXTCON_NONE, |
| 426 | }; |
| 427 | |
| 428 | static int smbchg_debug_mask; |
| 429 | module_param_named( |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 430 | debug_mask, smbchg_debug_mask, int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 431 | ); |
| 432 | |
| 433 | static int smbchg_parallel_en = 1; |
| 434 | module_param_named( |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 435 | parallel_en, smbchg_parallel_en, int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 436 | ); |
| 437 | |
| 438 | static int smbchg_main_chg_fcc_percent = 50; |
| 439 | module_param_named( |
| 440 | main_chg_fcc_percent, smbchg_main_chg_fcc_percent, |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 441 | int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 442 | ); |
| 443 | |
| 444 | static int smbchg_main_chg_icl_percent = 60; |
| 445 | module_param_named( |
| 446 | main_chg_icl_percent, smbchg_main_chg_icl_percent, |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 447 | int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 448 | ); |
| 449 | |
| 450 | static int smbchg_default_hvdcp_icl_ma = 1800; |
| 451 | module_param_named( |
| 452 | default_hvdcp_icl_ma, smbchg_default_hvdcp_icl_ma, |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 453 | int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 454 | ); |
| 455 | |
| 456 | static int smbchg_default_hvdcp3_icl_ma = 3000; |
| 457 | module_param_named( |
| 458 | default_hvdcp3_icl_ma, smbchg_default_hvdcp3_icl_ma, |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 459 | int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 460 | ); |
| 461 | |
| 462 | static int smbchg_default_dcp_icl_ma = 1800; |
| 463 | module_param_named( |
| 464 | default_dcp_icl_ma, smbchg_default_dcp_icl_ma, |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 465 | int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 466 | ); |
| 467 | |
| 468 | static int wipower_dyn_icl_en; |
| 469 | module_param_named( |
| 470 | dynamic_icl_wipower_en, wipower_dyn_icl_en, |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 471 | int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 472 | ); |
| 473 | |
| 474 | static int wipower_dcin_interval = ADC_MEAS1_INTERVAL_2P0MS; |
| 475 | module_param_named( |
| 476 | wipower_dcin_interval, wipower_dcin_interval, |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 477 | int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 478 | ); |
| 479 | |
| 480 | #define WIPOWER_DEFAULT_HYSTERISIS_UV 250000 |
| 481 | static int wipower_dcin_hyst_uv = WIPOWER_DEFAULT_HYSTERISIS_UV; |
| 482 | module_param_named( |
| 483 | wipower_dcin_hyst_uv, wipower_dcin_hyst_uv, |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 484 | int, 00600 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 485 | ); |
| 486 | |
| 487 | #define pr_smb(reason, fmt, ...) \ |
| 488 | do { \ |
| 489 | if (smbchg_debug_mask & (reason)) \ |
| 490 | pr_info(fmt, ##__VA_ARGS__); \ |
| 491 | else \ |
| 492 | pr_debug(fmt, ##__VA_ARGS__); \ |
| 493 | } while (0) |
| 494 | |
| 495 | #define pr_smb_rt(reason, fmt, ...) \ |
| 496 | do { \ |
| 497 | if (smbchg_debug_mask & (reason)) \ |
| 498 | pr_info_ratelimited(fmt, ##__VA_ARGS__); \ |
| 499 | else \ |
| 500 | pr_debug(fmt, ##__VA_ARGS__); \ |
| 501 | } while (0) |
| 502 | |
| 503 | static int smbchg_read(struct smbchg_chip *chip, u8 *val, |
| 504 | u16 addr, int count) |
| 505 | { |
| 506 | int rc = 0; |
| 507 | struct platform_device *pdev = chip->pdev; |
| 508 | |
| 509 | if (addr == 0) { |
| 510 | dev_err(chip->dev, "addr cannot be zero addr=0x%02x sid=0x%02x rc=%d\n", |
| 511 | addr, to_spmi_device(pdev->dev.parent)->usid, rc); |
| 512 | return -EINVAL; |
| 513 | } |
| 514 | |
| 515 | rc = regmap_bulk_read(chip->regmap, addr, val, count); |
| 516 | if (rc) { |
| 517 | dev_err(chip->dev, "spmi read failed addr=0x%02x sid=0x%02x rc=%d\n", |
| 518 | addr, to_spmi_device(pdev->dev.parent)->usid, |
| 519 | rc); |
| 520 | return rc; |
| 521 | } |
| 522 | return 0; |
| 523 | } |
| 524 | |
| 525 | /* |
| 526 | * Writes a register to the specified by the base and limited by the bit mask |
| 527 | * |
| 528 | * Do not use this function for register writes if possible. Instead use the |
| 529 | * smbchg_masked_write function. |
| 530 | * |
| 531 | * The sec_access_lock must be held for all register writes and this function |
| 532 | * does not do that. If this function is used, please hold the spinlock or |
| 533 | * random secure access writes may fail. |
| 534 | */ |
| 535 | static int smbchg_masked_write_raw(struct smbchg_chip *chip, u16 base, u8 mask, |
| 536 | u8 val) |
| 537 | { |
| 538 | int rc; |
| 539 | |
| 540 | rc = regmap_update_bits(chip->regmap, base, mask, val); |
| 541 | if (rc) { |
| 542 | dev_err(chip->dev, "spmi write failed: addr=%03X, rc=%d\n", |
| 543 | base, rc); |
| 544 | return rc; |
| 545 | } |
| 546 | |
| 547 | return 0; |
| 548 | } |
| 549 | |
| 550 | /* |
| 551 | * Writes a register to the specified by the base and limited by the bit mask |
| 552 | * |
| 553 | * This function holds a spin lock to ensure secure access register writes goes |
| 554 | * through. If the secure access unlock register is armed, any old register |
| 555 | * write can unarm the secure access unlock, causing the next write to fail. |
| 556 | * |
| 557 | * Note: do not use this for sec_access registers. Instead use the function |
| 558 | * below: smbchg_sec_masked_write |
| 559 | */ |
| 560 | static int smbchg_masked_write(struct smbchg_chip *chip, u16 base, u8 mask, |
| 561 | u8 val) |
| 562 | { |
| 563 | unsigned long flags; |
| 564 | int rc; |
| 565 | |
| 566 | spin_lock_irqsave(&chip->sec_access_lock, flags); |
| 567 | rc = smbchg_masked_write_raw(chip, base, mask, val); |
| 568 | spin_unlock_irqrestore(&chip->sec_access_lock, flags); |
| 569 | |
| 570 | return rc; |
| 571 | } |
| 572 | |
| 573 | /* |
| 574 | * Unlocks sec access and writes to the register specified. |
| 575 | * |
| 576 | * This function holds a spin lock to exclude other register writes while |
| 577 | * the two writes are taking place. |
| 578 | */ |
| 579 | #define SEC_ACCESS_OFFSET 0xD0 |
| 580 | #define SEC_ACCESS_VALUE 0xA5 |
| 581 | #define PERIPHERAL_MASK 0xFF |
| 582 | static int smbchg_sec_masked_write(struct smbchg_chip *chip, u16 base, u8 mask, |
| 583 | u8 val) |
| 584 | { |
| 585 | unsigned long flags; |
| 586 | int rc; |
| 587 | u16 peripheral_base = base & (~PERIPHERAL_MASK); |
| 588 | |
| 589 | spin_lock_irqsave(&chip->sec_access_lock, flags); |
| 590 | |
| 591 | rc = smbchg_masked_write_raw(chip, peripheral_base + SEC_ACCESS_OFFSET, |
| 592 | SEC_ACCESS_VALUE, SEC_ACCESS_VALUE); |
| 593 | if (rc) { |
| 594 | dev_err(chip->dev, "Unable to unlock sec_access: %d", rc); |
| 595 | goto out; |
| 596 | } |
| 597 | |
| 598 | rc = smbchg_masked_write_raw(chip, base, mask, val); |
| 599 | |
| 600 | out: |
| 601 | spin_unlock_irqrestore(&chip->sec_access_lock, flags); |
| 602 | return rc; |
| 603 | } |
| 604 | |
| 605 | static void smbchg_stay_awake(struct smbchg_chip *chip, int reason) |
| 606 | { |
| 607 | int reasons; |
| 608 | |
| 609 | mutex_lock(&chip->pm_lock); |
| 610 | reasons = chip->wake_reasons | reason; |
| 611 | if (reasons != 0 && chip->wake_reasons == 0) { |
| 612 | pr_smb(PR_PM, "staying awake: 0x%02x (bit %d)\n", |
| 613 | reasons, reason); |
| 614 | pm_stay_awake(chip->dev); |
| 615 | } |
| 616 | chip->wake_reasons = reasons; |
| 617 | mutex_unlock(&chip->pm_lock); |
| 618 | } |
| 619 | |
| 620 | static void smbchg_relax(struct smbchg_chip *chip, int reason) |
| 621 | { |
| 622 | int reasons; |
| 623 | |
| 624 | mutex_lock(&chip->pm_lock); |
| 625 | reasons = chip->wake_reasons & (~reason); |
| 626 | if (reasons == 0 && chip->wake_reasons != 0) { |
| 627 | pr_smb(PR_PM, "relaxing: 0x%02x (bit %d)\n", |
| 628 | reasons, reason); |
| 629 | pm_relax(chip->dev); |
| 630 | } |
| 631 | chip->wake_reasons = reasons; |
| 632 | mutex_unlock(&chip->pm_lock); |
| 633 | }; |
| 634 | |
| 635 | enum pwr_path_type { |
| 636 | UNKNOWN = 0, |
| 637 | PWR_PATH_BATTERY = 1, |
| 638 | PWR_PATH_USB = 2, |
| 639 | PWR_PATH_DC = 3, |
| 640 | }; |
| 641 | |
| 642 | #define PWR_PATH 0x08 |
| 643 | #define PWR_PATH_MASK 0x03 |
| 644 | static enum pwr_path_type smbchg_get_pwr_path(struct smbchg_chip *chip) |
| 645 | { |
| 646 | int rc; |
| 647 | u8 reg; |
| 648 | |
| 649 | rc = smbchg_read(chip, ®, chip->usb_chgpth_base + PWR_PATH, 1); |
| 650 | if (rc < 0) { |
| 651 | dev_err(chip->dev, "Couldn't read PWR_PATH rc = %d\n", rc); |
| 652 | return PWR_PATH_BATTERY; |
| 653 | } |
| 654 | |
| 655 | return reg & PWR_PATH_MASK; |
| 656 | } |
| 657 | |
| 658 | #define RID_STS 0xB |
| 659 | #define RID_MASK 0xF |
| 660 | #define IDEV_STS 0x8 |
| 661 | #define RT_STS 0x10 |
| 662 | #define USBID_MSB 0xE |
| 663 | #define USBIN_UV_BIT BIT(0) |
| 664 | #define USBIN_OV_BIT BIT(1) |
| 665 | #define USBIN_SRC_DET_BIT BIT(2) |
| 666 | #define FMB_STS_MASK SMB_MASK(3, 0) |
| 667 | #define USBID_GND_THRESHOLD 0x495 |
| 668 | static bool is_otg_present_schg(struct smbchg_chip *chip) |
| 669 | { |
| 670 | int rc; |
| 671 | u8 reg; |
| 672 | u8 usbid_reg[2]; |
| 673 | u16 usbid_val; |
| 674 | /* |
| 675 | * After the falling edge of the usbid change interrupt occurs, |
| 676 | * there may still be some time before the ADC conversion for USB RID |
| 677 | * finishes in the fuel gauge. In the worst case, this could be up to |
| 678 | * 15 ms. |
| 679 | * |
| 680 | * Sleep for 20 ms (minimum msleep time) to wait for the conversion to |
| 681 | * finish and the USB RID status register to be updated before trying |
| 682 | * to detect OTG insertions. |
| 683 | */ |
| 684 | |
| 685 | msleep(20); |
| 686 | |
| 687 | /* |
| 688 | * There is a problem with USBID conversions on PMI8994 revisions |
| 689 | * 2.0.0. As a workaround, check that the cable is not |
| 690 | * detected as factory test before enabling OTG. |
| 691 | */ |
| 692 | rc = smbchg_read(chip, ®, chip->misc_base + IDEV_STS, 1); |
| 693 | if (rc < 0) { |
| 694 | dev_err(chip->dev, "Couldn't read IDEV_STS rc = %d\n", rc); |
| 695 | return false; |
| 696 | } |
| 697 | |
| 698 | if ((reg & FMB_STS_MASK) != 0) { |
| 699 | pr_smb(PR_STATUS, "IDEV_STS = %02x, not ground\n", reg); |
| 700 | return false; |
| 701 | } |
| 702 | |
| 703 | rc = smbchg_read(chip, usbid_reg, chip->usb_chgpth_base + USBID_MSB, 2); |
| 704 | if (rc < 0) { |
| 705 | dev_err(chip->dev, "Couldn't read USBID rc = %d\n", rc); |
| 706 | return false; |
| 707 | } |
| 708 | usbid_val = (usbid_reg[0] << 8) | usbid_reg[1]; |
| 709 | |
| 710 | if (usbid_val > USBID_GND_THRESHOLD) { |
| 711 | pr_smb(PR_STATUS, "USBID = 0x%04x, too high to be ground\n", |
| 712 | usbid_val); |
| 713 | return false; |
| 714 | } |
| 715 | |
| 716 | rc = smbchg_read(chip, ®, chip->usb_chgpth_base + RID_STS, 1); |
| 717 | if (rc < 0) { |
| 718 | dev_err(chip->dev, |
| 719 | "Couldn't read usb rid status rc = %d\n", rc); |
| 720 | return false; |
| 721 | } |
| 722 | |
| 723 | pr_smb(PR_STATUS, "RID_STS = %02x\n", reg); |
| 724 | |
| 725 | return (reg & RID_MASK) == 0; |
| 726 | } |
| 727 | |
| 728 | #define RID_GND_DET_STS BIT(2) |
| 729 | static bool is_otg_present_schg_lite(struct smbchg_chip *chip) |
| 730 | { |
| 731 | int rc; |
| 732 | u8 reg; |
| 733 | |
| 734 | rc = smbchg_read(chip, ®, chip->otg_base + RT_STS, 1); |
| 735 | if (rc < 0) { |
| 736 | dev_err(chip->dev, |
| 737 | "Couldn't read otg RT status rc = %d\n", rc); |
| 738 | return false; |
| 739 | } |
| 740 | |
| 741 | return !!(reg & RID_GND_DET_STS); |
| 742 | } |
| 743 | |
| 744 | static bool is_otg_present(struct smbchg_chip *chip) |
| 745 | { |
| 746 | if (chip->schg_version == QPNP_SCHG_LITE) |
| 747 | return is_otg_present_schg_lite(chip); |
| 748 | |
| 749 | return is_otg_present_schg(chip); |
| 750 | } |
| 751 | |
| 752 | #define USBIN_9V BIT(5) |
| 753 | #define USBIN_UNREG BIT(4) |
| 754 | #define USBIN_LV BIT(3) |
| 755 | #define DCIN_9V BIT(2) |
| 756 | #define DCIN_UNREG BIT(1) |
| 757 | #define DCIN_LV BIT(0) |
| 758 | #define INPUT_STS 0x0D |
| 759 | #define DCIN_UV_BIT BIT(0) |
| 760 | #define DCIN_OV_BIT BIT(1) |
| 761 | static bool is_dc_present(struct smbchg_chip *chip) |
| 762 | { |
| 763 | int rc; |
| 764 | u8 reg; |
| 765 | |
| 766 | rc = smbchg_read(chip, ®, chip->dc_chgpth_base + RT_STS, 1); |
| 767 | if (rc < 0) { |
| 768 | dev_err(chip->dev, "Couldn't read dc status rc = %d\n", rc); |
| 769 | return false; |
| 770 | } |
| 771 | |
| 772 | if ((reg & DCIN_UV_BIT) || (reg & DCIN_OV_BIT)) |
| 773 | return false; |
| 774 | |
| 775 | return true; |
| 776 | } |
| 777 | |
| 778 | static bool is_usb_present(struct smbchg_chip *chip) |
| 779 | { |
| 780 | int rc; |
| 781 | u8 reg; |
| 782 | |
| 783 | rc = smbchg_read(chip, ®, chip->usb_chgpth_base + RT_STS, 1); |
| 784 | if (rc < 0) { |
| 785 | dev_err(chip->dev, "Couldn't read usb rt status rc = %d\n", rc); |
| 786 | return false; |
| 787 | } |
| 788 | if (!(reg & USBIN_SRC_DET_BIT) || (reg & USBIN_OV_BIT)) |
| 789 | return false; |
| 790 | |
| 791 | rc = smbchg_read(chip, ®, chip->usb_chgpth_base + INPUT_STS, 1); |
| 792 | if (rc < 0) { |
| 793 | dev_err(chip->dev, "Couldn't read usb status rc = %d\n", rc); |
| 794 | return false; |
| 795 | } |
| 796 | |
| 797 | return !!(reg & (USBIN_9V | USBIN_UNREG | USBIN_LV)); |
| 798 | } |
| 799 | |
| 800 | static char *usb_type_str[] = { |
| 801 | "SDP", /* bit 0 */ |
| 802 | "OTHER", /* bit 1 */ |
| 803 | "DCP", /* bit 2 */ |
| 804 | "CDP", /* bit 3 */ |
| 805 | "NONE", /* bit 4 error case */ |
| 806 | }; |
| 807 | |
| 808 | #define N_TYPE_BITS 4 |
| 809 | #define TYPE_BITS_OFFSET 4 |
| 810 | |
| 811 | static int get_type(u8 type_reg) |
| 812 | { |
| 813 | unsigned long type = type_reg; |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 814 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 815 | type >>= TYPE_BITS_OFFSET; |
| 816 | return find_first_bit(&type, N_TYPE_BITS); |
| 817 | } |
| 818 | |
| 819 | /* helper to return the string of USB type */ |
| 820 | static inline char *get_usb_type_name(int type) |
| 821 | { |
| 822 | return usb_type_str[type]; |
| 823 | } |
| 824 | |
| 825 | static enum power_supply_type usb_type_enum[] = { |
| 826 | POWER_SUPPLY_TYPE_USB, /* bit 0 */ |
| 827 | POWER_SUPPLY_TYPE_USB_DCP, /* bit 1 */ |
| 828 | POWER_SUPPLY_TYPE_USB_DCP, /* bit 2 */ |
| 829 | POWER_SUPPLY_TYPE_USB_CDP, /* bit 3 */ |
| 830 | POWER_SUPPLY_TYPE_USB_DCP, /* bit 4 error case, report DCP */ |
| 831 | }; |
| 832 | |
| 833 | /* helper to return enum power_supply_type of USB type */ |
| 834 | static inline enum power_supply_type get_usb_supply_type(int type) |
| 835 | { |
| 836 | return usb_type_enum[type]; |
| 837 | } |
| 838 | |
| 839 | static bool is_src_detect_high(struct smbchg_chip *chip) |
| 840 | { |
| 841 | int rc; |
| 842 | u8 reg; |
| 843 | |
| 844 | rc = smbchg_read(chip, ®, chip->usb_chgpth_base + RT_STS, 1); |
| 845 | if (rc < 0) { |
| 846 | dev_err(chip->dev, "Couldn't read usb rt status rc = %d\n", rc); |
| 847 | return false; |
| 848 | } |
| 849 | return reg &= USBIN_SRC_DET_BIT; |
| 850 | } |
| 851 | |
| 852 | static void read_usb_type(struct smbchg_chip *chip, char **usb_type_name, |
| 853 | enum power_supply_type *usb_supply_type) |
| 854 | { |
| 855 | int rc, type; |
| 856 | u8 reg; |
| 857 | |
| 858 | if (!is_src_detect_high(chip)) { |
| 859 | pr_smb(PR_MISC, "src det low\n"); |
| 860 | *usb_type_name = "Absent"; |
| 861 | *usb_supply_type = POWER_SUPPLY_TYPE_UNKNOWN; |
| 862 | return; |
| 863 | } |
| 864 | |
| 865 | rc = smbchg_read(chip, ®, chip->misc_base + IDEV_STS, 1); |
| 866 | if (rc < 0) { |
| 867 | dev_err(chip->dev, "Couldn't read status 5 rc = %d\n", rc); |
| 868 | *usb_type_name = "Other"; |
| 869 | *usb_supply_type = POWER_SUPPLY_TYPE_UNKNOWN; |
| 870 | return; |
| 871 | } |
| 872 | type = get_type(reg); |
| 873 | *usb_type_name = get_usb_type_name(type); |
| 874 | *usb_supply_type = get_usb_supply_type(type); |
| 875 | } |
| 876 | |
| 877 | #define CHGR_STS 0x0E |
| 878 | #define BATT_LESS_THAN_2V BIT(4) |
| 879 | #define CHG_HOLD_OFF_BIT BIT(3) |
| 880 | #define CHG_TYPE_MASK SMB_MASK(2, 1) |
| 881 | #define CHG_TYPE_SHIFT 1 |
| 882 | #define BATT_NOT_CHG_VAL 0x0 |
| 883 | #define BATT_PRE_CHG_VAL 0x1 |
| 884 | #define BATT_FAST_CHG_VAL 0x2 |
| 885 | #define BATT_TAPER_CHG_VAL 0x3 |
| 886 | #define CHG_INHIBIT_BIT BIT(1) |
| 887 | #define BAT_TCC_REACHED_BIT BIT(7) |
| 888 | static int get_prop_batt_status(struct smbchg_chip *chip) |
| 889 | { |
| 890 | int rc, status = POWER_SUPPLY_STATUS_DISCHARGING; |
| 891 | u8 reg = 0, chg_type; |
| 892 | bool charger_present, chg_inhibit; |
| 893 | |
| 894 | charger_present = is_usb_present(chip) | is_dc_present(chip) | |
| 895 | chip->hvdcp_3_det_ignore_uv; |
| 896 | if (!charger_present) |
| 897 | return POWER_SUPPLY_STATUS_DISCHARGING; |
| 898 | |
| 899 | rc = smbchg_read(chip, ®, chip->chgr_base + RT_STS, 1); |
| 900 | if (rc < 0) { |
| 901 | dev_err(chip->dev, "Unable to read RT_STS rc = %d\n", rc); |
| 902 | return POWER_SUPPLY_STATUS_UNKNOWN; |
| 903 | } |
| 904 | |
| 905 | if (reg & BAT_TCC_REACHED_BIT) |
| 906 | return POWER_SUPPLY_STATUS_FULL; |
| 907 | |
| 908 | chg_inhibit = reg & CHG_INHIBIT_BIT; |
| 909 | if (chg_inhibit) |
| 910 | return POWER_SUPPLY_STATUS_FULL; |
| 911 | |
| 912 | rc = smbchg_read(chip, ®, chip->chgr_base + CHGR_STS, 1); |
| 913 | if (rc < 0) { |
| 914 | dev_err(chip->dev, "Unable to read CHGR_STS rc = %d\n", rc); |
| 915 | return POWER_SUPPLY_STATUS_UNKNOWN; |
| 916 | } |
| 917 | |
| 918 | if (reg & CHG_HOLD_OFF_BIT) { |
| 919 | /* |
| 920 | * when chg hold off happens the battery is |
| 921 | * not charging |
| 922 | */ |
| 923 | status = POWER_SUPPLY_STATUS_NOT_CHARGING; |
| 924 | goto out; |
| 925 | } |
| 926 | |
| 927 | chg_type = (reg & CHG_TYPE_MASK) >> CHG_TYPE_SHIFT; |
| 928 | |
| 929 | if (chg_type == BATT_NOT_CHG_VAL && !chip->hvdcp_3_det_ignore_uv) |
| 930 | status = POWER_SUPPLY_STATUS_DISCHARGING; |
| 931 | else |
| 932 | status = POWER_SUPPLY_STATUS_CHARGING; |
| 933 | out: |
| 934 | pr_smb_rt(PR_MISC, "CHGR_STS = 0x%02x\n", reg); |
| 935 | return status; |
| 936 | } |
| 937 | |
| 938 | #define BAT_PRES_STATUS 0x08 |
| 939 | #define BAT_PRES_BIT BIT(7) |
| 940 | static int get_prop_batt_present(struct smbchg_chip *chip) |
| 941 | { |
| 942 | int rc; |
| 943 | u8 reg; |
| 944 | |
| 945 | rc = smbchg_read(chip, ®, chip->bat_if_base + BAT_PRES_STATUS, 1); |
| 946 | if (rc < 0) { |
| 947 | dev_err(chip->dev, "Unable to read CHGR_STS rc = %d\n", rc); |
| 948 | return 0; |
| 949 | } |
| 950 | |
| 951 | return !!(reg & BAT_PRES_BIT); |
| 952 | } |
| 953 | |
| 954 | static int get_prop_charge_type(struct smbchg_chip *chip) |
| 955 | { |
| 956 | int rc; |
| 957 | u8 reg, chg_type; |
| 958 | |
| 959 | rc = smbchg_read(chip, ®, chip->chgr_base + CHGR_STS, 1); |
| 960 | if (rc < 0) { |
| 961 | dev_err(chip->dev, "Unable to read CHGR_STS rc = %d\n", rc); |
| 962 | return 0; |
| 963 | } |
| 964 | |
| 965 | chg_type = (reg & CHG_TYPE_MASK) >> CHG_TYPE_SHIFT; |
| 966 | if (chg_type == BATT_NOT_CHG_VAL) |
| 967 | return POWER_SUPPLY_CHARGE_TYPE_NONE; |
| 968 | else if (chg_type == BATT_TAPER_CHG_VAL) |
| 969 | return POWER_SUPPLY_CHARGE_TYPE_TAPER; |
| 970 | else if (chg_type == BATT_FAST_CHG_VAL) |
| 971 | return POWER_SUPPLY_CHARGE_TYPE_FAST; |
| 972 | else if (chg_type == BATT_PRE_CHG_VAL) |
| 973 | return POWER_SUPPLY_CHARGE_TYPE_TRICKLE; |
| 974 | |
| 975 | return POWER_SUPPLY_CHARGE_TYPE_NONE; |
| 976 | } |
| 977 | |
| 978 | static int set_property_on_fg(struct smbchg_chip *chip, |
| 979 | enum power_supply_property prop, int val) |
| 980 | { |
| 981 | int rc; |
| 982 | union power_supply_propval ret = {0, }; |
| 983 | |
| 984 | if (!chip->bms_psy && chip->bms_psy_name) |
| 985 | chip->bms_psy = |
| 986 | power_supply_get_by_name((char *)chip->bms_psy_name); |
| 987 | if (!chip->bms_psy) { |
| 988 | pr_smb(PR_STATUS, "no bms psy found\n"); |
| 989 | return -EINVAL; |
| 990 | } |
| 991 | |
| 992 | ret.intval = val; |
| 993 | rc = power_supply_set_property(chip->bms_psy, prop, &ret); |
| 994 | if (rc) |
| 995 | pr_smb(PR_STATUS, |
| 996 | "bms psy does not allow updating prop %d rc = %d\n", |
| 997 | prop, rc); |
| 998 | |
| 999 | return rc; |
| 1000 | } |
| 1001 | |
| 1002 | static int get_property_from_fg(struct smbchg_chip *chip, |
| 1003 | enum power_supply_property prop, int *val) |
| 1004 | { |
| 1005 | int rc; |
| 1006 | union power_supply_propval ret = {0, }; |
| 1007 | |
| 1008 | if (!chip->bms_psy && chip->bms_psy_name) |
| 1009 | chip->bms_psy = |
| 1010 | power_supply_get_by_name((char *)chip->bms_psy_name); |
| 1011 | if (!chip->bms_psy) { |
| 1012 | pr_smb(PR_STATUS, "no bms psy found\n"); |
| 1013 | return -EINVAL; |
| 1014 | } |
| 1015 | |
| 1016 | rc = power_supply_get_property(chip->bms_psy, prop, &ret); |
| 1017 | if (rc) { |
| 1018 | pr_smb(PR_STATUS, |
| 1019 | "bms psy doesn't support reading prop %d rc = %d\n", |
| 1020 | prop, rc); |
| 1021 | return rc; |
| 1022 | } |
| 1023 | |
| 1024 | *val = ret.intval; |
| 1025 | return rc; |
| 1026 | } |
| 1027 | |
| 1028 | #define DEFAULT_BATT_CAPACITY 50 |
| 1029 | static int get_prop_batt_capacity(struct smbchg_chip *chip) |
| 1030 | { |
| 1031 | int capacity, rc; |
| 1032 | |
| 1033 | if (chip->fake_battery_soc >= 0) |
| 1034 | return chip->fake_battery_soc; |
| 1035 | |
| 1036 | rc = get_property_from_fg(chip, POWER_SUPPLY_PROP_CAPACITY, &capacity); |
| 1037 | if (rc) { |
| 1038 | pr_smb(PR_STATUS, "Couldn't get capacity rc = %d\n", rc); |
| 1039 | capacity = DEFAULT_BATT_CAPACITY; |
| 1040 | } |
| 1041 | return capacity; |
| 1042 | } |
| 1043 | |
| 1044 | #define DEFAULT_BATT_TEMP 200 |
| 1045 | static int get_prop_batt_temp(struct smbchg_chip *chip) |
| 1046 | { |
| 1047 | int temp, rc; |
| 1048 | |
| 1049 | rc = get_property_from_fg(chip, POWER_SUPPLY_PROP_TEMP, &temp); |
| 1050 | if (rc) { |
| 1051 | pr_smb(PR_STATUS, "Couldn't get temperature rc = %d\n", rc); |
| 1052 | temp = DEFAULT_BATT_TEMP; |
| 1053 | } |
| 1054 | return temp; |
| 1055 | } |
| 1056 | |
| 1057 | #define DEFAULT_BATT_CURRENT_NOW 0 |
| 1058 | static int get_prop_batt_current_now(struct smbchg_chip *chip) |
| 1059 | { |
| 1060 | int ua, rc; |
| 1061 | |
| 1062 | rc = get_property_from_fg(chip, POWER_SUPPLY_PROP_CURRENT_NOW, &ua); |
| 1063 | if (rc) { |
| 1064 | pr_smb(PR_STATUS, "Couldn't get current rc = %d\n", rc); |
| 1065 | ua = DEFAULT_BATT_CURRENT_NOW; |
| 1066 | } |
| 1067 | return ua; |
| 1068 | } |
| 1069 | |
Subbaraman Narayanamurthy | 82861b1 | 2016-05-16 18:20:54 -0700 | [diff] [blame] | 1070 | #define DEFAULT_BATT_RESISTANCE_ID 0 |
| 1071 | static int get_prop_batt_resistance_id(struct smbchg_chip *chip) |
| 1072 | { |
| 1073 | int rbatt, rc; |
| 1074 | |
| 1075 | rc = get_property_from_fg(chip, POWER_SUPPLY_PROP_RESISTANCE_ID, |
| 1076 | &rbatt); |
| 1077 | if (rc) { |
| 1078 | pr_smb(PR_STATUS, "Couldn't get resistance id rc = %d\n", rc); |
| 1079 | rbatt = DEFAULT_BATT_RESISTANCE_ID; |
| 1080 | } |
| 1081 | return rbatt; |
| 1082 | } |
| 1083 | |
| 1084 | #define DEFAULT_BATT_FULL_CHG_CAPACITY 0 |
| 1085 | static int get_prop_batt_full_charge(struct smbchg_chip *chip) |
| 1086 | { |
| 1087 | int bfc, rc; |
| 1088 | |
| 1089 | rc = get_property_from_fg(chip, POWER_SUPPLY_PROP_CHARGE_FULL, &bfc); |
| 1090 | if (rc) { |
| 1091 | pr_smb(PR_STATUS, "Couldn't get charge_full rc = %d\n", rc); |
| 1092 | bfc = DEFAULT_BATT_FULL_CHG_CAPACITY; |
| 1093 | } |
| 1094 | return bfc; |
| 1095 | } |
| 1096 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 1097 | #define DEFAULT_BATT_VOLTAGE_NOW 0 |
| 1098 | static int get_prop_batt_voltage_now(struct smbchg_chip *chip) |
| 1099 | { |
| 1100 | int uv, rc; |
| 1101 | |
| 1102 | rc = get_property_from_fg(chip, POWER_SUPPLY_PROP_VOLTAGE_NOW, &uv); |
| 1103 | if (rc) { |
| 1104 | pr_smb(PR_STATUS, "Couldn't get voltage rc = %d\n", rc); |
| 1105 | uv = DEFAULT_BATT_VOLTAGE_NOW; |
| 1106 | } |
| 1107 | return uv; |
| 1108 | } |
| 1109 | |
| 1110 | #define DEFAULT_BATT_VOLTAGE_MAX_DESIGN 4200000 |
| 1111 | static int get_prop_batt_voltage_max_design(struct smbchg_chip *chip) |
| 1112 | { |
| 1113 | int uv, rc; |
| 1114 | |
| 1115 | rc = get_property_from_fg(chip, |
| 1116 | POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, &uv); |
| 1117 | if (rc) { |
| 1118 | pr_smb(PR_STATUS, "Couldn't get voltage rc = %d\n", rc); |
| 1119 | uv = DEFAULT_BATT_VOLTAGE_MAX_DESIGN; |
| 1120 | } |
| 1121 | return uv; |
| 1122 | } |
| 1123 | |
| 1124 | static int get_prop_batt_health(struct smbchg_chip *chip) |
| 1125 | { |
| 1126 | if (chip->batt_hot) |
| 1127 | return POWER_SUPPLY_HEALTH_OVERHEAT; |
| 1128 | else if (chip->batt_cold) |
| 1129 | return POWER_SUPPLY_HEALTH_COLD; |
| 1130 | else if (chip->batt_warm) |
| 1131 | return POWER_SUPPLY_HEALTH_WARM; |
| 1132 | else if (chip->batt_cool) |
| 1133 | return POWER_SUPPLY_HEALTH_COOL; |
| 1134 | else |
| 1135 | return POWER_SUPPLY_HEALTH_GOOD; |
| 1136 | } |
| 1137 | |
| 1138 | static void get_property_from_typec(struct smbchg_chip *chip, |
| 1139 | enum power_supply_property property, |
| 1140 | union power_supply_propval *prop) |
| 1141 | { |
| 1142 | int rc; |
| 1143 | |
| 1144 | rc = power_supply_get_property(chip->typec_psy, |
| 1145 | property, prop); |
| 1146 | if (rc) |
| 1147 | pr_smb(PR_TYPEC, |
| 1148 | "typec psy doesn't support reading prop %d rc = %d\n", |
| 1149 | property, rc); |
| 1150 | } |
| 1151 | |
| 1152 | static void update_typec_status(struct smbchg_chip *chip) |
| 1153 | { |
| 1154 | union power_supply_propval type = {0, }; |
| 1155 | union power_supply_propval capability = {0, }; |
| 1156 | |
| 1157 | get_property_from_typec(chip, POWER_SUPPLY_PROP_TYPE, &type); |
| 1158 | if (type.intval != POWER_SUPPLY_TYPE_UNKNOWN) { |
| 1159 | get_property_from_typec(chip, |
| 1160 | POWER_SUPPLY_PROP_CURRENT_CAPABILITY, |
| 1161 | &capability); |
| 1162 | chip->typec_current_ma = capability.intval; |
| 1163 | pr_smb(PR_TYPEC, "SMB Type-C mode = %d, current=%d\n", |
| 1164 | type.intval, capability.intval); |
| 1165 | } else { |
| 1166 | pr_smb(PR_TYPEC, |
| 1167 | "typec detection not completed continuing with USB update\n"); |
| 1168 | } |
| 1169 | } |
| 1170 | |
| 1171 | /* |
| 1172 | * finds the index of the closest value in the array. If there are two that |
| 1173 | * are equally close, the lower index will be returned |
| 1174 | */ |
| 1175 | static int find_closest_in_array(const int *arr, int len, int val) |
| 1176 | { |
| 1177 | int i, closest = 0; |
| 1178 | |
| 1179 | if (len == 0) |
| 1180 | return closest; |
| 1181 | for (i = 0; i < len; i++) |
| 1182 | if (abs(val - arr[i]) < abs(val - arr[closest])) |
| 1183 | closest = i; |
| 1184 | |
| 1185 | return closest; |
| 1186 | } |
| 1187 | |
| 1188 | /* finds the index of the closest smaller value in the array. */ |
| 1189 | static int find_smaller_in_array(const int *table, int val, int len) |
| 1190 | { |
| 1191 | int i; |
| 1192 | |
| 1193 | for (i = len - 1; i >= 0; i--) { |
| 1194 | if (val >= table[i]) |
| 1195 | break; |
| 1196 | } |
| 1197 | |
| 1198 | return i; |
| 1199 | } |
| 1200 | |
| 1201 | static const int iterm_ma_table_8994[] = { |
| 1202 | 300, |
| 1203 | 50, |
| 1204 | 100, |
| 1205 | 150, |
| 1206 | 200, |
| 1207 | 250, |
| 1208 | 500, |
| 1209 | 600 |
| 1210 | }; |
| 1211 | |
| 1212 | static const int iterm_ma_table_8996[] = { |
| 1213 | 300, |
| 1214 | 50, |
| 1215 | 100, |
| 1216 | 150, |
| 1217 | 200, |
| 1218 | 250, |
| 1219 | 400, |
| 1220 | 500 |
| 1221 | }; |
| 1222 | |
| 1223 | static const int usb_ilim_ma_table_8994[] = { |
| 1224 | 300, |
| 1225 | 400, |
| 1226 | 450, |
| 1227 | 475, |
| 1228 | 500, |
| 1229 | 550, |
| 1230 | 600, |
| 1231 | 650, |
| 1232 | 700, |
| 1233 | 900, |
| 1234 | 950, |
| 1235 | 1000, |
| 1236 | 1100, |
| 1237 | 1200, |
| 1238 | 1400, |
| 1239 | 1450, |
| 1240 | 1500, |
| 1241 | 1600, |
| 1242 | 1800, |
| 1243 | 1850, |
| 1244 | 1880, |
| 1245 | 1910, |
| 1246 | 1930, |
| 1247 | 1950, |
| 1248 | 1970, |
| 1249 | 2000, |
| 1250 | 2050, |
| 1251 | 2100, |
| 1252 | 2300, |
| 1253 | 2400, |
| 1254 | 2500, |
| 1255 | 3000 |
| 1256 | }; |
| 1257 | |
| 1258 | static const int usb_ilim_ma_table_8996[] = { |
| 1259 | 300, |
| 1260 | 400, |
| 1261 | 500, |
| 1262 | 600, |
| 1263 | 700, |
| 1264 | 800, |
| 1265 | 900, |
| 1266 | 1000, |
| 1267 | 1100, |
| 1268 | 1200, |
| 1269 | 1300, |
| 1270 | 1400, |
| 1271 | 1450, |
| 1272 | 1500, |
| 1273 | 1550, |
| 1274 | 1600, |
| 1275 | 1700, |
| 1276 | 1800, |
| 1277 | 1900, |
| 1278 | 1950, |
| 1279 | 2000, |
| 1280 | 2050, |
| 1281 | 2100, |
| 1282 | 2200, |
| 1283 | 2300, |
| 1284 | 2400, |
| 1285 | 2500, |
| 1286 | 2600, |
| 1287 | 2700, |
| 1288 | 2800, |
| 1289 | 2900, |
| 1290 | 3000 |
| 1291 | }; |
| 1292 | |
| 1293 | static int dc_ilim_ma_table_8994[] = { |
| 1294 | 300, |
| 1295 | 400, |
| 1296 | 450, |
| 1297 | 475, |
| 1298 | 500, |
| 1299 | 550, |
| 1300 | 600, |
| 1301 | 650, |
| 1302 | 700, |
| 1303 | 900, |
| 1304 | 950, |
| 1305 | 1000, |
| 1306 | 1100, |
| 1307 | 1200, |
| 1308 | 1400, |
| 1309 | 1450, |
| 1310 | 1500, |
| 1311 | 1600, |
| 1312 | 1800, |
| 1313 | 1850, |
| 1314 | 1880, |
| 1315 | 1910, |
| 1316 | 1930, |
| 1317 | 1950, |
| 1318 | 1970, |
| 1319 | 2000, |
| 1320 | }; |
| 1321 | |
| 1322 | static int dc_ilim_ma_table_8996[] = { |
| 1323 | 300, |
| 1324 | 400, |
| 1325 | 500, |
| 1326 | 600, |
| 1327 | 700, |
| 1328 | 800, |
| 1329 | 900, |
| 1330 | 1000, |
| 1331 | 1100, |
| 1332 | 1200, |
| 1333 | 1300, |
| 1334 | 1400, |
| 1335 | 1450, |
| 1336 | 1500, |
| 1337 | 1550, |
| 1338 | 1600, |
| 1339 | 1700, |
| 1340 | 1800, |
| 1341 | 1900, |
| 1342 | 1950, |
| 1343 | 2000, |
| 1344 | 2050, |
| 1345 | 2100, |
| 1346 | 2200, |
| 1347 | 2300, |
| 1348 | 2400, |
| 1349 | }; |
| 1350 | |
| 1351 | static const int fcc_comp_table_8994[] = { |
| 1352 | 250, |
| 1353 | 700, |
| 1354 | 900, |
| 1355 | 1200, |
| 1356 | }; |
| 1357 | |
| 1358 | static const int fcc_comp_table_8996[] = { |
| 1359 | 250, |
| 1360 | 1100, |
| 1361 | 1200, |
| 1362 | 1500, |
| 1363 | }; |
| 1364 | |
| 1365 | static const int aicl_rerun_period[] = { |
| 1366 | 45, |
| 1367 | 90, |
| 1368 | 180, |
| 1369 | 360, |
| 1370 | }; |
| 1371 | |
| 1372 | static const int aicl_rerun_period_schg_lite[] = { |
| 1373 | 3, /* 2.8s */ |
| 1374 | 6, /* 5.6s */ |
| 1375 | 11, /* 11.3s */ |
| 1376 | 23, /* 22.5s */ |
| 1377 | 45, |
| 1378 | 90, |
| 1379 | 180, |
| 1380 | 360, |
| 1381 | }; |
| 1382 | |
| 1383 | static void use_pmi8994_tables(struct smbchg_chip *chip) |
| 1384 | { |
| 1385 | chip->tables.usb_ilim_ma_table = usb_ilim_ma_table_8994; |
| 1386 | chip->tables.usb_ilim_ma_len = ARRAY_SIZE(usb_ilim_ma_table_8994); |
| 1387 | chip->tables.dc_ilim_ma_table = dc_ilim_ma_table_8994; |
| 1388 | chip->tables.dc_ilim_ma_len = ARRAY_SIZE(dc_ilim_ma_table_8994); |
| 1389 | chip->tables.iterm_ma_table = iterm_ma_table_8994; |
| 1390 | chip->tables.iterm_ma_len = ARRAY_SIZE(iterm_ma_table_8994); |
| 1391 | chip->tables.fcc_comp_table = fcc_comp_table_8994; |
| 1392 | chip->tables.fcc_comp_len = ARRAY_SIZE(fcc_comp_table_8994); |
| 1393 | chip->tables.rchg_thr_mv = 200; |
| 1394 | chip->tables.aicl_rerun_period_table = aicl_rerun_period; |
| 1395 | chip->tables.aicl_rerun_period_len = ARRAY_SIZE(aicl_rerun_period); |
| 1396 | } |
| 1397 | |
| 1398 | static void use_pmi8996_tables(struct smbchg_chip *chip) |
| 1399 | { |
| 1400 | chip->tables.usb_ilim_ma_table = usb_ilim_ma_table_8996; |
| 1401 | chip->tables.usb_ilim_ma_len = ARRAY_SIZE(usb_ilim_ma_table_8996); |
| 1402 | chip->tables.dc_ilim_ma_table = dc_ilim_ma_table_8996; |
| 1403 | chip->tables.dc_ilim_ma_len = ARRAY_SIZE(dc_ilim_ma_table_8996); |
| 1404 | chip->tables.iterm_ma_table = iterm_ma_table_8996; |
| 1405 | chip->tables.iterm_ma_len = ARRAY_SIZE(iterm_ma_table_8996); |
| 1406 | chip->tables.fcc_comp_table = fcc_comp_table_8996; |
| 1407 | chip->tables.fcc_comp_len = ARRAY_SIZE(fcc_comp_table_8996); |
| 1408 | chip->tables.rchg_thr_mv = 150; |
| 1409 | chip->tables.aicl_rerun_period_table = aicl_rerun_period; |
| 1410 | chip->tables.aicl_rerun_period_len = ARRAY_SIZE(aicl_rerun_period); |
| 1411 | } |
| 1412 | |
| 1413 | #define CMD_CHG_REG 0x42 |
| 1414 | #define EN_BAT_CHG_BIT BIT(1) |
| 1415 | static int smbchg_charging_en(struct smbchg_chip *chip, bool en) |
| 1416 | { |
| 1417 | /* The en bit is configured active low */ |
| 1418 | return smbchg_masked_write(chip, chip->bat_if_base + CMD_CHG_REG, |
| 1419 | EN_BAT_CHG_BIT, en ? 0 : EN_BAT_CHG_BIT); |
| 1420 | } |
| 1421 | |
| 1422 | #define CMD_IL 0x40 |
| 1423 | #define USBIN_SUSPEND_BIT BIT(4) |
| 1424 | #define CURRENT_100_MA 100 |
| 1425 | #define CURRENT_150_MA 150 |
| 1426 | #define CURRENT_500_MA 500 |
| 1427 | #define CURRENT_900_MA 900 |
| 1428 | #define CURRENT_1500_MA 1500 |
| 1429 | #define SUSPEND_CURRENT_MA 2 |
| 1430 | #define ICL_OVERRIDE_BIT BIT(2) |
| 1431 | static int smbchg_usb_suspend(struct smbchg_chip *chip, bool suspend) |
| 1432 | { |
| 1433 | int rc; |
| 1434 | |
| 1435 | rc = smbchg_masked_write(chip, chip->usb_chgpth_base + CMD_IL, |
| 1436 | USBIN_SUSPEND_BIT, suspend ? USBIN_SUSPEND_BIT : 0); |
| 1437 | if (rc < 0) |
| 1438 | dev_err(chip->dev, "Couldn't set usb suspend rc = %d\n", rc); |
| 1439 | return rc; |
| 1440 | } |
| 1441 | |
| 1442 | #define DCIN_SUSPEND_BIT BIT(3) |
| 1443 | static int smbchg_dc_suspend(struct smbchg_chip *chip, bool suspend) |
| 1444 | { |
| 1445 | int rc = 0; |
| 1446 | |
| 1447 | rc = smbchg_masked_write(chip, chip->usb_chgpth_base + CMD_IL, |
| 1448 | DCIN_SUSPEND_BIT, suspend ? DCIN_SUSPEND_BIT : 0); |
| 1449 | if (rc < 0) |
| 1450 | dev_err(chip->dev, "Couldn't set dc suspend rc = %d\n", rc); |
| 1451 | return rc; |
| 1452 | } |
| 1453 | |
| 1454 | #define IL_CFG 0xF2 |
| 1455 | #define DCIN_INPUT_MASK SMB_MASK(4, 0) |
| 1456 | static int smbchg_set_dc_current_max(struct smbchg_chip *chip, int current_ma) |
| 1457 | { |
| 1458 | int i; |
| 1459 | u8 dc_cur_val; |
| 1460 | |
| 1461 | i = find_smaller_in_array(chip->tables.dc_ilim_ma_table, |
| 1462 | current_ma, chip->tables.dc_ilim_ma_len); |
| 1463 | |
| 1464 | if (i < 0) { |
| 1465 | dev_err(chip->dev, "Cannot find %dma current_table\n", |
| 1466 | current_ma); |
| 1467 | return -EINVAL; |
| 1468 | } |
| 1469 | |
| 1470 | chip->dc_max_current_ma = chip->tables.dc_ilim_ma_table[i]; |
| 1471 | dc_cur_val = i & DCIN_INPUT_MASK; |
| 1472 | |
| 1473 | pr_smb(PR_STATUS, "dc current set to %d mA\n", |
| 1474 | chip->dc_max_current_ma); |
| 1475 | return smbchg_sec_masked_write(chip, chip->dc_chgpth_base + IL_CFG, |
| 1476 | DCIN_INPUT_MASK, dc_cur_val); |
| 1477 | } |
| 1478 | |
| 1479 | #define AICL_WL_SEL_CFG 0xF5 |
| 1480 | #define AICL_WL_SEL_MASK SMB_MASK(1, 0) |
| 1481 | #define AICL_WL_SEL_SCHG_LITE_MASK SMB_MASK(2, 0) |
| 1482 | static int smbchg_set_aicl_rerun_period_s(struct smbchg_chip *chip, |
| 1483 | int period_s) |
| 1484 | { |
| 1485 | int i; |
| 1486 | u8 reg, mask; |
| 1487 | |
| 1488 | i = find_smaller_in_array(chip->tables.aicl_rerun_period_table, |
| 1489 | period_s, chip->tables.aicl_rerun_period_len); |
| 1490 | |
| 1491 | if (i < 0) { |
| 1492 | dev_err(chip->dev, "Cannot find %ds in aicl rerun period\n", |
| 1493 | period_s); |
| 1494 | return -EINVAL; |
| 1495 | } |
| 1496 | |
| 1497 | if (chip->schg_version == QPNP_SCHG_LITE) |
| 1498 | mask = AICL_WL_SEL_SCHG_LITE_MASK; |
| 1499 | else |
| 1500 | mask = AICL_WL_SEL_MASK; |
| 1501 | |
| 1502 | reg = i & mask; |
| 1503 | |
| 1504 | pr_smb(PR_STATUS, "aicl rerun period set to %ds\n", |
| 1505 | chip->tables.aicl_rerun_period_table[i]); |
| 1506 | return smbchg_sec_masked_write(chip, |
| 1507 | chip->dc_chgpth_base + AICL_WL_SEL_CFG, |
| 1508 | mask, reg); |
| 1509 | } |
| 1510 | |
| 1511 | static struct power_supply *get_parallel_psy(struct smbchg_chip *chip) |
| 1512 | { |
| 1513 | if (!chip->parallel.avail) |
| 1514 | return NULL; |
| 1515 | if (chip->parallel.psy) |
| 1516 | return chip->parallel.psy; |
| 1517 | chip->parallel.psy = power_supply_get_by_name("usb-parallel"); |
| 1518 | if (!chip->parallel.psy) |
| 1519 | pr_smb(PR_STATUS, "parallel charger not found\n"); |
| 1520 | return chip->parallel.psy; |
| 1521 | } |
| 1522 | |
| 1523 | static void smbchg_usb_update_online_work(struct work_struct *work) |
| 1524 | { |
| 1525 | struct smbchg_chip *chip = container_of(work, |
| 1526 | struct smbchg_chip, |
| 1527 | usb_set_online_work); |
| 1528 | bool user_enabled = !get_client_vote(chip->usb_suspend_votable, |
| 1529 | USER_EN_VOTER); |
| 1530 | int online; |
| 1531 | |
| 1532 | online = user_enabled && chip->usb_present && !chip->very_weak_charger; |
| 1533 | |
| 1534 | mutex_lock(&chip->usb_set_online_lock); |
| 1535 | if (chip->usb_online != online) { |
| 1536 | pr_smb(PR_MISC, "setting usb psy online = %d\n", online); |
| 1537 | chip->usb_online = online; |
| 1538 | power_supply_changed(chip->usb_psy); |
| 1539 | } |
| 1540 | mutex_unlock(&chip->usb_set_online_lock); |
| 1541 | } |
| 1542 | |
| 1543 | #define CHGPTH_CFG 0xF4 |
| 1544 | #define CFG_USB_2_3_SEL_BIT BIT(7) |
| 1545 | #define CFG_USB_2 0 |
| 1546 | #define CFG_USB_3 BIT(7) |
| 1547 | #define USBIN_INPUT_MASK SMB_MASK(4, 0) |
| 1548 | #define USBIN_MODE_CHG_BIT BIT(0) |
| 1549 | #define USBIN_LIMITED_MODE 0 |
| 1550 | #define USBIN_HC_MODE BIT(0) |
| 1551 | #define USB51_MODE_BIT BIT(1) |
| 1552 | #define USB51_100MA 0 |
| 1553 | #define USB51_500MA BIT(1) |
| 1554 | static int smbchg_set_high_usb_chg_current(struct smbchg_chip *chip, |
| 1555 | int current_ma) |
| 1556 | { |
| 1557 | int i, rc; |
| 1558 | u8 usb_cur_val; |
| 1559 | |
| 1560 | if (current_ma == CURRENT_100_MA) { |
| 1561 | rc = smbchg_sec_masked_write(chip, |
| 1562 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 1563 | CFG_USB_2_3_SEL_BIT, CFG_USB_2); |
| 1564 | if (rc < 0) { |
| 1565 | pr_err("Couldn't set CFG_USB_2 rc=%d\n", rc); |
| 1566 | return rc; |
| 1567 | } |
| 1568 | |
| 1569 | rc = smbchg_masked_write(chip, chip->usb_chgpth_base + CMD_IL, |
| 1570 | USBIN_MODE_CHG_BIT | USB51_MODE_BIT | ICL_OVERRIDE_BIT, |
| 1571 | USBIN_LIMITED_MODE | USB51_100MA | ICL_OVERRIDE_BIT); |
| 1572 | if (rc < 0) { |
| 1573 | pr_err("Couldn't set ICL_OVERRIDE rc=%d\n", rc); |
| 1574 | return rc; |
| 1575 | } |
| 1576 | |
| 1577 | pr_smb(PR_STATUS, |
| 1578 | "Forcing 100mA current limit\n"); |
| 1579 | chip->usb_max_current_ma = CURRENT_100_MA; |
| 1580 | return rc; |
| 1581 | } |
| 1582 | |
| 1583 | i = find_smaller_in_array(chip->tables.usb_ilim_ma_table, |
| 1584 | current_ma, chip->tables.usb_ilim_ma_len); |
| 1585 | if (i < 0) { |
| 1586 | dev_err(chip->dev, |
| 1587 | "Cannot find %dma current_table using %d\n", |
| 1588 | current_ma, CURRENT_150_MA); |
| 1589 | |
| 1590 | rc = smbchg_sec_masked_write(chip, |
| 1591 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 1592 | CFG_USB_2_3_SEL_BIT, CFG_USB_3); |
| 1593 | rc |= smbchg_masked_write(chip, chip->usb_chgpth_base + CMD_IL, |
| 1594 | USBIN_MODE_CHG_BIT | USB51_MODE_BIT, |
| 1595 | USBIN_LIMITED_MODE | USB51_100MA); |
| 1596 | if (rc < 0) |
| 1597 | dev_err(chip->dev, "Couldn't set %dmA rc=%d\n", |
| 1598 | CURRENT_150_MA, rc); |
| 1599 | else |
| 1600 | chip->usb_max_current_ma = 150; |
| 1601 | return rc; |
| 1602 | } |
| 1603 | |
| 1604 | usb_cur_val = i & USBIN_INPUT_MASK; |
| 1605 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + IL_CFG, |
| 1606 | USBIN_INPUT_MASK, usb_cur_val); |
| 1607 | if (rc < 0) { |
| 1608 | dev_err(chip->dev, "cannot write to config c rc = %d\n", rc); |
| 1609 | return rc; |
| 1610 | } |
| 1611 | |
| 1612 | rc = smbchg_masked_write(chip, chip->usb_chgpth_base + CMD_IL, |
| 1613 | USBIN_MODE_CHG_BIT, USBIN_HC_MODE); |
| 1614 | if (rc < 0) |
| 1615 | dev_err(chip->dev, "Couldn't write cfg 5 rc = %d\n", rc); |
| 1616 | chip->usb_max_current_ma = chip->tables.usb_ilim_ma_table[i]; |
| 1617 | return rc; |
| 1618 | } |
| 1619 | |
| 1620 | /* if APSD results are used |
| 1621 | * if SDP is detected it will look at 500mA setting |
| 1622 | * if set it will draw 500mA |
| 1623 | * if unset it will draw 100mA |
| 1624 | * if CDP/DCP it will look at 0x0C setting |
| 1625 | * i.e. values in 0x41[1, 0] does not matter |
| 1626 | */ |
| 1627 | static int smbchg_set_usb_current_max(struct smbchg_chip *chip, |
| 1628 | int current_ma) |
| 1629 | { |
| 1630 | int rc = 0; |
| 1631 | |
| 1632 | /* |
| 1633 | * if the battery is not present, do not allow the usb ICL to lower in |
| 1634 | * order to avoid browning out the device during a hotswap. |
| 1635 | */ |
| 1636 | if (!chip->batt_present && current_ma < chip->usb_max_current_ma) { |
| 1637 | pr_info_ratelimited("Ignoring usb current->%d, battery is absent\n", |
| 1638 | current_ma); |
| 1639 | return 0; |
| 1640 | } |
| 1641 | pr_smb(PR_STATUS, "USB current_ma = %d\n", current_ma); |
| 1642 | |
| 1643 | if (current_ma <= SUSPEND_CURRENT_MA) { |
| 1644 | /* suspend the usb if current <= 2mA */ |
| 1645 | rc = vote(chip->usb_suspend_votable, USB_EN_VOTER, true, 0); |
| 1646 | chip->usb_max_current_ma = 0; |
| 1647 | goto out; |
| 1648 | } else { |
| 1649 | rc = vote(chip->usb_suspend_votable, USB_EN_VOTER, false, 0); |
| 1650 | } |
| 1651 | |
| 1652 | switch (chip->usb_supply_type) { |
| 1653 | case POWER_SUPPLY_TYPE_USB: |
| 1654 | if ((current_ma < CURRENT_150_MA) && |
| 1655 | (chip->wa_flags & SMBCHG_USB100_WA)) |
| 1656 | current_ma = CURRENT_150_MA; |
| 1657 | |
| 1658 | if (current_ma < CURRENT_150_MA) { |
| 1659 | /* force 100mA */ |
| 1660 | rc = smbchg_sec_masked_write(chip, |
| 1661 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 1662 | CFG_USB_2_3_SEL_BIT, CFG_USB_2); |
| 1663 | if (rc < 0) { |
| 1664 | pr_err("Couldn't set CHGPTH_CFG rc = %d\n", rc); |
| 1665 | goto out; |
| 1666 | } |
| 1667 | rc = smbchg_masked_write(chip, |
| 1668 | chip->usb_chgpth_base + CMD_IL, |
| 1669 | USBIN_MODE_CHG_BIT | USB51_MODE_BIT, |
| 1670 | USBIN_LIMITED_MODE | USB51_100MA); |
| 1671 | if (rc < 0) { |
| 1672 | pr_err("Couldn't set CMD_IL rc = %d\n", rc); |
| 1673 | goto out; |
| 1674 | } |
| 1675 | chip->usb_max_current_ma = 100; |
| 1676 | } |
| 1677 | /* specific current values */ |
| 1678 | if (current_ma == CURRENT_150_MA) { |
| 1679 | rc = smbchg_sec_masked_write(chip, |
| 1680 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 1681 | CFG_USB_2_3_SEL_BIT, CFG_USB_3); |
| 1682 | if (rc < 0) { |
| 1683 | pr_err("Couldn't set CHGPTH_CFG rc = %d\n", rc); |
| 1684 | goto out; |
| 1685 | } |
| 1686 | rc = smbchg_masked_write(chip, |
| 1687 | chip->usb_chgpth_base + CMD_IL, |
| 1688 | USBIN_MODE_CHG_BIT | USB51_MODE_BIT, |
| 1689 | USBIN_LIMITED_MODE | USB51_100MA); |
| 1690 | if (rc < 0) { |
| 1691 | pr_err("Couldn't set CMD_IL rc = %d\n", rc); |
| 1692 | goto out; |
| 1693 | } |
| 1694 | chip->usb_max_current_ma = 150; |
| 1695 | } |
| 1696 | if (current_ma == CURRENT_500_MA) { |
| 1697 | rc = smbchg_sec_masked_write(chip, |
| 1698 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 1699 | CFG_USB_2_3_SEL_BIT, CFG_USB_2); |
| 1700 | if (rc < 0) { |
| 1701 | pr_err("Couldn't set CHGPTH_CFG rc = %d\n", rc); |
| 1702 | goto out; |
| 1703 | } |
| 1704 | rc = smbchg_masked_write(chip, |
| 1705 | chip->usb_chgpth_base + CMD_IL, |
| 1706 | USBIN_MODE_CHG_BIT | USB51_MODE_BIT, |
| 1707 | USBIN_LIMITED_MODE | USB51_500MA); |
| 1708 | if (rc < 0) { |
| 1709 | pr_err("Couldn't set CMD_IL rc = %d\n", rc); |
| 1710 | goto out; |
| 1711 | } |
| 1712 | chip->usb_max_current_ma = 500; |
| 1713 | } |
| 1714 | if (current_ma == CURRENT_900_MA) { |
| 1715 | rc = smbchg_sec_masked_write(chip, |
| 1716 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 1717 | CFG_USB_2_3_SEL_BIT, CFG_USB_3); |
| 1718 | if (rc < 0) { |
| 1719 | pr_err("Couldn't set CHGPTH_CFG rc = %d\n", rc); |
| 1720 | goto out; |
| 1721 | } |
| 1722 | rc = smbchg_masked_write(chip, |
| 1723 | chip->usb_chgpth_base + CMD_IL, |
| 1724 | USBIN_MODE_CHG_BIT | USB51_MODE_BIT, |
| 1725 | USBIN_LIMITED_MODE | USB51_500MA); |
| 1726 | if (rc < 0) { |
| 1727 | pr_err("Couldn't set CMD_IL rc = %d\n", rc); |
| 1728 | goto out; |
| 1729 | } |
| 1730 | chip->usb_max_current_ma = 900; |
| 1731 | } |
| 1732 | break; |
| 1733 | case POWER_SUPPLY_TYPE_USB_CDP: |
| 1734 | if (current_ma < CURRENT_1500_MA) { |
| 1735 | /* use override for CDP */ |
| 1736 | rc = smbchg_masked_write(chip, |
| 1737 | chip->usb_chgpth_base + CMD_IL, |
| 1738 | ICL_OVERRIDE_BIT, ICL_OVERRIDE_BIT); |
| 1739 | if (rc < 0) |
| 1740 | pr_err("Couldn't set override rc = %d\n", rc); |
| 1741 | } |
| 1742 | /* fall through */ |
| 1743 | default: |
| 1744 | rc = smbchg_set_high_usb_chg_current(chip, current_ma); |
| 1745 | if (rc < 0) |
| 1746 | pr_err("Couldn't set %dmA rc = %d\n", current_ma, rc); |
| 1747 | break; |
| 1748 | } |
| 1749 | |
| 1750 | out: |
| 1751 | pr_smb(PR_STATUS, "usb type = %d current set to %d mA\n", |
| 1752 | chip->usb_supply_type, chip->usb_max_current_ma); |
| 1753 | return rc; |
| 1754 | } |
| 1755 | |
| 1756 | #define USBIN_HVDCP_STS 0x0C |
| 1757 | #define USBIN_HVDCP_SEL_BIT BIT(4) |
| 1758 | #define USBIN_HVDCP_SEL_9V_BIT BIT(1) |
| 1759 | #define SCHG_LITE_USBIN_HVDCP_SEL_9V_BIT BIT(2) |
| 1760 | #define SCHG_LITE_USBIN_HVDCP_SEL_BIT BIT(0) |
| 1761 | static int smbchg_get_min_parallel_current_ma(struct smbchg_chip *chip) |
| 1762 | { |
| 1763 | int rc; |
| 1764 | u8 reg, hvdcp_sel, hvdcp_sel_9v; |
| 1765 | |
| 1766 | rc = smbchg_read(chip, ®, |
| 1767 | chip->usb_chgpth_base + USBIN_HVDCP_STS, 1); |
| 1768 | if (rc < 0) { |
| 1769 | dev_err(chip->dev, "Couldn't read usb status rc = %d\n", rc); |
| 1770 | return 0; |
| 1771 | } |
| 1772 | if (chip->schg_version == QPNP_SCHG_LITE) { |
| 1773 | hvdcp_sel = SCHG_LITE_USBIN_HVDCP_SEL_BIT; |
| 1774 | hvdcp_sel_9v = SCHG_LITE_USBIN_HVDCP_SEL_9V_BIT; |
| 1775 | } else { |
| 1776 | hvdcp_sel = USBIN_HVDCP_SEL_BIT; |
| 1777 | hvdcp_sel_9v = USBIN_HVDCP_SEL_9V_BIT; |
| 1778 | } |
| 1779 | |
| 1780 | if ((reg & hvdcp_sel) && (reg & hvdcp_sel_9v)) |
| 1781 | return chip->parallel.min_9v_current_thr_ma; |
| 1782 | return chip->parallel.min_current_thr_ma; |
| 1783 | } |
| 1784 | |
| 1785 | static bool is_hvdcp_present(struct smbchg_chip *chip) |
| 1786 | { |
| 1787 | int rc; |
| 1788 | u8 reg, hvdcp_sel; |
| 1789 | |
| 1790 | rc = smbchg_read(chip, ®, |
| 1791 | chip->usb_chgpth_base + USBIN_HVDCP_STS, 1); |
| 1792 | if (rc < 0) { |
| 1793 | pr_err("Couldn't read hvdcp status rc = %d\n", rc); |
| 1794 | return false; |
| 1795 | } |
| 1796 | |
| 1797 | pr_smb(PR_STATUS, "HVDCP_STS = 0x%02x\n", reg); |
| 1798 | /* |
| 1799 | * If a valid HVDCP is detected, notify it to the usb_psy only |
| 1800 | * if USB is still present. |
| 1801 | */ |
| 1802 | if (chip->schg_version == QPNP_SCHG_LITE) |
| 1803 | hvdcp_sel = SCHG_LITE_USBIN_HVDCP_SEL_BIT; |
| 1804 | else |
| 1805 | hvdcp_sel = USBIN_HVDCP_SEL_BIT; |
| 1806 | |
| 1807 | if ((reg & hvdcp_sel) && is_usb_present(chip)) |
| 1808 | return true; |
| 1809 | |
| 1810 | return false; |
| 1811 | } |
| 1812 | |
| 1813 | #define FCC_CFG 0xF2 |
| 1814 | #define FCC_500MA_VAL 0x4 |
| 1815 | #define FCC_MASK SMB_MASK(4, 0) |
| 1816 | static int smbchg_set_fastchg_current_raw(struct smbchg_chip *chip, |
| 1817 | int current_ma) |
| 1818 | { |
| 1819 | int i, rc; |
| 1820 | u8 cur_val; |
| 1821 | |
| 1822 | /* the fcc enumerations are the same as the usb currents */ |
| 1823 | i = find_smaller_in_array(chip->tables.usb_ilim_ma_table, |
| 1824 | current_ma, chip->tables.usb_ilim_ma_len); |
| 1825 | if (i < 0) { |
| 1826 | dev_err(chip->dev, |
| 1827 | "Cannot find %dma current_table using %d\n", |
| 1828 | current_ma, CURRENT_500_MA); |
| 1829 | |
| 1830 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + FCC_CFG, |
| 1831 | FCC_MASK, |
| 1832 | FCC_500MA_VAL); |
| 1833 | if (rc < 0) |
| 1834 | dev_err(chip->dev, "Couldn't set %dmA rc=%d\n", |
| 1835 | CURRENT_500_MA, rc); |
| 1836 | else |
| 1837 | chip->fastchg_current_ma = 500; |
| 1838 | return rc; |
| 1839 | } |
| 1840 | |
| 1841 | if (chip->tables.usb_ilim_ma_table[i] == chip->fastchg_current_ma) { |
| 1842 | pr_smb(PR_STATUS, "skipping fastchg current request: %d\n", |
| 1843 | chip->fastchg_current_ma); |
| 1844 | return 0; |
| 1845 | } |
| 1846 | |
| 1847 | cur_val = i & FCC_MASK; |
| 1848 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + FCC_CFG, |
| 1849 | FCC_MASK, cur_val); |
| 1850 | if (rc < 0) { |
| 1851 | dev_err(chip->dev, "cannot write to fcc cfg rc = %d\n", rc); |
| 1852 | return rc; |
| 1853 | } |
| 1854 | pr_smb(PR_STATUS, "fastcharge current requested %d, set to %d\n", |
| 1855 | current_ma, chip->tables.usb_ilim_ma_table[cur_val]); |
| 1856 | |
| 1857 | chip->fastchg_current_ma = chip->tables.usb_ilim_ma_table[cur_val]; |
| 1858 | return rc; |
| 1859 | } |
| 1860 | |
| 1861 | #define ICL_STS_1_REG 0x7 |
| 1862 | #define ICL_STS_2_REG 0x9 |
| 1863 | #define ICL_STS_MASK 0x1F |
| 1864 | #define AICL_SUSP_BIT BIT(6) |
| 1865 | #define AICL_STS_BIT BIT(5) |
| 1866 | #define USBIN_SUSPEND_STS_BIT BIT(3) |
| 1867 | #define USBIN_ACTIVE_PWR_SRC_BIT BIT(1) |
| 1868 | #define DCIN_ACTIVE_PWR_SRC_BIT BIT(0) |
| 1869 | #define PARALLEL_REENABLE_TIMER_MS 1000 |
| 1870 | #define PARALLEL_CHG_THRESHOLD_CURRENT 1800 |
| 1871 | static bool smbchg_is_usbin_active_pwr_src(struct smbchg_chip *chip) |
| 1872 | { |
| 1873 | int rc; |
| 1874 | u8 reg; |
| 1875 | |
| 1876 | rc = smbchg_read(chip, ®, |
| 1877 | chip->usb_chgpth_base + ICL_STS_2_REG, 1); |
| 1878 | if (rc < 0) { |
| 1879 | dev_err(chip->dev, "Could not read usb icl sts 2: %d\n", rc); |
| 1880 | return false; |
| 1881 | } |
| 1882 | |
| 1883 | return !(reg & USBIN_SUSPEND_STS_BIT) |
| 1884 | && (reg & USBIN_ACTIVE_PWR_SRC_BIT); |
| 1885 | } |
| 1886 | |
Ashay Jaiswal | 7af2613 | 2016-02-01 18:45:28 +0530 | [diff] [blame] | 1887 | static void smbchg_detect_parallel_charger(struct smbchg_chip *chip) |
| 1888 | { |
| 1889 | int rc; |
| 1890 | struct power_supply *parallel_psy = get_parallel_psy(chip); |
| 1891 | union power_supply_propval pval = {0, }; |
| 1892 | |
| 1893 | if (parallel_psy) { |
| 1894 | pval.intval = true; |
| 1895 | rc = power_supply_set_property(parallel_psy, |
| 1896 | POWER_SUPPLY_PROP_PRESENT, &pval); |
| 1897 | chip->parallel_charger_detected = rc ? false : true; |
| 1898 | if (rc) |
| 1899 | pr_debug("parallel-charger absent rc=%d\n", rc); |
| 1900 | } |
| 1901 | } |
| 1902 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 1903 | static int smbchg_parallel_usb_charging_en(struct smbchg_chip *chip, bool en) |
| 1904 | { |
| 1905 | struct power_supply *parallel_psy = get_parallel_psy(chip); |
| 1906 | union power_supply_propval pval = {0, }; |
| 1907 | |
| 1908 | if (!parallel_psy || !chip->parallel_charger_detected) |
| 1909 | return 0; |
| 1910 | |
| 1911 | pval.intval = en; |
| 1912 | return power_supply_set_property(parallel_psy, |
| 1913 | POWER_SUPPLY_PROP_CHARGING_ENABLED, &pval); |
| 1914 | } |
| 1915 | |
| 1916 | #define ESR_PULSE_CURRENT_DELTA_MA 200 |
| 1917 | static int smbchg_sw_esr_pulse_en(struct smbchg_chip *chip, bool en) |
| 1918 | { |
| 1919 | int rc, fg_current_now, icl_ma; |
| 1920 | |
| 1921 | rc = get_property_from_fg(chip, POWER_SUPPLY_PROP_CURRENT_NOW, |
| 1922 | &fg_current_now); |
| 1923 | if (rc) { |
| 1924 | pr_smb(PR_STATUS, "bms psy does not support OCV\n"); |
| 1925 | return 0; |
| 1926 | } |
| 1927 | |
Fenglin Wu | db1d853 | 2016-05-05 11:08:12 +0800 | [diff] [blame] | 1928 | fg_current_now = abs(fg_current_now) / 1000; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 1929 | icl_ma = max(chip->iterm_ma + ESR_PULSE_CURRENT_DELTA_MA, |
| 1930 | fg_current_now - ESR_PULSE_CURRENT_DELTA_MA); |
| 1931 | rc = vote(chip->fcc_votable, ESR_PULSE_FCC_VOTER, en, icl_ma); |
| 1932 | if (rc < 0) { |
| 1933 | pr_err("Couldn't Vote FCC en = %d rc = %d\n", en, rc); |
| 1934 | return rc; |
| 1935 | } |
| 1936 | rc = smbchg_parallel_usb_charging_en(chip, !en); |
| 1937 | return rc; |
| 1938 | } |
| 1939 | |
| 1940 | #define USB_AICL_CFG 0xF3 |
| 1941 | #define AICL_EN_BIT BIT(2) |
| 1942 | static void smbchg_rerun_aicl(struct smbchg_chip *chip) |
| 1943 | { |
| 1944 | pr_smb(PR_STATUS, "Rerunning AICL...\n"); |
| 1945 | smbchg_sec_masked_write(chip, chip->usb_chgpth_base + USB_AICL_CFG, |
| 1946 | AICL_EN_BIT, 0); |
| 1947 | /* Add a delay so that AICL successfully clears */ |
| 1948 | msleep(50); |
| 1949 | smbchg_sec_masked_write(chip, chip->usb_chgpth_base + USB_AICL_CFG, |
| 1950 | AICL_EN_BIT, AICL_EN_BIT); |
| 1951 | } |
| 1952 | |
| 1953 | static void taper_irq_en(struct smbchg_chip *chip, bool en) |
| 1954 | { |
| 1955 | mutex_lock(&chip->taper_irq_lock); |
| 1956 | if (en != chip->taper_irq_enabled) { |
| 1957 | if (en) { |
| 1958 | enable_irq(chip->taper_irq); |
| 1959 | enable_irq_wake(chip->taper_irq); |
| 1960 | } else { |
| 1961 | disable_irq_wake(chip->taper_irq); |
| 1962 | disable_irq_nosync(chip->taper_irq); |
| 1963 | } |
| 1964 | chip->taper_irq_enabled = en; |
| 1965 | } |
| 1966 | mutex_unlock(&chip->taper_irq_lock); |
| 1967 | } |
| 1968 | |
| 1969 | static int smbchg_get_aicl_level_ma(struct smbchg_chip *chip) |
| 1970 | { |
| 1971 | int rc; |
| 1972 | u8 reg; |
| 1973 | |
| 1974 | rc = smbchg_read(chip, ®, |
| 1975 | chip->usb_chgpth_base + ICL_STS_1_REG, 1); |
| 1976 | if (rc < 0) { |
| 1977 | dev_err(chip->dev, "Could not read usb icl sts 1: %d\n", rc); |
| 1978 | return 0; |
| 1979 | } |
| 1980 | if (reg & AICL_SUSP_BIT) { |
| 1981 | pr_warn("AICL suspended: %02x\n", reg); |
| 1982 | return 0; |
| 1983 | } |
| 1984 | reg &= ICL_STS_MASK; |
| 1985 | if (reg >= chip->tables.usb_ilim_ma_len) { |
| 1986 | pr_warn("invalid AICL value: %02x\n", reg); |
| 1987 | return 0; |
| 1988 | } |
| 1989 | return chip->tables.usb_ilim_ma_table[reg]; |
| 1990 | } |
| 1991 | |
| 1992 | static void smbchg_parallel_usb_disable(struct smbchg_chip *chip) |
| 1993 | { |
| 1994 | struct power_supply *parallel_psy = get_parallel_psy(chip); |
| 1995 | union power_supply_propval pval = {0, }; |
| 1996 | int fcc_ma, usb_icl_ma; |
| 1997 | |
| 1998 | if (!parallel_psy || !chip->parallel_charger_detected) |
| 1999 | return; |
| 2000 | pr_smb(PR_STATUS, "disabling parallel charger\n"); |
| 2001 | chip->parallel.last_disabled = ktime_get_boottime(); |
| 2002 | taper_irq_en(chip, false); |
| 2003 | chip->parallel.initial_aicl_ma = 0; |
| 2004 | chip->parallel.current_max_ma = 0; |
| 2005 | pval.intval = SUSPEND_CURRENT_MA * 1000; |
| 2006 | power_supply_set_property(parallel_psy, POWER_SUPPLY_PROP_CURRENT_MAX, |
| 2007 | &pval); |
| 2008 | |
| 2009 | pval.intval = false; |
| 2010 | power_supply_set_property(parallel_psy, POWER_SUPPLY_PROP_PRESENT, |
| 2011 | &pval); |
| 2012 | |
| 2013 | fcc_ma = get_effective_result_locked(chip->fcc_votable); |
| 2014 | usb_icl_ma = get_effective_result_locked(chip->usb_icl_votable); |
| 2015 | if (fcc_ma < 0) |
| 2016 | pr_err("no voters for fcc, skip it\n"); |
| 2017 | else |
| 2018 | smbchg_set_fastchg_current_raw(chip, fcc_ma); |
| 2019 | |
| 2020 | if (usb_icl_ma < 0) |
| 2021 | pr_err("no voters for usb_icl, skip it\n"); |
| 2022 | else |
| 2023 | smbchg_set_usb_current_max(chip, usb_icl_ma); |
| 2024 | |
| 2025 | smbchg_rerun_aicl(chip); |
| 2026 | } |
| 2027 | |
| 2028 | #define PARALLEL_TAPER_MAX_TRIES 3 |
| 2029 | #define PARALLEL_FCC_PERCENT_REDUCTION 75 |
| 2030 | #define MINIMUM_PARALLEL_FCC_MA 500 |
| 2031 | #define CHG_ERROR_BIT BIT(0) |
| 2032 | #define BAT_TAPER_MODE_BIT BIT(6) |
| 2033 | static void smbchg_parallel_usb_taper(struct smbchg_chip *chip) |
| 2034 | { |
| 2035 | struct power_supply *parallel_psy = get_parallel_psy(chip); |
| 2036 | union power_supply_propval pval = {0, }; |
| 2037 | int parallel_fcc_ma, tries = 0; |
| 2038 | u8 reg = 0; |
| 2039 | |
Ashay Jaiswal | 7af2613 | 2016-02-01 18:45:28 +0530 | [diff] [blame] | 2040 | smbchg_detect_parallel_charger(chip); |
| 2041 | if (!chip->parallel_charger_detected) |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 2042 | return; |
| 2043 | |
| 2044 | smbchg_stay_awake(chip, PM_PARALLEL_TAPER); |
| 2045 | try_again: |
| 2046 | mutex_lock(&chip->parallel.lock); |
| 2047 | if (chip->parallel.current_max_ma == 0) { |
| 2048 | pr_smb(PR_STATUS, "Not parallel charging, skipping\n"); |
| 2049 | goto done; |
| 2050 | } |
| 2051 | power_supply_get_property(parallel_psy, |
| 2052 | POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, &pval); |
| 2053 | tries += 1; |
| 2054 | parallel_fcc_ma = pval.intval / 1000; |
| 2055 | pr_smb(PR_STATUS, "try #%d parallel charger fcc = %d\n", |
| 2056 | tries, parallel_fcc_ma); |
| 2057 | if (parallel_fcc_ma < MINIMUM_PARALLEL_FCC_MA |
| 2058 | || tries > PARALLEL_TAPER_MAX_TRIES) { |
| 2059 | smbchg_parallel_usb_disable(chip); |
| 2060 | goto done; |
| 2061 | } |
| 2062 | pval.intval = ((parallel_fcc_ma |
| 2063 | * PARALLEL_FCC_PERCENT_REDUCTION) / 100); |
| 2064 | pr_smb(PR_STATUS, "reducing FCC of parallel charger to %d\n", |
| 2065 | pval.intval); |
| 2066 | /* Change it to uA */ |
| 2067 | pval.intval *= 1000; |
| 2068 | power_supply_set_property(parallel_psy, |
| 2069 | POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, &pval); |
| 2070 | /* |
| 2071 | * sleep here for 100 ms in order to make sure the charger has a chance |
| 2072 | * to go back into constant current charging |
| 2073 | */ |
| 2074 | mutex_unlock(&chip->parallel.lock); |
| 2075 | msleep(100); |
| 2076 | |
| 2077 | mutex_lock(&chip->parallel.lock); |
| 2078 | if (chip->parallel.current_max_ma == 0) { |
| 2079 | pr_smb(PR_STATUS, "Not parallel charging, skipping\n"); |
| 2080 | goto done; |
| 2081 | } |
| 2082 | smbchg_read(chip, ®, chip->chgr_base + RT_STS, 1); |
| 2083 | if (reg & BAT_TAPER_MODE_BIT) { |
| 2084 | mutex_unlock(&chip->parallel.lock); |
| 2085 | goto try_again; |
| 2086 | } |
| 2087 | taper_irq_en(chip, true); |
| 2088 | done: |
| 2089 | mutex_unlock(&chip->parallel.lock); |
| 2090 | smbchg_relax(chip, PM_PARALLEL_TAPER); |
| 2091 | } |
| 2092 | |
| 2093 | static void smbchg_parallel_usb_enable(struct smbchg_chip *chip, |
| 2094 | int total_current_ma) |
| 2095 | { |
| 2096 | struct power_supply *parallel_psy = get_parallel_psy(chip); |
| 2097 | union power_supply_propval pval = {0, }; |
| 2098 | int new_parallel_cl_ma, set_parallel_cl_ma, new_pmi_cl_ma, rc; |
| 2099 | int current_table_index, target_icl_ma; |
| 2100 | int fcc_ma, main_fastchg_current_ma; |
| 2101 | int target_parallel_fcc_ma, supplied_parallel_fcc_ma; |
| 2102 | int parallel_chg_fcc_percent; |
| 2103 | |
| 2104 | if (!parallel_psy || !chip->parallel_charger_detected) |
| 2105 | return; |
| 2106 | |
| 2107 | pr_smb(PR_STATUS, "Attempting to enable parallel charger\n"); |
| 2108 | pval.intval = chip->vfloat_mv + 50; |
| 2109 | rc = power_supply_set_property(parallel_psy, |
| 2110 | POWER_SUPPLY_PROP_VOLTAGE_MAX, &pval); |
| 2111 | if (rc < 0) { |
| 2112 | dev_err(chip->dev, |
| 2113 | "Couldn't set Vflt on parallel psy rc: %d\n", rc); |
| 2114 | return; |
| 2115 | } |
| 2116 | /* Set USB ICL */ |
| 2117 | target_icl_ma = get_effective_result_locked(chip->usb_icl_votable); |
| 2118 | if (target_icl_ma < 0) { |
| 2119 | pr_err("no voters for usb_icl, skip it\n"); |
| 2120 | return; |
| 2121 | } |
| 2122 | new_parallel_cl_ma = total_current_ma |
| 2123 | * (100 - smbchg_main_chg_icl_percent) / 100; |
| 2124 | taper_irq_en(chip, true); |
| 2125 | |
| 2126 | pval.intval = true; |
| 2127 | power_supply_set_property(parallel_psy, POWER_SUPPLY_PROP_PRESENT, |
| 2128 | &pval); |
| 2129 | |
| 2130 | pval.intval = new_parallel_cl_ma * 1000; |
| 2131 | power_supply_set_property(parallel_psy, POWER_SUPPLY_PROP_CURRENT_MAX, |
| 2132 | &pval); |
| 2133 | |
| 2134 | /* read back the real amount of current we are getting */ |
| 2135 | power_supply_get_property(parallel_psy, |
| 2136 | POWER_SUPPLY_PROP_CURRENT_MAX, &pval); |
| 2137 | set_parallel_cl_ma = pval.intval / 1000; |
| 2138 | chip->parallel.current_max_ma = new_parallel_cl_ma; |
| 2139 | pr_smb(PR_MISC, "Requested ICL = %d from parallel, got %d\n", |
| 2140 | new_parallel_cl_ma, set_parallel_cl_ma); |
| 2141 | new_pmi_cl_ma = max(0, target_icl_ma - set_parallel_cl_ma); |
| 2142 | pr_smb(PR_STATUS, "New Total USB current = %d[%d, %d]\n", |
| 2143 | total_current_ma, new_pmi_cl_ma, |
| 2144 | set_parallel_cl_ma); |
| 2145 | smbchg_set_usb_current_max(chip, new_pmi_cl_ma); |
| 2146 | |
| 2147 | /* begin splitting the fast charge current */ |
| 2148 | fcc_ma = get_effective_result_locked(chip->fcc_votable); |
| 2149 | if (fcc_ma < 0) { |
| 2150 | pr_err("no voters for fcc, skip it\n"); |
| 2151 | return; |
| 2152 | } |
| 2153 | parallel_chg_fcc_percent = 100 - smbchg_main_chg_fcc_percent; |
| 2154 | target_parallel_fcc_ma = (fcc_ma * parallel_chg_fcc_percent) / 100; |
| 2155 | pval.intval = target_parallel_fcc_ma * 1000; |
| 2156 | power_supply_set_property(parallel_psy, |
| 2157 | POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, &pval); |
| 2158 | /* check how much actual current is supplied by the parallel charger */ |
| 2159 | power_supply_get_property(parallel_psy, |
| 2160 | POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, &pval); |
| 2161 | supplied_parallel_fcc_ma = pval.intval / 1000; |
| 2162 | pr_smb(PR_MISC, "Requested FCC = %d from parallel, got %d\n", |
| 2163 | target_parallel_fcc_ma, supplied_parallel_fcc_ma); |
| 2164 | |
| 2165 | /* then for the main charger, use the left over FCC */ |
| 2166 | current_table_index = find_smaller_in_array( |
| 2167 | chip->tables.usb_ilim_ma_table, |
| 2168 | fcc_ma - supplied_parallel_fcc_ma, |
| 2169 | chip->tables.usb_ilim_ma_len); |
| 2170 | main_fastchg_current_ma = |
| 2171 | chip->tables.usb_ilim_ma_table[current_table_index]; |
| 2172 | smbchg_set_fastchg_current_raw(chip, main_fastchg_current_ma); |
| 2173 | pr_smb(PR_STATUS, "FCC = %d[%d, %d]\n", fcc_ma, main_fastchg_current_ma, |
| 2174 | supplied_parallel_fcc_ma); |
| 2175 | |
| 2176 | chip->parallel.enabled_once = true; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 2177 | } |
| 2178 | |
| 2179 | static bool smbchg_is_parallel_usb_ok(struct smbchg_chip *chip, |
| 2180 | int *ret_total_current_ma) |
| 2181 | { |
| 2182 | struct power_supply *parallel_psy = get_parallel_psy(chip); |
| 2183 | union power_supply_propval pval = {0, }; |
| 2184 | int min_current_thr_ma, rc, type; |
| 2185 | int total_current_ma, current_limit_ma, parallel_cl_ma; |
| 2186 | ktime_t kt_since_last_disable; |
| 2187 | u8 reg; |
| 2188 | int fcc_ma = get_effective_result_locked(chip->fcc_votable); |
| 2189 | const char *fcc_voter |
| 2190 | = get_effective_client_locked(chip->fcc_votable); |
| 2191 | int usb_icl_ma = get_effective_result_locked(chip->usb_icl_votable); |
| 2192 | |
| 2193 | if (!parallel_psy || !smbchg_parallel_en |
| 2194 | || !chip->parallel_charger_detected) { |
| 2195 | pr_smb(PR_STATUS, "Parallel charging not enabled\n"); |
| 2196 | return false; |
| 2197 | } |
| 2198 | |
| 2199 | if (fcc_ma < 0) { |
| 2200 | pr_err("no voters for fcc! Can't enable parallel\n"); |
| 2201 | return false; |
| 2202 | } |
| 2203 | if (usb_icl_ma < 0) { |
| 2204 | pr_err("no voters for usb_icl, Can't enable parallel\n"); |
| 2205 | return false; |
| 2206 | } |
| 2207 | |
| 2208 | kt_since_last_disable = ktime_sub(ktime_get_boottime(), |
| 2209 | chip->parallel.last_disabled); |
| 2210 | if (chip->parallel.current_max_ma == 0 |
| 2211 | && chip->parallel.enabled_once |
| 2212 | && ktime_to_ms(kt_since_last_disable) |
| 2213 | < PARALLEL_REENABLE_TIMER_MS) { |
| 2214 | pr_smb(PR_STATUS, "Only been %lld since disable, skipping\n", |
| 2215 | ktime_to_ms(kt_since_last_disable)); |
| 2216 | return false; |
| 2217 | } |
| 2218 | |
| 2219 | /* |
| 2220 | * If the battery is not present, try not to change parallel charging |
| 2221 | * from OFF to ON or from ON to OFF, as it could cause the device to |
| 2222 | * brown out in the instant that the USB settings are changed. |
| 2223 | * |
| 2224 | * Only allow parallel charging check to report false (thereby turnin |
| 2225 | * off parallel charging) if the battery is still there, or if parallel |
| 2226 | * charging is disabled in the first place. |
| 2227 | */ |
| 2228 | if (get_prop_charge_type(chip) != POWER_SUPPLY_CHARGE_TYPE_FAST |
| 2229 | && (get_prop_batt_present(chip) |
| 2230 | || chip->parallel.current_max_ma == 0)) { |
| 2231 | pr_smb(PR_STATUS, "Not in fast charge, skipping\n"); |
| 2232 | return false; |
| 2233 | } |
| 2234 | |
| 2235 | if (get_prop_batt_health(chip) != POWER_SUPPLY_HEALTH_GOOD) { |
| 2236 | pr_smb(PR_STATUS, "JEITA active, skipping\n"); |
| 2237 | return false; |
| 2238 | } |
| 2239 | |
| 2240 | rc = smbchg_read(chip, ®, chip->misc_base + IDEV_STS, 1); |
| 2241 | if (rc < 0) { |
| 2242 | dev_err(chip->dev, "Couldn't read status 5 rc = %d\n", rc); |
| 2243 | return false; |
| 2244 | } |
| 2245 | |
| 2246 | type = get_type(reg); |
| 2247 | if (get_usb_supply_type(type) == POWER_SUPPLY_TYPE_USB_CDP) { |
| 2248 | pr_smb(PR_STATUS, "CDP adapter, skipping\n"); |
| 2249 | return false; |
| 2250 | } |
| 2251 | |
| 2252 | if (get_usb_supply_type(type) == POWER_SUPPLY_TYPE_USB) { |
| 2253 | pr_smb(PR_STATUS, "SDP adapter, skipping\n"); |
| 2254 | return false; |
| 2255 | } |
| 2256 | |
| 2257 | /* |
| 2258 | * If USBIN is suspended or not the active power source, do not enable |
| 2259 | * parallel charging. The device may be charging off of DCIN. |
| 2260 | */ |
| 2261 | if (!smbchg_is_usbin_active_pwr_src(chip)) { |
| 2262 | pr_smb(PR_STATUS, "USB not active power source: %02x\n", reg); |
| 2263 | return false; |
| 2264 | } |
| 2265 | |
| 2266 | min_current_thr_ma = smbchg_get_min_parallel_current_ma(chip); |
| 2267 | if (min_current_thr_ma <= 0) { |
| 2268 | pr_smb(PR_STATUS, "parallel charger unavailable for thr: %d\n", |
| 2269 | min_current_thr_ma); |
| 2270 | return false; |
| 2271 | } |
| 2272 | |
| 2273 | if (usb_icl_ma < min_current_thr_ma) { |
| 2274 | pr_smb(PR_STATUS, "Weak USB chg skip enable: %d < %d\n", |
| 2275 | usb_icl_ma, min_current_thr_ma); |
| 2276 | return false; |
| 2277 | } |
| 2278 | |
| 2279 | if (!fcc_voter) |
| 2280 | return false; |
| 2281 | /* |
| 2282 | * Suspend the parallel charger if the charging current is < 1800 mA |
| 2283 | * and is not because of an ESR pulse. |
| 2284 | */ |
| 2285 | if ((strcmp(fcc_voter, ESR_PULSE_FCC_VOTER) == 0) |
| 2286 | && fcc_ma < PARALLEL_CHG_THRESHOLD_CURRENT) { |
| 2287 | pr_smb(PR_STATUS, "FCC %d lower than %d\n", |
| 2288 | fcc_ma, |
| 2289 | PARALLEL_CHG_THRESHOLD_CURRENT); |
| 2290 | return false; |
| 2291 | } |
| 2292 | |
| 2293 | current_limit_ma = smbchg_get_aicl_level_ma(chip); |
| 2294 | if (current_limit_ma <= 0) |
| 2295 | return false; |
| 2296 | |
| 2297 | if (chip->parallel.initial_aicl_ma == 0) { |
| 2298 | if (current_limit_ma < min_current_thr_ma) { |
| 2299 | pr_smb(PR_STATUS, "Initial AICL very low: %d < %d\n", |
| 2300 | current_limit_ma, min_current_thr_ma); |
| 2301 | return false; |
| 2302 | } |
| 2303 | chip->parallel.initial_aicl_ma = current_limit_ma; |
| 2304 | } |
| 2305 | |
| 2306 | power_supply_get_property(parallel_psy, |
| 2307 | POWER_SUPPLY_PROP_CURRENT_MAX, &pval); |
| 2308 | parallel_cl_ma = pval.intval / 1000; |
| 2309 | /* |
| 2310 | * Read back the real amount of current we are getting |
| 2311 | * Treat 2mA as 0 because that is the suspend current setting |
| 2312 | */ |
| 2313 | if (parallel_cl_ma <= SUSPEND_CURRENT_MA) |
| 2314 | parallel_cl_ma = 0; |
| 2315 | |
| 2316 | /* |
| 2317 | * Set the parallel charge path's input current limit (ICL) |
| 2318 | * to the total current / 2 |
| 2319 | */ |
| 2320 | total_current_ma = min(current_limit_ma + parallel_cl_ma, usb_icl_ma); |
| 2321 | |
| 2322 | if (total_current_ma < chip->parallel.initial_aicl_ma |
| 2323 | - chip->parallel.allowed_lowering_ma) { |
| 2324 | pr_smb(PR_STATUS, |
| 2325 | "Total current reduced a lot: %d (%d + %d) < %d - %d\n", |
| 2326 | total_current_ma, |
| 2327 | current_limit_ma, parallel_cl_ma, |
| 2328 | chip->parallel.initial_aicl_ma, |
| 2329 | chip->parallel.allowed_lowering_ma); |
| 2330 | return false; |
| 2331 | } |
| 2332 | |
| 2333 | *ret_total_current_ma = total_current_ma; |
| 2334 | return true; |
| 2335 | } |
| 2336 | |
| 2337 | #define PARALLEL_CHARGER_EN_DELAY_MS 500 |
| 2338 | static void smbchg_parallel_usb_en_work(struct work_struct *work) |
| 2339 | { |
| 2340 | struct smbchg_chip *chip = container_of(work, |
| 2341 | struct smbchg_chip, |
| 2342 | parallel_en_work.work); |
| 2343 | int previous_aicl_ma, total_current_ma, aicl_ma; |
| 2344 | bool in_progress; |
| 2345 | |
| 2346 | /* do a check to see if the aicl is stable */ |
| 2347 | previous_aicl_ma = smbchg_get_aicl_level_ma(chip); |
| 2348 | msleep(PARALLEL_CHARGER_EN_DELAY_MS); |
| 2349 | aicl_ma = smbchg_get_aicl_level_ma(chip); |
| 2350 | if (previous_aicl_ma == aicl_ma) { |
| 2351 | pr_smb(PR_STATUS, "AICL at %d\n", aicl_ma); |
| 2352 | } else { |
| 2353 | pr_smb(PR_STATUS, |
| 2354 | "AICL changed [%d -> %d], recheck %d ms\n", |
| 2355 | previous_aicl_ma, aicl_ma, |
| 2356 | PARALLEL_CHARGER_EN_DELAY_MS); |
| 2357 | goto recheck; |
| 2358 | } |
| 2359 | |
| 2360 | mutex_lock(&chip->parallel.lock); |
| 2361 | in_progress = (chip->parallel.current_max_ma != 0); |
| 2362 | if (smbchg_is_parallel_usb_ok(chip, &total_current_ma)) { |
| 2363 | smbchg_parallel_usb_enable(chip, total_current_ma); |
| 2364 | } else { |
| 2365 | if (in_progress) { |
| 2366 | pr_smb(PR_STATUS, "parallel charging unavailable\n"); |
| 2367 | smbchg_parallel_usb_disable(chip); |
| 2368 | } |
| 2369 | } |
| 2370 | mutex_unlock(&chip->parallel.lock); |
| 2371 | smbchg_relax(chip, PM_PARALLEL_CHECK); |
| 2372 | return; |
| 2373 | |
| 2374 | recheck: |
| 2375 | schedule_delayed_work(&chip->parallel_en_work, 0); |
| 2376 | } |
| 2377 | |
| 2378 | static void smbchg_parallel_usb_check_ok(struct smbchg_chip *chip) |
| 2379 | { |
| 2380 | struct power_supply *parallel_psy = get_parallel_psy(chip); |
| 2381 | |
| 2382 | if (!parallel_psy || !chip->parallel_charger_detected) |
| 2383 | return; |
| 2384 | |
| 2385 | smbchg_stay_awake(chip, PM_PARALLEL_CHECK); |
| 2386 | schedule_delayed_work(&chip->parallel_en_work, 0); |
| 2387 | } |
| 2388 | |
| 2389 | static int charging_suspend_vote_cb(struct votable *votable, void *data, |
| 2390 | int suspend, |
| 2391 | const char *client) |
| 2392 | { |
| 2393 | int rc; |
| 2394 | struct smbchg_chip *chip = data; |
| 2395 | |
| 2396 | if (suspend < 0) { |
| 2397 | pr_err("No voters\n"); |
| 2398 | suspend = false; |
| 2399 | } |
| 2400 | |
| 2401 | rc = smbchg_charging_en(chip, !suspend); |
| 2402 | if (rc < 0) { |
| 2403 | dev_err(chip->dev, |
| 2404 | "Couldn't configure batt chg: 0x%x rc = %d\n", |
| 2405 | !suspend, rc); |
| 2406 | } |
| 2407 | |
| 2408 | return rc; |
| 2409 | } |
| 2410 | |
| 2411 | static int usb_suspend_vote_cb(struct votable *votable, |
| 2412 | void *data, |
| 2413 | int suspend, |
| 2414 | const char *client) |
| 2415 | { |
| 2416 | int rc; |
| 2417 | struct smbchg_chip *chip = data; |
| 2418 | |
| 2419 | if (suspend < 0) { |
| 2420 | pr_err("No voters\n"); |
| 2421 | suspend = false; |
| 2422 | } |
| 2423 | |
| 2424 | rc = smbchg_usb_suspend(chip, suspend); |
| 2425 | if (rc < 0) |
| 2426 | return rc; |
| 2427 | |
| 2428 | if ((strcmp(client, THERMAL_EN_VOTER) == 0) |
| 2429 | || (strcmp(client, POWER_SUPPLY_EN_VOTER) == 0) |
| 2430 | || (strcmp(client, USER_EN_VOTER) == 0) |
| 2431 | || (strcmp(client, FAKE_BATTERY_EN_VOTER) == 0)) |
| 2432 | smbchg_parallel_usb_check_ok(chip); |
| 2433 | |
| 2434 | return rc; |
| 2435 | } |
| 2436 | |
| 2437 | static int dc_suspend_vote_cb(struct votable *votable, |
| 2438 | void *data, |
| 2439 | int suspend, |
| 2440 | const char *client) |
| 2441 | { |
| 2442 | int rc; |
| 2443 | struct smbchg_chip *chip = data; |
| 2444 | |
| 2445 | if (suspend < 0) { |
| 2446 | pr_err("No voters\n"); |
| 2447 | suspend = false; |
| 2448 | } |
| 2449 | |
| 2450 | rc = smbchg_dc_suspend(chip, suspend); |
| 2451 | if (rc < 0) |
| 2452 | return rc; |
| 2453 | |
| 2454 | if (chip->dc_psy_type != -EINVAL && chip->dc_psy) |
| 2455 | power_supply_changed(chip->dc_psy); |
| 2456 | |
| 2457 | return rc; |
| 2458 | } |
| 2459 | |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 2460 | #define HVDCP_EN_BIT BIT(3) |
| 2461 | static int smbchg_hvdcp_enable_cb(struct votable *votable, |
| 2462 | void *data, |
| 2463 | int enable, |
| 2464 | const char *client) |
| 2465 | { |
| 2466 | int rc = 0; |
| 2467 | struct smbchg_chip *chip = data; |
| 2468 | |
| 2469 | pr_err("smbchg_hvdcp_enable_cb HVDCP %s\n", |
| 2470 | enable ? "enabled" : "disabled"); |
| 2471 | rc = smbchg_sec_masked_write(chip, |
| 2472 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 2473 | HVDCP_EN_BIT, enable ? HVDCP_EN_BIT : 0); |
| 2474 | if (rc < 0) |
| 2475 | dev_err(chip->dev, "Couldn't %s HVDCP rc=%d\n", |
| 2476 | enable ? "enable" : "disable", rc); |
| 2477 | |
| 2478 | return rc; |
| 2479 | } |
| 2480 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 2481 | static int set_fastchg_current_vote_cb(struct votable *votable, |
| 2482 | void *data, |
| 2483 | int fcc_ma, |
| 2484 | const char *client) |
| 2485 | { |
| 2486 | struct smbchg_chip *chip = data; |
| 2487 | int rc; |
| 2488 | |
| 2489 | if (fcc_ma < 0) { |
| 2490 | pr_err("No voters\n"); |
| 2491 | return 0; |
| 2492 | } |
| 2493 | |
| 2494 | if (chip->parallel.current_max_ma == 0) { |
| 2495 | rc = smbchg_set_fastchg_current_raw(chip, fcc_ma); |
| 2496 | if (rc < 0) { |
| 2497 | pr_err("Can't set FCC fcc_ma=%d rc=%d\n", fcc_ma, rc); |
| 2498 | return rc; |
| 2499 | } |
| 2500 | } |
| 2501 | /* |
| 2502 | * check if parallel charging can be enabled, and if enabled, |
| 2503 | * distribute the fcc |
| 2504 | */ |
| 2505 | smbchg_parallel_usb_check_ok(chip); |
| 2506 | return 0; |
| 2507 | } |
| 2508 | |
| 2509 | static int smbchg_set_fastchg_current_user(struct smbchg_chip *chip, |
| 2510 | int current_ma) |
| 2511 | { |
| 2512 | int rc = 0; |
| 2513 | |
| 2514 | pr_smb(PR_STATUS, "User setting FCC to %d\n", current_ma); |
| 2515 | |
| 2516 | rc = vote(chip->fcc_votable, BATT_TYPE_FCC_VOTER, true, current_ma); |
| 2517 | if (rc < 0) |
| 2518 | pr_err("Couldn't vote en rc %d\n", rc); |
| 2519 | return rc; |
| 2520 | } |
| 2521 | |
| 2522 | static struct ilim_entry *smbchg_wipower_find_entry(struct smbchg_chip *chip, |
| 2523 | struct ilim_map *map, int uv) |
| 2524 | { |
| 2525 | int i; |
| 2526 | struct ilim_entry *ret = &(chip->wipower_default.entries[0]); |
| 2527 | |
| 2528 | for (i = 0; i < map->num; i++) { |
| 2529 | if (is_between(map->entries[i].vmin_uv, map->entries[i].vmax_uv, |
| 2530 | uv)) |
| 2531 | ret = &map->entries[i]; |
| 2532 | } |
| 2533 | return ret; |
| 2534 | } |
| 2535 | |
| 2536 | #define ZIN_ICL_PT 0xFC |
| 2537 | #define ZIN_ICL_LV 0xFD |
| 2538 | #define ZIN_ICL_HV 0xFE |
| 2539 | #define ZIN_ICL_MASK SMB_MASK(4, 0) |
| 2540 | static int smbchg_dcin_ilim_config(struct smbchg_chip *chip, int offset, int ma) |
| 2541 | { |
| 2542 | int i, rc; |
| 2543 | |
| 2544 | i = find_smaller_in_array(chip->tables.dc_ilim_ma_table, |
| 2545 | ma, chip->tables.dc_ilim_ma_len); |
| 2546 | |
| 2547 | if (i < 0) |
| 2548 | i = 0; |
| 2549 | |
| 2550 | rc = smbchg_sec_masked_write(chip, chip->bat_if_base + offset, |
| 2551 | ZIN_ICL_MASK, i); |
| 2552 | if (rc) |
| 2553 | dev_err(chip->dev, "Couldn't write bat if offset %d value = %d rc = %d\n", |
| 2554 | offset, i, rc); |
| 2555 | return rc; |
| 2556 | } |
| 2557 | |
| 2558 | static int smbchg_wipower_ilim_config(struct smbchg_chip *chip, |
| 2559 | struct ilim_entry *ilim) |
| 2560 | { |
| 2561 | int rc = 0; |
| 2562 | |
| 2563 | if (chip->current_ilim.icl_pt_ma != ilim->icl_pt_ma) { |
| 2564 | rc = smbchg_dcin_ilim_config(chip, ZIN_ICL_PT, ilim->icl_pt_ma); |
| 2565 | if (rc) |
| 2566 | dev_err(chip->dev, "failed to write batif offset %d %dma rc = %d\n", |
| 2567 | ZIN_ICL_PT, ilim->icl_pt_ma, rc); |
| 2568 | else |
| 2569 | chip->current_ilim.icl_pt_ma = ilim->icl_pt_ma; |
| 2570 | } |
| 2571 | |
| 2572 | if (chip->current_ilim.icl_lv_ma != ilim->icl_lv_ma) { |
| 2573 | rc = smbchg_dcin_ilim_config(chip, ZIN_ICL_LV, ilim->icl_lv_ma); |
| 2574 | if (rc) |
| 2575 | dev_err(chip->dev, "failed to write batif offset %d %dma rc = %d\n", |
| 2576 | ZIN_ICL_LV, ilim->icl_lv_ma, rc); |
| 2577 | else |
| 2578 | chip->current_ilim.icl_lv_ma = ilim->icl_lv_ma; |
| 2579 | } |
| 2580 | |
| 2581 | if (chip->current_ilim.icl_hv_ma != ilim->icl_hv_ma) { |
| 2582 | rc = smbchg_dcin_ilim_config(chip, ZIN_ICL_HV, ilim->icl_hv_ma); |
| 2583 | if (rc) |
| 2584 | dev_err(chip->dev, "failed to write batif offset %d %dma rc = %d\n", |
| 2585 | ZIN_ICL_HV, ilim->icl_hv_ma, rc); |
| 2586 | else |
| 2587 | chip->current_ilim.icl_hv_ma = ilim->icl_hv_ma; |
| 2588 | } |
| 2589 | return rc; |
| 2590 | } |
| 2591 | |
| 2592 | static void btm_notify_dcin(enum qpnp_tm_state state, void *ctx); |
| 2593 | static int smbchg_wipower_dcin_btm_configure(struct smbchg_chip *chip, |
| 2594 | struct ilim_entry *ilim) |
| 2595 | { |
| 2596 | int rc; |
| 2597 | |
| 2598 | if (ilim->vmin_uv == chip->current_ilim.vmin_uv |
| 2599 | && ilim->vmax_uv == chip->current_ilim.vmax_uv) |
| 2600 | return 0; |
| 2601 | |
| 2602 | chip->param.channel = DCIN; |
| 2603 | chip->param.btm_ctx = chip; |
| 2604 | if (wipower_dcin_interval < ADC_MEAS1_INTERVAL_0MS) |
| 2605 | wipower_dcin_interval = ADC_MEAS1_INTERVAL_0MS; |
| 2606 | |
| 2607 | if (wipower_dcin_interval > ADC_MEAS1_INTERVAL_16S) |
| 2608 | wipower_dcin_interval = ADC_MEAS1_INTERVAL_16S; |
| 2609 | |
| 2610 | chip->param.timer_interval = wipower_dcin_interval; |
| 2611 | chip->param.threshold_notification = &btm_notify_dcin; |
| 2612 | chip->param.high_thr = ilim->vmax_uv + wipower_dcin_hyst_uv; |
| 2613 | chip->param.low_thr = ilim->vmin_uv - wipower_dcin_hyst_uv; |
| 2614 | chip->param.state_request = ADC_TM_HIGH_LOW_THR_ENABLE; |
| 2615 | rc = qpnp_vadc_channel_monitor(chip->vadc_dev, &chip->param); |
| 2616 | if (rc) { |
| 2617 | dev_err(chip->dev, "Couldn't configure btm for dcin rc = %d\n", |
| 2618 | rc); |
| 2619 | } else { |
| 2620 | chip->current_ilim.vmin_uv = ilim->vmin_uv; |
| 2621 | chip->current_ilim.vmax_uv = ilim->vmax_uv; |
| 2622 | pr_smb(PR_STATUS, "btm ilim = (%duV %duV %dmA %dmA %dmA)\n", |
| 2623 | ilim->vmin_uv, ilim->vmax_uv, |
| 2624 | ilim->icl_pt_ma, ilim->icl_lv_ma, ilim->icl_hv_ma); |
| 2625 | } |
| 2626 | return rc; |
| 2627 | } |
| 2628 | |
| 2629 | static int smbchg_wipower_icl_configure(struct smbchg_chip *chip, |
| 2630 | int dcin_uv, bool div2) |
| 2631 | { |
| 2632 | int rc = 0; |
| 2633 | struct ilim_map *map = div2 ? &chip->wipower_div2 : &chip->wipower_pt; |
| 2634 | struct ilim_entry *ilim = smbchg_wipower_find_entry(chip, map, dcin_uv); |
| 2635 | |
| 2636 | rc = smbchg_wipower_ilim_config(chip, ilim); |
| 2637 | if (rc) { |
| 2638 | dev_err(chip->dev, "failed to config ilim rc = %d, dcin_uv = %d , div2 = %d, ilim = (%duV %duV %dmA %dmA %dmA)\n", |
| 2639 | rc, dcin_uv, div2, |
| 2640 | ilim->vmin_uv, ilim->vmax_uv, |
| 2641 | ilim->icl_pt_ma, ilim->icl_lv_ma, ilim->icl_hv_ma); |
| 2642 | return rc; |
| 2643 | } |
| 2644 | |
| 2645 | rc = smbchg_wipower_dcin_btm_configure(chip, ilim); |
| 2646 | if (rc) { |
| 2647 | dev_err(chip->dev, "failed to config btm rc = %d, dcin_uv = %d , div2 = %d, ilim = (%duV %duV %dmA %dmA %dmA)\n", |
| 2648 | rc, dcin_uv, div2, |
| 2649 | ilim->vmin_uv, ilim->vmax_uv, |
| 2650 | ilim->icl_pt_ma, ilim->icl_lv_ma, ilim->icl_hv_ma); |
| 2651 | return rc; |
| 2652 | } |
| 2653 | chip->wipower_configured = true; |
| 2654 | return 0; |
| 2655 | } |
| 2656 | |
| 2657 | static void smbchg_wipower_icl_deconfigure(struct smbchg_chip *chip) |
| 2658 | { |
| 2659 | int rc; |
| 2660 | struct ilim_entry *ilim = &(chip->wipower_default.entries[0]); |
| 2661 | |
| 2662 | if (!chip->wipower_configured) |
| 2663 | return; |
| 2664 | |
| 2665 | rc = smbchg_wipower_ilim_config(chip, ilim); |
| 2666 | if (rc) |
| 2667 | dev_err(chip->dev, "Couldn't config default ilim rc = %d\n", |
| 2668 | rc); |
| 2669 | |
| 2670 | rc = qpnp_vadc_end_channel_monitor(chip->vadc_dev); |
| 2671 | if (rc) |
| 2672 | dev_err(chip->dev, "Couldn't de configure btm for dcin rc = %d\n", |
| 2673 | rc); |
| 2674 | |
| 2675 | chip->wipower_configured = false; |
| 2676 | chip->current_ilim.vmin_uv = 0; |
| 2677 | chip->current_ilim.vmax_uv = 0; |
| 2678 | chip->current_ilim.icl_pt_ma = ilim->icl_pt_ma; |
| 2679 | chip->current_ilim.icl_lv_ma = ilim->icl_lv_ma; |
| 2680 | chip->current_ilim.icl_hv_ma = ilim->icl_hv_ma; |
| 2681 | pr_smb(PR_WIPOWER, "De config btm\n"); |
| 2682 | } |
| 2683 | |
| 2684 | #define FV_STS 0x0C |
| 2685 | #define DIV2_ACTIVE BIT(7) |
| 2686 | static void __smbchg_wipower_check(struct smbchg_chip *chip) |
| 2687 | { |
| 2688 | int chg_type; |
| 2689 | bool usb_present, dc_present; |
| 2690 | int rc; |
| 2691 | int dcin_uv; |
| 2692 | bool div2; |
| 2693 | struct qpnp_vadc_result adc_result; |
| 2694 | u8 reg; |
| 2695 | |
| 2696 | if (!wipower_dyn_icl_en) { |
| 2697 | smbchg_wipower_icl_deconfigure(chip); |
| 2698 | return; |
| 2699 | } |
| 2700 | |
| 2701 | chg_type = get_prop_charge_type(chip); |
| 2702 | usb_present = is_usb_present(chip); |
| 2703 | dc_present = is_dc_present(chip); |
| 2704 | if (chg_type != POWER_SUPPLY_CHARGE_TYPE_NONE |
| 2705 | && !usb_present |
| 2706 | && dc_present |
| 2707 | && chip->dc_psy_type == POWER_SUPPLY_TYPE_WIPOWER) { |
| 2708 | rc = qpnp_vadc_read(chip->vadc_dev, DCIN, &adc_result); |
| 2709 | if (rc) { |
| 2710 | pr_smb(PR_STATUS, "error DCIN read rc = %d\n", rc); |
| 2711 | return; |
| 2712 | } |
| 2713 | dcin_uv = adc_result.physical; |
| 2714 | |
| 2715 | /* check div_by_2 */ |
| 2716 | rc = smbchg_read(chip, ®, chip->chgr_base + FV_STS, 1); |
| 2717 | if (rc) { |
| 2718 | pr_smb(PR_STATUS, "error DCIN read rc = %d\n", rc); |
| 2719 | return; |
| 2720 | } |
| 2721 | div2 = !!(reg & DIV2_ACTIVE); |
| 2722 | |
| 2723 | pr_smb(PR_WIPOWER, |
| 2724 | "config ICL chg_type = %d usb = %d dc = %d dcin_uv(adc_code) = %d (0x%x) div2 = %d\n", |
| 2725 | chg_type, usb_present, dc_present, dcin_uv, |
| 2726 | adc_result.adc_code, div2); |
| 2727 | smbchg_wipower_icl_configure(chip, dcin_uv, div2); |
| 2728 | } else { |
| 2729 | pr_smb(PR_WIPOWER, |
| 2730 | "deconfig ICL chg_type = %d usb = %d dc = %d\n", |
| 2731 | chg_type, usb_present, dc_present); |
| 2732 | smbchg_wipower_icl_deconfigure(chip); |
| 2733 | } |
| 2734 | } |
| 2735 | |
| 2736 | static void smbchg_wipower_check(struct smbchg_chip *chip) |
| 2737 | { |
| 2738 | if (!chip->wipower_dyn_icl_avail) |
| 2739 | return; |
| 2740 | |
| 2741 | mutex_lock(&chip->wipower_config); |
| 2742 | __smbchg_wipower_check(chip); |
| 2743 | mutex_unlock(&chip->wipower_config); |
| 2744 | } |
| 2745 | |
| 2746 | static void btm_notify_dcin(enum qpnp_tm_state state, void *ctx) |
| 2747 | { |
| 2748 | struct smbchg_chip *chip = ctx; |
| 2749 | |
| 2750 | mutex_lock(&chip->wipower_config); |
| 2751 | pr_smb(PR_WIPOWER, "%s state\n", |
| 2752 | state == ADC_TM_LOW_STATE ? "low" : "high"); |
| 2753 | chip->current_ilim.vmin_uv = 0; |
| 2754 | chip->current_ilim.vmax_uv = 0; |
| 2755 | __smbchg_wipower_check(chip); |
| 2756 | mutex_unlock(&chip->wipower_config); |
| 2757 | } |
| 2758 | |
| 2759 | static int force_dcin_icl_write(void *data, u64 val) |
| 2760 | { |
| 2761 | struct smbchg_chip *chip = data; |
| 2762 | |
| 2763 | smbchg_wipower_check(chip); |
| 2764 | return 0; |
| 2765 | } |
| 2766 | DEFINE_SIMPLE_ATTRIBUTE(force_dcin_icl_ops, NULL, |
| 2767 | force_dcin_icl_write, "0x%02llx\n"); |
| 2768 | |
| 2769 | /* |
| 2770 | * set the dc charge path's maximum allowed current draw |
| 2771 | * that may be limited by the system's thermal level |
| 2772 | */ |
| 2773 | static int set_dc_current_limit_vote_cb(struct votable *votable, |
| 2774 | void *data, |
| 2775 | int icl_ma, |
| 2776 | const char *client) |
| 2777 | { |
| 2778 | struct smbchg_chip *chip = data; |
| 2779 | |
| 2780 | if (icl_ma < 0) { |
| 2781 | pr_err("No voters\n"); |
| 2782 | return 0; |
| 2783 | } |
| 2784 | |
| 2785 | return smbchg_set_dc_current_max(chip, icl_ma); |
| 2786 | } |
| 2787 | |
| 2788 | /* |
| 2789 | * set the usb charge path's maximum allowed current draw |
| 2790 | * that may be limited by the system's thermal level |
| 2791 | */ |
| 2792 | static int set_usb_current_limit_vote_cb(struct votable *votable, |
| 2793 | void *data, |
| 2794 | int icl_ma, |
| 2795 | const char *client) |
| 2796 | { |
| 2797 | struct smbchg_chip *chip = data; |
| 2798 | int rc, aicl_ma; |
| 2799 | const char *effective_id; |
| 2800 | |
| 2801 | if (icl_ma < 0) { |
| 2802 | pr_err("No voters\n"); |
| 2803 | return 0; |
| 2804 | } |
| 2805 | effective_id = get_effective_client_locked(chip->usb_icl_votable); |
| 2806 | |
| 2807 | if (!effective_id) |
| 2808 | return 0; |
| 2809 | |
| 2810 | /* disable parallel charging if HVDCP is voting for 300mA */ |
| 2811 | if (strcmp(effective_id, HVDCP_ICL_VOTER) == 0) |
| 2812 | smbchg_parallel_usb_disable(chip); |
| 2813 | |
| 2814 | if (chip->parallel.current_max_ma == 0) { |
| 2815 | rc = smbchg_set_usb_current_max(chip, icl_ma); |
| 2816 | if (rc) { |
| 2817 | pr_err("Failed to set usb current max: %d\n", rc); |
| 2818 | return rc; |
| 2819 | } |
| 2820 | } |
| 2821 | |
| 2822 | /* skip the aicl rerun if hvdcp icl voter is active */ |
| 2823 | if (strcmp(effective_id, HVDCP_ICL_VOTER) == 0) |
| 2824 | return 0; |
| 2825 | |
| 2826 | aicl_ma = smbchg_get_aicl_level_ma(chip); |
| 2827 | if (icl_ma > aicl_ma) |
| 2828 | smbchg_rerun_aicl(chip); |
| 2829 | smbchg_parallel_usb_check_ok(chip); |
| 2830 | return 0; |
| 2831 | } |
| 2832 | |
| 2833 | static int smbchg_system_temp_level_set(struct smbchg_chip *chip, |
| 2834 | int lvl_sel) |
| 2835 | { |
| 2836 | int rc = 0; |
| 2837 | int prev_therm_lvl; |
| 2838 | int thermal_icl_ma; |
| 2839 | |
| 2840 | if (!chip->thermal_mitigation) { |
| 2841 | dev_err(chip->dev, "Thermal mitigation not supported\n"); |
| 2842 | return -EINVAL; |
| 2843 | } |
| 2844 | |
| 2845 | if (lvl_sel < 0) { |
| 2846 | dev_err(chip->dev, "Unsupported level selected %d\n", lvl_sel); |
| 2847 | return -EINVAL; |
| 2848 | } |
| 2849 | |
| 2850 | if (lvl_sel >= chip->thermal_levels) { |
| 2851 | dev_err(chip->dev, "Unsupported level selected %d forcing %d\n", |
| 2852 | lvl_sel, chip->thermal_levels - 1); |
| 2853 | lvl_sel = chip->thermal_levels - 1; |
| 2854 | } |
| 2855 | |
| 2856 | if (lvl_sel == chip->therm_lvl_sel) |
| 2857 | return 0; |
| 2858 | |
| 2859 | mutex_lock(&chip->therm_lvl_lock); |
| 2860 | prev_therm_lvl = chip->therm_lvl_sel; |
| 2861 | chip->therm_lvl_sel = lvl_sel; |
| 2862 | if (chip->therm_lvl_sel == (chip->thermal_levels - 1)) { |
| 2863 | /* |
| 2864 | * Disable charging if highest value selected by |
| 2865 | * setting the DC and USB path in suspend |
| 2866 | */ |
| 2867 | rc = vote(chip->dc_suspend_votable, THERMAL_EN_VOTER, true, 0); |
| 2868 | if (rc < 0) { |
| 2869 | dev_err(chip->dev, |
| 2870 | "Couldn't set dc suspend rc %d\n", rc); |
| 2871 | goto out; |
| 2872 | } |
| 2873 | rc = vote(chip->usb_suspend_votable, THERMAL_EN_VOTER, true, 0); |
| 2874 | if (rc < 0) { |
| 2875 | dev_err(chip->dev, |
| 2876 | "Couldn't set usb suspend rc %d\n", rc); |
| 2877 | goto out; |
| 2878 | } |
| 2879 | goto out; |
| 2880 | } |
| 2881 | |
| 2882 | if (chip->therm_lvl_sel == 0) { |
| 2883 | rc = vote(chip->usb_icl_votable, THERMAL_ICL_VOTER, false, 0); |
| 2884 | if (rc < 0) |
| 2885 | pr_err("Couldn't disable USB thermal ICL vote rc=%d\n", |
| 2886 | rc); |
| 2887 | |
| 2888 | rc = vote(chip->dc_icl_votable, THERMAL_ICL_VOTER, false, 0); |
| 2889 | if (rc < 0) |
| 2890 | pr_err("Couldn't disable DC thermal ICL vote rc=%d\n", |
| 2891 | rc); |
| 2892 | } else { |
| 2893 | thermal_icl_ma = |
| 2894 | (int)chip->thermal_mitigation[chip->therm_lvl_sel]; |
| 2895 | rc = vote(chip->usb_icl_votable, THERMAL_ICL_VOTER, true, |
| 2896 | thermal_icl_ma); |
| 2897 | if (rc < 0) |
| 2898 | pr_err("Couldn't vote for USB thermal ICL rc=%d\n", rc); |
| 2899 | |
| 2900 | rc = vote(chip->dc_icl_votable, THERMAL_ICL_VOTER, true, |
| 2901 | thermal_icl_ma); |
| 2902 | if (rc < 0) |
| 2903 | pr_err("Couldn't vote for DC thermal ICL rc=%d\n", rc); |
| 2904 | } |
| 2905 | |
| 2906 | if (prev_therm_lvl == chip->thermal_levels - 1) { |
| 2907 | /* |
| 2908 | * If previously highest value was selected charging must have |
| 2909 | * been disabed. Enable charging by taking the DC and USB path |
| 2910 | * out of suspend. |
| 2911 | */ |
| 2912 | rc = vote(chip->dc_suspend_votable, THERMAL_EN_VOTER, false, 0); |
| 2913 | if (rc < 0) { |
| 2914 | dev_err(chip->dev, |
| 2915 | "Couldn't set dc suspend rc %d\n", rc); |
| 2916 | goto out; |
| 2917 | } |
| 2918 | rc = vote(chip->usb_suspend_votable, THERMAL_EN_VOTER, |
| 2919 | false, 0); |
| 2920 | if (rc < 0) { |
| 2921 | dev_err(chip->dev, |
| 2922 | "Couldn't set usb suspend rc %d\n", rc); |
| 2923 | goto out; |
| 2924 | } |
| 2925 | } |
| 2926 | out: |
| 2927 | mutex_unlock(&chip->therm_lvl_lock); |
| 2928 | return rc; |
| 2929 | } |
| 2930 | |
| 2931 | static int smbchg_ibat_ocp_threshold_ua = 4500000; |
| 2932 | module_param(smbchg_ibat_ocp_threshold_ua, int, 0644); |
| 2933 | |
| 2934 | #define UCONV 1000000LL |
| 2935 | #define MCONV 1000LL |
| 2936 | #define FLASH_V_THRESHOLD 3000000 |
| 2937 | #define FLASH_VDIP_MARGIN 100000 |
| 2938 | #define VPH_FLASH_VDIP (FLASH_V_THRESHOLD + FLASH_VDIP_MARGIN) |
| 2939 | #define BUCK_EFFICIENCY 800LL |
| 2940 | static int smbchg_calc_max_flash_current(struct smbchg_chip *chip) |
| 2941 | { |
| 2942 | int ocv_uv, esr_uohm, rbatt_uohm, ibat_now, rc; |
| 2943 | int64_t ibat_flash_ua, avail_flash_ua, avail_flash_power_fw; |
| 2944 | int64_t ibat_safe_ua, vin_flash_uv, vph_flash_uv; |
| 2945 | |
| 2946 | rc = get_property_from_fg(chip, POWER_SUPPLY_PROP_VOLTAGE_OCV, &ocv_uv); |
| 2947 | if (rc) { |
| 2948 | pr_smb(PR_STATUS, "bms psy does not support OCV\n"); |
| 2949 | return 0; |
| 2950 | } |
| 2951 | |
| 2952 | rc = get_property_from_fg(chip, POWER_SUPPLY_PROP_RESISTANCE, |
| 2953 | &esr_uohm); |
| 2954 | if (rc) { |
| 2955 | pr_smb(PR_STATUS, "bms psy does not support resistance\n"); |
| 2956 | return 0; |
| 2957 | } |
| 2958 | |
| 2959 | rc = msm_bcl_read(BCL_PARAM_CURRENT, &ibat_now); |
| 2960 | if (rc) { |
| 2961 | pr_smb(PR_STATUS, "BCL current read failed: %d\n", rc); |
| 2962 | return 0; |
| 2963 | } |
| 2964 | |
| 2965 | rbatt_uohm = esr_uohm + chip->rpara_uohm + chip->rslow_uohm; |
| 2966 | /* |
| 2967 | * Calculate the maximum current that can pulled out of the battery |
| 2968 | * before the battery voltage dips below a safe threshold. |
| 2969 | */ |
| 2970 | ibat_safe_ua = div_s64((ocv_uv - VPH_FLASH_VDIP) * UCONV, |
| 2971 | rbatt_uohm); |
| 2972 | |
| 2973 | if (ibat_safe_ua <= smbchg_ibat_ocp_threshold_ua) { |
| 2974 | /* |
| 2975 | * If the calculated current is below the OCP threshold, then |
| 2976 | * use it as the possible flash current. |
| 2977 | */ |
| 2978 | ibat_flash_ua = ibat_safe_ua - ibat_now; |
| 2979 | vph_flash_uv = VPH_FLASH_VDIP; |
| 2980 | } else { |
| 2981 | /* |
| 2982 | * If the calculated current is above the OCP threshold, then |
| 2983 | * use the ocp threshold instead. |
| 2984 | * |
| 2985 | * Any higher current will be tripping the battery OCP. |
| 2986 | */ |
| 2987 | ibat_flash_ua = smbchg_ibat_ocp_threshold_ua - ibat_now; |
| 2988 | vph_flash_uv = ocv_uv - div64_s64((int64_t)rbatt_uohm |
| 2989 | * smbchg_ibat_ocp_threshold_ua, UCONV); |
| 2990 | } |
| 2991 | /* Calculate the input voltage of the flash module. */ |
| 2992 | vin_flash_uv = max((chip->vled_max_uv + 500000LL), |
| 2993 | div64_s64((vph_flash_uv * 1200), 1000)); |
| 2994 | /* Calculate the available power for the flash module. */ |
| 2995 | avail_flash_power_fw = BUCK_EFFICIENCY * vph_flash_uv * ibat_flash_ua; |
| 2996 | /* |
| 2997 | * Calculate the available amount of current the flash module can draw |
| 2998 | * before collapsing the battery. (available power/ flash input voltage) |
| 2999 | */ |
| 3000 | avail_flash_ua = div64_s64(avail_flash_power_fw, vin_flash_uv * MCONV); |
| 3001 | pr_smb(PR_MISC, |
| 3002 | "avail_iflash=%lld, ocv=%d, ibat=%d, rbatt=%d\n", |
| 3003 | avail_flash_ua, ocv_uv, ibat_now, rbatt_uohm); |
| 3004 | return (int)avail_flash_ua; |
| 3005 | } |
| 3006 | |
| 3007 | #define FCC_CMP_CFG 0xF3 |
| 3008 | #define FCC_COMP_MASK SMB_MASK(1, 0) |
| 3009 | static int smbchg_fastchg_current_comp_set(struct smbchg_chip *chip, |
| 3010 | int comp_current) |
| 3011 | { |
| 3012 | int rc; |
| 3013 | u8 i; |
| 3014 | |
| 3015 | for (i = 0; i < chip->tables.fcc_comp_len; i++) |
| 3016 | if (comp_current == chip->tables.fcc_comp_table[i]) |
| 3017 | break; |
| 3018 | |
| 3019 | if (i >= chip->tables.fcc_comp_len) |
| 3020 | return -EINVAL; |
| 3021 | |
| 3022 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + FCC_CMP_CFG, |
| 3023 | FCC_COMP_MASK, i); |
| 3024 | |
| 3025 | if (rc) |
| 3026 | dev_err(chip->dev, "Couldn't set fastchg current comp rc = %d\n", |
| 3027 | rc); |
| 3028 | |
| 3029 | return rc; |
| 3030 | } |
| 3031 | |
| 3032 | #define CFG_TCC_REG 0xF9 |
| 3033 | #define CHG_ITERM_MASK SMB_MASK(2, 0) |
| 3034 | static int smbchg_iterm_set(struct smbchg_chip *chip, int iterm_ma) |
| 3035 | { |
| 3036 | int rc; |
| 3037 | u8 reg; |
| 3038 | |
| 3039 | reg = find_closest_in_array( |
| 3040 | chip->tables.iterm_ma_table, |
| 3041 | chip->tables.iterm_ma_len, |
| 3042 | iterm_ma); |
| 3043 | |
| 3044 | rc = smbchg_sec_masked_write(chip, |
| 3045 | chip->chgr_base + CFG_TCC_REG, |
| 3046 | CHG_ITERM_MASK, reg); |
| 3047 | if (rc) { |
| 3048 | dev_err(chip->dev, |
| 3049 | "Couldn't set iterm rc = %d\n", rc); |
| 3050 | return rc; |
| 3051 | } |
| 3052 | pr_smb(PR_STATUS, "set tcc (%d) to 0x%02x\n", |
| 3053 | iterm_ma, reg); |
| 3054 | chip->iterm_ma = iterm_ma; |
| 3055 | |
| 3056 | return 0; |
| 3057 | } |
| 3058 | |
| 3059 | #define FV_CMP_CFG 0xF5 |
| 3060 | #define FV_COMP_MASK SMB_MASK(5, 0) |
| 3061 | static int smbchg_float_voltage_comp_set(struct smbchg_chip *chip, int code) |
| 3062 | { |
| 3063 | int rc; |
| 3064 | u8 val; |
| 3065 | |
| 3066 | val = code & FV_COMP_MASK; |
| 3067 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + FV_CMP_CFG, |
| 3068 | FV_COMP_MASK, val); |
| 3069 | |
| 3070 | if (rc) |
| 3071 | dev_err(chip->dev, "Couldn't set float voltage comp rc = %d\n", |
| 3072 | rc); |
| 3073 | |
| 3074 | return rc; |
| 3075 | } |
| 3076 | |
| 3077 | #define VFLOAT_CFG_REG 0xF4 |
| 3078 | #define MIN_FLOAT_MV 3600 |
| 3079 | #define MAX_FLOAT_MV 4500 |
| 3080 | #define VFLOAT_MASK SMB_MASK(5, 0) |
| 3081 | |
| 3082 | #define MID_RANGE_FLOAT_MV_MIN 3600 |
| 3083 | #define MID_RANGE_FLOAT_MIN_VAL 0x05 |
| 3084 | #define MID_RANGE_FLOAT_STEP_MV 20 |
| 3085 | |
| 3086 | #define HIGH_RANGE_FLOAT_MIN_MV 4340 |
| 3087 | #define HIGH_RANGE_FLOAT_MIN_VAL 0x2A |
| 3088 | #define HIGH_RANGE_FLOAT_STEP_MV 10 |
| 3089 | |
| 3090 | #define VHIGH_RANGE_FLOAT_MIN_MV 4360 |
| 3091 | #define VHIGH_RANGE_FLOAT_MIN_VAL 0x2C |
| 3092 | #define VHIGH_RANGE_FLOAT_STEP_MV 20 |
| 3093 | static int smbchg_float_voltage_set(struct smbchg_chip *chip, int vfloat_mv) |
| 3094 | { |
| 3095 | struct power_supply *parallel_psy = get_parallel_psy(chip); |
| 3096 | union power_supply_propval prop; |
| 3097 | int rc, delta; |
| 3098 | u8 temp; |
| 3099 | |
| 3100 | if ((vfloat_mv < MIN_FLOAT_MV) || (vfloat_mv > MAX_FLOAT_MV)) { |
| 3101 | dev_err(chip->dev, "bad float voltage mv =%d asked to set\n", |
| 3102 | vfloat_mv); |
| 3103 | return -EINVAL; |
| 3104 | } |
| 3105 | |
| 3106 | if (vfloat_mv <= HIGH_RANGE_FLOAT_MIN_MV) { |
| 3107 | /* mid range */ |
| 3108 | delta = vfloat_mv - MID_RANGE_FLOAT_MV_MIN; |
| 3109 | temp = MID_RANGE_FLOAT_MIN_VAL + delta |
| 3110 | / MID_RANGE_FLOAT_STEP_MV; |
| 3111 | vfloat_mv -= delta % MID_RANGE_FLOAT_STEP_MV; |
| 3112 | } else if (vfloat_mv <= VHIGH_RANGE_FLOAT_MIN_MV) { |
| 3113 | /* high range */ |
| 3114 | delta = vfloat_mv - HIGH_RANGE_FLOAT_MIN_MV; |
| 3115 | temp = HIGH_RANGE_FLOAT_MIN_VAL + delta |
| 3116 | / HIGH_RANGE_FLOAT_STEP_MV; |
| 3117 | vfloat_mv -= delta % HIGH_RANGE_FLOAT_STEP_MV; |
| 3118 | } else { |
| 3119 | /* very high range */ |
| 3120 | delta = vfloat_mv - VHIGH_RANGE_FLOAT_MIN_MV; |
| 3121 | temp = VHIGH_RANGE_FLOAT_MIN_VAL + delta |
| 3122 | / VHIGH_RANGE_FLOAT_STEP_MV; |
| 3123 | vfloat_mv -= delta % VHIGH_RANGE_FLOAT_STEP_MV; |
| 3124 | } |
| 3125 | |
| 3126 | if (parallel_psy) { |
| 3127 | prop.intval = vfloat_mv + 50; |
| 3128 | rc = power_supply_set_property(parallel_psy, |
| 3129 | POWER_SUPPLY_PROP_VOLTAGE_MAX, &prop); |
| 3130 | if (rc) |
| 3131 | dev_err(chip->dev, "Couldn't set float voltage on parallel psy rc: %d\n", |
| 3132 | rc); |
| 3133 | } |
| 3134 | |
| 3135 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + VFLOAT_CFG_REG, |
| 3136 | VFLOAT_MASK, temp); |
| 3137 | |
| 3138 | if (rc) |
| 3139 | dev_err(chip->dev, "Couldn't set float voltage rc = %d\n", rc); |
| 3140 | else |
| 3141 | chip->vfloat_mv = vfloat_mv; |
| 3142 | |
| 3143 | return rc; |
| 3144 | } |
| 3145 | |
| 3146 | static int smbchg_float_voltage_get(struct smbchg_chip *chip) |
| 3147 | { |
| 3148 | return chip->vfloat_mv; |
| 3149 | } |
| 3150 | |
| 3151 | #define SFT_CFG 0xFD |
| 3152 | #define SFT_EN_MASK SMB_MASK(5, 4) |
| 3153 | #define SFT_TO_MASK SMB_MASK(3, 2) |
| 3154 | #define PRECHG_SFT_TO_MASK SMB_MASK(1, 0) |
| 3155 | #define SFT_TIMER_DISABLE_BIT BIT(5) |
| 3156 | #define PRECHG_SFT_TIMER_DISABLE_BIT BIT(4) |
| 3157 | #define SAFETY_TIME_MINUTES_SHIFT 2 |
| 3158 | static int smbchg_safety_timer_enable(struct smbchg_chip *chip, bool enable) |
| 3159 | { |
| 3160 | int rc; |
| 3161 | u8 reg; |
| 3162 | |
| 3163 | if (enable == chip->safety_timer_en) |
| 3164 | return 0; |
| 3165 | |
| 3166 | if (enable) |
| 3167 | reg = 0; |
| 3168 | else |
| 3169 | reg = SFT_TIMER_DISABLE_BIT | PRECHG_SFT_TIMER_DISABLE_BIT; |
| 3170 | |
| 3171 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + SFT_CFG, |
| 3172 | SFT_EN_MASK, reg); |
| 3173 | if (rc < 0) { |
| 3174 | dev_err(chip->dev, |
| 3175 | "Couldn't %s safety timer rc = %d\n", |
| 3176 | enable ? "enable" : "disable", rc); |
| 3177 | return rc; |
| 3178 | } |
| 3179 | chip->safety_timer_en = enable; |
| 3180 | return 0; |
| 3181 | } |
| 3182 | |
| 3183 | enum skip_reason { |
| 3184 | REASON_OTG_ENABLED = BIT(0), |
| 3185 | REASON_FLASH_ENABLED = BIT(1) |
| 3186 | }; |
| 3187 | |
| 3188 | #define BAT_IF_TRIM7_REG 0xF7 |
| 3189 | #define CFG_750KHZ_BIT BIT(1) |
| 3190 | #define MISC_CFG_NTC_VOUT_REG 0xF3 |
| 3191 | #define CFG_NTC_VOUT_FSW_BIT BIT(0) |
| 3192 | static int smbchg_switch_buck_frequency(struct smbchg_chip *chip, |
| 3193 | bool flash_active) |
| 3194 | { |
| 3195 | int rc; |
| 3196 | |
| 3197 | if (!(chip->wa_flags & SMBCHG_FLASH_BUCK_SWITCH_FREQ_WA)) |
| 3198 | return 0; |
| 3199 | |
| 3200 | if (chip->flash_active == flash_active) { |
| 3201 | pr_smb(PR_STATUS, "Fsw not changed, flash_active: %d\n", |
| 3202 | flash_active); |
| 3203 | return 0; |
| 3204 | } |
| 3205 | |
| 3206 | /* |
| 3207 | * As per the systems team recommendation, before the flash fires, |
| 3208 | * buck switching frequency(Fsw) needs to be increased to 1MHz. Once the |
| 3209 | * flash is disabled, Fsw needs to be set back to 750KHz. |
| 3210 | */ |
| 3211 | rc = smbchg_sec_masked_write(chip, chip->misc_base + |
| 3212 | MISC_CFG_NTC_VOUT_REG, CFG_NTC_VOUT_FSW_BIT, |
| 3213 | flash_active ? CFG_NTC_VOUT_FSW_BIT : 0); |
| 3214 | if (rc < 0) { |
| 3215 | dev_err(chip->dev, "Couldn't set switching frequency multiplier rc=%d\n", |
| 3216 | rc); |
| 3217 | return rc; |
| 3218 | } |
| 3219 | |
| 3220 | rc = smbchg_sec_masked_write(chip, chip->bat_if_base + BAT_IF_TRIM7_REG, |
| 3221 | CFG_750KHZ_BIT, flash_active ? 0 : CFG_750KHZ_BIT); |
| 3222 | if (rc < 0) { |
| 3223 | dev_err(chip->dev, "Cannot set switching freq: %d\n", rc); |
| 3224 | return rc; |
| 3225 | } |
| 3226 | |
| 3227 | pr_smb(PR_STATUS, "Fsw @ %sHz\n", flash_active ? "1M" : "750K"); |
| 3228 | chip->flash_active = flash_active; |
| 3229 | return 0; |
| 3230 | } |
| 3231 | |
| 3232 | #define OTG_TRIM6 0xF6 |
| 3233 | #define TR_ENB_SKIP_BIT BIT(2) |
| 3234 | #define OTG_EN_BIT BIT(0) |
| 3235 | static int smbchg_otg_pulse_skip_disable(struct smbchg_chip *chip, |
| 3236 | enum skip_reason reason, bool disable) |
| 3237 | { |
| 3238 | int rc; |
| 3239 | bool disabled; |
| 3240 | |
| 3241 | disabled = !!chip->otg_pulse_skip_dis; |
| 3242 | pr_smb(PR_STATUS, "%s pulse skip, reason %d\n", |
| 3243 | disable ? "disabling" : "enabling", reason); |
| 3244 | if (disable) |
| 3245 | chip->otg_pulse_skip_dis |= reason; |
| 3246 | else |
| 3247 | chip->otg_pulse_skip_dis &= ~reason; |
| 3248 | if (disabled == !!chip->otg_pulse_skip_dis) |
| 3249 | return 0; |
| 3250 | disabled = !!chip->otg_pulse_skip_dis; |
| 3251 | |
| 3252 | rc = smbchg_sec_masked_write(chip, chip->otg_base + OTG_TRIM6, |
| 3253 | TR_ENB_SKIP_BIT, disabled ? TR_ENB_SKIP_BIT : 0); |
| 3254 | if (rc < 0) { |
| 3255 | dev_err(chip->dev, |
| 3256 | "Couldn't %s otg pulse skip rc = %d\n", |
| 3257 | disabled ? "disable" : "enable", rc); |
| 3258 | return rc; |
| 3259 | } |
| 3260 | pr_smb(PR_STATUS, "%s pulse skip\n", disabled ? "disabled" : "enabled"); |
| 3261 | return 0; |
| 3262 | } |
| 3263 | |
| 3264 | #define LOW_PWR_OPTIONS_REG 0xFF |
| 3265 | #define FORCE_TLIM_BIT BIT(4) |
| 3266 | static int smbchg_force_tlim_en(struct smbchg_chip *chip, bool enable) |
| 3267 | { |
| 3268 | int rc; |
| 3269 | |
| 3270 | rc = smbchg_sec_masked_write(chip, chip->otg_base + LOW_PWR_OPTIONS_REG, |
| 3271 | FORCE_TLIM_BIT, enable ? FORCE_TLIM_BIT : 0); |
| 3272 | if (rc < 0) { |
| 3273 | dev_err(chip->dev, |
| 3274 | "Couldn't %s otg force tlim rc = %d\n", |
| 3275 | enable ? "enable" : "disable", rc); |
| 3276 | return rc; |
| 3277 | } |
| 3278 | return rc; |
| 3279 | } |
| 3280 | |
| 3281 | static void smbchg_vfloat_adjust_check(struct smbchg_chip *chip) |
| 3282 | { |
| 3283 | if (!chip->use_vfloat_adjustments) |
| 3284 | return; |
| 3285 | |
| 3286 | smbchg_stay_awake(chip, PM_REASON_VFLOAT_ADJUST); |
| 3287 | pr_smb(PR_STATUS, "Starting vfloat adjustments\n"); |
| 3288 | schedule_delayed_work(&chip->vfloat_adjust_work, 0); |
| 3289 | } |
| 3290 | |
| 3291 | #define FV_STS_REG 0xC |
| 3292 | #define AICL_INPUT_STS_BIT BIT(6) |
| 3293 | static bool smbchg_is_input_current_limited(struct smbchg_chip *chip) |
| 3294 | { |
| 3295 | int rc; |
| 3296 | u8 reg; |
| 3297 | |
| 3298 | rc = smbchg_read(chip, ®, chip->chgr_base + FV_STS_REG, 1); |
| 3299 | if (rc < 0) { |
| 3300 | dev_err(chip->dev, "Couldn't read FV_STS rc=%d\n", rc); |
| 3301 | return false; |
| 3302 | } |
| 3303 | |
| 3304 | return !!(reg & AICL_INPUT_STS_BIT); |
| 3305 | } |
| 3306 | |
| 3307 | #define SW_ESR_PULSE_MS 1500 |
| 3308 | static void smbchg_cc_esr_wa_check(struct smbchg_chip *chip) |
| 3309 | { |
| 3310 | int rc, esr_count; |
| 3311 | |
| 3312 | if (!(chip->wa_flags & SMBCHG_CC_ESR_WA)) |
| 3313 | return; |
| 3314 | |
| 3315 | if (!is_usb_present(chip) && !is_dc_present(chip)) { |
| 3316 | pr_smb(PR_STATUS, "No inputs present, skipping\n"); |
| 3317 | return; |
| 3318 | } |
| 3319 | |
| 3320 | if (get_prop_charge_type(chip) != POWER_SUPPLY_CHARGE_TYPE_FAST) { |
| 3321 | pr_smb(PR_STATUS, "Not in fast charge, skipping\n"); |
| 3322 | return; |
| 3323 | } |
| 3324 | |
| 3325 | if (!smbchg_is_input_current_limited(chip)) { |
| 3326 | pr_smb(PR_STATUS, "Not input current limited, skipping\n"); |
| 3327 | return; |
| 3328 | } |
| 3329 | |
| 3330 | set_property_on_fg(chip, POWER_SUPPLY_PROP_UPDATE_NOW, 1); |
| 3331 | rc = get_property_from_fg(chip, |
| 3332 | POWER_SUPPLY_PROP_ESR_COUNT, &esr_count); |
| 3333 | if (rc) { |
| 3334 | pr_smb(PR_STATUS, |
| 3335 | "could not read ESR counter rc = %d\n", rc); |
| 3336 | return; |
| 3337 | } |
| 3338 | |
| 3339 | /* |
| 3340 | * The esr_count is counting down the number of fuel gauge cycles |
| 3341 | * before a ESR pulse is needed. |
| 3342 | * |
| 3343 | * After a successful ESR pulse, this count is reset to some |
| 3344 | * high number like 28. If this reaches 0, then the fuel gauge |
| 3345 | * hardware should force a ESR pulse. |
| 3346 | * |
| 3347 | * However, if the device is in constant current charge mode while |
| 3348 | * being input current limited, the ESR pulse will not affect the |
| 3349 | * battery current, so the measurement will fail. |
| 3350 | * |
| 3351 | * As a failsafe, force a manual ESR pulse if this value is read as |
| 3352 | * 0. |
| 3353 | */ |
| 3354 | if (esr_count != 0) { |
| 3355 | pr_smb(PR_STATUS, "ESR count is not zero, skipping\n"); |
| 3356 | return; |
| 3357 | } |
| 3358 | |
| 3359 | pr_smb(PR_STATUS, "Lowering charge current for ESR pulse\n"); |
| 3360 | smbchg_stay_awake(chip, PM_ESR_PULSE); |
| 3361 | smbchg_sw_esr_pulse_en(chip, true); |
| 3362 | msleep(SW_ESR_PULSE_MS); |
| 3363 | pr_smb(PR_STATUS, "Raising charge current for ESR pulse\n"); |
| 3364 | smbchg_relax(chip, PM_ESR_PULSE); |
| 3365 | smbchg_sw_esr_pulse_en(chip, false); |
| 3366 | } |
| 3367 | |
| 3368 | static void smbchg_soc_changed(struct smbchg_chip *chip) |
| 3369 | { |
| 3370 | smbchg_cc_esr_wa_check(chip); |
| 3371 | } |
| 3372 | |
| 3373 | #define DC_AICL_CFG 0xF3 |
| 3374 | #define MISC_TRIM_OPT_15_8 0xF5 |
| 3375 | #define USB_AICL_DEGLITCH_MASK (BIT(5) | BIT(4) | BIT(3)) |
| 3376 | #define USB_AICL_DEGLITCH_SHORT (BIT(5) | BIT(4) | BIT(3)) |
| 3377 | #define USB_AICL_DEGLITCH_LONG 0 |
| 3378 | #define DC_AICL_DEGLITCH_MASK (BIT(5) | BIT(4) | BIT(3)) |
| 3379 | #define DC_AICL_DEGLITCH_SHORT (BIT(5) | BIT(4) | BIT(3)) |
| 3380 | #define DC_AICL_DEGLITCH_LONG 0 |
| 3381 | #define AICL_RERUN_MASK (BIT(5) | BIT(4)) |
| 3382 | #define AICL_RERUN_ON (BIT(5) | BIT(4)) |
| 3383 | #define AICL_RERUN_OFF 0 |
| 3384 | |
| 3385 | static int smbchg_hw_aicl_rerun_enable_indirect_cb(struct votable *votable, |
| 3386 | void *data, |
| 3387 | int enable, |
| 3388 | const char *client) |
| 3389 | { |
| 3390 | int rc = 0; |
| 3391 | struct smbchg_chip *chip = data; |
| 3392 | |
| 3393 | if (enable < 0) { |
| 3394 | pr_err("No voters\n"); |
| 3395 | enable = 0; |
| 3396 | } |
| 3397 | /* |
| 3398 | * If the indirect voting result of all the clients is to enable hw aicl |
| 3399 | * rerun, then remove our vote to disable hw aicl rerun |
| 3400 | */ |
| 3401 | rc = vote(chip->hw_aicl_rerun_disable_votable, |
| 3402 | HW_AICL_RERUN_ENABLE_INDIRECT_VOTER, !enable, 0); |
| 3403 | if (rc < 0) { |
| 3404 | pr_err("Couldn't vote for hw rerun rc= %d\n", rc); |
| 3405 | return rc; |
| 3406 | } |
| 3407 | |
| 3408 | return rc; |
| 3409 | } |
| 3410 | |
| 3411 | static int smbchg_hw_aicl_rerun_disable_cb(struct votable *votable, void *data, |
| 3412 | int disable, |
| 3413 | const char *client) |
| 3414 | { |
| 3415 | int rc = 0; |
| 3416 | struct smbchg_chip *chip = data; |
| 3417 | |
| 3418 | if (disable < 0) { |
| 3419 | pr_err("No voters\n"); |
| 3420 | disable = 0; |
| 3421 | } |
| 3422 | |
| 3423 | rc = smbchg_sec_masked_write(chip, |
| 3424 | chip->misc_base + MISC_TRIM_OPT_15_8, |
| 3425 | AICL_RERUN_MASK, disable ? AICL_RERUN_OFF : AICL_RERUN_ON); |
| 3426 | if (rc < 0) |
| 3427 | pr_err("Couldn't write to MISC_TRIM_OPTIONS_15_8 rc=%d\n", rc); |
| 3428 | |
| 3429 | return rc; |
| 3430 | } |
| 3431 | |
| 3432 | static int smbchg_aicl_deglitch_config_cb(struct votable *votable, void *data, |
| 3433 | int shorter, |
| 3434 | const char *client) |
| 3435 | { |
| 3436 | int rc = 0; |
| 3437 | struct smbchg_chip *chip = data; |
| 3438 | |
| 3439 | if (shorter < 0) { |
| 3440 | pr_err("No voters\n"); |
| 3441 | shorter = 0; |
| 3442 | } |
| 3443 | |
| 3444 | rc = smbchg_sec_masked_write(chip, |
| 3445 | chip->usb_chgpth_base + USB_AICL_CFG, |
| 3446 | USB_AICL_DEGLITCH_MASK, |
| 3447 | shorter ? USB_AICL_DEGLITCH_SHORT : USB_AICL_DEGLITCH_LONG); |
| 3448 | if (rc < 0) { |
| 3449 | pr_err("Couldn't write to USB_AICL_CFG rc=%d\n", rc); |
| 3450 | return rc; |
| 3451 | } |
| 3452 | rc = smbchg_sec_masked_write(chip, |
| 3453 | chip->dc_chgpth_base + DC_AICL_CFG, |
| 3454 | DC_AICL_DEGLITCH_MASK, |
| 3455 | shorter ? DC_AICL_DEGLITCH_SHORT : DC_AICL_DEGLITCH_LONG); |
| 3456 | if (rc < 0) { |
| 3457 | pr_err("Couldn't write to DC_AICL_CFG rc=%d\n", rc); |
| 3458 | return rc; |
| 3459 | } |
| 3460 | return rc; |
| 3461 | } |
| 3462 | |
| 3463 | static void smbchg_aicl_deglitch_wa_en(struct smbchg_chip *chip, bool en) |
| 3464 | { |
| 3465 | int rc; |
| 3466 | |
| 3467 | rc = vote(chip->aicl_deglitch_short_votable, |
| 3468 | VARB_WORKAROUND_VOTER, en, 0); |
| 3469 | if (rc < 0) { |
| 3470 | pr_err("Couldn't vote %s deglitch rc=%d\n", |
| 3471 | en ? "short" : "long", rc); |
| 3472 | return; |
| 3473 | } |
| 3474 | pr_smb(PR_STATUS, "AICL deglitch set to %s\n", en ? "short" : "long"); |
| 3475 | |
| 3476 | rc = vote(chip->hw_aicl_rerun_enable_indirect_votable, |
| 3477 | VARB_WORKAROUND_VOTER, en, 0); |
| 3478 | if (rc < 0) { |
| 3479 | pr_err("Couldn't vote hw aicl rerun rc= %d\n", rc); |
| 3480 | return; |
| 3481 | } |
| 3482 | chip->aicl_deglitch_short = en; |
| 3483 | } |
| 3484 | |
| 3485 | static void smbchg_aicl_deglitch_wa_check(struct smbchg_chip *chip) |
| 3486 | { |
| 3487 | union power_supply_propval prop = {0,}; |
| 3488 | int rc; |
| 3489 | bool low_volt_chgr = true; |
| 3490 | |
| 3491 | if (!(chip->wa_flags & SMBCHG_AICL_DEGLITCH_WA)) |
| 3492 | return; |
| 3493 | |
| 3494 | if (!is_usb_present(chip) && !is_dc_present(chip)) { |
| 3495 | pr_smb(PR_STATUS, "Charger removed\n"); |
| 3496 | smbchg_aicl_deglitch_wa_en(chip, false); |
| 3497 | return; |
| 3498 | } |
| 3499 | |
| 3500 | if (!chip->bms_psy) |
| 3501 | return; |
| 3502 | |
| 3503 | if (is_usb_present(chip)) { |
| 3504 | if (is_hvdcp_present(chip)) |
| 3505 | low_volt_chgr = false; |
| 3506 | } else if (is_dc_present(chip)) { |
| 3507 | if (chip->dc_psy_type == POWER_SUPPLY_TYPE_WIPOWER) |
| 3508 | low_volt_chgr = false; |
| 3509 | else |
| 3510 | low_volt_chgr = chip->low_volt_dcin; |
| 3511 | } |
| 3512 | |
| 3513 | if (!low_volt_chgr) { |
| 3514 | pr_smb(PR_STATUS, "High volt charger! Don't set deglitch\n"); |
| 3515 | smbchg_aicl_deglitch_wa_en(chip, false); |
| 3516 | return; |
| 3517 | } |
| 3518 | |
| 3519 | /* It is possible that battery voltage went high above threshold |
| 3520 | * when the charger is inserted and can go low because of system |
| 3521 | * load. We shouldn't be reconfiguring AICL deglitch when this |
| 3522 | * happens as it will lead to oscillation again which is being |
| 3523 | * fixed here. Do it once when the battery voltage crosses the |
| 3524 | * threshold (e.g. 4.2 V) and clear it only when the charger |
| 3525 | * is removed. |
| 3526 | */ |
| 3527 | if (!chip->vbat_above_headroom) { |
| 3528 | rc = power_supply_get_property(chip->bms_psy, |
| 3529 | POWER_SUPPLY_PROP_VOLTAGE_MIN, &prop); |
| 3530 | if (rc < 0) { |
| 3531 | pr_err("could not read voltage_min, rc=%d\n", rc); |
| 3532 | return; |
| 3533 | } |
| 3534 | chip->vbat_above_headroom = !prop.intval; |
| 3535 | } |
| 3536 | smbchg_aicl_deglitch_wa_en(chip, chip->vbat_above_headroom); |
| 3537 | } |
| 3538 | |
| 3539 | #define MISC_TEST_REG 0xE2 |
| 3540 | #define BB_LOOP_DISABLE_ICL BIT(2) |
| 3541 | static int smbchg_icl_loop_disable_check(struct smbchg_chip *chip) |
| 3542 | { |
| 3543 | bool icl_disabled = !chip->chg_otg_enabled && chip->flash_triggered; |
| 3544 | int rc = 0; |
| 3545 | |
| 3546 | if ((chip->wa_flags & SMBCHG_FLASH_ICL_DISABLE_WA) |
| 3547 | && icl_disabled != chip->icl_disabled) { |
| 3548 | rc = smbchg_sec_masked_write(chip, |
| 3549 | chip->misc_base + MISC_TEST_REG, |
| 3550 | BB_LOOP_DISABLE_ICL, |
| 3551 | icl_disabled ? BB_LOOP_DISABLE_ICL : 0); |
| 3552 | chip->icl_disabled = icl_disabled; |
| 3553 | } |
| 3554 | |
| 3555 | return rc; |
| 3556 | } |
| 3557 | |
| 3558 | #define UNKNOWN_BATT_TYPE "Unknown Battery" |
| 3559 | #define LOADING_BATT_TYPE "Loading Battery Data" |
| 3560 | static int smbchg_config_chg_battery_type(struct smbchg_chip *chip) |
| 3561 | { |
| 3562 | int rc = 0, max_voltage_uv = 0, fastchg_ma = 0, ret = 0, iterm_ua = 0; |
| 3563 | struct device_node *batt_node, *profile_node; |
| 3564 | struct device_node *node = chip->pdev->dev.of_node; |
| 3565 | union power_supply_propval prop = {0,}; |
| 3566 | |
| 3567 | rc = power_supply_get_property(chip->bms_psy, |
| 3568 | POWER_SUPPLY_PROP_BATTERY_TYPE, &prop); |
| 3569 | if (rc) { |
| 3570 | pr_smb(PR_STATUS, "Unable to read battery-type rc=%d\n", rc); |
| 3571 | return 0; |
| 3572 | } |
| 3573 | if (!strcmp(prop.strval, UNKNOWN_BATT_TYPE) || |
| 3574 | !strcmp(prop.strval, LOADING_BATT_TYPE)) { |
| 3575 | pr_smb(PR_MISC, "Battery-type not identified\n"); |
| 3576 | return 0; |
| 3577 | } |
| 3578 | /* quit if there is no change in the battery-type from previous */ |
| 3579 | if (chip->battery_type && !strcmp(prop.strval, chip->battery_type)) |
| 3580 | return 0; |
| 3581 | |
| 3582 | chip->battery_type = prop.strval; |
| 3583 | batt_node = of_parse_phandle(node, "qcom,battery-data", 0); |
| 3584 | if (!batt_node) { |
| 3585 | pr_smb(PR_MISC, "No batterydata available\n"); |
| 3586 | return 0; |
| 3587 | } |
| 3588 | |
| 3589 | rc = power_supply_get_property(chip->bms_psy, |
| 3590 | POWER_SUPPLY_PROP_RESISTANCE_ID, &prop); |
| 3591 | if (rc < 0) { |
| 3592 | pr_smb(PR_STATUS, "Unable to read battery-id rc=%d\n", rc); |
| 3593 | return 0; |
| 3594 | } |
| 3595 | |
| 3596 | profile_node = of_batterydata_get_best_profile(batt_node, |
| 3597 | prop.intval / 1000, NULL); |
| 3598 | if (IS_ERR_OR_NULL(profile_node)) { |
| 3599 | rc = PTR_ERR(profile_node); |
| 3600 | pr_err("couldn't find profile handle %d\n", rc); |
| 3601 | return rc; |
| 3602 | } |
| 3603 | |
| 3604 | /* change vfloat */ |
| 3605 | rc = of_property_read_u32(profile_node, "qcom,max-voltage-uv", |
| 3606 | &max_voltage_uv); |
| 3607 | if (rc) { |
| 3608 | pr_warn("couldn't find battery max voltage rc=%d\n", rc); |
| 3609 | ret = rc; |
| 3610 | } else { |
| 3611 | if (chip->vfloat_mv != (max_voltage_uv / 1000)) { |
| 3612 | pr_info("Vfloat changed from %dmV to %dmV for battery-type %s\n", |
| 3613 | chip->vfloat_mv, (max_voltage_uv / 1000), |
| 3614 | chip->battery_type); |
| 3615 | rc = smbchg_float_voltage_set(chip, |
| 3616 | (max_voltage_uv / 1000)); |
| 3617 | if (rc < 0) { |
| 3618 | dev_err(chip->dev, |
| 3619 | "Couldn't set float voltage rc = %d\n", rc); |
| 3620 | return rc; |
| 3621 | } |
| 3622 | } |
| 3623 | } |
| 3624 | |
| 3625 | /* change chg term */ |
| 3626 | rc = of_property_read_u32(profile_node, "qcom,chg-term-ua", |
| 3627 | &iterm_ua); |
| 3628 | if (rc && rc != -EINVAL) { |
| 3629 | pr_warn("couldn't read battery term current=%d\n", rc); |
| 3630 | ret = rc; |
| 3631 | } else if (!rc) { |
| 3632 | if (chip->iterm_ma != (iterm_ua / 1000) |
| 3633 | && !chip->iterm_disabled) { |
| 3634 | pr_info("Term current changed from %dmA to %dmA for battery-type %s\n", |
| 3635 | chip->iterm_ma, (iterm_ua / 1000), |
| 3636 | chip->battery_type); |
| 3637 | rc = smbchg_iterm_set(chip, |
| 3638 | (iterm_ua / 1000)); |
| 3639 | if (rc < 0) { |
| 3640 | dev_err(chip->dev, |
| 3641 | "Couldn't set iterm rc = %d\n", rc); |
| 3642 | return rc; |
| 3643 | } |
| 3644 | } |
| 3645 | chip->iterm_ma = iterm_ua / 1000; |
| 3646 | } |
| 3647 | |
| 3648 | /* |
| 3649 | * Only configure from profile if fastchg-ma is not defined in the |
| 3650 | * charger device node. |
| 3651 | */ |
| 3652 | if (!of_find_property(chip->pdev->dev.of_node, |
| 3653 | "qcom,fastchg-current-ma", NULL)) { |
| 3654 | rc = of_property_read_u32(profile_node, |
| 3655 | "qcom,fastchg-current-ma", &fastchg_ma); |
| 3656 | if (rc) { |
| 3657 | ret = rc; |
| 3658 | } else { |
| 3659 | pr_smb(PR_MISC, |
| 3660 | "fastchg-ma changed from to %dma for battery-type %s\n", |
| 3661 | fastchg_ma, chip->battery_type); |
| 3662 | rc = vote(chip->fcc_votable, BATT_TYPE_FCC_VOTER, true, |
| 3663 | fastchg_ma); |
| 3664 | if (rc < 0) { |
| 3665 | dev_err(chip->dev, |
| 3666 | "Couldn't vote for fastchg current rc=%d\n", |
| 3667 | rc); |
| 3668 | return rc; |
| 3669 | } |
| 3670 | } |
| 3671 | } |
| 3672 | |
| 3673 | return ret; |
| 3674 | } |
| 3675 | |
| 3676 | #define MAX_INV_BATT_ID 7700 |
| 3677 | #define MIN_INV_BATT_ID 7300 |
| 3678 | static void check_battery_type(struct smbchg_chip *chip) |
| 3679 | { |
| 3680 | union power_supply_propval prop = {0,}; |
| 3681 | bool en; |
| 3682 | |
| 3683 | if (!chip->bms_psy && chip->bms_psy_name) |
| 3684 | chip->bms_psy = |
| 3685 | power_supply_get_by_name((char *)chip->bms_psy_name); |
| 3686 | if (chip->bms_psy) { |
| 3687 | power_supply_get_property(chip->bms_psy, |
| 3688 | POWER_SUPPLY_PROP_BATTERY_TYPE, &prop); |
| 3689 | en = (strcmp(prop.strval, UNKNOWN_BATT_TYPE) != 0 |
| 3690 | || chip->charge_unknown_battery) |
| 3691 | && (strcmp(prop.strval, LOADING_BATT_TYPE) != 0); |
| 3692 | vote(chip->battchg_suspend_votable, |
| 3693 | BATTCHG_UNKNOWN_BATTERY_EN_VOTER, !en, 0); |
| 3694 | |
| 3695 | if (!chip->skip_usb_suspend_for_fake_battery) { |
| 3696 | power_supply_get_property(chip->bms_psy, |
| 3697 | POWER_SUPPLY_PROP_RESISTANCE_ID, &prop); |
| 3698 | /* suspend USB path for invalid battery-id */ |
| 3699 | en = (prop.intval <= MAX_INV_BATT_ID && |
| 3700 | prop.intval >= MIN_INV_BATT_ID) ? 1 : 0; |
| 3701 | vote(chip->usb_suspend_votable, FAKE_BATTERY_EN_VOTER, |
| 3702 | en, 0); |
| 3703 | } |
| 3704 | } |
| 3705 | } |
| 3706 | |
| 3707 | static void smbchg_external_power_changed(struct power_supply *psy) |
| 3708 | { |
| 3709 | struct smbchg_chip *chip = power_supply_get_drvdata(psy); |
| 3710 | union power_supply_propval prop = {0,}; |
| 3711 | int rc, current_limit = 0, soc; |
| 3712 | enum power_supply_type usb_supply_type; |
| 3713 | char *usb_type_name = "null"; |
| 3714 | |
| 3715 | if (chip->bms_psy_name) |
| 3716 | chip->bms_psy = |
| 3717 | power_supply_get_by_name((char *)chip->bms_psy_name); |
| 3718 | |
| 3719 | smbchg_aicl_deglitch_wa_check(chip); |
| 3720 | if (chip->bms_psy) { |
| 3721 | check_battery_type(chip); |
| 3722 | soc = get_prop_batt_capacity(chip); |
| 3723 | if (chip->previous_soc != soc) { |
| 3724 | chip->previous_soc = soc; |
| 3725 | smbchg_soc_changed(chip); |
| 3726 | } |
| 3727 | |
| 3728 | rc = smbchg_config_chg_battery_type(chip); |
| 3729 | if (rc) |
| 3730 | pr_smb(PR_MISC, |
| 3731 | "Couldn't update charger configuration rc=%d\n", |
| 3732 | rc); |
| 3733 | } |
| 3734 | |
| 3735 | rc = power_supply_get_property(chip->usb_psy, |
| 3736 | POWER_SUPPLY_PROP_CHARGING_ENABLED, &prop); |
| 3737 | if (rc == 0) |
| 3738 | vote(chip->usb_suspend_votable, POWER_SUPPLY_EN_VOTER, |
| 3739 | !prop.intval, 0); |
| 3740 | |
| 3741 | current_limit = chip->usb_current_max / 1000; |
| 3742 | |
| 3743 | /* Override if type-c charger used */ |
| 3744 | if (chip->typec_current_ma > 500 && |
| 3745 | current_limit < chip->typec_current_ma) |
| 3746 | current_limit = chip->typec_current_ma; |
| 3747 | |
| 3748 | read_usb_type(chip, &usb_type_name, &usb_supply_type); |
| 3749 | |
| 3750 | if (usb_supply_type != POWER_SUPPLY_TYPE_USB) |
| 3751 | goto skip_current_for_non_sdp; |
| 3752 | |
| 3753 | pr_smb(PR_MISC, "usb type = %s current_limit = %d\n", |
| 3754 | usb_type_name, current_limit); |
| 3755 | |
| 3756 | rc = vote(chip->usb_icl_votable, PSY_ICL_VOTER, true, |
| 3757 | current_limit); |
| 3758 | if (rc < 0) |
| 3759 | pr_err("Couldn't update USB PSY ICL vote rc=%d\n", rc); |
| 3760 | |
| 3761 | skip_current_for_non_sdp: |
| 3762 | smbchg_vfloat_adjust_check(chip); |
| 3763 | |
| 3764 | if (chip->batt_psy) |
| 3765 | power_supply_changed(chip->batt_psy); |
| 3766 | } |
| 3767 | |
| 3768 | static int smbchg_otg_regulator_enable(struct regulator_dev *rdev) |
| 3769 | { |
| 3770 | int rc = 0; |
| 3771 | struct smbchg_chip *chip = rdev_get_drvdata(rdev); |
| 3772 | |
| 3773 | chip->otg_retries = 0; |
| 3774 | chip->chg_otg_enabled = true; |
| 3775 | smbchg_icl_loop_disable_check(chip); |
| 3776 | smbchg_otg_pulse_skip_disable(chip, REASON_OTG_ENABLED, true); |
| 3777 | |
| 3778 | /* If pin control mode then return from here */ |
| 3779 | if (chip->otg_pinctrl) |
| 3780 | return rc; |
| 3781 | |
| 3782 | /* sleep to make sure the pulse skip is actually disabled */ |
| 3783 | msleep(20); |
| 3784 | rc = smbchg_masked_write(chip, chip->bat_if_base + CMD_CHG_REG, |
| 3785 | OTG_EN_BIT, OTG_EN_BIT); |
| 3786 | if (rc < 0) |
| 3787 | dev_err(chip->dev, "Couldn't enable OTG mode rc=%d\n", rc); |
| 3788 | else |
| 3789 | chip->otg_enable_time = ktime_get(); |
| 3790 | pr_smb(PR_STATUS, "Enabling OTG Boost\n"); |
| 3791 | return rc; |
| 3792 | } |
| 3793 | |
| 3794 | static int smbchg_otg_regulator_disable(struct regulator_dev *rdev) |
| 3795 | { |
| 3796 | int rc = 0; |
| 3797 | struct smbchg_chip *chip = rdev_get_drvdata(rdev); |
| 3798 | |
| 3799 | if (!chip->otg_pinctrl) { |
| 3800 | rc = smbchg_masked_write(chip, chip->bat_if_base + CMD_CHG_REG, |
| 3801 | OTG_EN_BIT, 0); |
| 3802 | if (rc < 0) |
| 3803 | dev_err(chip->dev, "Couldn't disable OTG mode rc=%d\n", |
| 3804 | rc); |
| 3805 | } |
| 3806 | |
| 3807 | chip->chg_otg_enabled = false; |
| 3808 | smbchg_otg_pulse_skip_disable(chip, REASON_OTG_ENABLED, false); |
| 3809 | smbchg_icl_loop_disable_check(chip); |
| 3810 | pr_smb(PR_STATUS, "Disabling OTG Boost\n"); |
| 3811 | return rc; |
| 3812 | } |
| 3813 | |
| 3814 | static int smbchg_otg_regulator_is_enable(struct regulator_dev *rdev) |
| 3815 | { |
| 3816 | int rc = 0; |
| 3817 | u8 reg = 0; |
| 3818 | struct smbchg_chip *chip = rdev_get_drvdata(rdev); |
| 3819 | |
| 3820 | rc = smbchg_read(chip, ®, chip->bat_if_base + CMD_CHG_REG, 1); |
| 3821 | if (rc < 0) { |
| 3822 | dev_err(chip->dev, |
| 3823 | "Couldn't read OTG enable bit rc=%d\n", rc); |
| 3824 | return rc; |
| 3825 | } |
| 3826 | |
| 3827 | return (reg & OTG_EN_BIT) ? 1 : 0; |
| 3828 | } |
| 3829 | |
| 3830 | struct regulator_ops smbchg_otg_reg_ops = { |
| 3831 | .enable = smbchg_otg_regulator_enable, |
| 3832 | .disable = smbchg_otg_regulator_disable, |
| 3833 | .is_enabled = smbchg_otg_regulator_is_enable, |
| 3834 | }; |
| 3835 | |
| 3836 | #define USBIN_CHGR_CFG 0xF1 |
| 3837 | #define ADAPTER_ALLOWANCE_MASK 0x7 |
| 3838 | #define USBIN_ADAPTER_9V 0x3 |
| 3839 | #define USBIN_ADAPTER_5V_9V_CONT 0x2 |
| 3840 | #define USBIN_ADAPTER_5V_UNREGULATED_9V 0x5 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 3841 | static int smbchg_external_otg_regulator_enable(struct regulator_dev *rdev) |
| 3842 | { |
| 3843 | int rc = 0; |
| 3844 | struct smbchg_chip *chip = rdev_get_drvdata(rdev); |
| 3845 | |
| 3846 | rc = vote(chip->usb_suspend_votable, OTG_EN_VOTER, true, 0); |
| 3847 | if (rc < 0) { |
| 3848 | dev_err(chip->dev, "Couldn't suspend charger rc=%d\n", rc); |
| 3849 | return rc; |
| 3850 | } |
| 3851 | |
| 3852 | rc = smbchg_read(chip, &chip->original_usbin_allowance, |
| 3853 | chip->usb_chgpth_base + USBIN_CHGR_CFG, 1); |
| 3854 | if (rc < 0) { |
| 3855 | dev_err(chip->dev, "Couldn't read usb allowance rc=%d\n", rc); |
| 3856 | return rc; |
| 3857 | } |
| 3858 | |
| 3859 | /* |
| 3860 | * To disallow source detect and usbin_uv interrupts, set the adapter |
| 3861 | * allowance to 9V, so that the audio boost operating in reverse never |
| 3862 | * gets detected as a valid input |
| 3863 | */ |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 3864 | rc = vote(chip->hvdcp_enable_votable, HVDCP_OTG_VOTER, true, 0); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 3865 | if (rc < 0) { |
| 3866 | dev_err(chip->dev, "Couldn't disable HVDCP rc=%d\n", rc); |
| 3867 | return rc; |
| 3868 | } |
| 3869 | |
| 3870 | rc = smbchg_sec_masked_write(chip, |
| 3871 | chip->usb_chgpth_base + USBIN_CHGR_CFG, |
| 3872 | 0xFF, USBIN_ADAPTER_9V); |
| 3873 | if (rc < 0) { |
| 3874 | dev_err(chip->dev, "Couldn't write usb allowance rc=%d\n", rc); |
| 3875 | return rc; |
| 3876 | } |
| 3877 | |
| 3878 | pr_smb(PR_STATUS, "Enabling OTG Boost\n"); |
| 3879 | return rc; |
| 3880 | } |
| 3881 | |
| 3882 | static int smbchg_external_otg_regulator_disable(struct regulator_dev *rdev) |
| 3883 | { |
| 3884 | int rc = 0; |
| 3885 | struct smbchg_chip *chip = rdev_get_drvdata(rdev); |
| 3886 | |
| 3887 | rc = vote(chip->usb_suspend_votable, OTG_EN_VOTER, false, 0); |
| 3888 | if (rc < 0) { |
| 3889 | dev_err(chip->dev, "Couldn't unsuspend charger rc=%d\n", rc); |
| 3890 | return rc; |
| 3891 | } |
| 3892 | |
| 3893 | /* |
| 3894 | * Reenable HVDCP and set the adapter allowance back to the original |
| 3895 | * value in order to allow normal USBs to be recognized as a valid |
| 3896 | * input. |
| 3897 | */ |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 3898 | rc = vote(chip->hvdcp_enable_votable, HVDCP_OTG_VOTER, false, 1); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 3899 | if (rc < 0) { |
| 3900 | dev_err(chip->dev, "Couldn't enable HVDCP rc=%d\n", rc); |
| 3901 | return rc; |
| 3902 | } |
| 3903 | |
| 3904 | rc = smbchg_sec_masked_write(chip, |
| 3905 | chip->usb_chgpth_base + USBIN_CHGR_CFG, |
| 3906 | 0xFF, chip->original_usbin_allowance); |
| 3907 | if (rc < 0) { |
| 3908 | dev_err(chip->dev, "Couldn't write usb allowance rc=%d\n", rc); |
| 3909 | return rc; |
| 3910 | } |
| 3911 | |
| 3912 | pr_smb(PR_STATUS, "Disabling OTG Boost\n"); |
| 3913 | return rc; |
| 3914 | } |
| 3915 | |
| 3916 | static int smbchg_external_otg_regulator_is_enable(struct regulator_dev *rdev) |
| 3917 | { |
| 3918 | struct smbchg_chip *chip = rdev_get_drvdata(rdev); |
| 3919 | |
| 3920 | return get_client_vote(chip->usb_suspend_votable, OTG_EN_VOTER); |
| 3921 | } |
| 3922 | |
| 3923 | struct regulator_ops smbchg_external_otg_reg_ops = { |
| 3924 | .enable = smbchg_external_otg_regulator_enable, |
| 3925 | .disable = smbchg_external_otg_regulator_disable, |
| 3926 | .is_enabled = smbchg_external_otg_regulator_is_enable, |
| 3927 | }; |
| 3928 | |
| 3929 | static int smbchg_regulator_init(struct smbchg_chip *chip) |
| 3930 | { |
| 3931 | int rc = 0; |
| 3932 | struct regulator_config cfg = {}; |
| 3933 | struct device_node *regulator_node; |
| 3934 | |
| 3935 | cfg.dev = chip->dev; |
| 3936 | cfg.driver_data = chip; |
| 3937 | |
| 3938 | chip->otg_vreg.rdesc.owner = THIS_MODULE; |
| 3939 | chip->otg_vreg.rdesc.type = REGULATOR_VOLTAGE; |
| 3940 | chip->otg_vreg.rdesc.ops = &smbchg_otg_reg_ops; |
| 3941 | chip->otg_vreg.rdesc.of_match = "qcom,smbcharger-boost-otg"; |
| 3942 | chip->otg_vreg.rdesc.name = "qcom,smbcharger-boost-otg"; |
| 3943 | |
| 3944 | chip->otg_vreg.rdev = devm_regulator_register(chip->dev, |
| 3945 | &chip->otg_vreg.rdesc, &cfg); |
| 3946 | if (IS_ERR(chip->otg_vreg.rdev)) { |
| 3947 | rc = PTR_ERR(chip->otg_vreg.rdev); |
| 3948 | chip->otg_vreg.rdev = NULL; |
| 3949 | if (rc != -EPROBE_DEFER) |
| 3950 | dev_err(chip->dev, |
| 3951 | "OTG reg failed, rc=%d\n", rc); |
| 3952 | } |
| 3953 | if (rc) |
| 3954 | return rc; |
| 3955 | |
| 3956 | regulator_node = of_get_child_by_name(chip->dev->of_node, |
| 3957 | "qcom,smbcharger-external-otg"); |
| 3958 | if (!regulator_node) { |
| 3959 | dev_dbg(chip->dev, "external-otg node absent\n"); |
| 3960 | return 0; |
| 3961 | } |
| 3962 | |
| 3963 | chip->ext_otg_vreg.rdesc.owner = THIS_MODULE; |
| 3964 | chip->ext_otg_vreg.rdesc.type = REGULATOR_VOLTAGE; |
| 3965 | chip->ext_otg_vreg.rdesc.ops = &smbchg_external_otg_reg_ops; |
| 3966 | chip->ext_otg_vreg.rdesc.of_match = "qcom,smbcharger-external-otg"; |
| 3967 | chip->ext_otg_vreg.rdesc.name = "qcom,smbcharger-external-otg"; |
| 3968 | if (of_get_property(chip->dev->of_node, "otg-parent-supply", NULL)) |
| 3969 | chip->ext_otg_vreg.rdesc.supply_name = "otg-parent"; |
| 3970 | cfg.dev = chip->dev; |
| 3971 | cfg.driver_data = chip; |
| 3972 | |
| 3973 | chip->ext_otg_vreg.rdev = devm_regulator_register(chip->dev, |
| 3974 | &chip->ext_otg_vreg.rdesc, |
| 3975 | &cfg); |
| 3976 | if (IS_ERR(chip->ext_otg_vreg.rdev)) { |
| 3977 | rc = PTR_ERR(chip->ext_otg_vreg.rdev); |
| 3978 | chip->ext_otg_vreg.rdev = NULL; |
| 3979 | if (rc != -EPROBE_DEFER) |
| 3980 | dev_err(chip->dev, |
| 3981 | "external OTG reg failed, rc=%d\n", rc); |
| 3982 | } |
| 3983 | |
| 3984 | return rc; |
| 3985 | } |
| 3986 | |
| 3987 | #define CMD_CHG_LED_REG 0x43 |
| 3988 | #define CHG_LED_CTRL_BIT BIT(0) |
| 3989 | #define LED_SW_CTRL_BIT 0x1 |
| 3990 | #define LED_CHG_CTRL_BIT 0x0 |
| 3991 | #define CHG_LED_ON 0x03 |
| 3992 | #define CHG_LED_OFF 0x00 |
| 3993 | #define LED_BLINKING_PATTERN1 0x01 |
| 3994 | #define LED_BLINKING_PATTERN2 0x02 |
| 3995 | #define LED_BLINKING_CFG_MASK SMB_MASK(2, 1) |
| 3996 | #define CHG_LED_SHIFT 1 |
| 3997 | static int smbchg_chg_led_controls(struct smbchg_chip *chip) |
| 3998 | { |
| 3999 | u8 reg, mask; |
| 4000 | int rc; |
| 4001 | |
| 4002 | if (chip->cfg_chg_led_sw_ctrl) { |
| 4003 | /* turn-off LED by default for software control */ |
| 4004 | mask = CHG_LED_CTRL_BIT | LED_BLINKING_CFG_MASK; |
| 4005 | reg = LED_SW_CTRL_BIT; |
| 4006 | } else { |
| 4007 | mask = CHG_LED_CTRL_BIT; |
| 4008 | reg = LED_CHG_CTRL_BIT; |
| 4009 | } |
| 4010 | |
| 4011 | rc = smbchg_masked_write(chip, chip->bat_if_base + CMD_CHG_LED_REG, |
| 4012 | mask, reg); |
| 4013 | if (rc < 0) |
| 4014 | dev_err(chip->dev, |
| 4015 | "Couldn't write LED_CTRL_BIT rc=%d\n", rc); |
| 4016 | return rc; |
| 4017 | } |
| 4018 | |
| 4019 | static void smbchg_chg_led_brightness_set(struct led_classdev *cdev, |
| 4020 | enum led_brightness value) |
| 4021 | { |
| 4022 | struct smbchg_chip *chip = container_of(cdev, |
| 4023 | struct smbchg_chip, led_cdev); |
| 4024 | union power_supply_propval pval = {0, }; |
| 4025 | u8 reg; |
| 4026 | int rc; |
| 4027 | |
| 4028 | reg = (value > LED_OFF) ? CHG_LED_ON << CHG_LED_SHIFT : |
| 4029 | CHG_LED_OFF << CHG_LED_SHIFT; |
| 4030 | pval.intval = value > LED_OFF ? 1 : 0; |
| 4031 | power_supply_set_property(chip->bms_psy, POWER_SUPPLY_PROP_HI_POWER, |
| 4032 | &pval); |
| 4033 | pr_smb(PR_STATUS, |
| 4034 | "set the charger led brightness to value=%d\n", |
| 4035 | value); |
| 4036 | rc = smbchg_sec_masked_write(chip, |
| 4037 | chip->bat_if_base + CMD_CHG_LED_REG, |
| 4038 | LED_BLINKING_CFG_MASK, reg); |
| 4039 | if (rc) |
| 4040 | dev_err(chip->dev, "Couldn't write CHG_LED rc=%d\n", |
| 4041 | rc); |
| 4042 | } |
| 4043 | |
| 4044 | static enum |
| 4045 | led_brightness smbchg_chg_led_brightness_get(struct led_classdev *cdev) |
| 4046 | { |
| 4047 | struct smbchg_chip *chip = container_of(cdev, |
| 4048 | struct smbchg_chip, led_cdev); |
| 4049 | u8 reg_val, chg_led_sts; |
| 4050 | int rc; |
| 4051 | |
| 4052 | rc = smbchg_read(chip, ®_val, chip->bat_if_base + CMD_CHG_LED_REG, |
| 4053 | 1); |
| 4054 | if (rc < 0) { |
| 4055 | dev_err(chip->dev, |
| 4056 | "Couldn't read CHG_LED_REG sts rc=%d\n", |
| 4057 | rc); |
| 4058 | return rc; |
| 4059 | } |
| 4060 | |
| 4061 | chg_led_sts = (reg_val & LED_BLINKING_CFG_MASK) >> CHG_LED_SHIFT; |
| 4062 | |
| 4063 | pr_smb(PR_STATUS, "chg_led_sts = %02x\n", chg_led_sts); |
| 4064 | |
| 4065 | return (chg_led_sts == CHG_LED_OFF) ? LED_OFF : LED_FULL; |
| 4066 | } |
| 4067 | |
| 4068 | static void smbchg_chg_led_blink_set(struct smbchg_chip *chip, |
| 4069 | unsigned long blinking) |
| 4070 | { |
| 4071 | union power_supply_propval pval = {0, }; |
| 4072 | u8 reg; |
| 4073 | int rc; |
| 4074 | |
| 4075 | pval.intval = (blinking == 0) ? 0 : 1; |
| 4076 | power_supply_set_property(chip->bms_psy, POWER_SUPPLY_PROP_HI_POWER, |
| 4077 | &pval); |
| 4078 | |
| 4079 | if (blinking == 0) { |
| 4080 | reg = CHG_LED_OFF << CHG_LED_SHIFT; |
| 4081 | } else { |
| 4082 | if (blinking == 1) |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4083 | reg = LED_BLINKING_PATTERN2 << CHG_LED_SHIFT; |
Fenglin Wu | 8f85c53 | 2016-04-27 10:40:07 +0800 | [diff] [blame] | 4084 | else if (blinking == 2) |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4085 | reg = LED_BLINKING_PATTERN1 << CHG_LED_SHIFT; |
Fenglin Wu | 8f85c53 | 2016-04-27 10:40:07 +0800 | [diff] [blame] | 4086 | else |
| 4087 | reg = LED_BLINKING_PATTERN2 << CHG_LED_SHIFT; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4088 | } |
| 4089 | |
| 4090 | rc = smbchg_sec_masked_write(chip, |
| 4091 | chip->bat_if_base + CMD_CHG_LED_REG, |
| 4092 | LED_BLINKING_CFG_MASK, reg); |
| 4093 | if (rc) |
| 4094 | dev_err(chip->dev, "Couldn't write CHG_LED rc=%d\n", |
| 4095 | rc); |
| 4096 | } |
| 4097 | |
| 4098 | static ssize_t smbchg_chg_led_blink_store(struct device *dev, |
| 4099 | struct device_attribute *attr, const char *buf, size_t len) |
| 4100 | { |
| 4101 | struct led_classdev *cdev = dev_get_drvdata(dev); |
| 4102 | struct smbchg_chip *chip = container_of(cdev, struct smbchg_chip, |
| 4103 | led_cdev); |
| 4104 | unsigned long blinking; |
| 4105 | ssize_t rc = -EINVAL; |
| 4106 | |
| 4107 | rc = kstrtoul(buf, 10, &blinking); |
| 4108 | if (rc) |
| 4109 | return rc; |
| 4110 | |
| 4111 | smbchg_chg_led_blink_set(chip, blinking); |
| 4112 | |
| 4113 | return len; |
| 4114 | } |
| 4115 | |
| 4116 | static DEVICE_ATTR(blink, 0664, NULL, smbchg_chg_led_blink_store); |
| 4117 | |
| 4118 | static struct attribute *led_blink_attributes[] = { |
| 4119 | &dev_attr_blink.attr, |
| 4120 | NULL, |
| 4121 | }; |
| 4122 | |
| 4123 | static struct attribute_group smbchg_led_attr_group = { |
| 4124 | .attrs = led_blink_attributes |
| 4125 | }; |
| 4126 | |
| 4127 | static int smbchg_register_chg_led(struct smbchg_chip *chip) |
| 4128 | { |
| 4129 | int rc; |
| 4130 | |
| 4131 | chip->led_cdev.name = "red"; |
| 4132 | chip->led_cdev.brightness_set = smbchg_chg_led_brightness_set; |
| 4133 | chip->led_cdev.brightness_get = smbchg_chg_led_brightness_get; |
| 4134 | |
| 4135 | rc = led_classdev_register(chip->dev, &chip->led_cdev); |
| 4136 | if (rc) { |
| 4137 | dev_err(chip->dev, "unable to register charger led, rc=%d\n", |
| 4138 | rc); |
| 4139 | return rc; |
| 4140 | } |
| 4141 | |
| 4142 | rc = sysfs_create_group(&chip->led_cdev.dev->kobj, |
| 4143 | &smbchg_led_attr_group); |
| 4144 | if (rc) { |
| 4145 | dev_err(chip->dev, "led sysfs rc: %d\n", rc); |
| 4146 | return rc; |
| 4147 | } |
| 4148 | |
| 4149 | return rc; |
| 4150 | } |
| 4151 | |
| 4152 | static int vf_adjust_low_threshold = 5; |
| 4153 | module_param(vf_adjust_low_threshold, int, 0644); |
| 4154 | |
| 4155 | static int vf_adjust_high_threshold = 7; |
| 4156 | module_param(vf_adjust_high_threshold, int, 0644); |
| 4157 | |
| 4158 | static int vf_adjust_n_samples = 10; |
| 4159 | module_param(vf_adjust_n_samples, int, 0644); |
| 4160 | |
| 4161 | static int vf_adjust_max_delta_mv = 40; |
| 4162 | module_param(vf_adjust_max_delta_mv, int, 0644); |
| 4163 | |
| 4164 | static int vf_adjust_trim_steps_per_adjust = 1; |
| 4165 | module_param(vf_adjust_trim_steps_per_adjust, int, 0644); |
| 4166 | |
| 4167 | #define CENTER_TRIM_CODE 7 |
| 4168 | #define MAX_LIN_CODE 14 |
| 4169 | #define MAX_TRIM_CODE 15 |
| 4170 | #define SCALE_SHIFT 4 |
| 4171 | #define VF_TRIM_OFFSET_MASK SMB_MASK(3, 0) |
| 4172 | #define VF_STEP_SIZE_MV 10 |
| 4173 | #define SCALE_LSB_MV 17 |
| 4174 | static int smbchg_trim_add_steps(int prev_trim, int delta_steps) |
| 4175 | { |
| 4176 | int scale_steps; |
| 4177 | int linear_offset, linear_scale; |
| 4178 | int offset_code = prev_trim & VF_TRIM_OFFSET_MASK; |
| 4179 | int scale_code = (prev_trim & ~VF_TRIM_OFFSET_MASK) >> SCALE_SHIFT; |
| 4180 | |
| 4181 | if (abs(delta_steps) > 1) { |
| 4182 | pr_smb(PR_STATUS, |
| 4183 | "Cant trim multiple steps delta_steps = %d\n", |
| 4184 | delta_steps); |
| 4185 | return prev_trim; |
| 4186 | } |
| 4187 | if (offset_code <= CENTER_TRIM_CODE) |
| 4188 | linear_offset = offset_code + CENTER_TRIM_CODE; |
| 4189 | else if (offset_code > CENTER_TRIM_CODE) |
| 4190 | linear_offset = MAX_TRIM_CODE - offset_code; |
| 4191 | |
| 4192 | if (scale_code <= CENTER_TRIM_CODE) |
| 4193 | linear_scale = scale_code + CENTER_TRIM_CODE; |
| 4194 | else if (scale_code > CENTER_TRIM_CODE) |
| 4195 | linear_scale = scale_code - (CENTER_TRIM_CODE + 1); |
| 4196 | |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 4197 | /* check if we can accommodate delta steps with just the offset */ |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4198 | if (linear_offset + delta_steps >= 0 |
| 4199 | && linear_offset + delta_steps <= MAX_LIN_CODE) { |
| 4200 | linear_offset += delta_steps; |
| 4201 | |
| 4202 | if (linear_offset > CENTER_TRIM_CODE) |
| 4203 | offset_code = linear_offset - CENTER_TRIM_CODE; |
| 4204 | else |
| 4205 | offset_code = MAX_TRIM_CODE - linear_offset; |
| 4206 | |
| 4207 | return (prev_trim & ~VF_TRIM_OFFSET_MASK) | offset_code; |
| 4208 | } |
| 4209 | |
| 4210 | /* changing offset cannot satisfy delta steps, change the scale bits */ |
| 4211 | scale_steps = delta_steps > 0 ? 1 : -1; |
| 4212 | |
| 4213 | if (linear_scale + scale_steps < 0 |
| 4214 | || linear_scale + scale_steps > MAX_LIN_CODE) { |
| 4215 | pr_smb(PR_STATUS, |
| 4216 | "Cant trim scale_steps = %d delta_steps = %d\n", |
| 4217 | scale_steps, delta_steps); |
| 4218 | return prev_trim; |
| 4219 | } |
| 4220 | |
| 4221 | linear_scale += scale_steps; |
| 4222 | |
| 4223 | if (linear_scale > CENTER_TRIM_CODE) |
| 4224 | scale_code = linear_scale - CENTER_TRIM_CODE; |
| 4225 | else |
| 4226 | scale_code = linear_scale + (CENTER_TRIM_CODE + 1); |
| 4227 | prev_trim = (prev_trim & VF_TRIM_OFFSET_MASK) |
| 4228 | | scale_code << SCALE_SHIFT; |
| 4229 | |
| 4230 | /* |
| 4231 | * now that we have changed scale which is a 17mV jump, change the |
| 4232 | * offset bits (10mV) too so the effective change is just 7mV |
| 4233 | */ |
| 4234 | delta_steps = -1 * delta_steps; |
| 4235 | |
| 4236 | linear_offset = clamp(linear_offset + delta_steps, 0, MAX_LIN_CODE); |
| 4237 | if (linear_offset > CENTER_TRIM_CODE) |
| 4238 | offset_code = linear_offset - CENTER_TRIM_CODE; |
| 4239 | else |
| 4240 | offset_code = MAX_TRIM_CODE - linear_offset; |
| 4241 | |
| 4242 | return (prev_trim & ~VF_TRIM_OFFSET_MASK) | offset_code; |
| 4243 | } |
| 4244 | |
| 4245 | #define TRIM_14 0xFE |
| 4246 | #define VF_TRIM_MASK 0xFF |
| 4247 | static int smbchg_adjust_vfloat_mv_trim(struct smbchg_chip *chip, |
| 4248 | int delta_mv) |
| 4249 | { |
| 4250 | int sign, delta_steps, rc = 0; |
| 4251 | u8 prev_trim, new_trim; |
| 4252 | int i; |
| 4253 | |
| 4254 | sign = delta_mv > 0 ? 1 : -1; |
| 4255 | delta_steps = (delta_mv + sign * VF_STEP_SIZE_MV / 2) |
| 4256 | / VF_STEP_SIZE_MV; |
| 4257 | |
| 4258 | rc = smbchg_read(chip, &prev_trim, chip->misc_base + TRIM_14, 1); |
| 4259 | if (rc) { |
| 4260 | dev_err(chip->dev, "Unable to read trim 14: %d\n", rc); |
| 4261 | return rc; |
| 4262 | } |
| 4263 | |
| 4264 | for (i = 1; i <= abs(delta_steps) |
| 4265 | && i <= vf_adjust_trim_steps_per_adjust; i++) { |
| 4266 | new_trim = (u8)smbchg_trim_add_steps(prev_trim, |
| 4267 | delta_steps > 0 ? 1 : -1); |
| 4268 | if (new_trim == prev_trim) { |
| 4269 | pr_smb(PR_STATUS, |
| 4270 | "VFloat trim unchanged from %02x\n", prev_trim); |
| 4271 | /* treat no trim change as an error */ |
| 4272 | return -EINVAL; |
| 4273 | } |
| 4274 | |
| 4275 | rc = smbchg_sec_masked_write(chip, chip->misc_base + TRIM_14, |
| 4276 | VF_TRIM_MASK, new_trim); |
| 4277 | if (rc < 0) { |
| 4278 | dev_err(chip->dev, |
| 4279 | "Couldn't change vfloat trim rc=%d\n", rc); |
| 4280 | } |
| 4281 | pr_smb(PR_STATUS, |
| 4282 | "VFlt trim %02x to %02x, delta steps: %d\n", |
| 4283 | prev_trim, new_trim, delta_steps); |
| 4284 | prev_trim = new_trim; |
| 4285 | } |
| 4286 | |
| 4287 | return rc; |
| 4288 | } |
| 4289 | |
| 4290 | #define VFLOAT_RESAMPLE_DELAY_MS 10000 |
| 4291 | static void smbchg_vfloat_adjust_work(struct work_struct *work) |
| 4292 | { |
| 4293 | struct smbchg_chip *chip = container_of(work, |
| 4294 | struct smbchg_chip, |
| 4295 | vfloat_adjust_work.work); |
| 4296 | int vbat_uv, vbat_mv, ibat_ua, rc, delta_vfloat_mv; |
| 4297 | bool taper, enable; |
| 4298 | |
| 4299 | smbchg_stay_awake(chip, PM_REASON_VFLOAT_ADJUST); |
| 4300 | taper = (get_prop_charge_type(chip) |
| 4301 | == POWER_SUPPLY_CHARGE_TYPE_TAPER); |
| 4302 | enable = taper && (chip->parallel.current_max_ma == 0); |
| 4303 | |
| 4304 | if (!enable) { |
| 4305 | pr_smb(PR_MISC, |
| 4306 | "Stopping vfloat adj taper=%d parallel_ma = %d\n", |
| 4307 | taper, chip->parallel.current_max_ma); |
| 4308 | goto stop; |
| 4309 | } |
| 4310 | |
| 4311 | if (get_prop_batt_health(chip) != POWER_SUPPLY_HEALTH_GOOD) { |
| 4312 | pr_smb(PR_STATUS, "JEITA active, skipping\n"); |
| 4313 | goto stop; |
| 4314 | } |
| 4315 | |
| 4316 | set_property_on_fg(chip, POWER_SUPPLY_PROP_UPDATE_NOW, 1); |
| 4317 | rc = get_property_from_fg(chip, |
| 4318 | POWER_SUPPLY_PROP_VOLTAGE_NOW, &vbat_uv); |
| 4319 | if (rc) { |
| 4320 | pr_smb(PR_STATUS, |
| 4321 | "bms psy does not support voltage rc = %d\n", rc); |
| 4322 | goto stop; |
| 4323 | } |
| 4324 | vbat_mv = vbat_uv / 1000; |
| 4325 | |
| 4326 | if ((vbat_mv - chip->vfloat_mv) < -1 * vf_adjust_max_delta_mv) { |
| 4327 | pr_smb(PR_STATUS, "Skip vbat out of range: %d\n", vbat_mv); |
| 4328 | goto reschedule; |
| 4329 | } |
| 4330 | |
| 4331 | rc = get_property_from_fg(chip, |
| 4332 | POWER_SUPPLY_PROP_CURRENT_NOW, &ibat_ua); |
| 4333 | if (rc) { |
| 4334 | pr_smb(PR_STATUS, |
| 4335 | "bms psy does not support current_now rc = %d\n", rc); |
| 4336 | goto stop; |
| 4337 | } |
| 4338 | |
| 4339 | if (ibat_ua / 1000 > -chip->iterm_ma) { |
| 4340 | pr_smb(PR_STATUS, "Skip ibat too high: %d\n", ibat_ua); |
| 4341 | goto reschedule; |
| 4342 | } |
| 4343 | |
| 4344 | pr_smb(PR_STATUS, "sample number = %d vbat_mv = %d ibat_ua = %d\n", |
| 4345 | chip->n_vbat_samples, |
| 4346 | vbat_mv, |
| 4347 | ibat_ua); |
| 4348 | |
| 4349 | chip->max_vbat_sample = max(chip->max_vbat_sample, vbat_mv); |
| 4350 | chip->n_vbat_samples += 1; |
| 4351 | if (chip->n_vbat_samples < vf_adjust_n_samples) { |
| 4352 | pr_smb(PR_STATUS, "Skip %d samples; max = %d\n", |
| 4353 | chip->n_vbat_samples, chip->max_vbat_sample); |
| 4354 | goto reschedule; |
| 4355 | } |
| 4356 | /* if max vbat > target vfloat, delta_vfloat_mv could be negative */ |
| 4357 | delta_vfloat_mv = chip->vfloat_mv - chip->max_vbat_sample; |
| 4358 | pr_smb(PR_STATUS, "delta_vfloat_mv = %d, samples = %d, mvbat = %d\n", |
| 4359 | delta_vfloat_mv, chip->n_vbat_samples, chip->max_vbat_sample); |
| 4360 | /* |
| 4361 | * enough valid samples has been collected, adjust trim codes |
| 4362 | * based on maximum of collected vbat samples if necessary |
| 4363 | */ |
| 4364 | if (delta_vfloat_mv > vf_adjust_high_threshold |
| 4365 | || delta_vfloat_mv < -1 * vf_adjust_low_threshold) { |
| 4366 | rc = smbchg_adjust_vfloat_mv_trim(chip, delta_vfloat_mv); |
| 4367 | if (rc) { |
| 4368 | pr_smb(PR_STATUS, |
| 4369 | "Stopping vfloat adj after trim adj rc = %d\n", |
| 4370 | rc); |
| 4371 | goto stop; |
| 4372 | } |
| 4373 | chip->max_vbat_sample = 0; |
| 4374 | chip->n_vbat_samples = 0; |
| 4375 | goto reschedule; |
| 4376 | } |
| 4377 | |
| 4378 | stop: |
| 4379 | chip->max_vbat_sample = 0; |
| 4380 | chip->n_vbat_samples = 0; |
| 4381 | smbchg_relax(chip, PM_REASON_VFLOAT_ADJUST); |
| 4382 | return; |
| 4383 | |
| 4384 | reschedule: |
| 4385 | schedule_delayed_work(&chip->vfloat_adjust_work, |
| 4386 | msecs_to_jiffies(VFLOAT_RESAMPLE_DELAY_MS)); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4387 | } |
| 4388 | |
| 4389 | static int smbchg_charging_status_change(struct smbchg_chip *chip) |
| 4390 | { |
| 4391 | smbchg_vfloat_adjust_check(chip); |
| 4392 | set_property_on_fg(chip, POWER_SUPPLY_PROP_STATUS, |
| 4393 | get_prop_batt_status(chip)); |
| 4394 | return 0; |
| 4395 | } |
| 4396 | |
| 4397 | #define BB_CLMP_SEL 0xF8 |
| 4398 | #define BB_CLMP_MASK SMB_MASK(1, 0) |
| 4399 | #define BB_CLMP_VFIX_3338MV 0x1 |
| 4400 | #define BB_CLMP_VFIX_3512MV 0x2 |
| 4401 | static int smbchg_set_optimal_charging_mode(struct smbchg_chip *chip, int type) |
| 4402 | { |
| 4403 | int rc; |
| 4404 | bool hvdcp2 = (type == POWER_SUPPLY_TYPE_USB_HVDCP |
| 4405 | && smbchg_is_usbin_active_pwr_src(chip)); |
| 4406 | |
| 4407 | /* |
| 4408 | * Set the charger switching freq to 1MHZ if HVDCP 2.0, |
| 4409 | * or 750KHZ otherwise |
| 4410 | */ |
| 4411 | rc = smbchg_sec_masked_write(chip, |
| 4412 | chip->bat_if_base + BAT_IF_TRIM7_REG, |
| 4413 | CFG_750KHZ_BIT, hvdcp2 ? 0 : CFG_750KHZ_BIT); |
| 4414 | if (rc) { |
| 4415 | dev_err(chip->dev, "Cannot set switching freq: %d\n", rc); |
| 4416 | return rc; |
| 4417 | } |
| 4418 | |
| 4419 | /* |
| 4420 | * Set the charger switch frequency clamp voltage threshold to 3.338V |
| 4421 | * if HVDCP 2.0, or 3.512V otherwise. |
| 4422 | */ |
| 4423 | rc = smbchg_sec_masked_write(chip, chip->bat_if_base + BB_CLMP_SEL, |
| 4424 | BB_CLMP_MASK, |
| 4425 | hvdcp2 ? BB_CLMP_VFIX_3338MV : BB_CLMP_VFIX_3512MV); |
| 4426 | if (rc) { |
| 4427 | dev_err(chip->dev, "Cannot set switching freq: %d\n", rc); |
| 4428 | return rc; |
| 4429 | } |
| 4430 | |
| 4431 | return 0; |
| 4432 | } |
| 4433 | |
| 4434 | #define DEFAULT_SDP_MA 100 |
| 4435 | #define DEFAULT_CDP_MA 1500 |
| 4436 | static int smbchg_change_usb_supply_type(struct smbchg_chip *chip, |
| 4437 | enum power_supply_type type) |
| 4438 | { |
| 4439 | int rc, current_limit_ma; |
| 4440 | |
| 4441 | /* |
| 4442 | * if the type is not unknown, set the type before changing ICL vote |
| 4443 | * in order to ensure that the correct current limit registers are |
| 4444 | * used |
| 4445 | */ |
| 4446 | if (type != POWER_SUPPLY_TYPE_UNKNOWN) |
| 4447 | chip->usb_supply_type = type; |
| 4448 | |
| 4449 | /* |
| 4450 | * Type-C only supports STD(900), MEDIUM(1500) and HIGH(3000) current |
| 4451 | * modes, skip all BC 1.2 current if external typec is supported. |
| 4452 | * Note: for SDP supporting current based on USB notifications. |
| 4453 | */ |
| 4454 | if (chip->typec_psy && (type != POWER_SUPPLY_TYPE_USB)) |
| 4455 | current_limit_ma = chip->typec_current_ma; |
| 4456 | else if (type == POWER_SUPPLY_TYPE_USB) |
| 4457 | current_limit_ma = DEFAULT_SDP_MA; |
| 4458 | else if (type == POWER_SUPPLY_TYPE_USB_CDP) |
| 4459 | current_limit_ma = DEFAULT_CDP_MA; |
| 4460 | else if (type == POWER_SUPPLY_TYPE_USB_HVDCP) |
| 4461 | current_limit_ma = smbchg_default_hvdcp_icl_ma; |
| 4462 | else if (type == POWER_SUPPLY_TYPE_USB_HVDCP_3) |
| 4463 | current_limit_ma = smbchg_default_hvdcp3_icl_ma; |
| 4464 | else |
| 4465 | current_limit_ma = smbchg_default_dcp_icl_ma; |
| 4466 | |
| 4467 | pr_smb(PR_STATUS, "Type %d: setting mA = %d\n", |
| 4468 | type, current_limit_ma); |
| 4469 | rc = vote(chip->usb_icl_votable, PSY_ICL_VOTER, true, |
| 4470 | current_limit_ma); |
| 4471 | if (rc < 0) { |
| 4472 | pr_err("Couldn't vote for new USB ICL rc=%d\n", rc); |
| 4473 | goto out; |
| 4474 | } |
| 4475 | |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 4476 | /* otherwise if it is unknown, set type after removing the vote */ |
| 4477 | if (type == POWER_SUPPLY_TYPE_UNKNOWN) { |
| 4478 | rc = vote(chip->usb_icl_votable, PSY_ICL_VOTER, true, 0); |
| 4479 | if (rc < 0) |
| 4480 | pr_err("Couldn't vote for new USB ICL rc=%d\n", rc); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4481 | chip->usb_supply_type = type; |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 4482 | } |
Vamshi Krishna B V | cd718a3 | 2018-04-03 17:59:47 +0530 | [diff] [blame] | 4483 | /* |
| 4484 | * Update TYPE property to DCP for HVDCP/HVDCP3 charger types |
| 4485 | * so that they can be recongized as AC chargers by healthd. |
| 4486 | * Don't report UNKNOWN charger type to prevent healthd missing |
| 4487 | * detecting this power_supply status change. |
| 4488 | */ |
| 4489 | if (chip->usb_supply_type == POWER_SUPPLY_TYPE_USB_HVDCP_3 |
| 4490 | || chip->usb_supply_type == POWER_SUPPLY_TYPE_USB_HVDCP) |
| 4491 | chip->usb_psy_d.type = POWER_SUPPLY_TYPE_USB_DCP; |
| 4492 | else if (chip->usb_supply_type == POWER_SUPPLY_TYPE_UNKNOWN) |
| 4493 | chip->usb_psy_d.type = POWER_SUPPLY_TYPE_USB; |
| 4494 | else |
| 4495 | chip->usb_psy_d.type = chip->usb_supply_type; |
| 4496 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4497 | if (!chip->skip_usb_notification) |
| 4498 | power_supply_changed(chip->usb_psy); |
| 4499 | |
| 4500 | /* set the correct buck switching frequency */ |
| 4501 | rc = smbchg_set_optimal_charging_mode(chip, type); |
| 4502 | if (rc < 0) |
| 4503 | pr_err("Couldn't set charger optimal mode rc=%d\n", rc); |
| 4504 | |
| 4505 | out: |
| 4506 | return rc; |
| 4507 | } |
| 4508 | |
| 4509 | #define HVDCP_ADAPTER_SEL_MASK SMB_MASK(5, 4) |
| 4510 | #define HVDCP_5V 0x00 |
| 4511 | #define HVDCP_9V 0x10 |
| 4512 | #define USB_CMD_HVDCP_1 0x42 |
| 4513 | #define FORCE_HVDCP_2p0 BIT(3) |
| 4514 | |
| 4515 | static int force_9v_hvdcp(struct smbchg_chip *chip) |
| 4516 | { |
| 4517 | int rc; |
| 4518 | |
| 4519 | /* Force 5V HVDCP */ |
| 4520 | rc = smbchg_sec_masked_write(chip, |
| 4521 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 4522 | HVDCP_ADAPTER_SEL_MASK, HVDCP_5V); |
| 4523 | if (rc) { |
| 4524 | pr_err("Couldn't set hvdcp config in chgpath_chg rc=%d\n", rc); |
| 4525 | return rc; |
| 4526 | } |
| 4527 | |
| 4528 | /* Force QC2.0 */ |
| 4529 | rc = smbchg_masked_write(chip, |
| 4530 | chip->usb_chgpth_base + USB_CMD_HVDCP_1, |
| 4531 | FORCE_HVDCP_2p0, FORCE_HVDCP_2p0); |
| 4532 | rc |= smbchg_masked_write(chip, |
| 4533 | chip->usb_chgpth_base + USB_CMD_HVDCP_1, |
| 4534 | FORCE_HVDCP_2p0, 0); |
| 4535 | if (rc < 0) { |
| 4536 | pr_err("Couldn't force QC2.0 rc=%d\n", rc); |
| 4537 | return rc; |
| 4538 | } |
| 4539 | |
| 4540 | /* Delay to switch into HVDCP 2.0 and avoid UV */ |
| 4541 | msleep(500); |
| 4542 | |
| 4543 | /* Force 9V HVDCP */ |
| 4544 | rc = smbchg_sec_masked_write(chip, |
| 4545 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 4546 | HVDCP_ADAPTER_SEL_MASK, HVDCP_9V); |
| 4547 | if (rc) |
| 4548 | pr_err("Couldn't set hvdcp config in chgpath_chg rc=%d\n", rc); |
| 4549 | |
| 4550 | return rc; |
| 4551 | } |
| 4552 | |
| 4553 | static void smbchg_hvdcp_det_work(struct work_struct *work) |
| 4554 | { |
| 4555 | struct smbchg_chip *chip = container_of(work, |
| 4556 | struct smbchg_chip, |
| 4557 | hvdcp_det_work.work); |
| 4558 | int rc; |
| 4559 | |
| 4560 | if (is_hvdcp_present(chip)) { |
| 4561 | if (!chip->hvdcp3_supported && |
| 4562 | (chip->wa_flags & SMBCHG_HVDCP_9V_EN_WA)) { |
| 4563 | /* force HVDCP 2.0 */ |
| 4564 | rc = force_9v_hvdcp(chip); |
| 4565 | if (rc) |
| 4566 | pr_err("could not force 9V HVDCP continuing rc=%d\n", |
| 4567 | rc); |
| 4568 | } |
| 4569 | smbchg_change_usb_supply_type(chip, |
| 4570 | POWER_SUPPLY_TYPE_USB_HVDCP); |
| 4571 | if (chip->batt_psy) |
| 4572 | power_supply_changed(chip->batt_psy); |
| 4573 | smbchg_aicl_deglitch_wa_check(chip); |
| 4574 | } |
| 4575 | smbchg_relax(chip, PM_DETECT_HVDCP); |
| 4576 | } |
| 4577 | |
| 4578 | static int set_usb_psy_dp_dm(struct smbchg_chip *chip, int state) |
| 4579 | { |
| 4580 | int rc; |
| 4581 | u8 reg; |
| 4582 | union power_supply_propval pval = {0, }; |
| 4583 | |
| 4584 | /* |
| 4585 | * ensure that we are not in the middle of an insertion where usbin_uv |
| 4586 | * is low and src_detect hasnt gone high. If so force dp=F dm=F |
| 4587 | * which guarantees proper type detection |
| 4588 | */ |
| 4589 | rc = smbchg_read(chip, ®, chip->usb_chgpth_base + RT_STS, 1); |
| 4590 | if (!rc && !(reg & USBIN_UV_BIT) && !(reg & USBIN_SRC_DET_BIT)) { |
| 4591 | pr_smb(PR_MISC, "overwriting state = %d with %d\n", |
| 4592 | state, POWER_SUPPLY_DP_DM_DPF_DMF); |
| 4593 | if (chip->dpdm_reg && !regulator_is_enabled(chip->dpdm_reg)) |
| 4594 | return regulator_enable(chip->dpdm_reg); |
| 4595 | } |
| 4596 | pr_smb(PR_MISC, "setting usb psy dp dm = %d\n", state); |
| 4597 | pval.intval = state; |
| 4598 | return power_supply_set_property(chip->usb_psy, |
| 4599 | POWER_SUPPLY_PROP_DP_DM, &pval); |
| 4600 | } |
| 4601 | |
| 4602 | #define APSD_CFG 0xF5 |
| 4603 | #define AUTO_SRC_DETECT_EN_BIT BIT(0) |
| 4604 | #define APSD_TIMEOUT_MS 1500 |
| 4605 | static void restore_from_hvdcp_detection(struct smbchg_chip *chip) |
| 4606 | { |
| 4607 | int rc; |
| 4608 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4609 | /* switch to 9V HVDCP */ |
| 4610 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + CHGPTH_CFG, |
| 4611 | HVDCP_ADAPTER_SEL_MASK, HVDCP_9V); |
| 4612 | if (rc < 0) |
| 4613 | pr_err("Couldn't configure HVDCP 9V rc=%d\n", rc); |
| 4614 | |
| 4615 | /* enable HVDCP */ |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 4616 | rc = vote(chip->hvdcp_enable_votable, HVDCP_PULSING_VOTER, false, 1); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4617 | if (rc < 0) |
| 4618 | pr_err("Couldn't enable HVDCP rc=%d\n", rc); |
| 4619 | |
| 4620 | /* enable APSD */ |
| 4621 | rc = smbchg_sec_masked_write(chip, |
| 4622 | chip->usb_chgpth_base + APSD_CFG, |
| 4623 | AUTO_SRC_DETECT_EN_BIT, AUTO_SRC_DETECT_EN_BIT); |
| 4624 | if (rc < 0) |
| 4625 | pr_err("Couldn't enable APSD rc=%d\n", rc); |
| 4626 | |
| 4627 | /* Reset back to 5V unregulated */ |
| 4628 | rc = smbchg_sec_masked_write(chip, |
| 4629 | chip->usb_chgpth_base + USBIN_CHGR_CFG, |
| 4630 | ADAPTER_ALLOWANCE_MASK, USBIN_ADAPTER_5V_UNREGULATED_9V); |
| 4631 | if (rc < 0) |
| 4632 | pr_err("Couldn't write usb allowance rc=%d\n", rc); |
| 4633 | |
| 4634 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + USB_AICL_CFG, |
| 4635 | AICL_EN_BIT, AICL_EN_BIT); |
| 4636 | if (rc < 0) |
| 4637 | pr_err("Couldn't enable AICL rc=%d\n", rc); |
| 4638 | |
| 4639 | chip->hvdcp_3_det_ignore_uv = false; |
| 4640 | chip->pulse_cnt = 0; |
Ashay Jaiswal | 7af2613 | 2016-02-01 18:45:28 +0530 | [diff] [blame] | 4641 | |
| 4642 | if ((chip->schg_version == QPNP_SCHG_LITE) |
| 4643 | && is_hvdcp_present(chip)) { |
| 4644 | pr_smb(PR_MISC, "Forcing 9V HVDCP 2.0\n"); |
| 4645 | rc = force_9v_hvdcp(chip); |
| 4646 | if (rc) |
| 4647 | pr_err("Failed to force 9V HVDCP=%d\n", rc); |
| 4648 | } |
| 4649 | |
| 4650 | pr_smb(PR_MISC, "Retracting HVDCP vote for ICL\n"); |
| 4651 | rc = vote(chip->usb_icl_votable, HVDCP_ICL_VOTER, false, 0); |
| 4652 | if (rc < 0) |
| 4653 | pr_err("Couldn't retract HVDCP ICL vote rc=%d\n", rc); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4654 | } |
| 4655 | |
| 4656 | #define RESTRICTED_CHG_FCC_PERCENT 50 |
| 4657 | static int smbchg_restricted_charging(struct smbchg_chip *chip, bool enable) |
| 4658 | { |
| 4659 | int current_table_index, fastchg_current; |
| 4660 | int rc = 0; |
| 4661 | |
| 4662 | /* If enable, set the fcc to the set point closest |
| 4663 | * to 50% of the configured fcc while remaining below it |
| 4664 | */ |
| 4665 | current_table_index = find_smaller_in_array( |
| 4666 | chip->tables.usb_ilim_ma_table, |
| 4667 | chip->cfg_fastchg_current_ma |
| 4668 | * RESTRICTED_CHG_FCC_PERCENT / 100, |
| 4669 | chip->tables.usb_ilim_ma_len); |
| 4670 | fastchg_current = |
| 4671 | chip->tables.usb_ilim_ma_table[current_table_index]; |
| 4672 | rc = vote(chip->fcc_votable, RESTRICTED_CHG_FCC_VOTER, enable, |
| 4673 | fastchg_current); |
| 4674 | |
| 4675 | pr_smb(PR_STATUS, "restricted_charging set to %d\n", enable); |
| 4676 | chip->restricted_charging = enable; |
| 4677 | |
| 4678 | return rc; |
| 4679 | } |
| 4680 | |
| 4681 | static void handle_usb_removal(struct smbchg_chip *chip) |
| 4682 | { |
| 4683 | struct power_supply *parallel_psy = get_parallel_psy(chip); |
| 4684 | union power_supply_propval pval = {0, }; |
| 4685 | int rc; |
| 4686 | |
| 4687 | pr_smb(PR_STATUS, "triggered\n"); |
| 4688 | smbchg_aicl_deglitch_wa_check(chip); |
| 4689 | /* Clear the OV detected status set before */ |
| 4690 | if (chip->usb_ov_det) |
| 4691 | chip->usb_ov_det = false; |
| 4692 | /* Clear typec current status */ |
| 4693 | if (chip->typec_psy) |
| 4694 | chip->typec_current_ma = 0; |
Anirudh Ghayal | a39aab5 | 2016-05-06 17:26:15 +0530 | [diff] [blame] | 4695 | /* cancel/wait for hvdcp pending work if any */ |
| 4696 | cancel_delayed_work_sync(&chip->hvdcp_det_work); |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 4697 | smbchg_relax(chip, PM_DETECT_HVDCP); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4698 | smbchg_change_usb_supply_type(chip, POWER_SUPPLY_TYPE_UNKNOWN); |
| 4699 | extcon_set_cable_state_(chip->extcon, EXTCON_USB, chip->usb_present); |
| 4700 | if (chip->dpdm_reg) |
| 4701 | regulator_disable(chip->dpdm_reg); |
| 4702 | schedule_work(&chip->usb_set_online_work); |
| 4703 | |
| 4704 | pr_smb(PR_MISC, "setting usb psy health UNKNOWN\n"); |
| 4705 | chip->usb_health = POWER_SUPPLY_HEALTH_UNKNOWN; |
| 4706 | power_supply_changed(chip->usb_psy); |
| 4707 | |
| 4708 | if (parallel_psy && chip->parallel_charger_detected) { |
| 4709 | pval.intval = false; |
| 4710 | power_supply_set_property(parallel_psy, |
| 4711 | POWER_SUPPLY_PROP_PRESENT, &pval); |
| 4712 | } |
| 4713 | if (chip->parallel.avail && chip->aicl_done_irq |
| 4714 | && chip->enable_aicl_wake) { |
| 4715 | disable_irq_wake(chip->aicl_done_irq); |
| 4716 | chip->enable_aicl_wake = false; |
| 4717 | } |
| 4718 | chip->parallel.enabled_once = false; |
| 4719 | chip->vbat_above_headroom = false; |
| 4720 | rc = smbchg_masked_write(chip, chip->usb_chgpth_base + CMD_IL, |
| 4721 | ICL_OVERRIDE_BIT, 0); |
| 4722 | if (rc < 0) |
| 4723 | pr_err("Couldn't set override rc = %d\n", rc); |
| 4724 | |
| 4725 | vote(chip->usb_icl_votable, WEAK_CHARGER_ICL_VOTER, false, 0); |
| 4726 | chip->usb_icl_delta = 0; |
| 4727 | vote(chip->usb_icl_votable, SW_AICL_ICL_VOTER, false, 0); |
| 4728 | vote(chip->aicl_deglitch_short_votable, |
| 4729 | HVDCP_SHORT_DEGLITCH_VOTER, false, 0); |
| 4730 | if (!chip->hvdcp_not_supported) |
| 4731 | restore_from_hvdcp_detection(chip); |
| 4732 | } |
| 4733 | |
| 4734 | static bool is_usbin_uv_high(struct smbchg_chip *chip) |
| 4735 | { |
| 4736 | int rc; |
| 4737 | u8 reg; |
| 4738 | |
| 4739 | rc = smbchg_read(chip, ®, chip->usb_chgpth_base + RT_STS, 1); |
| 4740 | if (rc < 0) { |
| 4741 | dev_err(chip->dev, "Couldn't read usb rt status rc = %d\n", rc); |
| 4742 | return false; |
| 4743 | } |
| 4744 | return reg &= USBIN_UV_BIT; |
| 4745 | } |
| 4746 | |
| 4747 | #define HVDCP_NOTIFY_MS 2500 |
| 4748 | static void handle_usb_insertion(struct smbchg_chip *chip) |
| 4749 | { |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4750 | enum power_supply_type usb_supply_type; |
| 4751 | int rc; |
| 4752 | char *usb_type_name = "null"; |
| 4753 | |
| 4754 | pr_smb(PR_STATUS, "triggered\n"); |
| 4755 | /* usb inserted */ |
| 4756 | read_usb_type(chip, &usb_type_name, &usb_supply_type); |
| 4757 | pr_smb(PR_STATUS, |
| 4758 | "inserted type = %d (%s)", usb_supply_type, usb_type_name); |
| 4759 | |
| 4760 | smbchg_aicl_deglitch_wa_check(chip); |
| 4761 | if (chip->typec_psy) |
| 4762 | update_typec_status(chip); |
| 4763 | smbchg_change_usb_supply_type(chip, usb_supply_type); |
| 4764 | |
| 4765 | /* Only notify USB if it's not a charger */ |
| 4766 | if (usb_supply_type == POWER_SUPPLY_TYPE_USB || |
| 4767 | usb_supply_type == POWER_SUPPLY_TYPE_USB_CDP) |
| 4768 | extcon_set_cable_state_(chip->extcon, EXTCON_USB, |
| 4769 | chip->usb_present); |
| 4770 | |
| 4771 | /* Notify the USB psy if OV condition is not present */ |
| 4772 | if (!chip->usb_ov_det) { |
| 4773 | /* |
| 4774 | * Note that this could still be a very weak charger |
| 4775 | * if the handle_usb_insertion was triggered from |
| 4776 | * the falling edge of an USBIN_OV interrupt |
| 4777 | */ |
| 4778 | pr_smb(PR_MISC, "setting usb psy health %s\n", |
| 4779 | chip->very_weak_charger |
| 4780 | ? "UNSPEC_FAILURE" : "GOOD"); |
| 4781 | chip->usb_health = chip->very_weak_charger |
| 4782 | ? POWER_SUPPLY_HEALTH_UNSPEC_FAILURE |
| 4783 | : POWER_SUPPLY_HEALTH_GOOD; |
| 4784 | power_supply_changed(chip->usb_psy); |
| 4785 | } |
| 4786 | schedule_work(&chip->usb_set_online_work); |
| 4787 | |
| 4788 | if (!chip->hvdcp_not_supported && |
| 4789 | (usb_supply_type == POWER_SUPPLY_TYPE_USB_DCP)) { |
| 4790 | cancel_delayed_work_sync(&chip->hvdcp_det_work); |
| 4791 | smbchg_stay_awake(chip, PM_DETECT_HVDCP); |
| 4792 | schedule_delayed_work(&chip->hvdcp_det_work, |
| 4793 | msecs_to_jiffies(HVDCP_NOTIFY_MS)); |
| 4794 | } |
| 4795 | |
Ashay Jaiswal | 7af2613 | 2016-02-01 18:45:28 +0530 | [diff] [blame] | 4796 | smbchg_detect_parallel_charger(chip); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 4797 | |
| 4798 | if (chip->parallel.avail && chip->aicl_done_irq |
| 4799 | && !chip->enable_aicl_wake) { |
| 4800 | rc = enable_irq_wake(chip->aicl_done_irq); |
| 4801 | chip->enable_aicl_wake = true; |
| 4802 | } |
| 4803 | } |
| 4804 | |
| 4805 | void update_usb_status(struct smbchg_chip *chip, bool usb_present, bool force) |
| 4806 | { |
| 4807 | mutex_lock(&chip->usb_status_lock); |
| 4808 | if (force) { |
| 4809 | chip->usb_present = usb_present; |
| 4810 | chip->usb_present ? handle_usb_insertion(chip) |
| 4811 | : handle_usb_removal(chip); |
| 4812 | goto unlock; |
| 4813 | } |
| 4814 | if (!chip->usb_present && usb_present) { |
| 4815 | chip->usb_present = usb_present; |
| 4816 | handle_usb_insertion(chip); |
| 4817 | } else if (chip->usb_present && !usb_present) { |
| 4818 | chip->usb_present = usb_present; |
| 4819 | handle_usb_removal(chip); |
| 4820 | } |
| 4821 | |
| 4822 | /* update FG */ |
| 4823 | set_property_on_fg(chip, POWER_SUPPLY_PROP_STATUS, |
| 4824 | get_prop_batt_status(chip)); |
| 4825 | unlock: |
| 4826 | mutex_unlock(&chip->usb_status_lock); |
| 4827 | } |
| 4828 | |
| 4829 | static int otg_oc_reset(struct smbchg_chip *chip) |
| 4830 | { |
| 4831 | int rc; |
| 4832 | |
| 4833 | rc = smbchg_masked_write(chip, chip->bat_if_base + CMD_CHG_REG, |
| 4834 | OTG_EN_BIT, 0); |
| 4835 | if (rc) |
| 4836 | pr_err("Failed to disable OTG rc=%d\n", rc); |
| 4837 | |
| 4838 | msleep(20); |
| 4839 | |
| 4840 | /* |
| 4841 | * There is a possibility that an USBID interrupt might have |
| 4842 | * occurred notifying USB power supply to disable OTG. We |
| 4843 | * should not enable OTG in such cases. |
| 4844 | */ |
| 4845 | if (!is_otg_present(chip)) { |
| 4846 | pr_smb(PR_STATUS, |
| 4847 | "OTG is not present, not enabling OTG_EN_BIT\n"); |
| 4848 | goto out; |
| 4849 | } |
| 4850 | |
| 4851 | rc = smbchg_masked_write(chip, chip->bat_if_base + CMD_CHG_REG, |
| 4852 | OTG_EN_BIT, OTG_EN_BIT); |
| 4853 | if (rc) |
| 4854 | pr_err("Failed to re-enable OTG rc=%d\n", rc); |
| 4855 | |
| 4856 | out: |
| 4857 | return rc; |
| 4858 | } |
| 4859 | |
| 4860 | static int get_current_time(unsigned long *now_tm_sec) |
| 4861 | { |
| 4862 | struct rtc_time tm; |
| 4863 | struct rtc_device *rtc; |
| 4864 | int rc; |
| 4865 | |
| 4866 | rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE); |
| 4867 | if (rtc == NULL) { |
| 4868 | pr_err("%s: unable to open rtc device (%s)\n", |
| 4869 | __FILE__, CONFIG_RTC_HCTOSYS_DEVICE); |
| 4870 | return -EINVAL; |
| 4871 | } |
| 4872 | |
| 4873 | rc = rtc_read_time(rtc, &tm); |
| 4874 | if (rc) { |
| 4875 | pr_err("Error reading rtc device (%s) : %d\n", |
| 4876 | CONFIG_RTC_HCTOSYS_DEVICE, rc); |
| 4877 | goto close_time; |
| 4878 | } |
| 4879 | |
| 4880 | rc = rtc_valid_tm(&tm); |
| 4881 | if (rc) { |
| 4882 | pr_err("Invalid RTC time (%s): %d\n", |
| 4883 | CONFIG_RTC_HCTOSYS_DEVICE, rc); |
| 4884 | goto close_time; |
| 4885 | } |
| 4886 | rtc_tm_to_time(&tm, now_tm_sec); |
| 4887 | |
| 4888 | close_time: |
| 4889 | rtc_class_close(rtc); |
| 4890 | return rc; |
| 4891 | } |
| 4892 | |
| 4893 | #define AICL_IRQ_LIMIT_SECONDS 60 |
| 4894 | #define AICL_IRQ_LIMIT_COUNT 25 |
| 4895 | static void increment_aicl_count(struct smbchg_chip *chip) |
| 4896 | { |
| 4897 | bool bad_charger = false; |
| 4898 | int max_aicl_count, rc; |
| 4899 | u8 reg; |
| 4900 | long elapsed_seconds; |
| 4901 | unsigned long now_seconds; |
| 4902 | |
| 4903 | pr_smb(PR_INTERRUPT, "aicl count c:%d dgltch:%d first:%ld\n", |
| 4904 | chip->aicl_irq_count, chip->aicl_deglitch_short, |
| 4905 | chip->first_aicl_seconds); |
| 4906 | |
| 4907 | rc = smbchg_read(chip, ®, |
| 4908 | chip->usb_chgpth_base + ICL_STS_1_REG, 1); |
| 4909 | if (!rc) |
| 4910 | chip->aicl_complete = reg & AICL_STS_BIT; |
| 4911 | else |
| 4912 | chip->aicl_complete = false; |
| 4913 | |
| 4914 | if (chip->aicl_deglitch_short || chip->force_aicl_rerun) { |
| 4915 | if (!chip->aicl_irq_count) |
| 4916 | get_current_time(&chip->first_aicl_seconds); |
| 4917 | get_current_time(&now_seconds); |
| 4918 | elapsed_seconds = now_seconds |
| 4919 | - chip->first_aicl_seconds; |
| 4920 | |
| 4921 | if (elapsed_seconds > AICL_IRQ_LIMIT_SECONDS) { |
| 4922 | pr_smb(PR_INTERRUPT, |
| 4923 | "resetting: elp:%ld first:%ld now:%ld c=%d\n", |
| 4924 | elapsed_seconds, chip->first_aicl_seconds, |
| 4925 | now_seconds, chip->aicl_irq_count); |
| 4926 | chip->aicl_irq_count = 1; |
| 4927 | get_current_time(&chip->first_aicl_seconds); |
| 4928 | return; |
| 4929 | } |
| 4930 | /* |
| 4931 | * Double the amount of AICLs allowed if parallel charging is |
| 4932 | * enabled. |
| 4933 | */ |
| 4934 | max_aicl_count = AICL_IRQ_LIMIT_COUNT |
| 4935 | * (chip->parallel.avail ? 2 : 1); |
| 4936 | chip->aicl_irq_count++; |
| 4937 | |
| 4938 | if (chip->aicl_irq_count > max_aicl_count) { |
| 4939 | pr_smb(PR_INTERRUPT, "elp:%ld first:%ld now:%ld c=%d\n", |
| 4940 | elapsed_seconds, chip->first_aicl_seconds, |
| 4941 | now_seconds, chip->aicl_irq_count); |
| 4942 | pr_smb(PR_INTERRUPT, "Disable AICL rerun\n"); |
| 4943 | chip->very_weak_charger = true; |
| 4944 | bad_charger = true; |
| 4945 | |
| 4946 | /* |
| 4947 | * Disable AICL rerun since many interrupts were |
| 4948 | * triggered in a short time |
| 4949 | */ |
| 4950 | /* disable hw aicl */ |
| 4951 | rc = vote(chip->hw_aicl_rerun_disable_votable, |
| 4952 | WEAK_CHARGER_HW_AICL_VOTER, true, 0); |
| 4953 | if (rc < 0) { |
| 4954 | pr_err("Couldn't disable hw aicl rerun rc=%d\n", |
| 4955 | rc); |
| 4956 | return; |
| 4957 | } |
| 4958 | |
| 4959 | /* Vote 100mA current limit */ |
| 4960 | rc = vote(chip->usb_icl_votable, WEAK_CHARGER_ICL_VOTER, |
| 4961 | true, CURRENT_100_MA); |
| 4962 | if (rc < 0) { |
| 4963 | pr_err("Can't vote %d current limit rc=%d\n", |
| 4964 | CURRENT_100_MA, rc); |
| 4965 | } |
| 4966 | |
| 4967 | chip->aicl_irq_count = 0; |
| 4968 | } else if ((get_prop_charge_type(chip) == |
| 4969 | POWER_SUPPLY_CHARGE_TYPE_FAST) && |
| 4970 | (reg & AICL_SUSP_BIT)) { |
| 4971 | /* |
| 4972 | * If the AICL_SUSP_BIT is on, then AICL reruns have |
| 4973 | * already been disabled. Set the very weak charger |
| 4974 | * flag so that the driver reports a bad charger |
| 4975 | * and does not reenable AICL reruns. |
| 4976 | */ |
| 4977 | chip->very_weak_charger = true; |
| 4978 | bad_charger = true; |
| 4979 | } |
| 4980 | if (bad_charger) { |
| 4981 | pr_smb(PR_MISC, |
| 4982 | "setting usb psy health UNSPEC_FAILURE\n"); |
| 4983 | chip->usb_health = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE; |
| 4984 | power_supply_changed(chip->usb_psy); |
| 4985 | schedule_work(&chip->usb_set_online_work); |
| 4986 | } |
| 4987 | } |
| 4988 | } |
| 4989 | |
| 4990 | static int wait_for_usbin_uv(struct smbchg_chip *chip, bool high) |
| 4991 | { |
| 4992 | int rc; |
| 4993 | int tries = 3; |
| 4994 | struct completion *completion = &chip->usbin_uv_lowered; |
| 4995 | bool usbin_uv; |
| 4996 | |
| 4997 | if (high) |
| 4998 | completion = &chip->usbin_uv_raised; |
| 4999 | |
| 5000 | while (tries--) { |
| 5001 | rc = wait_for_completion_interruptible_timeout( |
| 5002 | completion, |
| 5003 | msecs_to_jiffies(APSD_TIMEOUT_MS)); |
| 5004 | if (rc >= 0) |
| 5005 | break; |
| 5006 | } |
| 5007 | |
| 5008 | usbin_uv = is_usbin_uv_high(chip); |
| 5009 | |
| 5010 | if (high == usbin_uv) |
| 5011 | return 0; |
| 5012 | |
| 5013 | pr_err("usbin uv didnt go to a %s state, still at %s, tries = %d, rc = %d\n", |
| 5014 | high ? "risen" : "lowered", |
| 5015 | usbin_uv ? "high" : "low", |
| 5016 | tries, rc); |
| 5017 | return -EINVAL; |
| 5018 | } |
| 5019 | |
| 5020 | static int wait_for_src_detect(struct smbchg_chip *chip, bool high) |
| 5021 | { |
| 5022 | int rc; |
| 5023 | int tries = 3; |
| 5024 | struct completion *completion = &chip->src_det_lowered; |
| 5025 | bool src_detect; |
| 5026 | |
| 5027 | if (high) |
| 5028 | completion = &chip->src_det_raised; |
| 5029 | |
| 5030 | while (tries--) { |
| 5031 | rc = wait_for_completion_interruptible_timeout( |
| 5032 | completion, |
| 5033 | msecs_to_jiffies(APSD_TIMEOUT_MS)); |
| 5034 | if (rc >= 0) |
| 5035 | break; |
| 5036 | } |
| 5037 | |
| 5038 | src_detect = is_src_detect_high(chip); |
| 5039 | |
| 5040 | if (high == src_detect) |
| 5041 | return 0; |
| 5042 | |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 5043 | pr_err("src detect didn't go to a %s state, still at %s, tries = %d, rc = %d\n", |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5044 | high ? "risen" : "lowered", |
| 5045 | src_detect ? "high" : "low", |
| 5046 | tries, rc); |
| 5047 | return -EINVAL; |
| 5048 | } |
| 5049 | |
| 5050 | static int fake_insertion_removal(struct smbchg_chip *chip, bool insertion) |
| 5051 | { |
| 5052 | int rc; |
| 5053 | bool src_detect; |
| 5054 | bool usbin_uv; |
| 5055 | |
| 5056 | if (insertion) { |
| 5057 | reinit_completion(&chip->src_det_raised); |
| 5058 | reinit_completion(&chip->usbin_uv_lowered); |
| 5059 | } else { |
| 5060 | reinit_completion(&chip->src_det_lowered); |
| 5061 | reinit_completion(&chip->usbin_uv_raised); |
| 5062 | } |
| 5063 | |
| 5064 | /* ensure that usbin uv real time status is in the right state */ |
| 5065 | usbin_uv = is_usbin_uv_high(chip); |
| 5066 | if (usbin_uv != insertion) { |
| 5067 | pr_err("Skip faking, usbin uv is already %d\n", usbin_uv); |
| 5068 | return -EINVAL; |
| 5069 | } |
| 5070 | |
| 5071 | /* ensure that src_detect real time status is in the right state */ |
| 5072 | src_detect = is_src_detect_high(chip); |
| 5073 | if (src_detect == insertion) { |
| 5074 | pr_err("Skip faking, src detect is already %d\n", src_detect); |
| 5075 | return -EINVAL; |
| 5076 | } |
| 5077 | |
| 5078 | pr_smb(PR_MISC, "Allow only %s charger\n", |
| 5079 | insertion ? "5-9V" : "9V only"); |
| 5080 | rc = smbchg_sec_masked_write(chip, |
| 5081 | chip->usb_chgpth_base + USBIN_CHGR_CFG, |
| 5082 | ADAPTER_ALLOWANCE_MASK, |
| 5083 | insertion ? |
| 5084 | USBIN_ADAPTER_5V_9V_CONT : USBIN_ADAPTER_9V); |
| 5085 | if (rc < 0) { |
| 5086 | pr_err("Couldn't write usb allowance rc=%d\n", rc); |
| 5087 | return rc; |
| 5088 | } |
| 5089 | |
| 5090 | pr_smb(PR_MISC, "Waiting on %s usbin uv\n", |
| 5091 | insertion ? "falling" : "rising"); |
| 5092 | rc = wait_for_usbin_uv(chip, !insertion); |
| 5093 | if (rc < 0) { |
| 5094 | pr_err("wait for usbin uv failed rc = %d\n", rc); |
| 5095 | return rc; |
| 5096 | } |
| 5097 | |
| 5098 | pr_smb(PR_MISC, "Waiting on %s src det\n", |
| 5099 | insertion ? "rising" : "falling"); |
| 5100 | rc = wait_for_src_detect(chip, insertion); |
| 5101 | if (rc < 0) { |
| 5102 | pr_err("wait for src detect failed rc = %d\n", rc); |
| 5103 | return rc; |
| 5104 | } |
| 5105 | |
| 5106 | return 0; |
| 5107 | } |
| 5108 | |
Subbaraman Narayanamurthy | 986bff5 | 2016-03-21 15:55:19 -0700 | [diff] [blame] | 5109 | static void smbchg_handle_hvdcp3_disable(struct smbchg_chip *chip) |
| 5110 | { |
| 5111 | enum power_supply_type usb_supply_type; |
| 5112 | char *usb_type_name = "NULL"; |
| 5113 | |
| 5114 | if (chip->allow_hvdcp3_detection) |
| 5115 | return; |
| 5116 | |
| 5117 | chip->pulse_cnt = 0; |
| 5118 | |
| 5119 | if (is_hvdcp_present(chip)) { |
| 5120 | smbchg_change_usb_supply_type(chip, |
| 5121 | POWER_SUPPLY_TYPE_USB_HVDCP); |
| 5122 | } else if (is_usb_present(chip)) { |
| 5123 | read_usb_type(chip, &usb_type_name, &usb_supply_type); |
| 5124 | smbchg_change_usb_supply_type(chip, usb_supply_type); |
| 5125 | if (usb_supply_type == POWER_SUPPLY_TYPE_USB_DCP) |
| 5126 | schedule_delayed_work(&chip->hvdcp_det_work, |
| 5127 | msecs_to_jiffies(HVDCP_NOTIFY_MS)); |
| 5128 | } else { |
| 5129 | smbchg_change_usb_supply_type(chip, POWER_SUPPLY_TYPE_UNKNOWN); |
| 5130 | } |
| 5131 | } |
| 5132 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5133 | static int smbchg_prepare_for_pulsing(struct smbchg_chip *chip) |
| 5134 | { |
| 5135 | int rc = 0; |
| 5136 | u8 reg; |
| 5137 | |
| 5138 | /* switch to 5V HVDCP */ |
| 5139 | pr_smb(PR_MISC, "Switch to 5V HVDCP\n"); |
| 5140 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + CHGPTH_CFG, |
| 5141 | HVDCP_ADAPTER_SEL_MASK, HVDCP_5V); |
| 5142 | if (rc < 0) { |
| 5143 | pr_err("Couldn't configure HVDCP 5V rc=%d\n", rc); |
| 5144 | goto out; |
| 5145 | } |
| 5146 | |
| 5147 | /* wait for HVDCP to lower to 5V */ |
| 5148 | msleep(500); |
| 5149 | /* |
| 5150 | * Check if the same hvdcp session is in progress. src_det should be |
| 5151 | * high and that we are still in 5V hvdcp |
| 5152 | */ |
| 5153 | if (!is_src_detect_high(chip)) { |
| 5154 | pr_smb(PR_MISC, "src det low after 500mS sleep\n"); |
| 5155 | goto out; |
| 5156 | } |
| 5157 | |
| 5158 | /* disable HVDCP */ |
| 5159 | pr_smb(PR_MISC, "Disable HVDCP\n"); |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 5160 | rc = vote(chip->hvdcp_enable_votable, HVDCP_PULSING_VOTER, true, 0); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5161 | if (rc < 0) { |
| 5162 | pr_err("Couldn't disable HVDCP rc=%d\n", rc); |
| 5163 | goto out; |
| 5164 | } |
| 5165 | |
| 5166 | pr_smb(PR_MISC, "HVDCP voting for 300mA ICL\n"); |
| 5167 | rc = vote(chip->usb_icl_votable, HVDCP_ICL_VOTER, true, 300); |
| 5168 | if (rc < 0) { |
| 5169 | pr_err("Couldn't vote for 300mA HVDCP ICL rc=%d\n", rc); |
| 5170 | goto out; |
| 5171 | } |
| 5172 | |
| 5173 | pr_smb(PR_MISC, "Disable AICL\n"); |
| 5174 | smbchg_sec_masked_write(chip, chip->usb_chgpth_base + USB_AICL_CFG, |
| 5175 | AICL_EN_BIT, 0); |
| 5176 | |
| 5177 | chip->hvdcp_3_det_ignore_uv = true; |
| 5178 | /* fake a removal */ |
| 5179 | pr_smb(PR_MISC, "Faking Removal\n"); |
| 5180 | rc = fake_insertion_removal(chip, false); |
| 5181 | if (rc < 0) { |
| 5182 | pr_err("Couldn't fake removal HVDCP Removed rc=%d\n", rc); |
| 5183 | goto handle_removal; |
| 5184 | } |
| 5185 | |
| 5186 | /* disable APSD */ |
| 5187 | pr_smb(PR_MISC, "Disabling APSD\n"); |
| 5188 | rc = smbchg_sec_masked_write(chip, |
| 5189 | chip->usb_chgpth_base + APSD_CFG, |
| 5190 | AUTO_SRC_DETECT_EN_BIT, 0); |
| 5191 | if (rc < 0) { |
| 5192 | pr_err("Couldn't disable APSD rc=%d\n", rc); |
| 5193 | goto out; |
| 5194 | } |
| 5195 | |
| 5196 | /* fake an insertion */ |
| 5197 | pr_smb(PR_MISC, "Faking Insertion\n"); |
| 5198 | rc = fake_insertion_removal(chip, true); |
| 5199 | if (rc < 0) { |
| 5200 | pr_err("Couldn't fake insertion rc=%d\n", rc); |
| 5201 | goto handle_removal; |
| 5202 | } |
| 5203 | chip->hvdcp_3_det_ignore_uv = false; |
| 5204 | |
| 5205 | pr_smb(PR_MISC, "Enable AICL\n"); |
| 5206 | smbchg_sec_masked_write(chip, chip->usb_chgpth_base + USB_AICL_CFG, |
| 5207 | AICL_EN_BIT, AICL_EN_BIT); |
| 5208 | |
| 5209 | set_usb_psy_dp_dm(chip, POWER_SUPPLY_DP_DM_DP0P6_DMF); |
| 5210 | /* |
| 5211 | * DCP will switch to HVDCP in this time by removing the short |
| 5212 | * between DP DM |
| 5213 | */ |
| 5214 | msleep(HVDCP_NOTIFY_MS); |
| 5215 | /* |
| 5216 | * Check if the same hvdcp session is in progress. src_det should be |
| 5217 | * high and the usb type should be none since APSD was disabled |
| 5218 | */ |
| 5219 | if (!is_src_detect_high(chip)) { |
| 5220 | pr_smb(PR_MISC, "src det low after 2s sleep\n"); |
| 5221 | rc = -EINVAL; |
| 5222 | goto out; |
| 5223 | } |
| 5224 | |
| 5225 | smbchg_read(chip, ®, chip->misc_base + IDEV_STS, 1); |
| 5226 | if ((reg >> TYPE_BITS_OFFSET) != 0) { |
| 5227 | pr_smb(PR_MISC, "type bits set after 2s sleep - abort\n"); |
| 5228 | rc = -EINVAL; |
| 5229 | goto out; |
| 5230 | } |
| 5231 | |
| 5232 | set_usb_psy_dp_dm(chip, POWER_SUPPLY_DP_DM_DP0P6_DM3P3); |
| 5233 | /* Wait 60mS after entering continuous mode */ |
| 5234 | msleep(60); |
| 5235 | |
| 5236 | return 0; |
| 5237 | out: |
| 5238 | chip->hvdcp_3_det_ignore_uv = false; |
| 5239 | restore_from_hvdcp_detection(chip); |
| 5240 | return rc; |
| 5241 | handle_removal: |
| 5242 | chip->hvdcp_3_det_ignore_uv = false; |
| 5243 | update_usb_status(chip, 0, 0); |
| 5244 | return rc; |
| 5245 | } |
| 5246 | |
| 5247 | static int smbchg_unprepare_for_pulsing(struct smbchg_chip *chip) |
| 5248 | { |
| 5249 | int rc = 0; |
| 5250 | |
| 5251 | if (chip->dpdm_reg && !regulator_is_enabled(chip->dpdm_reg)) |
| 5252 | rc = regulator_enable(chip->dpdm_reg); |
| 5253 | if (rc < 0) { |
| 5254 | pr_err("Couldn't enable DP/DM for pulsing rc=%d\n", rc); |
| 5255 | return rc; |
| 5256 | } |
| 5257 | |
| 5258 | /* switch to 9V HVDCP */ |
| 5259 | pr_smb(PR_MISC, "Switch to 9V HVDCP\n"); |
| 5260 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + CHGPTH_CFG, |
| 5261 | HVDCP_ADAPTER_SEL_MASK, HVDCP_9V); |
| 5262 | if (rc < 0) { |
| 5263 | pr_err("Couldn't configure HVDCP 9V rc=%d\n", rc); |
| 5264 | return rc; |
| 5265 | } |
| 5266 | |
| 5267 | /* enable HVDCP */ |
| 5268 | pr_smb(PR_MISC, "Enable HVDCP\n"); |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 5269 | rc = vote(chip->hvdcp_enable_votable, HVDCP_PULSING_VOTER, false, 1); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5270 | if (rc < 0) { |
| 5271 | pr_err("Couldn't enable HVDCP rc=%d\n", rc); |
| 5272 | return rc; |
| 5273 | } |
| 5274 | |
| 5275 | /* enable APSD */ |
| 5276 | pr_smb(PR_MISC, "Enabling APSD\n"); |
| 5277 | rc = smbchg_sec_masked_write(chip, |
| 5278 | chip->usb_chgpth_base + APSD_CFG, |
| 5279 | AUTO_SRC_DETECT_EN_BIT, AUTO_SRC_DETECT_EN_BIT); |
| 5280 | if (rc < 0) { |
| 5281 | pr_err("Couldn't enable APSD rc=%d\n", rc); |
| 5282 | return rc; |
| 5283 | } |
| 5284 | |
| 5285 | /* Disable AICL */ |
| 5286 | pr_smb(PR_MISC, "Disable AICL\n"); |
| 5287 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + USB_AICL_CFG, |
| 5288 | AICL_EN_BIT, 0); |
| 5289 | if (rc < 0) { |
| 5290 | pr_err("Couldn't disable AICL rc=%d\n", rc); |
| 5291 | return rc; |
| 5292 | } |
| 5293 | |
| 5294 | /* fake a removal */ |
| 5295 | chip->hvdcp_3_det_ignore_uv = true; |
| 5296 | pr_smb(PR_MISC, "Faking Removal\n"); |
| 5297 | rc = fake_insertion_removal(chip, false); |
| 5298 | if (rc < 0) { |
| 5299 | pr_err("Couldn't fake removal rc=%d\n", rc); |
| 5300 | goto out; |
| 5301 | } |
| 5302 | |
| 5303 | /* |
| 5304 | * reset the enabled once flag for parallel charging so |
| 5305 | * parallel charging can immediately restart after the HVDCP pulsing |
| 5306 | * is complete |
| 5307 | */ |
| 5308 | chip->parallel.enabled_once = false; |
| 5309 | |
Abhijeet Dharmapurikar | 1c5f848 | 2016-04-20 16:45:33 -0700 | [diff] [blame] | 5310 | /* Enable AICL */ |
| 5311 | pr_smb(PR_MISC, "Enable AICL\n"); |
| 5312 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + USB_AICL_CFG, |
| 5313 | AICL_EN_BIT, AICL_EN_BIT); |
| 5314 | if (rc < 0) { |
| 5315 | pr_err("Couldn't enable AICL rc=%d\n", rc); |
| 5316 | goto out; |
| 5317 | } |
| 5318 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5319 | /* fake an insertion */ |
| 5320 | pr_smb(PR_MISC, "Faking Insertion\n"); |
| 5321 | rc = fake_insertion_removal(chip, true); |
| 5322 | if (rc < 0) { |
| 5323 | pr_err("Couldn't fake insertion rc=%d\n", rc); |
| 5324 | goto out; |
| 5325 | } |
| 5326 | chip->hvdcp_3_det_ignore_uv = false; |
| 5327 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5328 | out: |
| 5329 | /* |
| 5330 | * There are many QC 2.0 chargers that collapse before the aicl deglitch |
| 5331 | * timer can mitigate. Hence set the aicl deglitch time to a shorter |
| 5332 | * period. |
| 5333 | */ |
| 5334 | |
| 5335 | rc = vote(chip->aicl_deglitch_short_votable, |
| 5336 | HVDCP_SHORT_DEGLITCH_VOTER, true, 0); |
| 5337 | if (rc < 0) |
| 5338 | pr_err("Couldn't reduce aicl deglitch rc=%d\n", rc); |
| 5339 | |
| 5340 | pr_smb(PR_MISC, "Retracting HVDCP vote for ICL\n"); |
| 5341 | rc = vote(chip->usb_icl_votable, HVDCP_ICL_VOTER, false, 0); |
| 5342 | if (rc < 0) |
| 5343 | pr_err("Couldn't retract HVDCP ICL vote rc=%d\n", rc); |
| 5344 | |
| 5345 | chip->hvdcp_3_det_ignore_uv = false; |
| 5346 | if (!is_src_detect_high(chip)) { |
| 5347 | pr_smb(PR_MISC, "HVDCP removed\n"); |
| 5348 | update_usb_status(chip, 0, 0); |
| 5349 | } |
Subbaraman Narayanamurthy | 986bff5 | 2016-03-21 15:55:19 -0700 | [diff] [blame] | 5350 | |
| 5351 | smbchg_handle_hvdcp3_disable(chip); |
| 5352 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5353 | return rc; |
| 5354 | } |
| 5355 | |
| 5356 | #define USB_CMD_APSD 0x41 |
| 5357 | #define APSD_RERUN BIT(0) |
| 5358 | static int rerun_apsd(struct smbchg_chip *chip) |
| 5359 | { |
Ashay Jaiswal | f7bb6ac | 2016-06-23 14:47:37 +0530 | [diff] [blame] | 5360 | int rc = 0; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5361 | |
Ashay Jaiswal | f7bb6ac | 2016-06-23 14:47:37 +0530 | [diff] [blame] | 5362 | chip->hvdcp_3_det_ignore_uv = true; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5363 | |
Ashay Jaiswal | f7bb6ac | 2016-06-23 14:47:37 +0530 | [diff] [blame] | 5364 | if (chip->schg_version == QPNP_SCHG_LITE) { |
| 5365 | pr_smb(PR_STATUS, "Re-running APSD\n"); |
| 5366 | reinit_completion(&chip->src_det_raised); |
| 5367 | reinit_completion(&chip->usbin_uv_lowered); |
| 5368 | reinit_completion(&chip->src_det_lowered); |
| 5369 | reinit_completion(&chip->usbin_uv_raised); |
| 5370 | |
| 5371 | /* re-run APSD */ |
| 5372 | rc = smbchg_masked_write(chip, |
| 5373 | chip->usb_chgpth_base + USB_CMD_APSD, |
| 5374 | APSD_RERUN, APSD_RERUN); |
| 5375 | if (rc) { |
| 5376 | pr_err("Couldn't re-run APSD rc=%d\n", rc); |
| 5377 | goto out; |
| 5378 | } |
| 5379 | |
| 5380 | pr_smb(PR_MISC, "Waiting on rising usbin uv\n"); |
| 5381 | rc = wait_for_usbin_uv(chip, true); |
| 5382 | if (rc < 0) { |
| 5383 | pr_err("wait for usbin uv failed rc = %d\n", rc); |
| 5384 | goto out; |
| 5385 | } |
| 5386 | |
| 5387 | pr_smb(PR_MISC, "Waiting on falling src det\n"); |
| 5388 | rc = wait_for_src_detect(chip, false); |
| 5389 | if (rc < 0) { |
| 5390 | pr_err("wait for src detect failed rc = %d\n", rc); |
| 5391 | goto out; |
| 5392 | } |
| 5393 | |
| 5394 | pr_smb(PR_MISC, "Waiting on falling usbin uv\n"); |
| 5395 | rc = wait_for_usbin_uv(chip, false); |
| 5396 | if (rc < 0) { |
| 5397 | pr_err("wait for usbin uv failed rc = %d\n", rc); |
| 5398 | goto out; |
| 5399 | } |
| 5400 | |
| 5401 | pr_smb(PR_MISC, "Waiting on rising src det\n"); |
| 5402 | rc = wait_for_src_detect(chip, true); |
| 5403 | if (rc < 0) { |
| 5404 | pr_err("wait for src detect failed rc = %d\n", rc); |
| 5405 | goto out; |
| 5406 | } |
| 5407 | } else { |
| 5408 | pr_smb(PR_STATUS, "Faking Removal\n"); |
| 5409 | rc = fake_insertion_removal(chip, false); |
| 5410 | msleep(500); |
| 5411 | pr_smb(PR_STATUS, "Faking Insertion\n"); |
| 5412 | rc = fake_insertion_removal(chip, true); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5413 | } |
| 5414 | |
Ashay Jaiswal | f7bb6ac | 2016-06-23 14:47:37 +0530 | [diff] [blame] | 5415 | out: |
| 5416 | chip->hvdcp_3_det_ignore_uv = false; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5417 | return rc; |
| 5418 | } |
| 5419 | |
| 5420 | #define SCHG_LITE_USBIN_HVDCP_5_9V 0x8 |
| 5421 | #define SCHG_LITE_USBIN_HVDCP_5_9V_SEL_MASK 0x38 |
| 5422 | #define SCHG_LITE_USBIN_HVDCP_SEL_IDLE BIT(3) |
| 5423 | static bool is_hvdcp_5v_cont_mode(struct smbchg_chip *chip) |
| 5424 | { |
| 5425 | int rc; |
| 5426 | u8 reg = 0; |
| 5427 | |
| 5428 | rc = smbchg_read(chip, ®, |
| 5429 | chip->usb_chgpth_base + USBIN_HVDCP_STS, 1); |
| 5430 | if (rc) { |
| 5431 | pr_err("Unable to read HVDCP status rc=%d\n", rc); |
| 5432 | return false; |
| 5433 | } |
| 5434 | |
| 5435 | pr_smb(PR_STATUS, "HVDCP status = %x\n", reg); |
| 5436 | |
| 5437 | if (reg & SCHG_LITE_USBIN_HVDCP_SEL_IDLE) { |
| 5438 | rc = smbchg_read(chip, ®, |
| 5439 | chip->usb_chgpth_base + INPUT_STS, 1); |
| 5440 | if (rc) { |
| 5441 | pr_err("Unable to read INPUT status rc=%d\n", rc); |
| 5442 | return false; |
| 5443 | } |
| 5444 | pr_smb(PR_STATUS, "INPUT status = %x\n", reg); |
| 5445 | if ((reg & SCHG_LITE_USBIN_HVDCP_5_9V_SEL_MASK) == |
| 5446 | SCHG_LITE_USBIN_HVDCP_5_9V) |
| 5447 | return true; |
| 5448 | } |
| 5449 | return false; |
| 5450 | } |
| 5451 | |
| 5452 | static int smbchg_prepare_for_pulsing_lite(struct smbchg_chip *chip) |
| 5453 | { |
| 5454 | int rc = 0; |
| 5455 | |
Ashay Jaiswal | 7af2613 | 2016-02-01 18:45:28 +0530 | [diff] [blame] | 5456 | pr_smb(PR_MISC, "HVDCP voting for 300mA ICL\n"); |
| 5457 | rc = vote(chip->usb_icl_votable, HVDCP_ICL_VOTER, true, 300); |
| 5458 | if (rc < 0) { |
| 5459 | pr_err("Couldn't vote for 300mA HVDCP ICL rc=%d\n", rc); |
| 5460 | return rc; |
| 5461 | } |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5462 | /* check if HVDCP is already in 5V continuous mode */ |
| 5463 | if (is_hvdcp_5v_cont_mode(chip)) { |
| 5464 | pr_smb(PR_MISC, "HVDCP by default is in 5V continuous mode\n"); |
| 5465 | return 0; |
| 5466 | } |
| 5467 | |
| 5468 | /* switch to 5V HVDCP */ |
| 5469 | pr_smb(PR_MISC, "Switch to 5V HVDCP\n"); |
| 5470 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + CHGPTH_CFG, |
| 5471 | HVDCP_ADAPTER_SEL_MASK, HVDCP_5V); |
| 5472 | if (rc < 0) { |
| 5473 | pr_err("Couldn't configure HVDCP 5V rc=%d\n", rc); |
| 5474 | goto out; |
| 5475 | } |
| 5476 | |
| 5477 | /* wait for HVDCP to lower to 5V */ |
| 5478 | msleep(500); |
| 5479 | /* |
| 5480 | * Check if the same hvdcp session is in progress. src_det should be |
| 5481 | * high and that we are still in 5V hvdcp |
| 5482 | */ |
| 5483 | if (!is_src_detect_high(chip)) { |
| 5484 | pr_smb(PR_MISC, "src det low after 500mS sleep\n"); |
| 5485 | goto out; |
| 5486 | } |
| 5487 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5488 | pr_smb(PR_MISC, "Disable AICL\n"); |
| 5489 | smbchg_sec_masked_write(chip, chip->usb_chgpth_base + USB_AICL_CFG, |
| 5490 | AICL_EN_BIT, 0); |
| 5491 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5492 | /* re-run APSD */ |
| 5493 | rc = rerun_apsd(chip); |
| 5494 | if (rc) { |
| 5495 | pr_err("APSD rerun failed\n"); |
| 5496 | goto out; |
| 5497 | } |
| 5498 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5499 | pr_smb(PR_MISC, "Enable AICL\n"); |
| 5500 | smbchg_sec_masked_write(chip, chip->usb_chgpth_base + USB_AICL_CFG, |
| 5501 | AICL_EN_BIT, AICL_EN_BIT); |
| 5502 | /* |
| 5503 | * DCP will switch to HVDCP in this time by removing the short |
| 5504 | * between DP DM |
| 5505 | */ |
| 5506 | msleep(HVDCP_NOTIFY_MS); |
| 5507 | /* |
| 5508 | * Check if the same hvdcp session is in progress. src_det should be |
| 5509 | * high and the usb type should be none since APSD was disabled |
| 5510 | */ |
| 5511 | if (!is_src_detect_high(chip)) { |
| 5512 | pr_smb(PR_MISC, "src det low after 2s sleep\n"); |
| 5513 | rc = -EINVAL; |
| 5514 | goto out; |
| 5515 | } |
| 5516 | |
| 5517 | /* We are set if HVDCP in 5V continuous mode */ |
| 5518 | if (!is_hvdcp_5v_cont_mode(chip)) { |
| 5519 | pr_err("HVDCP could not be set in 5V continuous mode\n"); |
| 5520 | goto out; |
| 5521 | } |
| 5522 | |
| 5523 | return 0; |
| 5524 | out: |
| 5525 | chip->hvdcp_3_det_ignore_uv = false; |
| 5526 | restore_from_hvdcp_detection(chip); |
Anirudh Ghayal | a39aab5 | 2016-05-06 17:26:15 +0530 | [diff] [blame] | 5527 | if (!is_src_detect_high(chip)) { |
| 5528 | pr_smb(PR_MISC, "HVDCP removed - force removal\n"); |
| 5529 | update_usb_status(chip, 0, true); |
| 5530 | } |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5531 | return rc; |
| 5532 | } |
| 5533 | |
| 5534 | static int smbchg_unprepare_for_pulsing_lite(struct smbchg_chip *chip) |
| 5535 | { |
| 5536 | int rc = 0; |
| 5537 | |
| 5538 | pr_smb(PR_MISC, "Forcing 9V HVDCP 2.0\n"); |
| 5539 | rc = force_9v_hvdcp(chip); |
| 5540 | if (rc) { |
| 5541 | pr_err("Failed to force 9V HVDCP=%d\n", rc); |
| 5542 | return rc; |
| 5543 | } |
| 5544 | |
| 5545 | pr_smb(PR_MISC, "Retracting HVDCP vote for ICL\n"); |
| 5546 | rc = vote(chip->usb_icl_votable, HVDCP_ICL_VOTER, false, 0); |
| 5547 | if (rc < 0) |
| 5548 | pr_err("Couldn't retract HVDCP ICL vote rc=%d\n", rc); |
| 5549 | |
Anirudh Ghayal | a39aab5 | 2016-05-06 17:26:15 +0530 | [diff] [blame] | 5550 | if (!is_src_detect_high(chip)) { |
| 5551 | pr_smb(PR_MISC, "HVDCP removed\n"); |
| 5552 | update_usb_status(chip, 0, 0); |
| 5553 | } |
Subbaraman Narayanamurthy | 986bff5 | 2016-03-21 15:55:19 -0700 | [diff] [blame] | 5554 | smbchg_handle_hvdcp3_disable(chip); |
| 5555 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5556 | return rc; |
| 5557 | } |
| 5558 | |
| 5559 | #define CMD_HVDCP_2 0x43 |
| 5560 | #define SINGLE_INCREMENT BIT(0) |
| 5561 | #define SINGLE_DECREMENT BIT(1) |
| 5562 | static int smbchg_dp_pulse_lite(struct smbchg_chip *chip) |
| 5563 | { |
| 5564 | int rc = 0; |
| 5565 | |
| 5566 | pr_smb(PR_MISC, "Increment DP\n"); |
| 5567 | rc = smbchg_masked_write(chip, chip->usb_chgpth_base + CMD_HVDCP_2, |
| 5568 | SINGLE_INCREMENT, SINGLE_INCREMENT); |
| 5569 | if (rc) |
| 5570 | pr_err("Single-increment failed rc=%d\n", rc); |
| 5571 | |
| 5572 | return rc; |
| 5573 | } |
| 5574 | |
| 5575 | static int smbchg_dm_pulse_lite(struct smbchg_chip *chip) |
| 5576 | { |
| 5577 | int rc = 0; |
| 5578 | |
| 5579 | pr_smb(PR_MISC, "Decrement DM\n"); |
| 5580 | rc = smbchg_masked_write(chip, chip->usb_chgpth_base + CMD_HVDCP_2, |
| 5581 | SINGLE_DECREMENT, SINGLE_DECREMENT); |
| 5582 | if (rc) |
| 5583 | pr_err("Single-decrement failed rc=%d\n", rc); |
| 5584 | |
| 5585 | return rc; |
| 5586 | } |
| 5587 | |
| 5588 | static int smbchg_hvdcp3_confirmed(struct smbchg_chip *chip) |
| 5589 | { |
| 5590 | int rc = 0; |
| 5591 | |
| 5592 | /* |
| 5593 | * reset the enabled once flag for parallel charging because this is |
| 5594 | * effectively a new insertion. |
| 5595 | */ |
| 5596 | chip->parallel.enabled_once = false; |
| 5597 | |
| 5598 | pr_smb(PR_MISC, "Retracting HVDCP vote for ICL\n"); |
| 5599 | rc = vote(chip->usb_icl_votable, HVDCP_ICL_VOTER, false, 0); |
| 5600 | if (rc < 0) |
| 5601 | pr_err("Couldn't retract HVDCP ICL vote rc=%d\n", rc); |
| 5602 | |
| 5603 | smbchg_change_usb_supply_type(chip, POWER_SUPPLY_TYPE_USB_HVDCP_3); |
| 5604 | |
| 5605 | return rc; |
| 5606 | } |
| 5607 | |
| 5608 | static int smbchg_dp_dm(struct smbchg_chip *chip, int val) |
| 5609 | { |
| 5610 | int rc = 0; |
| 5611 | int target_icl_vote_ma; |
| 5612 | |
| 5613 | switch (val) { |
| 5614 | case POWER_SUPPLY_DP_DM_PREPARE: |
| 5615 | if (!is_hvdcp_present(chip)) { |
| 5616 | pr_err("No pulsing unless HVDCP\n"); |
| 5617 | return -ENODEV; |
| 5618 | } |
| 5619 | if (chip->schg_version == QPNP_SCHG_LITE) |
| 5620 | rc = smbchg_prepare_for_pulsing_lite(chip); |
| 5621 | else |
| 5622 | rc = smbchg_prepare_for_pulsing(chip); |
| 5623 | break; |
| 5624 | case POWER_SUPPLY_DP_DM_UNPREPARE: |
| 5625 | if (chip->schg_version == QPNP_SCHG_LITE) |
| 5626 | rc = smbchg_unprepare_for_pulsing_lite(chip); |
| 5627 | else |
| 5628 | rc = smbchg_unprepare_for_pulsing(chip); |
| 5629 | break; |
| 5630 | case POWER_SUPPLY_DP_DM_CONFIRMED_HVDCP3: |
| 5631 | rc = smbchg_hvdcp3_confirmed(chip); |
| 5632 | break; |
| 5633 | case POWER_SUPPLY_DP_DM_DP_PULSE: |
| 5634 | if (chip->schg_version == QPNP_SCHG) |
| 5635 | rc = set_usb_psy_dp_dm(chip, |
| 5636 | POWER_SUPPLY_DP_DM_DP_PULSE); |
| 5637 | else |
| 5638 | rc = smbchg_dp_pulse_lite(chip); |
| 5639 | if (!rc) |
| 5640 | chip->pulse_cnt++; |
| 5641 | pr_smb(PR_MISC, "pulse_cnt = %d\n", chip->pulse_cnt); |
| 5642 | break; |
| 5643 | case POWER_SUPPLY_DP_DM_DM_PULSE: |
| 5644 | if (chip->schg_version == QPNP_SCHG) |
| 5645 | rc = set_usb_psy_dp_dm(chip, |
| 5646 | POWER_SUPPLY_DP_DM_DM_PULSE); |
| 5647 | else |
| 5648 | rc = smbchg_dm_pulse_lite(chip); |
| 5649 | if (!rc && chip->pulse_cnt) |
| 5650 | chip->pulse_cnt--; |
| 5651 | pr_smb(PR_MISC, "pulse_cnt = %d\n", chip->pulse_cnt); |
| 5652 | break; |
| 5653 | case POWER_SUPPLY_DP_DM_HVDCP3_SUPPORTED: |
| 5654 | chip->hvdcp3_supported = true; |
| 5655 | pr_smb(PR_MISC, "HVDCP3 supported\n"); |
| 5656 | break; |
| 5657 | case POWER_SUPPLY_DP_DM_ICL_DOWN: |
| 5658 | chip->usb_icl_delta -= 100; |
| 5659 | target_icl_vote_ma = get_client_vote(chip->usb_icl_votable, |
| 5660 | PSY_ICL_VOTER); |
| 5661 | vote(chip->usb_icl_votable, SW_AICL_ICL_VOTER, true, |
| 5662 | target_icl_vote_ma + chip->usb_icl_delta); |
| 5663 | break; |
| 5664 | case POWER_SUPPLY_DP_DM_ICL_UP: |
| 5665 | chip->usb_icl_delta += 100; |
| 5666 | target_icl_vote_ma = get_client_vote(chip->usb_icl_votable, |
| 5667 | PSY_ICL_VOTER); |
| 5668 | vote(chip->usb_icl_votable, SW_AICL_ICL_VOTER, true, |
| 5669 | target_icl_vote_ma + chip->usb_icl_delta); |
| 5670 | break; |
| 5671 | default: |
| 5672 | break; |
| 5673 | } |
| 5674 | |
| 5675 | return rc; |
| 5676 | } |
| 5677 | |
| 5678 | static void update_typec_capability_status(struct smbchg_chip *chip, |
| 5679 | const union power_supply_propval *val) |
| 5680 | { |
| 5681 | pr_smb(PR_TYPEC, "typec capability = %dma\n", val->intval); |
| 5682 | |
| 5683 | pr_debug("changing ICL from %dma to %dma\n", chip->typec_current_ma, |
| 5684 | val->intval); |
| 5685 | chip->typec_current_ma = val->intval; |
| 5686 | smbchg_change_usb_supply_type(chip, chip->usb_supply_type); |
| 5687 | } |
| 5688 | |
| 5689 | static void update_typec_otg_status(struct smbchg_chip *chip, int mode, |
| 5690 | bool force) |
| 5691 | { |
| 5692 | union power_supply_propval pval = {0, }; |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 5693 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5694 | pr_smb(PR_TYPEC, "typec mode = %d\n", mode); |
| 5695 | |
| 5696 | if (mode == POWER_SUPPLY_TYPE_DFP) { |
| 5697 | chip->typec_dfp = true; |
| 5698 | pval.intval = 1; |
| 5699 | extcon_set_cable_state_(chip->extcon, EXTCON_USB_HOST, |
| 5700 | chip->typec_dfp); |
| 5701 | /* update FG */ |
| 5702 | set_property_on_fg(chip, POWER_SUPPLY_PROP_STATUS, |
| 5703 | get_prop_batt_status(chip)); |
| 5704 | } else if (force || chip->typec_dfp) { |
| 5705 | chip->typec_dfp = false; |
| 5706 | pval.intval = 0; |
| 5707 | extcon_set_cable_state_(chip->extcon, EXTCON_USB_HOST, |
| 5708 | chip->typec_dfp); |
| 5709 | /* update FG */ |
| 5710 | set_property_on_fg(chip, POWER_SUPPLY_PROP_STATUS, |
| 5711 | get_prop_batt_status(chip)); |
| 5712 | } |
| 5713 | } |
| 5714 | |
| 5715 | static int smbchg_usb_get_property(struct power_supply *psy, |
| 5716 | enum power_supply_property psp, |
| 5717 | union power_supply_propval *val) |
| 5718 | { |
| 5719 | struct smbchg_chip *chip = power_supply_get_drvdata(psy); |
| 5720 | |
| 5721 | switch (psp) { |
| 5722 | case POWER_SUPPLY_PROP_CURRENT_MAX: |
| 5723 | val->intval = chip->usb_current_max; |
| 5724 | break; |
| 5725 | case POWER_SUPPLY_PROP_PRESENT: |
| 5726 | val->intval = chip->usb_present; |
| 5727 | break; |
| 5728 | case POWER_SUPPLY_PROP_ONLINE: |
| 5729 | val->intval = chip->usb_online; |
| 5730 | break; |
| 5731 | case POWER_SUPPLY_PROP_TYPE: |
Vamshi Krishna B V | cd718a3 | 2018-04-03 17:59:47 +0530 | [diff] [blame] | 5732 | val->intval = chip->usb_psy_d.type; |
| 5733 | break; |
| 5734 | case POWER_SUPPLY_PROP_REAL_TYPE: |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5735 | val->intval = chip->usb_supply_type; |
| 5736 | break; |
| 5737 | case POWER_SUPPLY_PROP_HEALTH: |
| 5738 | val->intval = chip->usb_health; |
| 5739 | break; |
| 5740 | default: |
| 5741 | return -EINVAL; |
| 5742 | } |
| 5743 | return 0; |
| 5744 | } |
| 5745 | |
| 5746 | static int smbchg_usb_set_property(struct power_supply *psy, |
| 5747 | enum power_supply_property psp, |
| 5748 | const union power_supply_propval *val) |
| 5749 | { |
| 5750 | struct smbchg_chip *chip = power_supply_get_drvdata(psy); |
| 5751 | |
| 5752 | switch (psp) { |
| 5753 | case POWER_SUPPLY_PROP_CURRENT_MAX: |
| 5754 | chip->usb_current_max = val->intval; |
| 5755 | break; |
| 5756 | case POWER_SUPPLY_PROP_ONLINE: |
| 5757 | chip->usb_online = val->intval; |
| 5758 | break; |
| 5759 | default: |
| 5760 | return -EINVAL; |
| 5761 | } |
| 5762 | |
| 5763 | power_supply_changed(psy); |
| 5764 | return 0; |
| 5765 | } |
| 5766 | |
| 5767 | static int |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 5768 | smbchg_usb_is_writeable(struct power_supply *psy, |
| 5769 | enum power_supply_property psp) |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5770 | { |
| 5771 | switch (psp) { |
| 5772 | case POWER_SUPPLY_PROP_CURRENT_MAX: |
| 5773 | return 1; |
| 5774 | default: |
| 5775 | break; |
| 5776 | } |
| 5777 | |
| 5778 | return 0; |
| 5779 | } |
| 5780 | |
| 5781 | |
| 5782 | static char *smbchg_usb_supplicants[] = { |
| 5783 | "battery", |
| 5784 | "bms", |
| 5785 | }; |
| 5786 | |
| 5787 | static enum power_supply_property smbchg_usb_properties[] = { |
| 5788 | POWER_SUPPLY_PROP_PRESENT, |
| 5789 | POWER_SUPPLY_PROP_ONLINE, |
| 5790 | POWER_SUPPLY_PROP_CURRENT_MAX, |
| 5791 | POWER_SUPPLY_PROP_TYPE, |
Vamshi Krishna B V | cd718a3 | 2018-04-03 17:59:47 +0530 | [diff] [blame] | 5792 | POWER_SUPPLY_PROP_REAL_TYPE, |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5793 | POWER_SUPPLY_PROP_HEALTH, |
| 5794 | }; |
| 5795 | |
| 5796 | #define CHARGE_OUTPUT_VTG_RATIO 840 |
| 5797 | static int smbchg_get_iusb(struct smbchg_chip *chip) |
| 5798 | { |
| 5799 | int rc, iusb_ua = -EINVAL; |
| 5800 | struct qpnp_vadc_result adc_result; |
| 5801 | |
| 5802 | if (!is_usb_present(chip) && !is_dc_present(chip)) |
| 5803 | return 0; |
| 5804 | |
| 5805 | if (chip->vchg_vadc_dev && chip->vchg_adc_channel != -EINVAL) { |
| 5806 | rc = qpnp_vadc_read(chip->vchg_vadc_dev, |
| 5807 | chip->vchg_adc_channel, &adc_result); |
| 5808 | if (rc) { |
| 5809 | pr_smb(PR_STATUS, |
| 5810 | "error in VCHG (channel-%d) read rc = %d\n", |
| 5811 | chip->vchg_adc_channel, rc); |
| 5812 | return 0; |
| 5813 | } |
| 5814 | iusb_ua = div_s64(adc_result.physical * 1000, |
| 5815 | CHARGE_OUTPUT_VTG_RATIO); |
| 5816 | } |
| 5817 | |
| 5818 | return iusb_ua; |
| 5819 | } |
| 5820 | |
| 5821 | static enum power_supply_property smbchg_battery_properties[] = { |
| 5822 | POWER_SUPPLY_PROP_STATUS, |
| 5823 | POWER_SUPPLY_PROP_PRESENT, |
| 5824 | POWER_SUPPLY_PROP_BATTERY_CHARGING_ENABLED, |
| 5825 | POWER_SUPPLY_PROP_CHARGING_ENABLED, |
| 5826 | POWER_SUPPLY_PROP_CHARGE_TYPE, |
| 5827 | POWER_SUPPLY_PROP_CAPACITY, |
| 5828 | POWER_SUPPLY_PROP_HEALTH, |
| 5829 | POWER_SUPPLY_PROP_TECHNOLOGY, |
| 5830 | POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL, |
| 5831 | POWER_SUPPLY_PROP_FLASH_CURRENT_MAX, |
| 5832 | POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, |
| 5833 | POWER_SUPPLY_PROP_VOLTAGE_MAX, |
| 5834 | POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN, |
| 5835 | POWER_SUPPLY_PROP_CURRENT_NOW, |
| 5836 | POWER_SUPPLY_PROP_TEMP, |
| 5837 | POWER_SUPPLY_PROP_VOLTAGE_NOW, |
Subbaraman Narayanamurthy | 82861b1 | 2016-05-16 18:20:54 -0700 | [diff] [blame] | 5838 | POWER_SUPPLY_PROP_RESISTANCE_ID, |
| 5839 | POWER_SUPPLY_PROP_CHARGE_FULL, |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5840 | POWER_SUPPLY_PROP_SAFETY_TIMER_ENABLE, |
| 5841 | POWER_SUPPLY_PROP_INPUT_CURRENT_MAX, |
| 5842 | POWER_SUPPLY_PROP_INPUT_CURRENT_SETTLED, |
| 5843 | POWER_SUPPLY_PROP_INPUT_CURRENT_NOW, |
| 5844 | POWER_SUPPLY_PROP_FLASH_ACTIVE, |
| 5845 | POWER_SUPPLY_PROP_FLASH_TRIGGER, |
| 5846 | POWER_SUPPLY_PROP_DP_DM, |
| 5847 | POWER_SUPPLY_PROP_INPUT_CURRENT_LIMITED, |
| 5848 | POWER_SUPPLY_PROP_RERUN_AICL, |
| 5849 | POWER_SUPPLY_PROP_RESTRICTED_CHARGING, |
Subbaraman Narayanamurthy | 986bff5 | 2016-03-21 15:55:19 -0700 | [diff] [blame] | 5850 | POWER_SUPPLY_PROP_ALLOW_HVDCP3, |
Anirudh Ghayal | 88c9197 | 2016-08-04 08:15:39 +0530 | [diff] [blame] | 5851 | POWER_SUPPLY_PROP_MAX_PULSE_ALLOWED, |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5852 | }; |
| 5853 | |
| 5854 | static int smbchg_battery_set_property(struct power_supply *psy, |
| 5855 | enum power_supply_property prop, |
| 5856 | const union power_supply_propval *val) |
| 5857 | { |
| 5858 | int rc = 0; |
| 5859 | struct smbchg_chip *chip = power_supply_get_drvdata(psy); |
| 5860 | |
| 5861 | switch (prop) { |
| 5862 | case POWER_SUPPLY_PROP_BATTERY_CHARGING_ENABLED: |
| 5863 | vote(chip->battchg_suspend_votable, BATTCHG_USER_EN_VOTER, |
| 5864 | !val->intval, 0); |
| 5865 | break; |
| 5866 | case POWER_SUPPLY_PROP_CHARGING_ENABLED: |
| 5867 | rc = vote(chip->usb_suspend_votable, USER_EN_VOTER, |
| 5868 | !val->intval, 0); |
| 5869 | rc = vote(chip->dc_suspend_votable, USER_EN_VOTER, |
| 5870 | !val->intval, 0); |
| 5871 | chip->chg_enabled = val->intval; |
| 5872 | schedule_work(&chip->usb_set_online_work); |
| 5873 | break; |
| 5874 | case POWER_SUPPLY_PROP_CAPACITY: |
| 5875 | chip->fake_battery_soc = val->intval; |
| 5876 | if (chip->batt_psy) |
| 5877 | power_supply_changed(chip->batt_psy); |
| 5878 | break; |
| 5879 | case POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL: |
| 5880 | smbchg_system_temp_level_set(chip, val->intval); |
| 5881 | break; |
| 5882 | case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: |
| 5883 | rc = smbchg_set_fastchg_current_user(chip, val->intval / 1000); |
| 5884 | break; |
| 5885 | case POWER_SUPPLY_PROP_VOLTAGE_MAX: |
| 5886 | rc = smbchg_float_voltage_set(chip, val->intval); |
| 5887 | break; |
| 5888 | case POWER_SUPPLY_PROP_SAFETY_TIMER_ENABLE: |
| 5889 | rc = smbchg_safety_timer_enable(chip, val->intval); |
| 5890 | break; |
| 5891 | case POWER_SUPPLY_PROP_FLASH_ACTIVE: |
| 5892 | rc = smbchg_switch_buck_frequency(chip, val->intval); |
| 5893 | if (rc) { |
| 5894 | pr_err("Couldn't switch buck frequency, rc=%d\n", rc); |
| 5895 | /* |
| 5896 | * Trigger a panic if there is an error while switching |
| 5897 | * buck frequency. This will prevent LS FET damage. |
| 5898 | */ |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 5899 | WARN_ON(1); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5900 | } |
| 5901 | |
| 5902 | rc = smbchg_otg_pulse_skip_disable(chip, |
| 5903 | REASON_FLASH_ENABLED, val->intval); |
| 5904 | break; |
| 5905 | case POWER_SUPPLY_PROP_FLASH_TRIGGER: |
| 5906 | chip->flash_triggered = !!val->intval; |
| 5907 | smbchg_icl_loop_disable_check(chip); |
| 5908 | break; |
| 5909 | case POWER_SUPPLY_PROP_FORCE_TLIM: |
| 5910 | rc = smbchg_force_tlim_en(chip, val->intval); |
| 5911 | break; |
| 5912 | case POWER_SUPPLY_PROP_DP_DM: |
| 5913 | rc = smbchg_dp_dm(chip, val->intval); |
| 5914 | break; |
| 5915 | case POWER_SUPPLY_PROP_RERUN_AICL: |
| 5916 | smbchg_rerun_aicl(chip); |
| 5917 | break; |
| 5918 | case POWER_SUPPLY_PROP_RESTRICTED_CHARGING: |
| 5919 | rc = smbchg_restricted_charging(chip, val->intval); |
| 5920 | break; |
| 5921 | case POWER_SUPPLY_PROP_CURRENT_CAPABILITY: |
| 5922 | if (chip->typec_psy) |
| 5923 | update_typec_capability_status(chip, val); |
| 5924 | break; |
| 5925 | case POWER_SUPPLY_PROP_TYPEC_MODE: |
| 5926 | if (chip->typec_psy) |
| 5927 | update_typec_otg_status(chip, val->intval, false); |
| 5928 | break; |
Subbaraman Narayanamurthy | 986bff5 | 2016-03-21 15:55:19 -0700 | [diff] [blame] | 5929 | case POWER_SUPPLY_PROP_ALLOW_HVDCP3: |
| 5930 | if (chip->allow_hvdcp3_detection != val->intval) { |
| 5931 | chip->allow_hvdcp3_detection = !!val->intval; |
| 5932 | power_supply_changed(chip->batt_psy); |
| 5933 | } |
| 5934 | break; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5935 | default: |
| 5936 | return -EINVAL; |
| 5937 | } |
| 5938 | |
| 5939 | return rc; |
| 5940 | } |
| 5941 | |
| 5942 | static int smbchg_battery_is_writeable(struct power_supply *psy, |
| 5943 | enum power_supply_property prop) |
| 5944 | { |
| 5945 | int rc; |
| 5946 | |
| 5947 | switch (prop) { |
| 5948 | case POWER_SUPPLY_PROP_BATTERY_CHARGING_ENABLED: |
| 5949 | case POWER_SUPPLY_PROP_CHARGING_ENABLED: |
| 5950 | case POWER_SUPPLY_PROP_CAPACITY: |
| 5951 | case POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL: |
| 5952 | case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: |
| 5953 | case POWER_SUPPLY_PROP_VOLTAGE_MAX: |
| 5954 | case POWER_SUPPLY_PROP_SAFETY_TIMER_ENABLE: |
| 5955 | case POWER_SUPPLY_PROP_DP_DM: |
| 5956 | case POWER_SUPPLY_PROP_RERUN_AICL: |
| 5957 | case POWER_SUPPLY_PROP_RESTRICTED_CHARGING: |
Subbaraman Narayanamurthy | 986bff5 | 2016-03-21 15:55:19 -0700 | [diff] [blame] | 5958 | case POWER_SUPPLY_PROP_ALLOW_HVDCP3: |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 5959 | rc = 1; |
| 5960 | break; |
| 5961 | default: |
| 5962 | rc = 0; |
| 5963 | break; |
| 5964 | } |
| 5965 | return rc; |
| 5966 | } |
| 5967 | |
| 5968 | static int smbchg_battery_get_property(struct power_supply *psy, |
| 5969 | enum power_supply_property prop, |
| 5970 | union power_supply_propval *val) |
| 5971 | { |
| 5972 | struct smbchg_chip *chip = power_supply_get_drvdata(psy); |
| 5973 | |
| 5974 | switch (prop) { |
| 5975 | case POWER_SUPPLY_PROP_STATUS: |
| 5976 | val->intval = get_prop_batt_status(chip); |
| 5977 | break; |
| 5978 | case POWER_SUPPLY_PROP_PRESENT: |
| 5979 | val->intval = get_prop_batt_present(chip); |
| 5980 | break; |
| 5981 | case POWER_SUPPLY_PROP_BATTERY_CHARGING_ENABLED: |
| 5982 | val->intval |
| 5983 | = get_effective_result(chip->battchg_suspend_votable); |
| 5984 | if (val->intval < 0) /* no votes */ |
| 5985 | val->intval = 1; |
| 5986 | else |
| 5987 | val->intval = !val->intval; |
| 5988 | break; |
| 5989 | case POWER_SUPPLY_PROP_CHARGING_ENABLED: |
| 5990 | val->intval = chip->chg_enabled; |
| 5991 | break; |
| 5992 | case POWER_SUPPLY_PROP_CHARGE_TYPE: |
| 5993 | val->intval = get_prop_charge_type(chip); |
| 5994 | break; |
| 5995 | case POWER_SUPPLY_PROP_VOLTAGE_MAX: |
| 5996 | val->intval = smbchg_float_voltage_get(chip); |
| 5997 | break; |
| 5998 | case POWER_SUPPLY_PROP_HEALTH: |
| 5999 | val->intval = get_prop_batt_health(chip); |
| 6000 | break; |
| 6001 | case POWER_SUPPLY_PROP_TECHNOLOGY: |
| 6002 | val->intval = POWER_SUPPLY_TECHNOLOGY_LION; |
| 6003 | break; |
| 6004 | case POWER_SUPPLY_PROP_FLASH_CURRENT_MAX: |
| 6005 | val->intval = smbchg_calc_max_flash_current(chip); |
| 6006 | break; |
| 6007 | case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: |
| 6008 | val->intval = chip->fastchg_current_ma * 1000; |
| 6009 | break; |
| 6010 | case POWER_SUPPLY_PROP_SYSTEM_TEMP_LEVEL: |
| 6011 | val->intval = chip->therm_lvl_sel; |
| 6012 | break; |
| 6013 | case POWER_SUPPLY_PROP_INPUT_CURRENT_MAX: |
| 6014 | val->intval = smbchg_get_aicl_level_ma(chip) * 1000; |
| 6015 | break; |
| 6016 | case POWER_SUPPLY_PROP_INPUT_CURRENT_SETTLED: |
| 6017 | val->intval = (int)chip->aicl_complete; |
| 6018 | break; |
| 6019 | case POWER_SUPPLY_PROP_RESTRICTED_CHARGING: |
| 6020 | val->intval = (int)chip->restricted_charging; |
| 6021 | break; |
| 6022 | /* properties from fg */ |
| 6023 | case POWER_SUPPLY_PROP_CAPACITY: |
| 6024 | val->intval = get_prop_batt_capacity(chip); |
| 6025 | break; |
| 6026 | case POWER_SUPPLY_PROP_CURRENT_NOW: |
| 6027 | val->intval = get_prop_batt_current_now(chip); |
| 6028 | break; |
| 6029 | case POWER_SUPPLY_PROP_VOLTAGE_NOW: |
| 6030 | val->intval = get_prop_batt_voltage_now(chip); |
| 6031 | break; |
Subbaraman Narayanamurthy | 82861b1 | 2016-05-16 18:20:54 -0700 | [diff] [blame] | 6032 | case POWER_SUPPLY_PROP_RESISTANCE_ID: |
| 6033 | val->intval = get_prop_batt_resistance_id(chip); |
| 6034 | break; |
| 6035 | case POWER_SUPPLY_PROP_CHARGE_FULL: |
| 6036 | val->intval = get_prop_batt_full_charge(chip); |
| 6037 | break; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 6038 | case POWER_SUPPLY_PROP_TEMP: |
| 6039 | val->intval = get_prop_batt_temp(chip); |
| 6040 | break; |
| 6041 | case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN: |
| 6042 | val->intval = get_prop_batt_voltage_max_design(chip); |
| 6043 | break; |
| 6044 | case POWER_SUPPLY_PROP_SAFETY_TIMER_ENABLE: |
| 6045 | val->intval = chip->safety_timer_en; |
| 6046 | break; |
| 6047 | case POWER_SUPPLY_PROP_FLASH_ACTIVE: |
| 6048 | val->intval = chip->otg_pulse_skip_dis; |
| 6049 | break; |
| 6050 | case POWER_SUPPLY_PROP_FLASH_TRIGGER: |
| 6051 | val->intval = chip->flash_triggered; |
| 6052 | break; |
| 6053 | case POWER_SUPPLY_PROP_DP_DM: |
| 6054 | val->intval = chip->pulse_cnt; |
| 6055 | break; |
| 6056 | case POWER_SUPPLY_PROP_INPUT_CURRENT_LIMITED: |
| 6057 | val->intval = smbchg_is_input_current_limited(chip); |
| 6058 | break; |
| 6059 | case POWER_SUPPLY_PROP_RERUN_AICL: |
| 6060 | val->intval = 0; |
| 6061 | break; |
| 6062 | case POWER_SUPPLY_PROP_INPUT_CURRENT_NOW: |
| 6063 | val->intval = smbchg_get_iusb(chip); |
| 6064 | break; |
Subbaraman Narayanamurthy | 986bff5 | 2016-03-21 15:55:19 -0700 | [diff] [blame] | 6065 | case POWER_SUPPLY_PROP_ALLOW_HVDCP3: |
| 6066 | val->intval = chip->allow_hvdcp3_detection; |
| 6067 | break; |
Anirudh Ghayal | 88c9197 | 2016-08-04 08:15:39 +0530 | [diff] [blame] | 6068 | case POWER_SUPPLY_PROP_MAX_PULSE_ALLOWED: |
| 6069 | val->intval = chip->max_pulse_allowed; |
| 6070 | break; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 6071 | default: |
| 6072 | return -EINVAL; |
| 6073 | } |
| 6074 | return 0; |
| 6075 | } |
| 6076 | |
| 6077 | static char *smbchg_dc_supplicants[] = { |
| 6078 | "bms", |
| 6079 | }; |
| 6080 | |
| 6081 | static enum power_supply_property smbchg_dc_properties[] = { |
| 6082 | POWER_SUPPLY_PROP_PRESENT, |
| 6083 | POWER_SUPPLY_PROP_ONLINE, |
| 6084 | POWER_SUPPLY_PROP_CHARGING_ENABLED, |
| 6085 | POWER_SUPPLY_PROP_CURRENT_MAX, |
| 6086 | }; |
| 6087 | |
| 6088 | static int smbchg_dc_set_property(struct power_supply *psy, |
| 6089 | enum power_supply_property prop, |
| 6090 | const union power_supply_propval *val) |
| 6091 | { |
| 6092 | int rc = 0; |
| 6093 | struct smbchg_chip *chip = power_supply_get_drvdata(psy); |
| 6094 | |
| 6095 | switch (prop) { |
| 6096 | case POWER_SUPPLY_PROP_CHARGING_ENABLED: |
| 6097 | rc = vote(chip->dc_suspend_votable, POWER_SUPPLY_EN_VOTER, |
| 6098 | !val->intval, 0); |
| 6099 | break; |
| 6100 | case POWER_SUPPLY_PROP_CURRENT_MAX: |
| 6101 | rc = vote(chip->dc_icl_votable, USER_ICL_VOTER, true, |
| 6102 | val->intval / 1000); |
| 6103 | break; |
| 6104 | default: |
| 6105 | return -EINVAL; |
| 6106 | } |
| 6107 | |
| 6108 | return rc; |
| 6109 | } |
| 6110 | |
| 6111 | static int smbchg_dc_get_property(struct power_supply *psy, |
| 6112 | enum power_supply_property prop, |
| 6113 | union power_supply_propval *val) |
| 6114 | { |
| 6115 | struct smbchg_chip *chip = power_supply_get_drvdata(psy); |
| 6116 | |
| 6117 | switch (prop) { |
| 6118 | case POWER_SUPPLY_PROP_PRESENT: |
| 6119 | val->intval = is_dc_present(chip); |
| 6120 | break; |
| 6121 | case POWER_SUPPLY_PROP_CHARGING_ENABLED: |
| 6122 | val->intval = get_effective_result(chip->dc_suspend_votable); |
| 6123 | if (val->intval < 0) /* no votes */ |
| 6124 | val->intval = 1; |
| 6125 | else |
| 6126 | val->intval = !val->intval; |
| 6127 | break; |
| 6128 | case POWER_SUPPLY_PROP_ONLINE: |
| 6129 | /* return if dc is charging the battery */ |
| 6130 | val->intval = (smbchg_get_pwr_path(chip) == PWR_PATH_DC) |
| 6131 | && (get_prop_batt_status(chip) |
| 6132 | == POWER_SUPPLY_STATUS_CHARGING); |
| 6133 | break; |
| 6134 | case POWER_SUPPLY_PROP_CURRENT_MAX: |
| 6135 | val->intval = chip->dc_max_current_ma * 1000; |
| 6136 | break; |
| 6137 | default: |
| 6138 | return -EINVAL; |
| 6139 | } |
| 6140 | |
| 6141 | return 0; |
| 6142 | } |
| 6143 | |
| 6144 | static int smbchg_dc_is_writeable(struct power_supply *psy, |
| 6145 | enum power_supply_property prop) |
| 6146 | { |
| 6147 | int rc; |
| 6148 | |
| 6149 | switch (prop) { |
| 6150 | case POWER_SUPPLY_PROP_CHARGING_ENABLED: |
| 6151 | case POWER_SUPPLY_PROP_CURRENT_MAX: |
| 6152 | rc = 1; |
| 6153 | break; |
| 6154 | default: |
| 6155 | rc = 0; |
| 6156 | break; |
| 6157 | } |
| 6158 | return rc; |
| 6159 | } |
| 6160 | |
| 6161 | #define HOT_BAT_HARD_BIT BIT(0) |
| 6162 | #define HOT_BAT_SOFT_BIT BIT(1) |
| 6163 | #define COLD_BAT_HARD_BIT BIT(2) |
| 6164 | #define COLD_BAT_SOFT_BIT BIT(3) |
| 6165 | #define BAT_OV_BIT BIT(4) |
| 6166 | #define BAT_LOW_BIT BIT(5) |
| 6167 | #define BAT_MISSING_BIT BIT(6) |
| 6168 | #define BAT_TERM_MISSING_BIT BIT(7) |
| 6169 | static irqreturn_t batt_hot_handler(int irq, void *_chip) |
| 6170 | { |
| 6171 | struct smbchg_chip *chip = _chip; |
| 6172 | u8 reg = 0; |
| 6173 | |
| 6174 | smbchg_read(chip, ®, chip->bat_if_base + RT_STS, 1); |
| 6175 | chip->batt_hot = !!(reg & HOT_BAT_HARD_BIT); |
| 6176 | pr_smb(PR_INTERRUPT, "triggered: 0x%02x\n", reg); |
| 6177 | smbchg_parallel_usb_check_ok(chip); |
| 6178 | if (chip->batt_psy) |
| 6179 | power_supply_changed(chip->batt_psy); |
| 6180 | smbchg_charging_status_change(chip); |
| 6181 | smbchg_wipower_check(chip); |
| 6182 | set_property_on_fg(chip, POWER_SUPPLY_PROP_HEALTH, |
| 6183 | get_prop_batt_health(chip)); |
| 6184 | return IRQ_HANDLED; |
| 6185 | } |
| 6186 | |
| 6187 | static irqreturn_t batt_cold_handler(int irq, void *_chip) |
| 6188 | { |
| 6189 | struct smbchg_chip *chip = _chip; |
| 6190 | u8 reg = 0; |
| 6191 | |
| 6192 | smbchg_read(chip, ®, chip->bat_if_base + RT_STS, 1); |
| 6193 | chip->batt_cold = !!(reg & COLD_BAT_HARD_BIT); |
| 6194 | pr_smb(PR_INTERRUPT, "triggered: 0x%02x\n", reg); |
| 6195 | smbchg_parallel_usb_check_ok(chip); |
| 6196 | if (chip->batt_psy) |
| 6197 | power_supply_changed(chip->batt_psy); |
| 6198 | smbchg_charging_status_change(chip); |
| 6199 | smbchg_wipower_check(chip); |
| 6200 | set_property_on_fg(chip, POWER_SUPPLY_PROP_HEALTH, |
| 6201 | get_prop_batt_health(chip)); |
| 6202 | return IRQ_HANDLED; |
| 6203 | } |
| 6204 | |
| 6205 | static irqreturn_t batt_warm_handler(int irq, void *_chip) |
| 6206 | { |
| 6207 | struct smbchg_chip *chip = _chip; |
| 6208 | u8 reg = 0; |
| 6209 | |
| 6210 | smbchg_read(chip, ®, chip->bat_if_base + RT_STS, 1); |
| 6211 | chip->batt_warm = !!(reg & HOT_BAT_SOFT_BIT); |
| 6212 | pr_smb(PR_INTERRUPT, "triggered: 0x%02x\n", reg); |
| 6213 | smbchg_parallel_usb_check_ok(chip); |
| 6214 | if (chip->batt_psy) |
| 6215 | power_supply_changed(chip->batt_psy); |
| 6216 | set_property_on_fg(chip, POWER_SUPPLY_PROP_HEALTH, |
| 6217 | get_prop_batt_health(chip)); |
| 6218 | return IRQ_HANDLED; |
| 6219 | } |
| 6220 | |
| 6221 | static irqreturn_t batt_cool_handler(int irq, void *_chip) |
| 6222 | { |
| 6223 | struct smbchg_chip *chip = _chip; |
| 6224 | u8 reg = 0; |
| 6225 | |
| 6226 | smbchg_read(chip, ®, chip->bat_if_base + RT_STS, 1); |
| 6227 | chip->batt_cool = !!(reg & COLD_BAT_SOFT_BIT); |
| 6228 | pr_smb(PR_INTERRUPT, "triggered: 0x%02x\n", reg); |
| 6229 | smbchg_parallel_usb_check_ok(chip); |
| 6230 | if (chip->batt_psy) |
| 6231 | power_supply_changed(chip->batt_psy); |
| 6232 | set_property_on_fg(chip, POWER_SUPPLY_PROP_HEALTH, |
| 6233 | get_prop_batt_health(chip)); |
| 6234 | return IRQ_HANDLED; |
| 6235 | } |
| 6236 | |
| 6237 | static irqreturn_t batt_pres_handler(int irq, void *_chip) |
| 6238 | { |
| 6239 | struct smbchg_chip *chip = _chip; |
| 6240 | u8 reg = 0; |
| 6241 | |
| 6242 | smbchg_read(chip, ®, chip->bat_if_base + RT_STS, 1); |
| 6243 | chip->batt_present = !(reg & BAT_MISSING_BIT); |
| 6244 | pr_smb(PR_INTERRUPT, "triggered: 0x%02x\n", reg); |
| 6245 | if (chip->batt_psy) |
| 6246 | power_supply_changed(chip->batt_psy); |
| 6247 | smbchg_charging_status_change(chip); |
| 6248 | set_property_on_fg(chip, POWER_SUPPLY_PROP_HEALTH, |
| 6249 | get_prop_batt_health(chip)); |
| 6250 | return IRQ_HANDLED; |
| 6251 | } |
| 6252 | |
| 6253 | static irqreturn_t vbat_low_handler(int irq, void *_chip) |
| 6254 | { |
| 6255 | pr_warn_ratelimited("vbat low\n"); |
| 6256 | return IRQ_HANDLED; |
| 6257 | } |
| 6258 | |
| 6259 | #define CHG_COMP_SFT_BIT BIT(3) |
| 6260 | static irqreturn_t chg_error_handler(int irq, void *_chip) |
| 6261 | { |
| 6262 | struct smbchg_chip *chip = _chip; |
| 6263 | int rc = 0; |
| 6264 | u8 reg; |
| 6265 | |
| 6266 | pr_smb(PR_INTERRUPT, "chg-error triggered\n"); |
| 6267 | |
| 6268 | rc = smbchg_read(chip, ®, chip->chgr_base + RT_STS, 1); |
| 6269 | if (rc < 0) { |
| 6270 | dev_err(chip->dev, "Unable to read RT_STS rc = %d\n", rc); |
| 6271 | } else { |
| 6272 | pr_smb(PR_INTERRUPT, "triggered: 0x%02x\n", reg); |
| 6273 | if (reg & CHG_COMP_SFT_BIT) |
| 6274 | set_property_on_fg(chip, |
| 6275 | POWER_SUPPLY_PROP_SAFETY_TIMER_EXPIRED, |
| 6276 | 1); |
| 6277 | } |
| 6278 | |
| 6279 | smbchg_parallel_usb_check_ok(chip); |
| 6280 | if (chip->batt_psy) |
| 6281 | power_supply_changed(chip->batt_psy); |
| 6282 | smbchg_charging_status_change(chip); |
| 6283 | smbchg_wipower_check(chip); |
| 6284 | return IRQ_HANDLED; |
| 6285 | } |
| 6286 | |
| 6287 | static irqreturn_t fastchg_handler(int irq, void *_chip) |
| 6288 | { |
| 6289 | struct smbchg_chip *chip = _chip; |
| 6290 | |
| 6291 | pr_smb(PR_INTERRUPT, "p2f triggered\n"); |
Ashay Jaiswal | 7af2613 | 2016-02-01 18:45:28 +0530 | [diff] [blame] | 6292 | if (is_usb_present(chip) || is_dc_present(chip)) { |
| 6293 | smbchg_detect_parallel_charger(chip); |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 6294 | smbchg_parallel_usb_check_ok(chip); |
Ashay Jaiswal | 7af2613 | 2016-02-01 18:45:28 +0530 | [diff] [blame] | 6295 | } |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 6296 | if (chip->batt_psy) |
| 6297 | power_supply_changed(chip->batt_psy); |
| 6298 | smbchg_charging_status_change(chip); |
| 6299 | smbchg_wipower_check(chip); |
| 6300 | return IRQ_HANDLED; |
| 6301 | } |
| 6302 | |
| 6303 | static irqreturn_t chg_hot_handler(int irq, void *_chip) |
| 6304 | { |
| 6305 | pr_warn_ratelimited("chg hot\n"); |
| 6306 | smbchg_wipower_check(_chip); |
| 6307 | return IRQ_HANDLED; |
| 6308 | } |
| 6309 | |
| 6310 | static irqreturn_t chg_term_handler(int irq, void *_chip) |
| 6311 | { |
| 6312 | struct smbchg_chip *chip = _chip; |
| 6313 | |
| 6314 | pr_smb(PR_INTERRUPT, "tcc triggered\n"); |
| 6315 | /* |
| 6316 | * Charge termination is a pulse and not level triggered. That means, |
| 6317 | * TCC bit in RT_STS can get cleared by the time this interrupt is |
| 6318 | * handled. Instead of relying on that to determine whether the |
| 6319 | * charge termination had happened, we've to simply notify the FG |
| 6320 | * about this as long as the interrupt is handled. |
| 6321 | */ |
| 6322 | set_property_on_fg(chip, POWER_SUPPLY_PROP_CHARGE_DONE, 1); |
| 6323 | |
| 6324 | smbchg_parallel_usb_check_ok(chip); |
| 6325 | if (chip->batt_psy) |
| 6326 | power_supply_changed(chip->batt_psy); |
| 6327 | smbchg_charging_status_change(chip); |
| 6328 | |
| 6329 | return IRQ_HANDLED; |
| 6330 | } |
| 6331 | |
| 6332 | static irqreturn_t taper_handler(int irq, void *_chip) |
| 6333 | { |
| 6334 | struct smbchg_chip *chip = _chip; |
| 6335 | u8 reg = 0; |
| 6336 | |
| 6337 | taper_irq_en(chip, false); |
| 6338 | smbchg_read(chip, ®, chip->chgr_base + RT_STS, 1); |
| 6339 | pr_smb(PR_INTERRUPT, "triggered: 0x%02x\n", reg); |
| 6340 | smbchg_parallel_usb_taper(chip); |
| 6341 | if (chip->batt_psy) |
| 6342 | power_supply_changed(chip->batt_psy); |
| 6343 | smbchg_charging_status_change(chip); |
| 6344 | smbchg_wipower_check(chip); |
| 6345 | return IRQ_HANDLED; |
| 6346 | } |
| 6347 | |
| 6348 | static irqreturn_t recharge_handler(int irq, void *_chip) |
| 6349 | { |
| 6350 | struct smbchg_chip *chip = _chip; |
| 6351 | u8 reg = 0; |
| 6352 | |
| 6353 | smbchg_read(chip, ®, chip->chgr_base + RT_STS, 1); |
| 6354 | pr_smb(PR_INTERRUPT, "triggered: 0x%02x\n", reg); |
| 6355 | smbchg_parallel_usb_check_ok(chip); |
| 6356 | if (chip->batt_psy) |
| 6357 | power_supply_changed(chip->batt_psy); |
| 6358 | smbchg_charging_status_change(chip); |
| 6359 | return IRQ_HANDLED; |
| 6360 | } |
| 6361 | |
| 6362 | static irqreturn_t wdog_timeout_handler(int irq, void *_chip) |
| 6363 | { |
| 6364 | struct smbchg_chip *chip = _chip; |
| 6365 | u8 reg = 0; |
| 6366 | |
| 6367 | smbchg_read(chip, ®, chip->misc_base + RT_STS, 1); |
| 6368 | pr_warn_ratelimited("wdog timeout rt_stat = 0x%02x\n", reg); |
| 6369 | if (chip->batt_psy) |
| 6370 | power_supply_changed(chip->batt_psy); |
| 6371 | smbchg_charging_status_change(chip); |
| 6372 | return IRQ_HANDLED; |
| 6373 | } |
| 6374 | |
| 6375 | /** |
| 6376 | * power_ok_handler() - called when the switcher turns on or turns off |
| 6377 | * @chip: pointer to smbchg_chip |
| 6378 | * @rt_stat: the status bit indicating switcher turning on or off |
| 6379 | */ |
| 6380 | static irqreturn_t power_ok_handler(int irq, void *_chip) |
| 6381 | { |
| 6382 | struct smbchg_chip *chip = _chip; |
| 6383 | u8 reg = 0; |
| 6384 | |
| 6385 | smbchg_read(chip, ®, chip->misc_base + RT_STS, 1); |
| 6386 | pr_smb(PR_INTERRUPT, "triggered: 0x%02x\n", reg); |
| 6387 | return IRQ_HANDLED; |
| 6388 | } |
| 6389 | |
| 6390 | /** |
| 6391 | * dcin_uv_handler() - called when the dc voltage crosses the uv threshold |
| 6392 | * @chip: pointer to smbchg_chip |
| 6393 | * @rt_stat: the status bit indicating whether dc voltage is uv |
| 6394 | */ |
| 6395 | #define DCIN_UNSUSPEND_DELAY_MS 1000 |
| 6396 | static irqreturn_t dcin_uv_handler(int irq, void *_chip) |
| 6397 | { |
| 6398 | struct smbchg_chip *chip = _chip; |
| 6399 | bool dc_present = is_dc_present(chip); |
| 6400 | |
| 6401 | pr_smb(PR_STATUS, "chip->dc_present = %d dc_present = %d\n", |
| 6402 | chip->dc_present, dc_present); |
| 6403 | |
| 6404 | if (chip->dc_present != dc_present) { |
| 6405 | /* dc changed */ |
| 6406 | chip->dc_present = dc_present; |
| 6407 | if (chip->dc_psy_type != -EINVAL && chip->batt_psy) |
| 6408 | power_supply_changed(chip->dc_psy); |
| 6409 | smbchg_charging_status_change(chip); |
| 6410 | smbchg_aicl_deglitch_wa_check(chip); |
| 6411 | chip->vbat_above_headroom = false; |
| 6412 | } |
| 6413 | |
| 6414 | smbchg_wipower_check(chip); |
| 6415 | return IRQ_HANDLED; |
| 6416 | } |
| 6417 | |
| 6418 | /** |
| 6419 | * usbin_ov_handler() - this is called when an overvoltage condition occurs |
| 6420 | * @chip: pointer to smbchg_chip chip |
| 6421 | */ |
| 6422 | static irqreturn_t usbin_ov_handler(int irq, void *_chip) |
| 6423 | { |
| 6424 | struct smbchg_chip *chip = _chip; |
| 6425 | int rc; |
| 6426 | u8 reg; |
| 6427 | bool usb_present; |
| 6428 | |
| 6429 | rc = smbchg_read(chip, ®, chip->usb_chgpth_base + RT_STS, 1); |
| 6430 | if (rc < 0) { |
| 6431 | dev_err(chip->dev, "Couldn't read usb rt status rc = %d\n", rc); |
| 6432 | goto out; |
| 6433 | } |
| 6434 | |
| 6435 | /* OV condition is detected. Notify it to USB psy */ |
| 6436 | if (reg & USBIN_OV_BIT) { |
| 6437 | chip->usb_ov_det = true; |
| 6438 | pr_smb(PR_MISC, "setting usb psy health OV\n"); |
| 6439 | chip->usb_health = POWER_SUPPLY_HEALTH_OVERVOLTAGE; |
| 6440 | power_supply_changed(chip->usb_psy); |
| 6441 | } else { |
| 6442 | chip->usb_ov_det = false; |
| 6443 | /* If USB is present, then handle the USB insertion */ |
| 6444 | usb_present = is_usb_present(chip); |
| 6445 | if (usb_present) |
| 6446 | update_usb_status(chip, usb_present, false); |
| 6447 | } |
| 6448 | out: |
| 6449 | return IRQ_HANDLED; |
| 6450 | } |
| 6451 | |
| 6452 | /** |
| 6453 | * usbin_uv_handler() - this is called when USB charger is removed |
| 6454 | * @chip: pointer to smbchg_chip chip |
| 6455 | * @rt_stat: the status bit indicating chg insertion/removal |
| 6456 | */ |
| 6457 | #define ICL_MODE_MASK SMB_MASK(5, 4) |
| 6458 | #define ICL_MODE_HIGH_CURRENT 0 |
| 6459 | static irqreturn_t usbin_uv_handler(int irq, void *_chip) |
| 6460 | { |
| 6461 | struct smbchg_chip *chip = _chip; |
| 6462 | int aicl_level = smbchg_get_aicl_level_ma(chip); |
| 6463 | int rc; |
| 6464 | u8 reg; |
| 6465 | |
| 6466 | rc = smbchg_read(chip, ®, chip->usb_chgpth_base + RT_STS, 1); |
| 6467 | if (rc) { |
| 6468 | pr_err("could not read rt sts: %d", rc); |
| 6469 | goto out; |
| 6470 | } |
| 6471 | |
| 6472 | pr_smb(PR_STATUS, |
| 6473 | "%s chip->usb_present = %d rt_sts = 0x%02x hvdcp_3_det_ignore_uv = %d aicl = %d\n", |
| 6474 | chip->hvdcp_3_det_ignore_uv ? "Ignoring":"", |
| 6475 | chip->usb_present, reg, chip->hvdcp_3_det_ignore_uv, |
| 6476 | aicl_level); |
| 6477 | |
| 6478 | /* |
| 6479 | * set usb_psy's dp=f dm=f if this is a new insertion, i.e. it is |
| 6480 | * not already src_detected and usbin_uv is seen falling |
| 6481 | */ |
| 6482 | if (!(reg & USBIN_UV_BIT) && !(reg & USBIN_SRC_DET_BIT)) { |
| 6483 | pr_smb(PR_MISC, "setting usb dp=f dm=f\n"); |
| 6484 | if (chip->dpdm_reg && !regulator_is_enabled(chip->dpdm_reg)) |
| 6485 | rc = regulator_enable(chip->dpdm_reg); |
| 6486 | if (rc < 0) { |
| 6487 | pr_err("Couldn't enable DP/DM for pulsing rc=%d\n", rc); |
| 6488 | return rc; |
| 6489 | } |
| 6490 | } |
| 6491 | |
| 6492 | if (reg & USBIN_UV_BIT) |
| 6493 | complete_all(&chip->usbin_uv_raised); |
| 6494 | else |
| 6495 | complete_all(&chip->usbin_uv_lowered); |
| 6496 | |
| 6497 | if (chip->hvdcp_3_det_ignore_uv) |
| 6498 | goto out; |
| 6499 | |
| 6500 | if ((reg & USBIN_UV_BIT) && (reg & USBIN_SRC_DET_BIT)) { |
| 6501 | pr_smb(PR_STATUS, "Very weak charger detected\n"); |
| 6502 | chip->very_weak_charger = true; |
| 6503 | rc = smbchg_read(chip, ®, |
| 6504 | chip->usb_chgpth_base + ICL_STS_2_REG, 1); |
| 6505 | if (rc) { |
| 6506 | dev_err(chip->dev, "Could not read usb icl sts 2: %d\n", |
| 6507 | rc); |
| 6508 | goto out; |
| 6509 | } |
| 6510 | if ((reg & ICL_MODE_MASK) != ICL_MODE_HIGH_CURRENT) { |
| 6511 | /* |
| 6512 | * If AICL is not even enabled, this is either an |
| 6513 | * SDP or a grossly out of spec charger. Do not |
| 6514 | * draw any current from it. |
| 6515 | */ |
| 6516 | rc = vote(chip->usb_suspend_votable, |
| 6517 | WEAK_CHARGER_EN_VOTER, true, 0); |
| 6518 | if (rc < 0) |
| 6519 | pr_err("could not disable charger: %d", rc); |
| 6520 | } else if (aicl_level == chip->tables.usb_ilim_ma_table[0]) { |
| 6521 | /* |
| 6522 | * we are in a situation where the adapter is not able |
| 6523 | * to supply even 300mA. Disable hw aicl reruns else it |
| 6524 | * is only a matter of time when we get back here again |
| 6525 | */ |
| 6526 | rc = vote(chip->hw_aicl_rerun_disable_votable, |
| 6527 | WEAK_CHARGER_HW_AICL_VOTER, true, 0); |
| 6528 | if (rc < 0) |
| 6529 | pr_err("Couldn't disable hw aicl rerun rc=%d\n", |
| 6530 | rc); |
| 6531 | } |
| 6532 | pr_smb(PR_MISC, "setting usb psy health UNSPEC_FAILURE\n"); |
| 6533 | chip->usb_health = POWER_SUPPLY_HEALTH_UNSPEC_FAILURE; |
| 6534 | power_supply_changed(chip->usb_psy); |
| 6535 | schedule_work(&chip->usb_set_online_work); |
| 6536 | } |
| 6537 | |
| 6538 | smbchg_wipower_check(chip); |
| 6539 | out: |
| 6540 | return IRQ_HANDLED; |
| 6541 | } |
| 6542 | |
| 6543 | /** |
| 6544 | * src_detect_handler() - this is called on rising edge when USB charger type |
| 6545 | * is detected and on falling edge when USB voltage falls |
| 6546 | * below the coarse detect voltage(1V), use it for |
| 6547 | * handling USB charger insertion and removal. |
| 6548 | * @chip: pointer to smbchg_chip |
| 6549 | * @rt_stat: the status bit indicating chg insertion/removal |
| 6550 | */ |
| 6551 | static irqreturn_t src_detect_handler(int irq, void *_chip) |
| 6552 | { |
| 6553 | struct smbchg_chip *chip = _chip; |
| 6554 | bool usb_present = is_usb_present(chip); |
| 6555 | bool src_detect = is_src_detect_high(chip); |
| 6556 | int rc; |
| 6557 | |
| 6558 | pr_smb(PR_STATUS, |
| 6559 | "%s chip->usb_present = %d usb_present = %d src_detect = %d hvdcp_3_det_ignore_uv=%d\n", |
| 6560 | chip->hvdcp_3_det_ignore_uv ? "Ignoring":"", |
| 6561 | chip->usb_present, usb_present, src_detect, |
| 6562 | chip->hvdcp_3_det_ignore_uv); |
| 6563 | |
| 6564 | if (src_detect) |
| 6565 | complete_all(&chip->src_det_raised); |
| 6566 | else |
| 6567 | complete_all(&chip->src_det_lowered); |
| 6568 | |
| 6569 | if (chip->hvdcp_3_det_ignore_uv) |
| 6570 | goto out; |
| 6571 | |
| 6572 | /* |
| 6573 | * When VBAT is above the AICL threshold (4.25V) - 180mV (4.07V), |
| 6574 | * an input collapse due to AICL will actually cause an USBIN_UV |
| 6575 | * interrupt to fire as well. |
| 6576 | * |
| 6577 | * Handle USB insertions and removals in the source detect handler |
| 6578 | * instead of the USBIN_UV handler since the latter is untrustworthy |
| 6579 | * when the battery voltage is high. |
| 6580 | */ |
| 6581 | chip->very_weak_charger = false; |
| 6582 | /* |
| 6583 | * a src detect marks a new insertion or a real removal, |
| 6584 | * vote for enable aicl hw reruns |
| 6585 | */ |
| 6586 | rc = vote(chip->hw_aicl_rerun_disable_votable, |
| 6587 | WEAK_CHARGER_HW_AICL_VOTER, false, 0); |
| 6588 | if (rc < 0) |
| 6589 | pr_err("Couldn't enable hw aicl rerun rc=%d\n", rc); |
| 6590 | |
| 6591 | rc = vote(chip->usb_suspend_votable, WEAK_CHARGER_EN_VOTER, false, 0); |
| 6592 | if (rc < 0) |
| 6593 | pr_err("could not enable charger: %d\n", rc); |
| 6594 | |
| 6595 | if (src_detect) { |
| 6596 | update_usb_status(chip, usb_present, 0); |
| 6597 | } else { |
| 6598 | update_usb_status(chip, 0, false); |
| 6599 | chip->aicl_irq_count = 0; |
| 6600 | } |
| 6601 | out: |
| 6602 | return IRQ_HANDLED; |
| 6603 | } |
| 6604 | |
| 6605 | /** |
| 6606 | * otg_oc_handler() - called when the usb otg goes over current |
| 6607 | */ |
| 6608 | #define NUM_OTG_RETRIES 5 |
| 6609 | #define OTG_OC_RETRY_DELAY_US 50000 |
| 6610 | static irqreturn_t otg_oc_handler(int irq, void *_chip) |
| 6611 | { |
| 6612 | int rc; |
| 6613 | struct smbchg_chip *chip = _chip; |
| 6614 | s64 elapsed_us = ktime_us_delta(ktime_get(), chip->otg_enable_time); |
| 6615 | |
| 6616 | pr_smb(PR_INTERRUPT, "triggered\n"); |
| 6617 | |
| 6618 | if (chip->schg_version == QPNP_SCHG_LITE) { |
| 6619 | pr_warn("OTG OC triggered - OTG disabled\n"); |
| 6620 | return IRQ_HANDLED; |
| 6621 | } |
| 6622 | |
| 6623 | if (elapsed_us > OTG_OC_RETRY_DELAY_US) |
| 6624 | chip->otg_retries = 0; |
| 6625 | |
| 6626 | /* |
| 6627 | * Due to a HW bug in the PMI8994 charger, the current inrush that |
| 6628 | * occurs when connecting certain OTG devices can cause the OTG |
| 6629 | * overcurrent protection to trip. |
| 6630 | * |
| 6631 | * The work around is to try reenabling the OTG when getting an |
| 6632 | * overcurrent interrupt once. |
| 6633 | */ |
| 6634 | if (chip->otg_retries < NUM_OTG_RETRIES) { |
| 6635 | chip->otg_retries += 1; |
| 6636 | pr_smb(PR_STATUS, |
| 6637 | "Retrying OTG enable. Try #%d, elapsed_us %lld\n", |
| 6638 | chip->otg_retries, elapsed_us); |
| 6639 | rc = otg_oc_reset(chip); |
| 6640 | if (rc) |
| 6641 | pr_err("Failed to reset OTG OC state rc=%d\n", rc); |
| 6642 | chip->otg_enable_time = ktime_get(); |
| 6643 | } |
| 6644 | return IRQ_HANDLED; |
| 6645 | } |
| 6646 | |
| 6647 | /** |
| 6648 | * otg_fail_handler() - called when the usb otg fails |
| 6649 | * (when vbat < OTG UVLO threshold) |
| 6650 | */ |
| 6651 | static irqreturn_t otg_fail_handler(int irq, void *_chip) |
| 6652 | { |
| 6653 | pr_smb(PR_INTERRUPT, "triggered\n"); |
| 6654 | return IRQ_HANDLED; |
| 6655 | } |
| 6656 | |
| 6657 | /** |
| 6658 | * aicl_done_handler() - called when the usb AICL algorithm is finished |
| 6659 | * and a current is set. |
| 6660 | */ |
| 6661 | static irqreturn_t aicl_done_handler(int irq, void *_chip) |
| 6662 | { |
| 6663 | struct smbchg_chip *chip = _chip; |
| 6664 | bool usb_present = is_usb_present(chip); |
| 6665 | int aicl_level = smbchg_get_aicl_level_ma(chip); |
| 6666 | |
| 6667 | pr_smb(PR_INTERRUPT, "triggered, aicl: %d\n", aicl_level); |
| 6668 | |
| 6669 | increment_aicl_count(chip); |
| 6670 | |
| 6671 | if (usb_present) |
| 6672 | smbchg_parallel_usb_check_ok(chip); |
| 6673 | |
| 6674 | if (chip->aicl_complete && chip->batt_psy) |
| 6675 | power_supply_changed(chip->batt_psy); |
| 6676 | |
| 6677 | return IRQ_HANDLED; |
| 6678 | } |
| 6679 | |
| 6680 | /** |
| 6681 | * usbid_change_handler() - called when the usb RID changes. |
| 6682 | * This is used mostly for detecting OTG |
| 6683 | */ |
| 6684 | static irqreturn_t usbid_change_handler(int irq, void *_chip) |
| 6685 | { |
| 6686 | struct smbchg_chip *chip = _chip; |
| 6687 | bool otg_present; |
| 6688 | |
| 6689 | pr_smb(PR_INTERRUPT, "triggered\n"); |
| 6690 | |
| 6691 | otg_present = is_otg_present(chip); |
| 6692 | pr_smb(PR_MISC, "setting usb psy OTG = %d\n", |
| 6693 | otg_present ? 1 : 0); |
| 6694 | |
| 6695 | extcon_set_cable_state_(chip->extcon, EXTCON_USB_HOST, otg_present); |
| 6696 | |
| 6697 | if (otg_present) |
| 6698 | pr_smb(PR_STATUS, "OTG detected\n"); |
| 6699 | |
| 6700 | /* update FG */ |
| 6701 | set_property_on_fg(chip, POWER_SUPPLY_PROP_STATUS, |
| 6702 | get_prop_batt_status(chip)); |
| 6703 | |
| 6704 | return IRQ_HANDLED; |
| 6705 | } |
| 6706 | |
| 6707 | static int determine_initial_status(struct smbchg_chip *chip) |
| 6708 | { |
| 6709 | union power_supply_propval type = {0, }; |
| 6710 | |
| 6711 | /* |
| 6712 | * It is okay to read the interrupt status here since |
| 6713 | * interrupts aren't requested. reading interrupt status |
| 6714 | * clears the interrupt so be careful to read interrupt |
| 6715 | * status only in interrupt handling code |
| 6716 | */ |
| 6717 | |
| 6718 | batt_pres_handler(0, chip); |
| 6719 | batt_hot_handler(0, chip); |
| 6720 | batt_warm_handler(0, chip); |
| 6721 | batt_cool_handler(0, chip); |
| 6722 | batt_cold_handler(0, chip); |
| 6723 | if (chip->typec_psy) { |
| 6724 | get_property_from_typec(chip, POWER_SUPPLY_PROP_TYPE, &type); |
| 6725 | update_typec_otg_status(chip, type.intval, true); |
| 6726 | } else { |
| 6727 | usbid_change_handler(0, chip); |
| 6728 | } |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 6729 | |
| 6730 | chip->usb_present = is_usb_present(chip); |
| 6731 | chip->dc_present = is_dc_present(chip); |
| 6732 | |
| 6733 | if (chip->usb_present) { |
| 6734 | int rc = 0; |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 6735 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 6736 | pr_smb(PR_MISC, "setting usb dp=f dm=f\n"); |
| 6737 | if (chip->dpdm_reg && !regulator_is_enabled(chip->dpdm_reg)) |
| 6738 | rc = regulator_enable(chip->dpdm_reg); |
| 6739 | if (rc < 0) { |
| 6740 | pr_err("Couldn't enable DP/DM for pulsing rc=%d\n", rc); |
| 6741 | return rc; |
| 6742 | } |
| 6743 | handle_usb_insertion(chip); |
| 6744 | } else { |
| 6745 | handle_usb_removal(chip); |
| 6746 | } |
| 6747 | |
| 6748 | return 0; |
| 6749 | } |
| 6750 | |
| 6751 | static int prechg_time[] = { |
| 6752 | 24, |
| 6753 | 48, |
| 6754 | 96, |
| 6755 | 192, |
| 6756 | }; |
| 6757 | static int chg_time[] = { |
| 6758 | 192, |
| 6759 | 384, |
| 6760 | 768, |
| 6761 | 1536, |
| 6762 | }; |
| 6763 | |
| 6764 | enum bpd_type { |
| 6765 | BPD_TYPE_BAT_NONE, |
| 6766 | BPD_TYPE_BAT_ID, |
| 6767 | BPD_TYPE_BAT_THM, |
| 6768 | BPD_TYPE_BAT_THM_BAT_ID, |
| 6769 | BPD_TYPE_DEFAULT, |
| 6770 | }; |
| 6771 | |
| 6772 | static const char * const bpd_label[] = { |
| 6773 | [BPD_TYPE_BAT_NONE] = "bpd_none", |
| 6774 | [BPD_TYPE_BAT_ID] = "bpd_id", |
| 6775 | [BPD_TYPE_BAT_THM] = "bpd_thm", |
| 6776 | [BPD_TYPE_BAT_THM_BAT_ID] = "bpd_thm_id", |
| 6777 | }; |
| 6778 | |
| 6779 | static inline int get_bpd(const char *name) |
| 6780 | { |
| 6781 | int i = 0; |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 6782 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 6783 | for (i = 0; i < ARRAY_SIZE(bpd_label); i++) { |
| 6784 | if (strcmp(bpd_label[i], name) == 0) |
| 6785 | return i; |
| 6786 | } |
| 6787 | return -EINVAL; |
| 6788 | } |
| 6789 | |
| 6790 | #define REVISION1_REG 0x0 |
| 6791 | #define DIG_MINOR 0 |
| 6792 | #define DIG_MAJOR 1 |
| 6793 | #define ANA_MINOR 2 |
| 6794 | #define ANA_MAJOR 3 |
| 6795 | #define CHGR_CFG1 0xFB |
| 6796 | #define RECHG_THRESHOLD_SRC_BIT BIT(1) |
| 6797 | #define TERM_I_SRC_BIT BIT(2) |
| 6798 | #define TERM_SRC_FG BIT(2) |
| 6799 | #define CHG_INHIB_CFG_REG 0xF7 |
| 6800 | #define CHG_INHIBIT_50MV_VAL 0x00 |
| 6801 | #define CHG_INHIBIT_100MV_VAL 0x01 |
| 6802 | #define CHG_INHIBIT_200MV_VAL 0x02 |
| 6803 | #define CHG_INHIBIT_300MV_VAL 0x03 |
| 6804 | #define CHG_INHIBIT_MASK 0x03 |
| 6805 | #define USE_REGISTER_FOR_CURRENT BIT(2) |
| 6806 | #define CHGR_CFG2 0xFC |
| 6807 | #define CHG_EN_SRC_BIT BIT(7) |
| 6808 | #define CHG_EN_POLARITY_BIT BIT(6) |
| 6809 | #define P2F_CHG_TRAN BIT(5) |
| 6810 | #define CHG_BAT_OV_ECC BIT(4) |
| 6811 | #define I_TERM_BIT BIT(3) |
| 6812 | #define AUTO_RECHG_BIT BIT(2) |
| 6813 | #define CHARGER_INHIBIT_BIT BIT(0) |
| 6814 | #define USB51_COMMAND_POL BIT(2) |
| 6815 | #define USB51AC_CTRL BIT(1) |
| 6816 | #define TR_8OR32B 0xFE |
| 6817 | #define BUCK_8_16_FREQ_BIT BIT(0) |
| 6818 | #define BM_CFG 0xF3 |
| 6819 | #define BATT_MISSING_ALGO_BIT BIT(2) |
| 6820 | #define BMD_PIN_SRC_MASK SMB_MASK(1, 0) |
| 6821 | #define PIN_SRC_SHIFT 0 |
| 6822 | #define CHGR_CFG 0xFF |
| 6823 | #define RCHG_LVL_BIT BIT(0) |
| 6824 | #define VCHG_EN_BIT BIT(1) |
| 6825 | #define VCHG_INPUT_CURRENT_BIT BIT(3) |
| 6826 | #define CFG_AFVC 0xF6 |
| 6827 | #define VFLOAT_COMP_ENABLE_MASK SMB_MASK(2, 0) |
| 6828 | #define TR_RID_REG 0xFA |
| 6829 | #define FG_INPUT_FET_DELAY_BIT BIT(3) |
| 6830 | #define TRIM_OPTIONS_7_0 0xF6 |
| 6831 | #define INPUT_MISSING_POLLER_EN_BIT BIT(3) |
| 6832 | #define CHGR_CCMP_CFG 0xFA |
| 6833 | #define JEITA_TEMP_HARD_LIMIT_BIT BIT(5) |
| 6834 | #define HVDCP_ADAPTER_SEL_MASK SMB_MASK(5, 4) |
| 6835 | #define HVDCP_ADAPTER_SEL_9V_BIT BIT(4) |
| 6836 | #define HVDCP_AUTH_ALG_EN_BIT BIT(6) |
| 6837 | #define CMD_APSD 0x41 |
| 6838 | #define APSD_RERUN_BIT BIT(0) |
| 6839 | #define OTG_CFG 0xF1 |
| 6840 | #define HICCUP_ENABLED_BIT BIT(6) |
| 6841 | #define OTG_PIN_POLARITY_BIT BIT(4) |
| 6842 | #define OTG_PIN_ACTIVE_LOW BIT(4) |
| 6843 | #define OTG_EN_CTRL_MASK SMB_MASK(3, 2) |
| 6844 | #define OTG_PIN_CTRL_RID_DIS 0x04 |
| 6845 | #define OTG_CMD_CTRL_RID_EN 0x08 |
| 6846 | #define AICL_ADC_BIT BIT(6) |
| 6847 | static void batt_ov_wa_check(struct smbchg_chip *chip) |
| 6848 | { |
| 6849 | int rc; |
| 6850 | u8 reg; |
| 6851 | |
| 6852 | /* disable-'battery OV disables charging' feature */ |
| 6853 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + CHGR_CFG2, |
| 6854 | CHG_BAT_OV_ECC, 0); |
| 6855 | if (rc < 0) { |
| 6856 | dev_err(chip->dev, "Couldn't set chgr_cfg2 rc=%d\n", rc); |
| 6857 | return; |
| 6858 | } |
| 6859 | |
| 6860 | /* |
| 6861 | * if battery OV is set: |
| 6862 | * restart charging by disable/enable charging |
| 6863 | */ |
| 6864 | rc = smbchg_read(chip, ®, chip->bat_if_base + RT_STS, 1); |
| 6865 | if (rc < 0) { |
| 6866 | dev_err(chip->dev, |
| 6867 | "Couldn't read Battery RT status rc = %d\n", rc); |
| 6868 | return; |
| 6869 | } |
| 6870 | |
| 6871 | if (reg & BAT_OV_BIT) { |
| 6872 | rc = smbchg_charging_en(chip, false); |
| 6873 | if (rc < 0) { |
| 6874 | dev_err(chip->dev, |
| 6875 | "Couldn't disable charging: rc = %d\n", rc); |
| 6876 | return; |
| 6877 | } |
| 6878 | |
| 6879 | /* delay for charging-disable to take affect */ |
| 6880 | msleep(200); |
| 6881 | |
| 6882 | rc = smbchg_charging_en(chip, true); |
| 6883 | if (rc < 0) { |
| 6884 | dev_err(chip->dev, |
| 6885 | "Couldn't enable charging: rc = %d\n", rc); |
| 6886 | return; |
| 6887 | } |
| 6888 | } |
| 6889 | } |
| 6890 | |
| 6891 | static int smbchg_hw_init(struct smbchg_chip *chip) |
| 6892 | { |
| 6893 | int rc, i; |
| 6894 | u8 reg, mask; |
| 6895 | |
| 6896 | rc = smbchg_read(chip, chip->revision, |
| 6897 | chip->misc_base + REVISION1_REG, 4); |
| 6898 | if (rc < 0) { |
| 6899 | dev_err(chip->dev, "Couldn't read revision rc=%d\n", |
| 6900 | rc); |
| 6901 | return rc; |
| 6902 | } |
| 6903 | pr_smb(PR_STATUS, "Charger Revision DIG: %d.%d; ANA: %d.%d\n", |
| 6904 | chip->revision[DIG_MAJOR], chip->revision[DIG_MINOR], |
| 6905 | chip->revision[ANA_MAJOR], chip->revision[ANA_MINOR]); |
| 6906 | |
| 6907 | /* Setup 9V HVDCP */ |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 6908 | if (chip->hvdcp_not_supported) { |
| 6909 | rc = vote(chip->hvdcp_enable_votable, HVDCP_PMIC_VOTER, |
| 6910 | true, 0); |
| 6911 | if (rc < 0) { |
| 6912 | dev_err(chip->dev, "Couldn't disable HVDCP rc=%d\n", |
| 6913 | rc); |
| 6914 | return rc; |
| 6915 | } |
| 6916 | } else { |
| 6917 | rc = vote(chip->hvdcp_enable_votable, HVDCP_PMIC_VOTER, |
| 6918 | true, 1); |
| 6919 | if (rc < 0) { |
| 6920 | dev_err(chip->dev, "Couldn't enable HVDCP rc=%d\n", |
| 6921 | rc); |
| 6922 | return rc; |
| 6923 | } |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 6924 | rc = smbchg_sec_masked_write(chip, |
| 6925 | chip->usb_chgpth_base + CHGPTH_CFG, |
| 6926 | HVDCP_ADAPTER_SEL_MASK, HVDCP_9V); |
| 6927 | if (rc < 0) { |
| 6928 | pr_err("Couldn't set hvdcp config in chgpath_chg rc=%d\n", |
| 6929 | rc); |
| 6930 | return rc; |
| 6931 | } |
| 6932 | } |
| 6933 | |
| 6934 | if (chip->aicl_rerun_period_s > 0) { |
| 6935 | rc = smbchg_set_aicl_rerun_period_s(chip, |
| 6936 | chip->aicl_rerun_period_s); |
| 6937 | if (rc < 0) { |
| 6938 | dev_err(chip->dev, "Couldn't set AICL rerun timer rc=%d\n", |
| 6939 | rc); |
| 6940 | return rc; |
| 6941 | } |
| 6942 | } |
| 6943 | |
| 6944 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + TR_RID_REG, |
| 6945 | FG_INPUT_FET_DELAY_BIT, FG_INPUT_FET_DELAY_BIT); |
| 6946 | if (rc < 0) { |
| 6947 | dev_err(chip->dev, "Couldn't disable fg input fet delay rc=%d\n", |
| 6948 | rc); |
| 6949 | return rc; |
| 6950 | } |
| 6951 | |
| 6952 | rc = smbchg_sec_masked_write(chip, chip->misc_base + TRIM_OPTIONS_7_0, |
| 6953 | INPUT_MISSING_POLLER_EN_BIT, |
| 6954 | INPUT_MISSING_POLLER_EN_BIT); |
| 6955 | if (rc < 0) { |
| 6956 | dev_err(chip->dev, "Couldn't enable input missing poller rc=%d\n", |
| 6957 | rc); |
| 6958 | return rc; |
| 6959 | } |
| 6960 | |
| 6961 | /* |
| 6962 | * Do not force using current from the register i.e. use auto |
| 6963 | * power source detect (APSD) mA ratings for the initial current values. |
| 6964 | * |
| 6965 | * If this is set, AICL will not rerun at 9V for HVDCPs |
| 6966 | */ |
| 6967 | rc = smbchg_masked_write(chip, chip->usb_chgpth_base + CMD_IL, |
| 6968 | USE_REGISTER_FOR_CURRENT, 0); |
| 6969 | |
| 6970 | if (rc < 0) { |
| 6971 | dev_err(chip->dev, "Couldn't set input limit cmd rc=%d\n", rc); |
| 6972 | return rc; |
| 6973 | } |
| 6974 | |
| 6975 | /* |
| 6976 | * set chg en by cmd register, set chg en by writing bit 1, |
| 6977 | * enable auto pre to fast, enable auto recharge by default. |
| 6978 | * enable current termination and charge inhibition based on |
| 6979 | * the device tree configuration. |
| 6980 | */ |
| 6981 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + CHGR_CFG2, |
| 6982 | CHG_EN_SRC_BIT | CHG_EN_POLARITY_BIT | P2F_CHG_TRAN |
| 6983 | | I_TERM_BIT | AUTO_RECHG_BIT | CHARGER_INHIBIT_BIT, |
| 6984 | CHG_EN_POLARITY_BIT |
| 6985 | | (chip->chg_inhibit_en ? CHARGER_INHIBIT_BIT : 0) |
| 6986 | | (chip->iterm_disabled ? I_TERM_BIT : 0)); |
| 6987 | if (rc < 0) { |
| 6988 | dev_err(chip->dev, "Couldn't set chgr_cfg2 rc=%d\n", rc); |
| 6989 | return rc; |
| 6990 | } |
| 6991 | |
| 6992 | /* |
| 6993 | * enable battery charging to make sure it hasn't been changed earlier |
| 6994 | * by the bootloader. |
| 6995 | */ |
| 6996 | rc = smbchg_charging_en(chip, true); |
| 6997 | if (rc < 0) { |
| 6998 | dev_err(chip->dev, "Couldn't enable battery charging=%d\n", rc); |
| 6999 | return rc; |
| 7000 | } |
| 7001 | |
| 7002 | /* |
| 7003 | * Based on the configuration, use the analog sensors or the fuelgauge |
| 7004 | * adc for recharge threshold source. |
| 7005 | */ |
| 7006 | |
| 7007 | if (chip->chg_inhibit_source_fg) |
| 7008 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + CHGR_CFG1, |
| 7009 | TERM_I_SRC_BIT | RECHG_THRESHOLD_SRC_BIT, |
| 7010 | TERM_SRC_FG | RECHG_THRESHOLD_SRC_BIT); |
| 7011 | else |
| 7012 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + CHGR_CFG1, |
| 7013 | TERM_I_SRC_BIT | RECHG_THRESHOLD_SRC_BIT, 0); |
| 7014 | |
| 7015 | if (rc < 0) { |
| 7016 | dev_err(chip->dev, "Couldn't set chgr_cfg2 rc=%d\n", rc); |
| 7017 | return rc; |
| 7018 | } |
| 7019 | |
| 7020 | /* |
| 7021 | * control USB suspend via command bits and set correct 100/500mA |
| 7022 | * polarity on the usb current |
| 7023 | */ |
| 7024 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + CHGPTH_CFG, |
| 7025 | USB51_COMMAND_POL | USB51AC_CTRL, 0); |
| 7026 | if (rc < 0) { |
| 7027 | dev_err(chip->dev, "Couldn't set usb_chgpth cfg rc=%d\n", rc); |
| 7028 | return rc; |
| 7029 | } |
| 7030 | |
| 7031 | check_battery_type(chip); |
| 7032 | |
| 7033 | /* set the float voltage */ |
| 7034 | if (chip->vfloat_mv != -EINVAL) { |
| 7035 | rc = smbchg_float_voltage_set(chip, chip->vfloat_mv); |
| 7036 | if (rc < 0) { |
| 7037 | dev_err(chip->dev, |
| 7038 | "Couldn't set float voltage rc = %d\n", rc); |
| 7039 | return rc; |
| 7040 | } |
| 7041 | pr_smb(PR_STATUS, "set vfloat to %d\n", chip->vfloat_mv); |
| 7042 | } |
| 7043 | |
| 7044 | /* set the fast charge current compensation */ |
| 7045 | if (chip->fastchg_current_comp != -EINVAL) { |
| 7046 | rc = smbchg_fastchg_current_comp_set(chip, |
| 7047 | chip->fastchg_current_comp); |
| 7048 | if (rc < 0) { |
| 7049 | dev_err(chip->dev, "Couldn't set fastchg current comp rc = %d\n", |
| 7050 | rc); |
| 7051 | return rc; |
| 7052 | } |
| 7053 | pr_smb(PR_STATUS, "set fastchg current comp to %d\n", |
| 7054 | chip->fastchg_current_comp); |
| 7055 | } |
| 7056 | |
| 7057 | /* set the float voltage compensation */ |
| 7058 | if (chip->float_voltage_comp != -EINVAL) { |
| 7059 | rc = smbchg_float_voltage_comp_set(chip, |
| 7060 | chip->float_voltage_comp); |
| 7061 | if (rc < 0) { |
| 7062 | dev_err(chip->dev, "Couldn't set float voltage comp rc = %d\n", |
| 7063 | rc); |
| 7064 | return rc; |
| 7065 | } |
| 7066 | pr_smb(PR_STATUS, "set float voltage comp to %d\n", |
| 7067 | chip->float_voltage_comp); |
| 7068 | } |
| 7069 | |
| 7070 | /* set iterm */ |
| 7071 | if (chip->iterm_ma != -EINVAL) { |
| 7072 | if (chip->iterm_disabled) { |
| 7073 | dev_err(chip->dev, "Error: Both iterm_disabled and iterm_ma set\n"); |
| 7074 | return -EINVAL; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7075 | } |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 7076 | |
| 7077 | smbchg_iterm_set(chip, chip->iterm_ma); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7078 | } |
| 7079 | |
| 7080 | /* set the safety time voltage */ |
| 7081 | if (chip->safety_time != -EINVAL) { |
| 7082 | reg = (chip->safety_time > 0 ? 0 : SFT_TIMER_DISABLE_BIT) | |
| 7083 | (chip->prechg_safety_time > 0 |
| 7084 | ? 0 : PRECHG_SFT_TIMER_DISABLE_BIT); |
| 7085 | |
| 7086 | for (i = 0; i < ARRAY_SIZE(chg_time); i++) { |
| 7087 | if (chip->safety_time <= chg_time[i]) { |
| 7088 | reg |= i << SAFETY_TIME_MINUTES_SHIFT; |
| 7089 | break; |
| 7090 | } |
| 7091 | } |
| 7092 | for (i = 0; i < ARRAY_SIZE(prechg_time); i++) { |
| 7093 | if (chip->prechg_safety_time <= prechg_time[i]) { |
| 7094 | reg |= i; |
| 7095 | break; |
| 7096 | } |
| 7097 | } |
| 7098 | |
| 7099 | rc = smbchg_sec_masked_write(chip, |
| 7100 | chip->chgr_base + SFT_CFG, |
| 7101 | SFT_EN_MASK | SFT_TO_MASK | |
| 7102 | (chip->prechg_safety_time > 0 |
| 7103 | ? PRECHG_SFT_TO_MASK : 0), reg); |
| 7104 | if (rc < 0) { |
| 7105 | dev_err(chip->dev, |
| 7106 | "Couldn't set safety timer rc = %d\n", |
| 7107 | rc); |
| 7108 | return rc; |
| 7109 | } |
| 7110 | chip->safety_timer_en = true; |
| 7111 | } else { |
| 7112 | rc = smbchg_read(chip, ®, chip->chgr_base + SFT_CFG, 1); |
| 7113 | if (rc < 0) |
| 7114 | dev_err(chip->dev, "Unable to read SFT_CFG rc = %d\n", |
| 7115 | rc); |
| 7116 | else if (!(reg & SFT_EN_MASK)) |
| 7117 | chip->safety_timer_en = true; |
| 7118 | } |
| 7119 | |
| 7120 | /* configure jeita temperature hard limit */ |
| 7121 | if (chip->jeita_temp_hard_limit >= 0) { |
| 7122 | rc = smbchg_sec_masked_write(chip, |
| 7123 | chip->chgr_base + CHGR_CCMP_CFG, |
| 7124 | JEITA_TEMP_HARD_LIMIT_BIT, |
| 7125 | chip->jeita_temp_hard_limit |
| 7126 | ? 0 : JEITA_TEMP_HARD_LIMIT_BIT); |
| 7127 | if (rc < 0) { |
| 7128 | dev_err(chip->dev, |
| 7129 | "Couldn't set jeita temp hard limit rc = %d\n", |
| 7130 | rc); |
| 7131 | return rc; |
| 7132 | } |
| 7133 | } |
| 7134 | |
| 7135 | /* make the buck switch faster to prevent some vbus oscillation */ |
| 7136 | rc = smbchg_sec_masked_write(chip, |
| 7137 | chip->usb_chgpth_base + TR_8OR32B, |
| 7138 | BUCK_8_16_FREQ_BIT, 0); |
| 7139 | if (rc < 0) { |
| 7140 | dev_err(chip->dev, "Couldn't set buck frequency rc = %d\n", rc); |
| 7141 | return rc; |
| 7142 | } |
| 7143 | |
| 7144 | /* battery missing detection */ |
| 7145 | mask = BATT_MISSING_ALGO_BIT; |
| 7146 | reg = chip->bmd_algo_disabled ? 0 : BATT_MISSING_ALGO_BIT; |
| 7147 | if (chip->bmd_pin_src < BPD_TYPE_DEFAULT) { |
| 7148 | mask |= BMD_PIN_SRC_MASK; |
| 7149 | reg |= chip->bmd_pin_src << PIN_SRC_SHIFT; |
| 7150 | } |
| 7151 | rc = smbchg_sec_masked_write(chip, |
| 7152 | chip->bat_if_base + BM_CFG, mask, reg); |
| 7153 | if (rc < 0) { |
| 7154 | dev_err(chip->dev, "Couldn't set batt_missing config = %d\n", |
| 7155 | rc); |
| 7156 | return rc; |
| 7157 | } |
| 7158 | |
| 7159 | if (chip->vchg_adc_channel != -EINVAL) { |
| 7160 | /* configure and enable VCHG */ |
| 7161 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + CHGR_CFG, |
| 7162 | VCHG_INPUT_CURRENT_BIT | VCHG_EN_BIT, |
| 7163 | VCHG_INPUT_CURRENT_BIT | VCHG_EN_BIT); |
| 7164 | if (rc < 0) { |
| 7165 | dev_err(chip->dev, "Couldn't set recharge rc = %d\n", |
| 7166 | rc); |
| 7167 | return rc; |
| 7168 | } |
| 7169 | } |
| 7170 | |
| 7171 | smbchg_charging_status_change(chip); |
| 7172 | |
| 7173 | vote(chip->usb_suspend_votable, USER_EN_VOTER, !chip->chg_enabled, 0); |
| 7174 | vote(chip->dc_suspend_votable, USER_EN_VOTER, !chip->chg_enabled, 0); |
| 7175 | /* resume threshold */ |
| 7176 | if (chip->resume_delta_mv != -EINVAL) { |
| 7177 | |
| 7178 | /* |
| 7179 | * Configure only if the recharge threshold source is not |
| 7180 | * fuel gauge ADC. |
| 7181 | */ |
| 7182 | if (!chip->chg_inhibit_source_fg) { |
| 7183 | if (chip->resume_delta_mv < 100) |
| 7184 | reg = CHG_INHIBIT_50MV_VAL; |
| 7185 | else if (chip->resume_delta_mv < 200) |
| 7186 | reg = CHG_INHIBIT_100MV_VAL; |
| 7187 | else if (chip->resume_delta_mv < 300) |
| 7188 | reg = CHG_INHIBIT_200MV_VAL; |
| 7189 | else |
| 7190 | reg = CHG_INHIBIT_300MV_VAL; |
| 7191 | |
| 7192 | rc = smbchg_sec_masked_write(chip, |
| 7193 | chip->chgr_base + CHG_INHIB_CFG_REG, |
| 7194 | CHG_INHIBIT_MASK, reg); |
| 7195 | if (rc < 0) { |
| 7196 | dev_err(chip->dev, "Couldn't set inhibit val rc = %d\n", |
| 7197 | rc); |
| 7198 | return rc; |
| 7199 | } |
| 7200 | } |
| 7201 | |
| 7202 | rc = smbchg_sec_masked_write(chip, |
| 7203 | chip->chgr_base + CHGR_CFG, |
| 7204 | RCHG_LVL_BIT, |
| 7205 | (chip->resume_delta_mv |
| 7206 | < chip->tables.rchg_thr_mv) |
| 7207 | ? 0 : RCHG_LVL_BIT); |
| 7208 | if (rc < 0) { |
| 7209 | dev_err(chip->dev, "Couldn't set recharge rc = %d\n", |
| 7210 | rc); |
| 7211 | return rc; |
| 7212 | } |
| 7213 | } |
| 7214 | |
| 7215 | /* DC path current settings */ |
| 7216 | if (chip->dc_psy_type != -EINVAL) { |
| 7217 | rc = vote(chip->dc_icl_votable, PSY_ICL_VOTER, true, |
| 7218 | chip->dc_target_current_ma); |
| 7219 | if (rc < 0) { |
| 7220 | dev_err(chip->dev, |
| 7221 | "Couldn't vote for initial DC ICL rc=%d\n", rc); |
| 7222 | return rc; |
| 7223 | } |
| 7224 | } |
| 7225 | |
| 7226 | |
| 7227 | /* |
| 7228 | * on some devices the battery is powered via external sources which |
| 7229 | * could raise its voltage above the float voltage. smbchargers go |
| 7230 | * in to reverse boost in such a situation and the workaround is to |
| 7231 | * disable float voltage compensation (note that the battery will appear |
| 7232 | * hot/cold when powered via external source). |
| 7233 | */ |
| 7234 | if (chip->soft_vfloat_comp_disabled) { |
| 7235 | rc = smbchg_sec_masked_write(chip, chip->chgr_base + CFG_AFVC, |
| 7236 | VFLOAT_COMP_ENABLE_MASK, 0); |
| 7237 | if (rc < 0) { |
| 7238 | dev_err(chip->dev, "Couldn't disable soft vfloat rc = %d\n", |
| 7239 | rc); |
| 7240 | return rc; |
| 7241 | } |
| 7242 | } |
| 7243 | |
| 7244 | rc = vote(chip->fcc_votable, BATT_TYPE_FCC_VOTER, true, |
| 7245 | chip->cfg_fastchg_current_ma); |
| 7246 | if (rc < 0) { |
| 7247 | dev_err(chip->dev, "Couldn't vote fastchg ma rc = %d\n", rc); |
| 7248 | return rc; |
| 7249 | } |
| 7250 | |
| 7251 | rc = smbchg_read(chip, &chip->original_usbin_allowance, |
| 7252 | chip->usb_chgpth_base + USBIN_CHGR_CFG, 1); |
| 7253 | if (rc < 0) |
| 7254 | dev_err(chip->dev, "Couldn't read usb allowance rc=%d\n", rc); |
| 7255 | |
| 7256 | if (chip->wipower_dyn_icl_avail) { |
| 7257 | rc = smbchg_wipower_ilim_config(chip, |
| 7258 | &(chip->wipower_default.entries[0])); |
| 7259 | if (rc < 0) { |
| 7260 | dev_err(chip->dev, "Couldn't set default wipower ilim = %d\n", |
| 7261 | rc); |
| 7262 | return rc; |
| 7263 | } |
| 7264 | } |
| 7265 | /* unsuspend dc path, it could be suspended by the bootloader */ |
| 7266 | rc = smbchg_dc_suspend(chip, 0); |
| 7267 | if (rc < 0) { |
| 7268 | dev_err(chip->dev, "Couldn't unsuspend dc path= %d\n", rc); |
| 7269 | return rc; |
| 7270 | } |
| 7271 | |
| 7272 | if (chip->force_aicl_rerun) { |
| 7273 | /* vote to enable hw aicl */ |
| 7274 | rc = vote(chip->hw_aicl_rerun_enable_indirect_votable, |
| 7275 | DEFAULT_CONFIG_HW_AICL_VOTER, true, 0); |
| 7276 | if (rc < 0) { |
| 7277 | pr_err("Couldn't vote enable hw aicl rerun rc=%d\n", |
| 7278 | rc); |
| 7279 | return rc; |
| 7280 | } |
| 7281 | } |
| 7282 | |
| 7283 | if (chip->schg_version == QPNP_SCHG_LITE) { |
| 7284 | /* enable OTG hiccup mode */ |
| 7285 | rc = smbchg_sec_masked_write(chip, chip->otg_base + OTG_CFG, |
| 7286 | HICCUP_ENABLED_BIT, HICCUP_ENABLED_BIT); |
| 7287 | if (rc < 0) |
| 7288 | dev_err(chip->dev, "Couldn't set OTG OC config rc = %d\n", |
| 7289 | rc); |
| 7290 | } |
| 7291 | |
| 7292 | if (chip->otg_pinctrl) { |
| 7293 | /* configure OTG enable to pin control active low */ |
| 7294 | rc = smbchg_sec_masked_write(chip, chip->otg_base + OTG_CFG, |
| 7295 | OTG_PIN_POLARITY_BIT | OTG_EN_CTRL_MASK, |
| 7296 | OTG_PIN_ACTIVE_LOW | OTG_PIN_CTRL_RID_DIS); |
| 7297 | if (rc < 0) { |
| 7298 | dev_err(chip->dev, "Couldn't set OTG EN config rc = %d\n", |
| 7299 | rc); |
| 7300 | return rc; |
| 7301 | } |
| 7302 | } |
| 7303 | |
| 7304 | if (chip->wa_flags & SMBCHG_BATT_OV_WA) |
| 7305 | batt_ov_wa_check(chip); |
| 7306 | |
| 7307 | /* turn off AICL adc for improved accuracy */ |
| 7308 | rc = smbchg_sec_masked_write(chip, |
| 7309 | chip->misc_base + MISC_TRIM_OPT_15_8, AICL_ADC_BIT, 0); |
| 7310 | if (rc) |
| 7311 | pr_err("Couldn't write to MISC_TRIM_OPTIONS_15_8 rc=%d\n", |
| 7312 | rc); |
| 7313 | |
| 7314 | return rc; |
| 7315 | } |
| 7316 | |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 7317 | static const struct of_device_id smbchg_match_table[] = { |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7318 | { |
| 7319 | .compatible = "qcom,qpnp-smbcharger", |
| 7320 | }, |
| 7321 | { }, |
| 7322 | }; |
| 7323 | |
| 7324 | #define DC_MA_MIN 300 |
| 7325 | #define DC_MA_MAX 2000 |
| 7326 | #define OF_PROP_READ(chip, prop, dt_property, retval, optional) \ |
| 7327 | do { \ |
| 7328 | if (retval) \ |
| 7329 | break; \ |
| 7330 | if (optional) \ |
| 7331 | prop = -EINVAL; \ |
| 7332 | \ |
| 7333 | retval = of_property_read_u32(chip->pdev->dev.of_node, \ |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 7334 | "qcom," dt_property, \ |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7335 | &prop); \ |
| 7336 | \ |
| 7337 | if ((retval == -EINVAL) && optional) \ |
| 7338 | retval = 0; \ |
| 7339 | else if (retval) \ |
| 7340 | dev_err(chip->dev, "Error reading " #dt_property \ |
| 7341 | " property rc = %d\n", rc); \ |
| 7342 | } while (0) |
| 7343 | |
| 7344 | #define ILIM_ENTRIES 3 |
| 7345 | #define VOLTAGE_RANGE_ENTRIES 2 |
| 7346 | #define RANGE_ENTRY (ILIM_ENTRIES + VOLTAGE_RANGE_ENTRIES) |
| 7347 | static int smb_parse_wipower_map_dt(struct smbchg_chip *chip, |
| 7348 | struct ilim_map *map, char *property) |
| 7349 | { |
| 7350 | struct device_node *node = chip->dev->of_node; |
| 7351 | int total_elements, size; |
| 7352 | struct property *prop; |
| 7353 | const __be32 *data; |
| 7354 | int num, i; |
| 7355 | |
| 7356 | prop = of_find_property(node, property, &size); |
| 7357 | if (!prop) { |
| 7358 | dev_err(chip->dev, "%s missing\n", property); |
| 7359 | return -EINVAL; |
| 7360 | } |
| 7361 | |
| 7362 | total_elements = size / sizeof(int); |
| 7363 | if (total_elements % RANGE_ENTRY) { |
| 7364 | dev_err(chip->dev, "%s table not in multiple of %d, total elements = %d\n", |
| 7365 | property, RANGE_ENTRY, total_elements); |
| 7366 | return -EINVAL; |
| 7367 | } |
| 7368 | |
| 7369 | data = prop->value; |
| 7370 | num = total_elements / RANGE_ENTRY; |
| 7371 | map->entries = devm_kzalloc(chip->dev, |
| 7372 | num * sizeof(struct ilim_entry), GFP_KERNEL); |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 7373 | if (!map->entries) |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7374 | return -ENOMEM; |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 7375 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7376 | for (i = 0; i < num; i++) { |
| 7377 | map->entries[i].vmin_uv = be32_to_cpup(data++); |
| 7378 | map->entries[i].vmax_uv = be32_to_cpup(data++); |
| 7379 | map->entries[i].icl_pt_ma = be32_to_cpup(data++); |
| 7380 | map->entries[i].icl_lv_ma = be32_to_cpup(data++); |
| 7381 | map->entries[i].icl_hv_ma = be32_to_cpup(data++); |
| 7382 | } |
| 7383 | map->num = num; |
| 7384 | return 0; |
| 7385 | } |
| 7386 | |
| 7387 | static int smb_parse_wipower_dt(struct smbchg_chip *chip) |
| 7388 | { |
| 7389 | int rc = 0; |
| 7390 | |
| 7391 | chip->wipower_dyn_icl_avail = false; |
| 7392 | |
| 7393 | if (!chip->vadc_dev) |
| 7394 | goto err; |
| 7395 | |
| 7396 | rc = smb_parse_wipower_map_dt(chip, &chip->wipower_default, |
| 7397 | "qcom,wipower-default-ilim-map"); |
| 7398 | if (rc) { |
| 7399 | dev_err(chip->dev, "failed to parse wipower-pt-ilim-map rc = %d\n", |
| 7400 | rc); |
| 7401 | goto err; |
| 7402 | } |
| 7403 | |
| 7404 | rc = smb_parse_wipower_map_dt(chip, &chip->wipower_pt, |
| 7405 | "qcom,wipower-pt-ilim-map"); |
| 7406 | if (rc) { |
| 7407 | dev_err(chip->dev, "failed to parse wipower-pt-ilim-map rc = %d\n", |
| 7408 | rc); |
| 7409 | goto err; |
| 7410 | } |
| 7411 | |
| 7412 | rc = smb_parse_wipower_map_dt(chip, &chip->wipower_div2, |
| 7413 | "qcom,wipower-div2-ilim-map"); |
| 7414 | if (rc) { |
| 7415 | dev_err(chip->dev, "failed to parse wipower-div2-ilim-map rc = %d\n", |
| 7416 | rc); |
| 7417 | goto err; |
| 7418 | } |
| 7419 | chip->wipower_dyn_icl_avail = true; |
| 7420 | return 0; |
| 7421 | err: |
| 7422 | chip->wipower_default.num = 0; |
| 7423 | chip->wipower_pt.num = 0; |
| 7424 | chip->wipower_default.num = 0; |
| 7425 | if (chip->wipower_default.entries) |
| 7426 | devm_kfree(chip->dev, chip->wipower_default.entries); |
| 7427 | if (chip->wipower_pt.entries) |
| 7428 | devm_kfree(chip->dev, chip->wipower_pt.entries); |
| 7429 | if (chip->wipower_div2.entries) |
| 7430 | devm_kfree(chip->dev, chip->wipower_div2.entries); |
| 7431 | chip->wipower_default.entries = NULL; |
| 7432 | chip->wipower_pt.entries = NULL; |
| 7433 | chip->wipower_div2.entries = NULL; |
| 7434 | chip->vadc_dev = NULL; |
| 7435 | return rc; |
| 7436 | } |
| 7437 | |
| 7438 | #define DEFAULT_VLED_MAX_UV 3500000 |
| 7439 | #define DEFAULT_FCC_MA 2000 |
Anirudh Ghayal | 88c9197 | 2016-08-04 08:15:39 +0530 | [diff] [blame] | 7440 | #define DEFAULT_NUM_OF_PULSE_ALLOWED 20 |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7441 | static int smb_parse_dt(struct smbchg_chip *chip) |
| 7442 | { |
| 7443 | int rc = 0, ocp_thresh = -EINVAL; |
| 7444 | struct device_node *node = chip->dev->of_node; |
| 7445 | const char *dc_psy_type, *bpd; |
| 7446 | |
| 7447 | if (!node) { |
| 7448 | dev_err(chip->dev, "device tree info. missing\n"); |
| 7449 | return -EINVAL; |
| 7450 | } |
| 7451 | |
| 7452 | /* read optional u32 properties */ |
| 7453 | OF_PROP_READ(chip, ocp_thresh, |
| 7454 | "ibat-ocp-threshold-ua", rc, 1); |
| 7455 | if (ocp_thresh >= 0) |
| 7456 | smbchg_ibat_ocp_threshold_ua = ocp_thresh; |
| 7457 | OF_PROP_READ(chip, chip->iterm_ma, "iterm-ma", rc, 1); |
| 7458 | OF_PROP_READ(chip, chip->cfg_fastchg_current_ma, |
| 7459 | "fastchg-current-ma", rc, 1); |
| 7460 | if (chip->cfg_fastchg_current_ma == -EINVAL) |
| 7461 | chip->cfg_fastchg_current_ma = DEFAULT_FCC_MA; |
| 7462 | OF_PROP_READ(chip, chip->vfloat_mv, "float-voltage-mv", rc, 1); |
| 7463 | OF_PROP_READ(chip, chip->safety_time, "charging-timeout-mins", rc, 1); |
| 7464 | OF_PROP_READ(chip, chip->vled_max_uv, "vled-max-uv", rc, 1); |
| 7465 | if (chip->vled_max_uv < 0) |
| 7466 | chip->vled_max_uv = DEFAULT_VLED_MAX_UV; |
| 7467 | OF_PROP_READ(chip, chip->rpara_uohm, "rparasitic-uohm", rc, 1); |
| 7468 | if (chip->rpara_uohm < 0) |
| 7469 | chip->rpara_uohm = 0; |
| 7470 | OF_PROP_READ(chip, chip->prechg_safety_time, "precharging-timeout-mins", |
| 7471 | rc, 1); |
| 7472 | OF_PROP_READ(chip, chip->fastchg_current_comp, "fastchg-current-comp", |
| 7473 | rc, 1); |
| 7474 | OF_PROP_READ(chip, chip->float_voltage_comp, "float-voltage-comp", |
| 7475 | rc, 1); |
| 7476 | if (chip->safety_time != -EINVAL && |
| 7477 | (chip->safety_time > chg_time[ARRAY_SIZE(chg_time) - 1])) { |
| 7478 | dev_err(chip->dev, "Bad charging-timeout-mins %d\n", |
| 7479 | chip->safety_time); |
| 7480 | return -EINVAL; |
| 7481 | } |
| 7482 | if (chip->prechg_safety_time != -EINVAL && |
| 7483 | (chip->prechg_safety_time > |
| 7484 | prechg_time[ARRAY_SIZE(prechg_time) - 1])) { |
| 7485 | dev_err(chip->dev, "Bad precharging-timeout-mins %d\n", |
| 7486 | chip->prechg_safety_time); |
| 7487 | return -EINVAL; |
| 7488 | } |
| 7489 | OF_PROP_READ(chip, chip->resume_delta_mv, "resume-delta-mv", rc, 1); |
| 7490 | OF_PROP_READ(chip, chip->parallel.min_current_thr_ma, |
| 7491 | "parallel-usb-min-current-ma", rc, 1); |
| 7492 | OF_PROP_READ(chip, chip->parallel.min_9v_current_thr_ma, |
| 7493 | "parallel-usb-9v-min-current-ma", rc, 1); |
| 7494 | OF_PROP_READ(chip, chip->parallel.allowed_lowering_ma, |
| 7495 | "parallel-allowed-lowering-ma", rc, 1); |
| 7496 | if (chip->parallel.min_current_thr_ma != -EINVAL |
| 7497 | && chip->parallel.min_9v_current_thr_ma != -EINVAL) |
| 7498 | chip->parallel.avail = true; |
Anirudh Ghayal | 88c9197 | 2016-08-04 08:15:39 +0530 | [diff] [blame] | 7499 | |
| 7500 | OF_PROP_READ(chip, chip->max_pulse_allowed, |
| 7501 | "max-pulse-allowed", rc, 1); |
| 7502 | if (chip->max_pulse_allowed == -EINVAL) |
| 7503 | chip->max_pulse_allowed = DEFAULT_NUM_OF_PULSE_ALLOWED; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7504 | /* |
| 7505 | * use the dt values if they exist, otherwise do not touch the params |
| 7506 | */ |
| 7507 | of_property_read_u32(node, "qcom,parallel-main-chg-fcc-percent", |
| 7508 | &smbchg_main_chg_fcc_percent); |
| 7509 | of_property_read_u32(node, "qcom,parallel-main-chg-icl-percent", |
| 7510 | &smbchg_main_chg_icl_percent); |
| 7511 | pr_smb(PR_STATUS, "parallel usb thr: %d, 9v thr: %d\n", |
| 7512 | chip->parallel.min_current_thr_ma, |
| 7513 | chip->parallel.min_9v_current_thr_ma); |
| 7514 | OF_PROP_READ(chip, chip->jeita_temp_hard_limit, |
| 7515 | "jeita-temp-hard-limit", rc, 1); |
| 7516 | OF_PROP_READ(chip, chip->aicl_rerun_period_s, |
| 7517 | "aicl-rerun-period-s", rc, 1); |
| 7518 | OF_PROP_READ(chip, chip->vchg_adc_channel, |
| 7519 | "vchg-adc-channel-id", rc, 1); |
| 7520 | |
| 7521 | /* read boolean configuration properties */ |
| 7522 | chip->use_vfloat_adjustments = of_property_read_bool(node, |
| 7523 | "qcom,autoadjust-vfloat"); |
| 7524 | chip->bmd_algo_disabled = of_property_read_bool(node, |
| 7525 | "qcom,bmd-algo-disabled"); |
| 7526 | chip->iterm_disabled = of_property_read_bool(node, |
| 7527 | "qcom,iterm-disabled"); |
| 7528 | chip->soft_vfloat_comp_disabled = of_property_read_bool(node, |
| 7529 | "qcom,soft-vfloat-comp-disabled"); |
| 7530 | chip->chg_enabled = !(of_property_read_bool(node, |
| 7531 | "qcom,charging-disabled")); |
| 7532 | chip->charge_unknown_battery = of_property_read_bool(node, |
| 7533 | "qcom,charge-unknown-battery"); |
| 7534 | chip->chg_inhibit_en = of_property_read_bool(node, |
| 7535 | "qcom,chg-inhibit-en"); |
| 7536 | chip->chg_inhibit_source_fg = of_property_read_bool(node, |
| 7537 | "qcom,chg-inhibit-fg"); |
| 7538 | chip->low_volt_dcin = of_property_read_bool(node, |
| 7539 | "qcom,low-volt-dcin"); |
| 7540 | chip->force_aicl_rerun = of_property_read_bool(node, |
| 7541 | "qcom,force-aicl-rerun"); |
| 7542 | chip->skip_usb_suspend_for_fake_battery = of_property_read_bool(node, |
| 7543 | "qcom,skip-usb-suspend-for-fake-battery"); |
| 7544 | |
| 7545 | /* parse the battery missing detection pin source */ |
| 7546 | rc = of_property_read_string(chip->pdev->dev.of_node, |
| 7547 | "qcom,bmd-pin-src", &bpd); |
| 7548 | if (rc) { |
| 7549 | /* Select BAT_THM as default BPD scheme */ |
| 7550 | chip->bmd_pin_src = BPD_TYPE_DEFAULT; |
| 7551 | rc = 0; |
| 7552 | } else { |
| 7553 | chip->bmd_pin_src = get_bpd(bpd); |
| 7554 | if (chip->bmd_pin_src < 0) { |
| 7555 | dev_err(chip->dev, |
| 7556 | "failed to determine bpd schema %d\n", rc); |
| 7557 | return rc; |
| 7558 | } |
| 7559 | } |
| 7560 | |
| 7561 | /* parse the dc power supply configuration */ |
| 7562 | rc = of_property_read_string(node, "qcom,dc-psy-type", &dc_psy_type); |
| 7563 | if (rc) { |
| 7564 | chip->dc_psy_type = -EINVAL; |
| 7565 | rc = 0; |
| 7566 | } else { |
| 7567 | if (strcmp(dc_psy_type, "Mains") == 0) |
| 7568 | chip->dc_psy_type = POWER_SUPPLY_TYPE_MAINS; |
| 7569 | else if (strcmp(dc_psy_type, "Wireless") == 0) |
| 7570 | chip->dc_psy_type = POWER_SUPPLY_TYPE_WIRELESS; |
| 7571 | else if (strcmp(dc_psy_type, "Wipower") == 0) |
| 7572 | chip->dc_psy_type = POWER_SUPPLY_TYPE_WIPOWER; |
| 7573 | } |
| 7574 | if (chip->dc_psy_type != -EINVAL) { |
| 7575 | OF_PROP_READ(chip, chip->dc_target_current_ma, |
| 7576 | "dc-psy-ma", rc, 0); |
| 7577 | if (rc) |
| 7578 | return rc; |
| 7579 | if (chip->dc_target_current_ma < DC_MA_MIN |
| 7580 | || chip->dc_target_current_ma > DC_MA_MAX) { |
| 7581 | dev_err(chip->dev, "Bad dc mA %d\n", |
| 7582 | chip->dc_target_current_ma); |
| 7583 | return -EINVAL; |
| 7584 | } |
| 7585 | } |
| 7586 | |
| 7587 | if (chip->dc_psy_type == POWER_SUPPLY_TYPE_WIPOWER) |
| 7588 | smb_parse_wipower_dt(chip); |
| 7589 | |
| 7590 | /* read the bms power supply name */ |
| 7591 | rc = of_property_read_string(node, "qcom,bms-psy-name", |
| 7592 | &chip->bms_psy_name); |
| 7593 | if (rc) |
| 7594 | chip->bms_psy_name = NULL; |
| 7595 | |
| 7596 | /* read the battery power supply name */ |
| 7597 | rc = of_property_read_string(node, "qcom,battery-psy-name", |
| 7598 | &chip->battery_psy_name); |
| 7599 | if (rc) |
| 7600 | chip->battery_psy_name = "battery"; |
| 7601 | |
| 7602 | /* Get the charger led support property */ |
| 7603 | chip->cfg_chg_led_sw_ctrl = |
| 7604 | of_property_read_bool(node, "qcom,chg-led-sw-controls"); |
| 7605 | chip->cfg_chg_led_support = |
| 7606 | of_property_read_bool(node, "qcom,chg-led-support"); |
| 7607 | |
| 7608 | if (of_find_property(node, "qcom,thermal-mitigation", |
| 7609 | &chip->thermal_levels)) { |
| 7610 | chip->thermal_mitigation = devm_kzalloc(chip->dev, |
| 7611 | chip->thermal_levels, |
| 7612 | GFP_KERNEL); |
| 7613 | |
| 7614 | if (chip->thermal_mitigation == NULL) { |
| 7615 | dev_err(chip->dev, "thermal mitigation kzalloc() failed.\n"); |
| 7616 | return -ENOMEM; |
| 7617 | } |
| 7618 | |
| 7619 | chip->thermal_levels /= sizeof(int); |
| 7620 | rc = of_property_read_u32_array(node, |
| 7621 | "qcom,thermal-mitigation", |
| 7622 | chip->thermal_mitigation, chip->thermal_levels); |
| 7623 | if (rc) { |
| 7624 | dev_err(chip->dev, |
| 7625 | "Couldn't read threm limits rc = %d\n", rc); |
| 7626 | return rc; |
| 7627 | } |
| 7628 | } |
| 7629 | |
| 7630 | chip->skip_usb_notification |
| 7631 | = of_property_read_bool(node, |
| 7632 | "qcom,skip-usb-notification"); |
| 7633 | |
| 7634 | chip->otg_pinctrl = of_property_read_bool(node, "qcom,otg-pinctrl"); |
| 7635 | |
| 7636 | return 0; |
| 7637 | } |
| 7638 | |
| 7639 | #define SUBTYPE_REG 0x5 |
| 7640 | #define SMBCHG_CHGR_SUBTYPE 0x1 |
| 7641 | #define SMBCHG_OTG_SUBTYPE 0x8 |
| 7642 | #define SMBCHG_BAT_IF_SUBTYPE 0x3 |
| 7643 | #define SMBCHG_USB_CHGPTH_SUBTYPE 0x4 |
| 7644 | #define SMBCHG_DC_CHGPTH_SUBTYPE 0x5 |
| 7645 | #define SMBCHG_MISC_SUBTYPE 0x7 |
| 7646 | #define SMBCHG_LITE_CHGR_SUBTYPE 0x51 |
| 7647 | #define SMBCHG_LITE_OTG_SUBTYPE 0x58 |
| 7648 | #define SMBCHG_LITE_BAT_IF_SUBTYPE 0x53 |
| 7649 | #define SMBCHG_LITE_USB_CHGPTH_SUBTYPE 0x54 |
| 7650 | #define SMBCHG_LITE_DC_CHGPTH_SUBTYPE 0x55 |
| 7651 | #define SMBCHG_LITE_MISC_SUBTYPE 0x57 |
| 7652 | static int smbchg_request_irq(struct smbchg_chip *chip, |
| 7653 | struct device_node *child, |
| 7654 | int irq_num, char *irq_name, |
| 7655 | irqreturn_t (irq_handler)(int irq, void *_chip), |
| 7656 | int flags) |
| 7657 | { |
| 7658 | int rc; |
| 7659 | |
| 7660 | irq_num = of_irq_get_byname(child, irq_name); |
| 7661 | if (irq_num < 0) { |
| 7662 | dev_err(chip->dev, "Unable to get %s irqn", irq_name); |
| 7663 | rc = -ENXIO; |
| 7664 | } |
| 7665 | rc = devm_request_threaded_irq(chip->dev, |
| 7666 | irq_num, NULL, irq_handler, flags, irq_name, |
| 7667 | chip); |
| 7668 | if (rc < 0) { |
| 7669 | dev_err(chip->dev, "Unable to request %s irq: %dn", |
| 7670 | irq_name, rc); |
| 7671 | rc = -ENXIO; |
| 7672 | } |
| 7673 | return 0; |
| 7674 | } |
| 7675 | |
| 7676 | static int smbchg_request_irqs(struct smbchg_chip *chip) |
| 7677 | { |
| 7678 | int rc = 0; |
| 7679 | unsigned int base; |
| 7680 | struct device_node *child; |
| 7681 | u8 subtype; |
| 7682 | unsigned long flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
| 7683 | | IRQF_ONESHOT; |
| 7684 | |
| 7685 | if (of_get_available_child_count(chip->pdev->dev.of_node) == 0) { |
| 7686 | pr_err("no child nodes\n"); |
| 7687 | return -ENXIO; |
| 7688 | } |
| 7689 | |
| 7690 | for_each_available_child_of_node(chip->pdev->dev.of_node, child) { |
| 7691 | rc = of_property_read_u32(child, "reg", &base); |
| 7692 | if (rc < 0) { |
| 7693 | rc = 0; |
| 7694 | continue; |
| 7695 | } |
| 7696 | |
| 7697 | rc = smbchg_read(chip, &subtype, base + SUBTYPE_REG, 1); |
| 7698 | if (rc) { |
| 7699 | dev_err(chip->dev, "Peripheral subtype read failed rc=%d\n", |
| 7700 | rc); |
| 7701 | return rc; |
| 7702 | } |
| 7703 | |
| 7704 | switch (subtype) { |
| 7705 | case SMBCHG_CHGR_SUBTYPE: |
| 7706 | case SMBCHG_LITE_CHGR_SUBTYPE: |
| 7707 | rc = smbchg_request_irq(chip, child, |
| 7708 | chip->chg_error_irq, "chg-error", |
| 7709 | chg_error_handler, flags); |
| 7710 | if (rc < 0) |
| 7711 | return rc; |
| 7712 | rc = smbchg_request_irq(chip, child, chip->taper_irq, |
| 7713 | "chg-taper-thr", taper_handler, |
| 7714 | (IRQF_TRIGGER_RISING | IRQF_ONESHOT)); |
| 7715 | if (rc < 0) |
| 7716 | return rc; |
| 7717 | disable_irq_nosync(chip->taper_irq); |
| 7718 | rc = smbchg_request_irq(chip, child, chip->chg_term_irq, |
| 7719 | "chg-tcc-thr", chg_term_handler, |
| 7720 | (IRQF_TRIGGER_RISING | IRQF_ONESHOT)); |
| 7721 | if (rc < 0) |
| 7722 | return rc; |
| 7723 | rc = smbchg_request_irq(chip, child, chip->recharge_irq, |
| 7724 | "chg-rechg-thr", recharge_handler, flags); |
| 7725 | if (rc < 0) |
| 7726 | return rc; |
| 7727 | rc = smbchg_request_irq(chip, child, chip->fastchg_irq, |
| 7728 | "chg-p2f-thr", fastchg_handler, flags); |
| 7729 | if (rc < 0) |
| 7730 | return rc; |
| 7731 | enable_irq_wake(chip->chg_term_irq); |
| 7732 | enable_irq_wake(chip->chg_error_irq); |
| 7733 | enable_irq_wake(chip->fastchg_irq); |
| 7734 | break; |
| 7735 | case SMBCHG_BAT_IF_SUBTYPE: |
| 7736 | case SMBCHG_LITE_BAT_IF_SUBTYPE: |
| 7737 | rc = smbchg_request_irq(chip, child, chip->batt_hot_irq, |
| 7738 | "batt-hot", batt_hot_handler, flags); |
| 7739 | if (rc < 0) |
| 7740 | return rc; |
| 7741 | rc = smbchg_request_irq(chip, child, |
| 7742 | chip->batt_warm_irq, |
| 7743 | "batt-warm", batt_warm_handler, flags); |
| 7744 | if (rc < 0) |
| 7745 | return rc; |
| 7746 | rc = smbchg_request_irq(chip, child, |
| 7747 | chip->batt_cool_irq, |
| 7748 | "batt-cool", batt_cool_handler, flags); |
| 7749 | if (rc < 0) |
| 7750 | return rc; |
| 7751 | rc = smbchg_request_irq(chip, child, |
| 7752 | chip->batt_cold_irq, |
| 7753 | "batt-cold", batt_cold_handler, flags); |
| 7754 | if (rc < 0) |
| 7755 | return rc; |
| 7756 | rc = smbchg_request_irq(chip, child, |
| 7757 | chip->batt_missing_irq, |
| 7758 | "batt-missing", batt_pres_handler, flags); |
| 7759 | if (rc < 0) |
| 7760 | return rc; |
| 7761 | rc = smbchg_request_irq(chip, child, |
| 7762 | chip->vbat_low_irq, |
| 7763 | "batt-low", vbat_low_handler, flags); |
| 7764 | if (rc < 0) |
| 7765 | return rc; |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 7766 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7767 | enable_irq_wake(chip->batt_hot_irq); |
| 7768 | enable_irq_wake(chip->batt_warm_irq); |
| 7769 | enable_irq_wake(chip->batt_cool_irq); |
| 7770 | enable_irq_wake(chip->batt_cold_irq); |
| 7771 | enable_irq_wake(chip->batt_missing_irq); |
| 7772 | enable_irq_wake(chip->vbat_low_irq); |
| 7773 | break; |
| 7774 | case SMBCHG_USB_CHGPTH_SUBTYPE: |
| 7775 | case SMBCHG_LITE_USB_CHGPTH_SUBTYPE: |
| 7776 | rc = smbchg_request_irq(chip, child, |
| 7777 | chip->usbin_uv_irq, |
| 7778 | "usbin-uv", usbin_uv_handler, |
| 7779 | flags | IRQF_EARLY_RESUME); |
| 7780 | if (rc < 0) |
| 7781 | return rc; |
| 7782 | rc = smbchg_request_irq(chip, child, |
| 7783 | chip->usbin_ov_irq, |
| 7784 | "usbin-ov", usbin_ov_handler, flags); |
| 7785 | if (rc < 0) |
| 7786 | return rc; |
| 7787 | rc = smbchg_request_irq(chip, child, |
| 7788 | chip->src_detect_irq, |
| 7789 | "usbin-src-det", |
| 7790 | src_detect_handler, flags); |
| 7791 | if (rc < 0) |
| 7792 | return rc; |
| 7793 | rc = smbchg_request_irq(chip, child, |
| 7794 | chip->aicl_done_irq, |
| 7795 | "aicl-done", |
| 7796 | aicl_done_handler, |
| 7797 | (IRQF_TRIGGER_RISING | IRQF_ONESHOT)); |
| 7798 | if (rc < 0) |
| 7799 | return rc; |
| 7800 | |
| 7801 | if (chip->schg_version != QPNP_SCHG_LITE) { |
| 7802 | rc = smbchg_request_irq(chip, child, |
| 7803 | chip->otg_fail_irq, "otg-fail", |
| 7804 | otg_fail_handler, flags); |
| 7805 | if (rc < 0) |
| 7806 | return rc; |
| 7807 | rc = smbchg_request_irq(chip, child, |
| 7808 | chip->otg_oc_irq, "otg-oc", |
| 7809 | otg_oc_handler, |
| 7810 | (IRQF_TRIGGER_RISING | IRQF_ONESHOT)); |
| 7811 | if (rc < 0) |
| 7812 | return rc; |
| 7813 | rc = smbchg_request_irq(chip, child, |
| 7814 | chip->usbid_change_irq, "usbid-change", |
| 7815 | usbid_change_handler, |
| 7816 | (IRQF_TRIGGER_FALLING | IRQF_ONESHOT)); |
| 7817 | if (rc < 0) |
| 7818 | return rc; |
| 7819 | enable_irq_wake(chip->otg_oc_irq); |
| 7820 | enable_irq_wake(chip->usbid_change_irq); |
| 7821 | enable_irq_wake(chip->otg_fail_irq); |
| 7822 | } |
| 7823 | enable_irq_wake(chip->usbin_uv_irq); |
| 7824 | enable_irq_wake(chip->usbin_ov_irq); |
| 7825 | enable_irq_wake(chip->src_detect_irq); |
| 7826 | if (chip->parallel.avail && chip->usb_present) { |
| 7827 | rc = enable_irq_wake(chip->aicl_done_irq); |
| 7828 | chip->enable_aicl_wake = true; |
| 7829 | } |
| 7830 | break; |
| 7831 | case SMBCHG_DC_CHGPTH_SUBTYPE: |
| 7832 | case SMBCHG_LITE_DC_CHGPTH_SUBTYPE: |
| 7833 | rc = smbchg_request_irq(chip, child, chip->dcin_uv_irq, |
| 7834 | "dcin-uv", dcin_uv_handler, flags); |
| 7835 | if (rc < 0) |
| 7836 | return rc; |
| 7837 | enable_irq_wake(chip->dcin_uv_irq); |
| 7838 | break; |
| 7839 | case SMBCHG_MISC_SUBTYPE: |
| 7840 | case SMBCHG_LITE_MISC_SUBTYPE: |
| 7841 | rc = smbchg_request_irq(chip, child, chip->power_ok_irq, |
| 7842 | "power-ok", power_ok_handler, flags); |
| 7843 | if (rc < 0) |
| 7844 | return rc; |
| 7845 | rc = smbchg_request_irq(chip, child, chip->chg_hot_irq, |
| 7846 | "temp-shutdown", chg_hot_handler, flags); |
| 7847 | if (rc < 0) |
| 7848 | return rc; |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 7849 | rc = smbchg_request_irq(chip, child, |
| 7850 | chip->wdog_timeout_irq, "wdog-timeout", |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 7851 | wdog_timeout_handler, flags); |
| 7852 | if (rc < 0) |
| 7853 | return rc; |
| 7854 | enable_irq_wake(chip->chg_hot_irq); |
| 7855 | enable_irq_wake(chip->wdog_timeout_irq); |
| 7856 | break; |
| 7857 | case SMBCHG_OTG_SUBTYPE: |
| 7858 | break; |
| 7859 | case SMBCHG_LITE_OTG_SUBTYPE: |
| 7860 | rc = smbchg_request_irq(chip, child, |
| 7861 | chip->usbid_change_irq, "usbid-change", |
| 7862 | usbid_change_handler, |
| 7863 | (IRQF_TRIGGER_FALLING | IRQF_ONESHOT)); |
| 7864 | if (rc < 0) |
| 7865 | return rc; |
| 7866 | rc = smbchg_request_irq(chip, child, |
| 7867 | chip->otg_oc_irq, "otg-oc", |
| 7868 | otg_oc_handler, |
| 7869 | (IRQF_TRIGGER_RISING | IRQF_ONESHOT)); |
| 7870 | if (rc < 0) |
| 7871 | return rc; |
| 7872 | rc = smbchg_request_irq(chip, child, |
| 7873 | chip->otg_fail_irq, "otg-fail", |
| 7874 | otg_fail_handler, flags); |
| 7875 | if (rc < 0) |
| 7876 | return rc; |
| 7877 | enable_irq_wake(chip->usbid_change_irq); |
| 7878 | enable_irq_wake(chip->otg_oc_irq); |
| 7879 | enable_irq_wake(chip->otg_fail_irq); |
| 7880 | break; |
| 7881 | } |
| 7882 | } |
| 7883 | |
| 7884 | return rc; |
| 7885 | } |
| 7886 | |
| 7887 | #define REQUIRE_BASE(chip, base, rc) \ |
| 7888 | do { \ |
| 7889 | if (!rc && !chip->base) { \ |
| 7890 | dev_err(chip->dev, "Missing " #base "\n"); \ |
| 7891 | rc = -EINVAL; \ |
| 7892 | } \ |
| 7893 | } while (0) |
| 7894 | |
| 7895 | static int smbchg_parse_peripherals(struct smbchg_chip *chip) |
| 7896 | { |
| 7897 | int rc = 0; |
| 7898 | unsigned int base; |
| 7899 | struct device_node *child; |
| 7900 | u8 subtype; |
| 7901 | |
| 7902 | if (of_get_available_child_count(chip->pdev->dev.of_node) == 0) { |
| 7903 | pr_err("no child nodes\n"); |
| 7904 | return -ENXIO; |
| 7905 | } |
| 7906 | |
| 7907 | for_each_available_child_of_node(chip->pdev->dev.of_node, child) { |
| 7908 | rc = of_property_read_u32(child, "reg", &base); |
| 7909 | if (rc < 0) { |
| 7910 | rc = 0; |
| 7911 | continue; |
| 7912 | } |
| 7913 | |
| 7914 | rc = smbchg_read(chip, &subtype, base + SUBTYPE_REG, 1); |
| 7915 | if (rc) { |
| 7916 | dev_err(chip->dev, "Peripheral subtype read failed rc=%d\n", |
| 7917 | rc); |
| 7918 | return rc; |
| 7919 | } |
| 7920 | |
| 7921 | switch (subtype) { |
| 7922 | case SMBCHG_CHGR_SUBTYPE: |
| 7923 | case SMBCHG_LITE_CHGR_SUBTYPE: |
| 7924 | chip->chgr_base = base; |
| 7925 | break; |
| 7926 | case SMBCHG_BAT_IF_SUBTYPE: |
| 7927 | case SMBCHG_LITE_BAT_IF_SUBTYPE: |
| 7928 | chip->bat_if_base = base; |
| 7929 | break; |
| 7930 | case SMBCHG_USB_CHGPTH_SUBTYPE: |
| 7931 | case SMBCHG_LITE_USB_CHGPTH_SUBTYPE: |
| 7932 | chip->usb_chgpth_base = base; |
| 7933 | break; |
| 7934 | case SMBCHG_DC_CHGPTH_SUBTYPE: |
| 7935 | case SMBCHG_LITE_DC_CHGPTH_SUBTYPE: |
| 7936 | chip->dc_chgpth_base = base; |
| 7937 | break; |
| 7938 | case SMBCHG_MISC_SUBTYPE: |
| 7939 | case SMBCHG_LITE_MISC_SUBTYPE: |
| 7940 | chip->misc_base = base; |
| 7941 | break; |
| 7942 | case SMBCHG_OTG_SUBTYPE: |
| 7943 | case SMBCHG_LITE_OTG_SUBTYPE: |
| 7944 | chip->otg_base = base; |
| 7945 | break; |
| 7946 | } |
| 7947 | } |
| 7948 | |
| 7949 | REQUIRE_BASE(chip, chgr_base, rc); |
| 7950 | REQUIRE_BASE(chip, bat_if_base, rc); |
| 7951 | REQUIRE_BASE(chip, usb_chgpth_base, rc); |
| 7952 | REQUIRE_BASE(chip, dc_chgpth_base, rc); |
| 7953 | REQUIRE_BASE(chip, misc_base, rc); |
| 7954 | |
| 7955 | return rc; |
| 7956 | } |
| 7957 | |
| 7958 | static inline void dump_reg(struct smbchg_chip *chip, u16 addr, |
| 7959 | const char *name) |
| 7960 | { |
| 7961 | u8 reg; |
| 7962 | |
| 7963 | smbchg_read(chip, ®, addr, 1); |
| 7964 | pr_smb(PR_DUMP, "%s - %04X = %02X\n", name, addr, reg); |
| 7965 | } |
| 7966 | |
| 7967 | /* dumps useful registers for debug */ |
| 7968 | static void dump_regs(struct smbchg_chip *chip) |
| 7969 | { |
| 7970 | u16 addr; |
| 7971 | |
| 7972 | /* charger peripheral */ |
| 7973 | for (addr = 0xB; addr <= 0x10; addr++) |
| 7974 | dump_reg(chip, chip->chgr_base + addr, "CHGR Status"); |
| 7975 | for (addr = 0xF0; addr <= 0xFF; addr++) |
| 7976 | dump_reg(chip, chip->chgr_base + addr, "CHGR Config"); |
| 7977 | /* battery interface peripheral */ |
| 7978 | dump_reg(chip, chip->bat_if_base + RT_STS, "BAT_IF Status"); |
| 7979 | dump_reg(chip, chip->bat_if_base + CMD_CHG_REG, "BAT_IF Command"); |
| 7980 | for (addr = 0xF0; addr <= 0xFB; addr++) |
| 7981 | dump_reg(chip, chip->bat_if_base + addr, "BAT_IF Config"); |
| 7982 | /* usb charge path peripheral */ |
| 7983 | for (addr = 0x7; addr <= 0x10; addr++) |
| 7984 | dump_reg(chip, chip->usb_chgpth_base + addr, "USB Status"); |
| 7985 | dump_reg(chip, chip->usb_chgpth_base + CMD_IL, "USB Command"); |
| 7986 | for (addr = 0xF0; addr <= 0xF5; addr++) |
| 7987 | dump_reg(chip, chip->usb_chgpth_base + addr, "USB Config"); |
| 7988 | /* dc charge path peripheral */ |
| 7989 | dump_reg(chip, chip->dc_chgpth_base + RT_STS, "DC Status"); |
| 7990 | for (addr = 0xF0; addr <= 0xF6; addr++) |
| 7991 | dump_reg(chip, chip->dc_chgpth_base + addr, "DC Config"); |
| 7992 | /* misc peripheral */ |
| 7993 | dump_reg(chip, chip->misc_base + IDEV_STS, "MISC Status"); |
| 7994 | dump_reg(chip, chip->misc_base + RT_STS, "MISC Status"); |
| 7995 | for (addr = 0xF0; addr <= 0xF3; addr++) |
| 7996 | dump_reg(chip, chip->misc_base + addr, "MISC CFG"); |
| 7997 | } |
| 7998 | |
| 7999 | static int create_debugfs_entries(struct smbchg_chip *chip) |
| 8000 | { |
| 8001 | struct dentry *ent; |
| 8002 | |
| 8003 | chip->debug_root = debugfs_create_dir("qpnp-smbcharger", NULL); |
| 8004 | if (!chip->debug_root) { |
| 8005 | dev_err(chip->dev, "Couldn't create debug dir\n"); |
| 8006 | return -EINVAL; |
| 8007 | } |
| 8008 | |
| 8009 | ent = debugfs_create_file("force_dcin_icl_check", |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 8010 | 00100644, chip->debug_root, chip, |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8011 | &force_dcin_icl_ops); |
| 8012 | if (!ent) { |
| 8013 | dev_err(chip->dev, |
| 8014 | "Couldn't create force dcin icl check file\n"); |
| 8015 | return -EINVAL; |
| 8016 | } |
| 8017 | return 0; |
| 8018 | } |
| 8019 | |
| 8020 | static int smbchg_check_chg_version(struct smbchg_chip *chip) |
| 8021 | { |
| 8022 | struct pmic_revid_data *pmic_rev_id; |
| 8023 | struct device_node *revid_dev_node; |
| 8024 | int rc; |
| 8025 | |
| 8026 | revid_dev_node = of_parse_phandle(chip->pdev->dev.of_node, |
| 8027 | "qcom,pmic-revid", 0); |
| 8028 | if (!revid_dev_node) { |
| 8029 | pr_err("Missing qcom,pmic-revid property - driver failed\n"); |
| 8030 | return -EINVAL; |
| 8031 | } |
| 8032 | |
| 8033 | pmic_rev_id = get_revid_data(revid_dev_node); |
| 8034 | if (IS_ERR(pmic_rev_id)) { |
| 8035 | rc = PTR_ERR(revid_dev_node); |
| 8036 | if (rc != -EPROBE_DEFER) |
| 8037 | pr_err("Unable to get pmic_revid rc=%d\n", rc); |
| 8038 | return rc; |
| 8039 | } |
| 8040 | |
| 8041 | switch (pmic_rev_id->pmic_subtype) { |
| 8042 | case PMI8994: |
| 8043 | chip->wa_flags |= SMBCHG_AICL_DEGLITCH_WA |
| 8044 | | SMBCHG_BATT_OV_WA |
| 8045 | | SMBCHG_CC_ESR_WA |
| 8046 | | SMBCHG_RESTART_WA; |
| 8047 | use_pmi8994_tables(chip); |
| 8048 | chip->schg_version = QPNP_SCHG; |
| 8049 | break; |
| 8050 | case PMI8950: |
Subbaraman Narayanamurthy | 23765c4 | 2016-04-04 16:13:50 -0700 | [diff] [blame] | 8051 | chip->wa_flags |= SMBCHG_RESTART_WA; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8052 | case PMI8937: |
| 8053 | chip->wa_flags |= SMBCHG_BATT_OV_WA; |
| 8054 | if (pmic_rev_id->rev4 < 2) /* PMI8950 1.0 */ { |
| 8055 | chip->wa_flags |= SMBCHG_AICL_DEGLITCH_WA; |
| 8056 | } else { /* rev > PMI8950 v1.0 */ |
| 8057 | chip->wa_flags |= SMBCHG_HVDCP_9V_EN_WA |
| 8058 | | SMBCHG_USB100_WA; |
| 8059 | } |
| 8060 | use_pmi8994_tables(chip); |
| 8061 | chip->tables.aicl_rerun_period_table = |
| 8062 | aicl_rerun_period_schg_lite; |
| 8063 | chip->tables.aicl_rerun_period_len = |
| 8064 | ARRAY_SIZE(aicl_rerun_period_schg_lite); |
| 8065 | |
| 8066 | chip->schg_version = QPNP_SCHG_LITE; |
| 8067 | if (pmic_rev_id->pmic_subtype == PMI8937) |
| 8068 | chip->hvdcp_not_supported = true; |
| 8069 | break; |
| 8070 | case PMI8996: |
| 8071 | chip->wa_flags |= SMBCHG_CC_ESR_WA |
| 8072 | | SMBCHG_FLASH_ICL_DISABLE_WA |
| 8073 | | SMBCHG_RESTART_WA |
| 8074 | | SMBCHG_FLASH_BUCK_SWITCH_FREQ_WA; |
| 8075 | use_pmi8996_tables(chip); |
| 8076 | chip->schg_version = QPNP_SCHG; |
| 8077 | break; |
| 8078 | default: |
| 8079 | pr_err("PMIC subtype %d not supported, WA flags not set\n", |
| 8080 | pmic_rev_id->pmic_subtype); |
| 8081 | } |
| 8082 | |
| 8083 | pr_smb(PR_STATUS, "pmic=%s, wa_flags=0x%x, hvdcp_supported=%s\n", |
| 8084 | pmic_rev_id->pmic_name, chip->wa_flags, |
| 8085 | chip->hvdcp_not_supported ? "false" : "true"); |
| 8086 | |
| 8087 | return 0; |
| 8088 | } |
| 8089 | |
| 8090 | static void rerun_hvdcp_det_if_necessary(struct smbchg_chip *chip) |
| 8091 | { |
| 8092 | enum power_supply_type usb_supply_type; |
| 8093 | char *usb_type_name; |
| 8094 | int rc; |
| 8095 | |
| 8096 | if (!(chip->wa_flags & SMBCHG_RESTART_WA)) |
| 8097 | return; |
| 8098 | |
| 8099 | read_usb_type(chip, &usb_type_name, &usb_supply_type); |
| 8100 | if (usb_supply_type == POWER_SUPPLY_TYPE_USB_DCP |
| 8101 | && !is_hvdcp_present(chip)) { |
| 8102 | pr_smb(PR_STATUS, "DCP found rerunning APSD\n"); |
| 8103 | rc = vote(chip->usb_icl_votable, |
| 8104 | CHG_SUSPEND_WORKAROUND_ICL_VOTER, true, 300); |
| 8105 | if (rc < 0) |
| 8106 | pr_err("Couldn't vote for 300mA for suspend wa, going ahead rc=%d\n", |
| 8107 | rc); |
| 8108 | |
Ashay Jaiswal | f7bb6ac | 2016-06-23 14:47:37 +0530 | [diff] [blame] | 8109 | rc = rerun_apsd(chip); |
| 8110 | if (rc) |
| 8111 | pr_err("APSD rerun failed rc=%d\n", rc); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8112 | |
| 8113 | read_usb_type(chip, &usb_type_name, &usb_supply_type); |
| 8114 | if (usb_supply_type != POWER_SUPPLY_TYPE_USB_DCP) { |
| 8115 | msleep(500); |
Ashay Jaiswal | f7bb6ac | 2016-06-23 14:47:37 +0530 | [diff] [blame] | 8116 | pr_smb(PR_STATUS, "Rerun APSD as type !=DCP\n"); |
| 8117 | |
| 8118 | rc = rerun_apsd(chip); |
| 8119 | if (rc) |
| 8120 | pr_err("APSD rerun failed rc=%d\n", rc); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8121 | } |
| 8122 | |
| 8123 | rc = vote(chip->usb_icl_votable, |
| 8124 | CHG_SUSPEND_WORKAROUND_ICL_VOTER, false, 0); |
| 8125 | if (rc < 0) |
| 8126 | pr_err("Couldn't vote for 0 for suspend wa, going ahead rc=%d\n", |
| 8127 | rc); |
Ashay Jaiswal | f7bb6ac | 2016-06-23 14:47:37 +0530 | [diff] [blame] | 8128 | |
| 8129 | /* Schedule work for HVDCP detection */ |
| 8130 | if (!chip->hvdcp_not_supported) { |
| 8131 | cancel_delayed_work_sync(&chip->hvdcp_det_work); |
| 8132 | smbchg_stay_awake(chip, PM_DETECT_HVDCP); |
| 8133 | schedule_delayed_work(&chip->hvdcp_det_work, |
| 8134 | msecs_to_jiffies(HVDCP_NOTIFY_MS)); |
| 8135 | } |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8136 | } |
| 8137 | } |
| 8138 | |
| 8139 | static int smbchg_probe(struct platform_device *pdev) |
| 8140 | { |
| 8141 | int rc; |
| 8142 | struct smbchg_chip *chip; |
| 8143 | struct power_supply *typec_psy = NULL; |
Subbaraman Narayanamurthy | 23765c4 | 2016-04-04 16:13:50 -0700 | [diff] [blame] | 8144 | struct qpnp_vadc_chip *vadc_dev = NULL, *vchg_vadc_dev = NULL; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8145 | const char *typec_psy_name; |
| 8146 | struct power_supply_config usb_psy_cfg = {}; |
| 8147 | struct power_supply_config batt_psy_cfg = {}; |
| 8148 | struct power_supply_config dc_psy_cfg = {}; |
| 8149 | |
| 8150 | if (of_property_read_bool(pdev->dev.of_node, "qcom,external-typec")) { |
| 8151 | /* read the type power supply name */ |
| 8152 | rc = of_property_read_string(pdev->dev.of_node, |
| 8153 | "qcom,typec-psy-name", &typec_psy_name); |
| 8154 | if (rc) { |
| 8155 | pr_err("failed to get prop typec-psy-name rc=%d\n", |
| 8156 | rc); |
| 8157 | return rc; |
| 8158 | } |
| 8159 | |
| 8160 | typec_psy = power_supply_get_by_name(typec_psy_name); |
| 8161 | if (!typec_psy) { |
| 8162 | pr_smb(PR_STATUS, |
| 8163 | "Type-C supply not found, deferring probe\n"); |
| 8164 | return -EPROBE_DEFER; |
| 8165 | } |
| 8166 | } |
| 8167 | |
| 8168 | vadc_dev = NULL; |
| 8169 | if (of_find_property(pdev->dev.of_node, "qcom,dcin-vadc", NULL)) { |
| 8170 | vadc_dev = qpnp_get_vadc(&pdev->dev, "dcin"); |
| 8171 | if (IS_ERR(vadc_dev)) { |
| 8172 | rc = PTR_ERR(vadc_dev); |
| 8173 | if (rc != -EPROBE_DEFER) |
| 8174 | dev_err(&pdev->dev, |
| 8175 | "Couldn't get vadc rc=%d\n", |
| 8176 | rc); |
| 8177 | return rc; |
| 8178 | } |
| 8179 | } |
| 8180 | |
| 8181 | vchg_vadc_dev = NULL; |
| 8182 | if (of_find_property(pdev->dev.of_node, "qcom,vchg_sns-vadc", NULL)) { |
| 8183 | vchg_vadc_dev = qpnp_get_vadc(&pdev->dev, "vchg_sns"); |
| 8184 | if (IS_ERR(vchg_vadc_dev)) { |
| 8185 | rc = PTR_ERR(vchg_vadc_dev); |
| 8186 | if (rc != -EPROBE_DEFER) |
| 8187 | dev_err(&pdev->dev, "Couldn't get vadc 'vchg' rc=%d\n", |
| 8188 | rc); |
| 8189 | return rc; |
| 8190 | } |
| 8191 | } |
| 8192 | |
| 8193 | |
| 8194 | chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); |
| 8195 | if (!chip) |
| 8196 | return -ENOMEM; |
| 8197 | |
| 8198 | chip->regmap = dev_get_regmap(pdev->dev.parent, NULL); |
| 8199 | if (!chip->regmap) { |
| 8200 | dev_err(&pdev->dev, "Couldn't get parent's regmap\n"); |
| 8201 | return -EINVAL; |
| 8202 | } |
| 8203 | |
| 8204 | chip->fcc_votable = create_votable("BATT_FCC", |
| 8205 | VOTE_MIN, |
| 8206 | set_fastchg_current_vote_cb, chip); |
| 8207 | if (IS_ERR(chip->fcc_votable)) { |
| 8208 | rc = PTR_ERR(chip->fcc_votable); |
| 8209 | goto votables_cleanup; |
| 8210 | } |
| 8211 | |
| 8212 | chip->usb_icl_votable = create_votable("USB_ICL", |
| 8213 | VOTE_MIN, |
| 8214 | set_usb_current_limit_vote_cb, chip); |
| 8215 | if (IS_ERR(chip->usb_icl_votable)) { |
| 8216 | rc = PTR_ERR(chip->usb_icl_votable); |
| 8217 | goto votables_cleanup; |
| 8218 | } |
| 8219 | |
| 8220 | chip->dc_icl_votable = create_votable("DCIN_ICL", |
| 8221 | VOTE_MIN, |
| 8222 | set_dc_current_limit_vote_cb, chip); |
| 8223 | if (IS_ERR(chip->dc_icl_votable)) { |
| 8224 | rc = PTR_ERR(chip->dc_icl_votable); |
| 8225 | goto votables_cleanup; |
| 8226 | } |
| 8227 | |
| 8228 | chip->usb_suspend_votable = create_votable("USB_SUSPEND", |
| 8229 | VOTE_SET_ANY, |
| 8230 | usb_suspend_vote_cb, chip); |
| 8231 | if (IS_ERR(chip->usb_suspend_votable)) { |
| 8232 | rc = PTR_ERR(chip->usb_suspend_votable); |
| 8233 | goto votables_cleanup; |
| 8234 | } |
| 8235 | |
| 8236 | chip->dc_suspend_votable = create_votable("DC_SUSPEND", |
| 8237 | VOTE_SET_ANY, |
| 8238 | dc_suspend_vote_cb, chip); |
| 8239 | if (IS_ERR(chip->dc_suspend_votable)) { |
| 8240 | rc = PTR_ERR(chip->dc_suspend_votable); |
| 8241 | goto votables_cleanup; |
| 8242 | } |
| 8243 | |
| 8244 | chip->battchg_suspend_votable = create_votable("BATTCHG_SUSPEND", |
| 8245 | VOTE_SET_ANY, |
| 8246 | charging_suspend_vote_cb, chip); |
| 8247 | if (IS_ERR(chip->battchg_suspend_votable)) { |
| 8248 | rc = PTR_ERR(chip->battchg_suspend_votable); |
| 8249 | goto votables_cleanup; |
| 8250 | } |
| 8251 | |
| 8252 | chip->hw_aicl_rerun_disable_votable = create_votable("HWAICL_DISABLE", |
| 8253 | VOTE_SET_ANY, |
| 8254 | smbchg_hw_aicl_rerun_disable_cb, chip); |
| 8255 | if (IS_ERR(chip->hw_aicl_rerun_disable_votable)) { |
| 8256 | rc = PTR_ERR(chip->hw_aicl_rerun_disable_votable); |
| 8257 | goto votables_cleanup; |
| 8258 | } |
| 8259 | |
| 8260 | chip->hw_aicl_rerun_enable_indirect_votable = create_votable( |
| 8261 | "HWAICL_ENABLE_INDIRECT", |
| 8262 | VOTE_SET_ANY, |
| 8263 | smbchg_hw_aicl_rerun_enable_indirect_cb, chip); |
| 8264 | if (IS_ERR(chip->hw_aicl_rerun_enable_indirect_votable)) { |
| 8265 | rc = PTR_ERR(chip->hw_aicl_rerun_enable_indirect_votable); |
| 8266 | goto votables_cleanup; |
| 8267 | } |
| 8268 | |
| 8269 | chip->aicl_deglitch_short_votable = create_votable( |
| 8270 | "HWAICL_SHORT_DEGLITCH", |
| 8271 | VOTE_SET_ANY, |
| 8272 | smbchg_aicl_deglitch_config_cb, chip); |
| 8273 | if (IS_ERR(chip->aicl_deglitch_short_votable)) { |
| 8274 | rc = PTR_ERR(chip->aicl_deglitch_short_votable); |
| 8275 | goto votables_cleanup; |
| 8276 | } |
| 8277 | |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 8278 | chip->hvdcp_enable_votable = create_votable( |
| 8279 | "HVDCP_ENABLE", |
| 8280 | VOTE_MIN, |
| 8281 | smbchg_hvdcp_enable_cb, chip); |
| 8282 | if (IS_ERR(chip->hvdcp_enable_votable)) { |
| 8283 | rc = PTR_ERR(chip->hvdcp_enable_votable); |
| 8284 | goto votables_cleanup; |
| 8285 | } |
| 8286 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8287 | INIT_WORK(&chip->usb_set_online_work, smbchg_usb_update_online_work); |
| 8288 | INIT_DELAYED_WORK(&chip->parallel_en_work, |
| 8289 | smbchg_parallel_usb_en_work); |
| 8290 | INIT_DELAYED_WORK(&chip->vfloat_adjust_work, smbchg_vfloat_adjust_work); |
| 8291 | INIT_DELAYED_WORK(&chip->hvdcp_det_work, smbchg_hvdcp_det_work); |
| 8292 | init_completion(&chip->src_det_lowered); |
| 8293 | init_completion(&chip->src_det_raised); |
| 8294 | init_completion(&chip->usbin_uv_lowered); |
| 8295 | init_completion(&chip->usbin_uv_raised); |
| 8296 | chip->vadc_dev = vadc_dev; |
| 8297 | chip->vchg_vadc_dev = vchg_vadc_dev; |
| 8298 | chip->pdev = pdev; |
| 8299 | chip->dev = &pdev->dev; |
| 8300 | |
| 8301 | chip->typec_psy = typec_psy; |
| 8302 | chip->fake_battery_soc = -EINVAL; |
| 8303 | chip->usb_online = -EINVAL; |
| 8304 | dev_set_drvdata(&pdev->dev, chip); |
| 8305 | |
| 8306 | spin_lock_init(&chip->sec_access_lock); |
| 8307 | mutex_init(&chip->therm_lvl_lock); |
| 8308 | mutex_init(&chip->usb_set_online_lock); |
| 8309 | mutex_init(&chip->parallel.lock); |
| 8310 | mutex_init(&chip->taper_irq_lock); |
| 8311 | mutex_init(&chip->pm_lock); |
| 8312 | mutex_init(&chip->wipower_config); |
| 8313 | mutex_init(&chip->usb_status_lock); |
| 8314 | device_init_wakeup(chip->dev, true); |
| 8315 | |
| 8316 | rc = smbchg_parse_peripherals(chip); |
| 8317 | if (rc) { |
| 8318 | dev_err(chip->dev, "Error parsing DT peripherals: %d\n", rc); |
| 8319 | goto votables_cleanup; |
| 8320 | } |
| 8321 | |
| 8322 | rc = smbchg_check_chg_version(chip); |
| 8323 | if (rc) { |
| 8324 | pr_err("Unable to check schg version rc=%d\n", rc); |
| 8325 | goto votables_cleanup; |
| 8326 | } |
| 8327 | |
| 8328 | rc = smb_parse_dt(chip); |
| 8329 | if (rc < 0) { |
| 8330 | dev_err(&pdev->dev, "Unable to parse DT nodes: %d\n", rc); |
| 8331 | goto votables_cleanup; |
| 8332 | } |
| 8333 | |
| 8334 | rc = smbchg_regulator_init(chip); |
| 8335 | if (rc) { |
| 8336 | dev_err(&pdev->dev, |
| 8337 | "Couldn't initialize regulator rc=%d\n", rc); |
| 8338 | goto votables_cleanup; |
| 8339 | } |
| 8340 | |
| 8341 | chip->extcon = devm_extcon_dev_allocate(chip->dev, smbchg_extcon_cable); |
| 8342 | if (IS_ERR(chip->extcon)) { |
| 8343 | dev_err(chip->dev, "failed to allocate extcon device\n"); |
| 8344 | rc = PTR_ERR(chip->extcon); |
| 8345 | goto votables_cleanup; |
| 8346 | } |
| 8347 | |
| 8348 | rc = devm_extcon_dev_register(chip->dev, chip->extcon); |
| 8349 | if (rc) { |
| 8350 | dev_err(chip->dev, "failed to register extcon device\n"); |
| 8351 | goto votables_cleanup; |
| 8352 | } |
| 8353 | |
| 8354 | chip->usb_psy_d.name = "usb"; |
| 8355 | chip->usb_psy_d.type = POWER_SUPPLY_TYPE_USB; |
| 8356 | chip->usb_psy_d.get_property = smbchg_usb_get_property; |
| 8357 | chip->usb_psy_d.set_property = smbchg_usb_set_property; |
| 8358 | chip->usb_psy_d.properties = smbchg_usb_properties; |
| 8359 | chip->usb_psy_d.num_properties = ARRAY_SIZE(smbchg_usb_properties); |
| 8360 | chip->usb_psy_d.property_is_writeable = smbchg_usb_is_writeable; |
| 8361 | |
| 8362 | usb_psy_cfg.drv_data = chip; |
| 8363 | usb_psy_cfg.supplied_to = smbchg_usb_supplicants; |
| 8364 | usb_psy_cfg.num_supplicants = ARRAY_SIZE(smbchg_usb_supplicants); |
| 8365 | |
| 8366 | chip->usb_psy = devm_power_supply_register(chip->dev, |
| 8367 | &chip->usb_psy_d, &usb_psy_cfg); |
| 8368 | if (IS_ERR(chip->usb_psy)) { |
| 8369 | dev_err(&pdev->dev, "Unable to register usb_psy rc = %ld\n", |
| 8370 | PTR_ERR(chip->usb_psy)); |
| 8371 | rc = PTR_ERR(chip->usb_psy); |
| 8372 | goto votables_cleanup; |
| 8373 | } |
| 8374 | |
| 8375 | if (of_find_property(chip->dev->of_node, "dpdm-supply", NULL)) { |
| 8376 | chip->dpdm_reg = devm_regulator_get(chip->dev, "dpdm"); |
| 8377 | if (IS_ERR(chip->dpdm_reg)) { |
| 8378 | rc = PTR_ERR(chip->dpdm_reg); |
| 8379 | goto votables_cleanup; |
| 8380 | } |
| 8381 | } |
| 8382 | |
| 8383 | rc = smbchg_hw_init(chip); |
| 8384 | if (rc < 0) { |
| 8385 | dev_err(&pdev->dev, |
Kiran Gunda | ee7cef8 | 2017-09-20 17:44:16 +0530 | [diff] [blame] | 8386 | "Unable to initialize hardware rc = %d\n", rc); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8387 | goto out; |
| 8388 | } |
| 8389 | |
| 8390 | rc = determine_initial_status(chip); |
| 8391 | if (rc < 0) { |
| 8392 | dev_err(&pdev->dev, |
| 8393 | "Unable to determine init status rc = %d\n", rc); |
| 8394 | goto out; |
| 8395 | } |
| 8396 | |
| 8397 | chip->previous_soc = -EINVAL; |
| 8398 | chip->batt_psy_d.name = chip->battery_psy_name; |
| 8399 | chip->batt_psy_d.type = POWER_SUPPLY_TYPE_BATTERY; |
| 8400 | chip->batt_psy_d.get_property = smbchg_battery_get_property; |
| 8401 | chip->batt_psy_d.set_property = smbchg_battery_set_property; |
| 8402 | chip->batt_psy_d.properties = smbchg_battery_properties; |
| 8403 | chip->batt_psy_d.num_properties = ARRAY_SIZE(smbchg_battery_properties); |
| 8404 | chip->batt_psy_d.external_power_changed = smbchg_external_power_changed; |
| 8405 | chip->batt_psy_d.property_is_writeable = smbchg_battery_is_writeable; |
| 8406 | |
| 8407 | batt_psy_cfg.drv_data = chip; |
| 8408 | batt_psy_cfg.num_supplicants = 0; |
| 8409 | chip->batt_psy = devm_power_supply_register(chip->dev, |
| 8410 | &chip->batt_psy_d, |
| 8411 | &batt_psy_cfg); |
| 8412 | if (IS_ERR(chip->batt_psy)) { |
| 8413 | dev_err(&pdev->dev, |
| 8414 | "Unable to register batt_psy rc = %ld\n", |
| 8415 | PTR_ERR(chip->batt_psy)); |
| 8416 | goto out; |
| 8417 | } |
| 8418 | |
| 8419 | if (chip->dc_psy_type != -EINVAL) { |
| 8420 | chip->dc_psy_d.name = "dc"; |
| 8421 | chip->dc_psy_d.type = chip->dc_psy_type; |
| 8422 | chip->dc_psy_d.get_property = smbchg_dc_get_property; |
| 8423 | chip->dc_psy_d.set_property = smbchg_dc_set_property; |
| 8424 | chip->dc_psy_d.property_is_writeable = smbchg_dc_is_writeable; |
| 8425 | chip->dc_psy_d.properties = smbchg_dc_properties; |
| 8426 | chip->dc_psy_d.num_properties |
| 8427 | = ARRAY_SIZE(smbchg_dc_properties); |
| 8428 | |
| 8429 | dc_psy_cfg.drv_data = chip; |
| 8430 | dc_psy_cfg.num_supplicants |
| 8431 | = ARRAY_SIZE(smbchg_dc_supplicants); |
| 8432 | dc_psy_cfg.supplied_to = smbchg_dc_supplicants; |
| 8433 | |
| 8434 | chip->dc_psy = devm_power_supply_register(chip->dev, |
| 8435 | &chip->dc_psy_d, |
| 8436 | &dc_psy_cfg); |
| 8437 | if (IS_ERR(chip->dc_psy)) { |
| 8438 | dev_err(&pdev->dev, |
| 8439 | "Unable to register dc_psy rc = %ld\n", |
| 8440 | PTR_ERR(chip->dc_psy)); |
| 8441 | goto out; |
| 8442 | } |
| 8443 | } |
Subbaraman Narayanamurthy | 986bff5 | 2016-03-21 15:55:19 -0700 | [diff] [blame] | 8444 | chip->allow_hvdcp3_detection = true; |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8445 | |
| 8446 | if (chip->cfg_chg_led_support && |
| 8447 | chip->schg_version == QPNP_SCHG_LITE) { |
| 8448 | rc = smbchg_register_chg_led(chip); |
| 8449 | if (rc) { |
| 8450 | dev_err(chip->dev, |
| 8451 | "Unable to register charger led: %d\n", |
| 8452 | rc); |
| 8453 | goto out; |
| 8454 | } |
| 8455 | |
| 8456 | rc = smbchg_chg_led_controls(chip); |
| 8457 | if (rc) { |
| 8458 | dev_err(chip->dev, |
| 8459 | "Failed to set charger led controld bit: %d\n", |
| 8460 | rc); |
| 8461 | goto unregister_led_class; |
| 8462 | } |
| 8463 | } |
| 8464 | |
| 8465 | rc = smbchg_request_irqs(chip); |
| 8466 | if (rc < 0) { |
| 8467 | dev_err(&pdev->dev, "Unable to request irqs rc = %d\n", rc); |
| 8468 | goto unregister_led_class; |
| 8469 | } |
| 8470 | |
| 8471 | rerun_hvdcp_det_if_necessary(chip); |
| 8472 | |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 8473 | update_usb_status(chip, is_usb_present(chip), false); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8474 | dump_regs(chip); |
| 8475 | create_debugfs_entries(chip); |
| 8476 | dev_info(chip->dev, |
| 8477 | "SMBCHG successfully probe Charger version=%s Revision DIG:%d.%d ANA:%d.%d batt=%d dc=%d usb=%d\n", |
| 8478 | version_str[chip->schg_version], |
| 8479 | chip->revision[DIG_MAJOR], chip->revision[DIG_MINOR], |
| 8480 | chip->revision[ANA_MAJOR], chip->revision[ANA_MINOR], |
| 8481 | get_prop_batt_present(chip), |
| 8482 | chip->dc_present, chip->usb_present); |
| 8483 | return 0; |
| 8484 | |
| 8485 | unregister_led_class: |
| 8486 | if (chip->cfg_chg_led_support && chip->schg_version == QPNP_SCHG_LITE) |
| 8487 | led_classdev_unregister(&chip->led_cdev); |
| 8488 | out: |
| 8489 | handle_usb_removal(chip); |
| 8490 | votables_cleanup: |
| 8491 | if (chip->aicl_deglitch_short_votable) |
| 8492 | destroy_votable(chip->aicl_deglitch_short_votable); |
| 8493 | if (chip->hw_aicl_rerun_enable_indirect_votable) |
| 8494 | destroy_votable(chip->hw_aicl_rerun_enable_indirect_votable); |
| 8495 | if (chip->hw_aicl_rerun_disable_votable) |
| 8496 | destroy_votable(chip->hw_aicl_rerun_disable_votable); |
| 8497 | if (chip->battchg_suspend_votable) |
| 8498 | destroy_votable(chip->battchg_suspend_votable); |
| 8499 | if (chip->dc_suspend_votable) |
| 8500 | destroy_votable(chip->dc_suspend_votable); |
| 8501 | if (chip->usb_suspend_votable) |
| 8502 | destroy_votable(chip->usb_suspend_votable); |
| 8503 | if (chip->dc_icl_votable) |
| 8504 | destroy_votable(chip->dc_icl_votable); |
| 8505 | if (chip->usb_icl_votable) |
| 8506 | destroy_votable(chip->usb_icl_votable); |
| 8507 | if (chip->fcc_votable) |
| 8508 | destroy_votable(chip->fcc_votable); |
| 8509 | return rc; |
| 8510 | } |
| 8511 | |
| 8512 | static int smbchg_remove(struct platform_device *pdev) |
| 8513 | { |
| 8514 | struct smbchg_chip *chip = dev_get_drvdata(&pdev->dev); |
| 8515 | |
| 8516 | debugfs_remove_recursive(chip->debug_root); |
| 8517 | |
| 8518 | destroy_votable(chip->aicl_deglitch_short_votable); |
| 8519 | destroy_votable(chip->hw_aicl_rerun_enable_indirect_votable); |
| 8520 | destroy_votable(chip->hw_aicl_rerun_disable_votable); |
| 8521 | destroy_votable(chip->battchg_suspend_votable); |
| 8522 | destroy_votable(chip->dc_suspend_votable); |
| 8523 | destroy_votable(chip->usb_suspend_votable); |
| 8524 | destroy_votable(chip->dc_icl_votable); |
| 8525 | destroy_votable(chip->usb_icl_votable); |
| 8526 | destroy_votable(chip->fcc_votable); |
| 8527 | |
| 8528 | return 0; |
| 8529 | } |
| 8530 | |
| 8531 | static void smbchg_shutdown(struct platform_device *pdev) |
| 8532 | { |
| 8533 | struct smbchg_chip *chip = dev_get_drvdata(&pdev->dev); |
| 8534 | int rc; |
| 8535 | |
| 8536 | if (!(chip->wa_flags & SMBCHG_RESTART_WA)) |
| 8537 | return; |
| 8538 | |
| 8539 | if (!is_hvdcp_present(chip)) |
| 8540 | return; |
| 8541 | |
Abhijeet Dharmapurikar | 59384b1 | 2016-04-27 15:20:29 -0700 | [diff] [blame] | 8542 | pr_smb(PR_MISC, "Reducing to 500mA\n"); |
| 8543 | rc = vote(chip->usb_icl_votable, SHUTDOWN_WORKAROUND_ICL_VOTER, true, |
| 8544 | 500); |
| 8545 | if (rc < 0) |
| 8546 | pr_err("Couldn't vote 500mA ICL\n"); |
| 8547 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8548 | pr_smb(PR_MISC, "Disable Parallel\n"); |
| 8549 | mutex_lock(&chip->parallel.lock); |
| 8550 | smbchg_parallel_en = 0; |
| 8551 | smbchg_parallel_usb_disable(chip); |
| 8552 | mutex_unlock(&chip->parallel.lock); |
| 8553 | |
| 8554 | pr_smb(PR_MISC, "Disable all interrupts\n"); |
| 8555 | disable_irq(chip->aicl_done_irq); |
| 8556 | disable_irq(chip->batt_cold_irq); |
| 8557 | disable_irq(chip->batt_cool_irq); |
| 8558 | disable_irq(chip->batt_hot_irq); |
| 8559 | disable_irq(chip->batt_missing_irq); |
| 8560 | disable_irq(chip->batt_warm_irq); |
| 8561 | disable_irq(chip->chg_error_irq); |
| 8562 | disable_irq(chip->chg_hot_irq); |
| 8563 | disable_irq(chip->chg_term_irq); |
| 8564 | disable_irq(chip->dcin_uv_irq); |
| 8565 | disable_irq(chip->fastchg_irq); |
| 8566 | disable_irq(chip->otg_fail_irq); |
| 8567 | disable_irq(chip->otg_oc_irq); |
| 8568 | disable_irq(chip->power_ok_irq); |
| 8569 | disable_irq(chip->recharge_irq); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8570 | disable_irq(chip->taper_irq); |
| 8571 | disable_irq(chip->usbid_change_irq); |
| 8572 | disable_irq(chip->usbin_ov_irq); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8573 | disable_irq(chip->vbat_low_irq); |
| 8574 | disable_irq(chip->wdog_timeout_irq); |
| 8575 | |
| 8576 | /* remove all votes for short deglitch */ |
| 8577 | vote(chip->aicl_deglitch_short_votable, |
| 8578 | VARB_WORKAROUND_SHORT_DEGLITCH_VOTER, false, 0); |
| 8579 | vote(chip->aicl_deglitch_short_votable, |
| 8580 | HVDCP_SHORT_DEGLITCH_VOTER, false, 0); |
| 8581 | |
| 8582 | /* vote to ensure AICL rerun is enabled */ |
| 8583 | rc = vote(chip->hw_aicl_rerun_enable_indirect_votable, |
| 8584 | SHUTDOWN_WORKAROUND_VOTER, true, 0); |
| 8585 | if (rc < 0) |
| 8586 | pr_err("Couldn't vote to enable indirect AICL rerun\n"); |
| 8587 | rc = vote(chip->hw_aicl_rerun_disable_votable, |
| 8588 | WEAK_CHARGER_HW_AICL_VOTER, false, 0); |
| 8589 | if (rc < 0) |
| 8590 | pr_err("Couldn't vote to enable AICL rerun\n"); |
| 8591 | |
| 8592 | /* switch to 5V HVDCP */ |
| 8593 | pr_smb(PR_MISC, "Switch to 5V HVDCP\n"); |
| 8594 | rc = smbchg_sec_masked_write(chip, chip->usb_chgpth_base + CHGPTH_CFG, |
| 8595 | HVDCP_ADAPTER_SEL_MASK, HVDCP_5V); |
| 8596 | if (rc < 0) { |
| 8597 | pr_err("Couldn't configure HVDCP 5V rc=%d\n", rc); |
| 8598 | return; |
| 8599 | } |
| 8600 | |
| 8601 | pr_smb(PR_MISC, "Wait 500mS to lower to 5V\n"); |
| 8602 | /* wait for HVDCP to lower to 5V */ |
| 8603 | msleep(500); |
| 8604 | /* |
| 8605 | * Check if the same hvdcp session is in progress. src_det should be |
| 8606 | * high and that we are still in 5V hvdcp |
| 8607 | */ |
| 8608 | if (!is_src_detect_high(chip)) { |
| 8609 | pr_smb(PR_MISC, "src det low after 500mS sleep\n"); |
| 8610 | return; |
| 8611 | } |
| 8612 | |
| 8613 | /* disable HVDCP */ |
| 8614 | pr_smb(PR_MISC, "Disable HVDCP\n"); |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 8615 | rc = vote(chip->hvdcp_enable_votable, HVDCP_PMIC_VOTER, true, 0); |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8616 | if (rc < 0) |
| 8617 | pr_err("Couldn't disable HVDCP rc=%d\n", rc); |
| 8618 | |
| 8619 | chip->hvdcp_3_det_ignore_uv = true; |
| 8620 | /* fake a removal */ |
| 8621 | pr_smb(PR_MISC, "Faking Removal\n"); |
| 8622 | rc = fake_insertion_removal(chip, false); |
| 8623 | if (rc < 0) |
| 8624 | pr_err("Couldn't fake removal HVDCP Removed rc=%d\n", rc); |
| 8625 | |
| 8626 | /* fake an insertion */ |
| 8627 | pr_smb(PR_MISC, "Faking Insertion\n"); |
| 8628 | rc = fake_insertion_removal(chip, true); |
| 8629 | if (rc < 0) |
| 8630 | pr_err("Couldn't fake insertion rc=%d\n", rc); |
| 8631 | |
Ashay Jaiswal | 7bea04c | 2016-08-09 15:17:56 +0530 | [diff] [blame] | 8632 | disable_irq(chip->src_detect_irq); |
| 8633 | disable_irq(chip->usbin_uv_irq); |
| 8634 | |
Kiran Gunda | 1bc7892 | 2017-09-19 13:09:44 +0530 | [diff] [blame] | 8635 | pr_smb(PR_MISC, "Wait 1S to settle\n"); |
| 8636 | msleep(1000); |
| 8637 | chip->hvdcp_3_det_ignore_uv = false; |
| 8638 | |
| 8639 | pr_smb(PR_STATUS, "wrote power off configurations\n"); |
| 8640 | } |
| 8641 | |
| 8642 | static const struct dev_pm_ops smbchg_pm_ops = { |
| 8643 | }; |
| 8644 | |
| 8645 | MODULE_DEVICE_TABLE(spmi, smbchg_id); |
| 8646 | |
| 8647 | static struct platform_driver smbchg_driver = { |
| 8648 | .driver = { |
| 8649 | .name = "qpnp-smbcharger", |
| 8650 | .owner = THIS_MODULE, |
| 8651 | .of_match_table = smbchg_match_table, |
| 8652 | .pm = &smbchg_pm_ops, |
| 8653 | }, |
| 8654 | .probe = smbchg_probe, |
| 8655 | .remove = smbchg_remove, |
| 8656 | .shutdown = smbchg_shutdown, |
| 8657 | }; |
| 8658 | |
| 8659 | static int __init smbchg_init(void) |
| 8660 | { |
| 8661 | return platform_driver_register(&smbchg_driver); |
| 8662 | } |
| 8663 | |
| 8664 | static void __exit smbchg_exit(void) |
| 8665 | { |
| 8666 | return platform_driver_unregister(&smbchg_driver); |
| 8667 | } |
| 8668 | |
| 8669 | module_init(smbchg_init); |
| 8670 | module_exit(smbchg_exit); |
| 8671 | |
| 8672 | MODULE_DESCRIPTION("QPNP SMB Charger"); |
| 8673 | MODULE_LICENSE("GPL v2"); |
| 8674 | MODULE_ALIAS("platform:qpnp-smbcharger"); |