David Gibson | f6dfc80 | 2007-05-08 14:10:01 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2007 David Gibson, IBM Corporation. |
| 3 | * |
| 4 | * Based on earlier code: |
| 5 | * Copyright (C) Paul Mackerras 1997. |
| 6 | * |
| 7 | * Matt Porter <mporter@kernel.crashing.org> |
| 8 | * Copyright 2002-2005 MontaVista Software Inc. |
| 9 | * |
| 10 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
| 11 | * Copyright (c) 2003, 2004 Zultys Technologies |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License |
| 15 | * as published by the Free Software Foundation; either version |
| 16 | * 2 of the License, or (at your option) any later version. |
| 17 | */ |
| 18 | #include <stdarg.h> |
| 19 | #include <stddef.h> |
| 20 | #include "types.h" |
| 21 | #include "elf.h" |
| 22 | #include "string.h" |
| 23 | #include "stdio.h" |
| 24 | #include "page.h" |
| 25 | #include "ops.h" |
| 26 | #include "reg.h" |
David Gibson | 0d279d4 | 2007-07-30 15:55:02 +1000 | [diff] [blame] | 27 | #include "io.h" |
David Gibson | f6dfc80 | 2007-05-08 14:10:01 +1000 | [diff] [blame] | 28 | #include "dcr.h" |
Josh Boyer | e90f3b7 | 2007-08-20 07:28:30 -0500 | [diff] [blame^] | 29 | #include "4xx.h" |
David Gibson | f6dfc80 | 2007-05-08 14:10:01 +1000 | [diff] [blame] | 30 | #include "44x.h" |
| 31 | |
| 32 | extern char _dtb_start[]; |
| 33 | extern char _dtb_end[]; |
| 34 | |
| 35 | static u8 *ebony_mac0, *ebony_mac1; |
| 36 | |
| 37 | /* Calculate 440GP clocks */ |
| 38 | void ibm440gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk) |
| 39 | { |
| 40 | u32 sys0 = mfdcr(DCRN_CPC0_SYS0); |
| 41 | u32 cr0 = mfdcr(DCRN_CPC0_CR0); |
| 42 | u32 cpu, plb, opb, ebc, tb, uart0, uart1, m; |
| 43 | u32 opdv = CPC0_SYS0_OPDV(sys0); |
| 44 | u32 epdv = CPC0_SYS0_EPDV(sys0); |
| 45 | |
| 46 | if (sys0 & CPC0_SYS0_BYPASS) { |
| 47 | /* Bypass system PLL */ |
| 48 | cpu = plb = sysclk; |
| 49 | } else { |
| 50 | if (sys0 & CPC0_SYS0_EXTSL) |
| 51 | /* PerClk */ |
| 52 | m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv; |
| 53 | else |
| 54 | /* CPU clock */ |
| 55 | m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0); |
| 56 | cpu = sysclk * m / CPC0_SYS0_FWDVA(sys0); |
| 57 | plb = sysclk * m / CPC0_SYS0_FWDVB(sys0); |
| 58 | } |
| 59 | |
| 60 | opb = plb / opdv; |
| 61 | ebc = opb / epdv; |
| 62 | |
| 63 | /* FIXME: Check if this is for all 440GP, or just Ebony */ |
| 64 | if ((mfpvr() & 0xf0000fff) == 0x40000440) |
| 65 | /* Rev. B 440GP, use external system clock */ |
| 66 | tb = sysclk; |
| 67 | else |
| 68 | /* Rev. C 440GP, errata force us to use internal clock */ |
| 69 | tb = cpu; |
| 70 | |
| 71 | if (cr0 & CPC0_CR0_U0EC) |
| 72 | /* External UART clock */ |
| 73 | uart0 = ser_clk; |
| 74 | else |
| 75 | /* Internal UART clock */ |
| 76 | uart0 = plb / CPC0_CR0_UDIV(cr0); |
| 77 | |
| 78 | if (cr0 & CPC0_CR0_U1EC) |
| 79 | /* External UART clock */ |
| 80 | uart1 = ser_clk; |
| 81 | else |
| 82 | /* Internal UART clock */ |
| 83 | uart1 = plb / CPC0_CR0_UDIV(cr0); |
| 84 | |
| 85 | printf("PPC440GP: SysClk = %dMHz (%x)\n\r", |
| 86 | (sysclk + 500000) / 1000000, sysclk); |
| 87 | |
| 88 | dt_fixup_cpu_clocks(cpu, tb, 0); |
| 89 | |
| 90 | dt_fixup_clock("/plb", plb); |
| 91 | dt_fixup_clock("/plb/opb", opb); |
| 92 | dt_fixup_clock("/plb/opb/ebc", ebc); |
| 93 | dt_fixup_clock("/plb/opb/serial@40000200", uart0); |
| 94 | dt_fixup_clock("/plb/opb/serial@40000300", uart1); |
| 95 | } |
| 96 | |
David Gibson | 0d279d4 | 2007-07-30 15:55:02 +1000 | [diff] [blame] | 97 | #define EBONY_FPGA_PATH "/plb/opb/ebc/fpga" |
| 98 | #define EBONY_FPGA_FLASH_SEL 0x01 |
| 99 | #define EBONY_SMALL_FLASH_PATH "/plb/opb/ebc/small-flash" |
| 100 | |
| 101 | static void ebony_flashsel_fixup(void) |
| 102 | { |
| 103 | void *devp; |
| 104 | u32 reg[3] = {0x0, 0x0, 0x80000}; |
| 105 | u8 *fpga; |
| 106 | u8 fpga_reg0 = 0x0; |
| 107 | |
| 108 | devp = finddevice(EBONY_FPGA_PATH); |
| 109 | if (!devp) |
| 110 | fatal("Couldn't locate FPGA node %s\n\r", EBONY_FPGA_PATH); |
| 111 | |
| 112 | if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga)) |
| 113 | fatal("%s has missing or invalid virtual-reg property\n\r", |
| 114 | EBONY_FPGA_PATH); |
| 115 | |
| 116 | fpga_reg0 = in_8(fpga); |
| 117 | |
| 118 | devp = finddevice(EBONY_SMALL_FLASH_PATH); |
| 119 | if (!devp) |
| 120 | fatal("Couldn't locate small flash node %s\n\r", |
| 121 | EBONY_SMALL_FLASH_PATH); |
| 122 | |
| 123 | if (getprop(devp, "reg", reg, sizeof(reg)) != sizeof(reg)) |
| 124 | fatal("%s has reg property of unexpected size\n\r", |
| 125 | EBONY_SMALL_FLASH_PATH); |
| 126 | |
| 127 | /* Invert address bit 14 (IBM-endian) if FLASH_SEL fpga bit is set */ |
| 128 | if (fpga_reg0 & EBONY_FPGA_FLASH_SEL) |
| 129 | reg[1] ^= 0x80000; |
| 130 | |
| 131 | setprop(devp, "reg", reg, sizeof(reg)); |
| 132 | } |
| 133 | |
David Gibson | f6dfc80 | 2007-05-08 14:10:01 +1000 | [diff] [blame] | 134 | static void ebony_fixups(void) |
| 135 | { |
| 136 | // FIXME: sysclk should be derived by reading the FPGA registers |
| 137 | unsigned long sysclk = 33000000; |
| 138 | |
| 139 | ibm440gp_fixup_clocks(sysclk, 6 * 1843200); |
Josh Boyer | e90f3b7 | 2007-08-20 07:28:30 -0500 | [diff] [blame^] | 140 | ibm4xx_fixup_memsize(); |
David Gibson | f6dfc80 | 2007-05-08 14:10:01 +1000 | [diff] [blame] | 141 | dt_fixup_mac_addresses(ebony_mac0, ebony_mac1); |
David Gibson | b2ba34f | 2007-06-13 14:52:59 +1000 | [diff] [blame] | 142 | ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); |
David Gibson | 0d279d4 | 2007-07-30 15:55:02 +1000 | [diff] [blame] | 143 | ebony_flashsel_fixup(); |
David Gibson | f6dfc80 | 2007-05-08 14:10:01 +1000 | [diff] [blame] | 144 | } |
| 145 | |
David Gibson | f6dfc80 | 2007-05-08 14:10:01 +1000 | [diff] [blame] | 146 | void ebony_init(void *mac0, void *mac1) |
| 147 | { |
| 148 | platform_ops.fixups = ebony_fixups; |
David Gibson | 1112334 | 2007-06-13 14:52:58 +1000 | [diff] [blame] | 149 | platform_ops.exit = ibm44x_dbcr_reset; |
David Gibson | f6dfc80 | 2007-05-08 14:10:01 +1000 | [diff] [blame] | 150 | ebony_mac0 = mac0; |
| 151 | ebony_mac1 = mac1; |
| 152 | ft_init(_dtb_start, _dtb_end - _dtb_start, 32); |
| 153 | serial_console_init(); |
| 154 | } |