Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | Kernel driver i2c-i801 |
| 2 | |
| 3 | Supported adapters: |
| 4 | * Intel 82801AA and 82801AB (ICH and ICH0 - part of the |
| 5 | '810' and '810E' chipsets) |
| 6 | * Intel 82801BA (ICH2 - part of the '815E' chipset) |
| 7 | * Intel 82801CA/CAM (ICH3) |
Oleg Ryjkov | 7edcb9a | 2007-07-12 14:12:31 +0200 | [diff] [blame] | 8 | * Intel 82801DB (ICH4) (HW PEC supported) |
| 9 | * Intel 82801EB/ER (ICH5) (HW PEC supported) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | * Intel 6300ESB |
| 11 | * Intel 82801FB/FR/FW/FRW (ICH6) |
Jason Gaston | a980a99 | 2006-12-10 21:21:31 +0100 | [diff] [blame] | 12 | * Intel 82801G (ICH7) |
| 13 | * Intel 631xESB/632xESB (ESB2) |
| 14 | * Intel 82801H (ICH8) |
Gaston, Jason D | d28dc71 | 2008-02-24 20:03:42 +0100 | [diff] [blame] | 15 | * Intel 82801I (ICH9) |
Seth Heasley | c429a24 | 2008-10-22 20:21:29 +0200 | [diff] [blame] | 16 | * Intel EP80579 (Tolapai) |
| 17 | * Intel 82801JI (ICH10) |
Seth Heasley | e30d985 | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 18 | * Intel 5/3400 Series (PCH) |
Seth Heasley | 662cda8 | 2011-03-20 14:50:53 +0100 | [diff] [blame] | 19 | * Intel 6 Series (PCH) |
Seth Heasley | e30d985 | 2010-10-31 21:06:59 +0100 | [diff] [blame] | 20 | * Intel Patsburg (PCH) |
Seth Heasley | 662cda8 | 2011-03-20 14:50:53 +0100 | [diff] [blame] | 21 | * Intel DH89xxCC (PCH) |
Seth Heasley | 6e2a851 | 2011-05-24 20:58:49 +0200 | [diff] [blame] | 22 | * Intel Panther Point (PCH) |
Seth Heasley | 062737f | 2012-03-26 21:47:19 +0200 | [diff] [blame] | 23 | * Intel Lynx Point (PCH) |
James Ralston | 4a8f1dd | 2012-09-10 10:14:02 +0200 | [diff] [blame] | 24 | * Intel Lynx Point-LP (PCH) |
Seth Heasley | c2db409c | 2013-01-30 15:25:32 +0000 | [diff] [blame] | 25 | * Intel Avoton (SOC) |
James Ralston | a3fc0ff | 2013-02-14 09:15:33 +0000 | [diff] [blame] | 26 | * Intel Wellsburg (PCH) |
Seth Heasley | f39901c | 2013-06-19 16:59:57 -0700 | [diff] [blame] | 27 | * Intel Coleto Creek (PCH) |
Jean Delvare | b299de8 | 2014-07-17 15:04:41 +0200 | [diff] [blame] | 28 | * Intel Wildcat Point (PCH) |
James Ralston | afc6592 | 2013-11-04 09:29:48 -0800 | [diff] [blame] | 29 | * Intel Wildcat Point-LP (PCH) |
Chew, Kean ho | 1b31e9b | 2014-03-01 00:03:56 +0800 | [diff] [blame] | 30 | * Intel BayTrail (SOC) |
james.d.ralston@intel.com | 3e27a84 | 2014-10-13 15:20:24 -0700 | [diff] [blame] | 31 | * Intel Sunrise Point-H (PCH) |
Devin Ryles | 3eee1799 | 2014-11-05 16:30:03 -0500 | [diff] [blame] | 32 | * Intel Sunrise Point-LP (PCH) |
Jarkko Nikula | 2b630df7 | 2015-10-26 13:26:56 +0200 | [diff] [blame] | 33 | * Intel DNV (SOC) |
| 34 | * Intel Broxton (SOC) |
Alexandra Yates | cdc5a31 | 2015-11-05 11:40:25 -0800 | [diff] [blame] | 35 | * Intel Lewisburg (PCH) |
Jason Gaston | e07bc67 | 2007-10-13 23:56:31 +0200 | [diff] [blame] | 36 | Datasheets: Publicly available at the Intel website |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | |
David Woodhouse | 55fee8d | 2010-10-31 21:07:00 +0100 | [diff] [blame] | 38 | On Intel Patsburg and later chipsets, both the normal host SMBus controller |
| 39 | and the additional 'Integrated Device Function' controllers are supported. |
| 40 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | Authors: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | Mark Studebaker <mdsxyz123@yahoo.com> |
Jean Delvare | 7c81c60 | 2014-01-29 20:40:08 +0100 | [diff] [blame] | 43 | Jean Delvare <jdelvare@suse.de> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | |
| 45 | |
| 46 | Module Parameters |
| 47 | ----------------- |
| 48 | |
Jean Delvare | adff687 | 2010-05-21 18:40:54 +0200 | [diff] [blame] | 49 | * disable_features (bit vector) |
| 50 | Disable selected features normally supported by the device. This makes it |
| 51 | possible to work around possible driver or hardware bugs if the feature in |
| 52 | question doesn't work as intended for whatever reason. Bit values: |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 53 | 0x01 disable SMBus PEC |
| 54 | 0x02 disable the block buffer |
| 55 | 0x08 disable the I2C block read functionality |
| 56 | 0x10 don't use interrupts |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | |
| 58 | |
| 59 | Description |
| 60 | ----------- |
| 61 | |
| 62 | The ICH (properly known as the 82801AA), ICH0 (82801AB), ICH2 (82801BA), |
Seth Heasley | c429a24 | 2008-10-22 20:21:29 +0200 | [diff] [blame] | 63 | ICH3 (82801CA/CAM) and later devices (PCH) are Intel chips that are a part of |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | Intel's '810' chipset for Celeron-based PCs, '810E' chipset for |
| 65 | Pentium-based PCs, '815E' chipset, and others. |
| 66 | |
| 67 | The ICH chips contain at least SEVEN separate PCI functions in TWO logical |
| 68 | PCI devices. An output of lspci will show something similar to the |
| 69 | following: |
| 70 | |
| 71 | 00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01) |
| 72 | 00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01) |
| 73 | 00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01) |
| 74 | 00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01) |
| 75 | 00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01) |
| 76 | |
| 77 | The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial |
| 78 | Controller. |
| 79 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | The ICH chips are quite similar to Intel's PIIX4 chip, at least in the |
| 81 | SMBus controller. |
| 82 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | |
| 84 | Process Call Support |
| 85 | -------------------- |
| 86 | |
| 87 | Not supported. |
| 88 | |
| 89 | |
| 90 | I2C Block Read Support |
| 91 | ---------------------- |
| 92 | |
Jean Delvare | 6342064 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 93 | I2C block read is supported on the 82801EB (ICH5) and later chips. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | |
| 95 | |
| 96 | SMBus 2.0 Support |
| 97 | ----------------- |
| 98 | |
| 99 | The 82801DB (ICH4) and later chips support several SMBus 2.0 features. |
| 100 | |
Jean Delvare | 099ab11 | 2007-02-13 22:09:00 +0100 | [diff] [blame] | 101 | |
Daniel Kurtz | 636752b | 2012-07-24 14:13:58 +0200 | [diff] [blame] | 102 | Interrupt Support |
| 103 | ----------------- |
| 104 | |
| 105 | PCI interrupt support is supported on the 82801EB (ICH5) and later chips. |
| 106 | |
| 107 | |
Jean Delvare | 099ab11 | 2007-02-13 22:09:00 +0100 | [diff] [blame] | 108 | Hidden ICH SMBus |
| 109 | ---------------- |
| 110 | |
| 111 | If your system has an Intel ICH south bridge, but you do NOT see the |
| 112 | SMBus device at 00:1f.3 in lspci, and you can't figure out any way in the |
| 113 | BIOS to enable it, it means it has been hidden by the BIOS code. Asus is |
| 114 | well known for first doing this on their P4B motherboard, and many other |
| 115 | boards after that. Some vendor machines are affected as well. |
| 116 | |
| 117 | The first thing to try is the "i2c_ec" ACPI driver. It could be that the |
| 118 | SMBus was hidden on purpose because it'll be driven by ACPI. If the |
| 119 | i2c_ec driver works for you, just forget about the i2c-i801 driver and |
| 120 | don't try to unhide the ICH SMBus. Even if i2c_ec doesn't work, you |
| 121 | better make sure that the SMBus isn't used by the ACPI code. Try loading |
| 122 | the "fan" and "thermal" drivers, and check in /proc/acpi/fan and |
| 123 | /proc/acpi/thermal_zone. If you find anything there, it's likely that |
| 124 | the ACPI is accessing the SMBus and it's safer not to unhide it. Only |
| 125 | once you are certain that ACPI isn't using the SMBus, you can attempt |
| 126 | to unhide it. |
| 127 | |
| 128 | In order to unhide the SMBus, we need to change the value of a PCI |
| 129 | register before the kernel enumerates the PCI devices. This is done in |
| 130 | drivers/pci/quirks.c, where all affected boards must be listed (see |
| 131 | function asus_hides_smbus_hostbridge.) If the SMBus device is missing, |
| 132 | and you think there's something interesting on the SMBus (e.g. a |
| 133 | hardware monitoring chip), you need to add your board to the list. |
| 134 | |
| 135 | The motherboard is identified using the subvendor and subdevice IDs of the |
| 136 | host bridge PCI device. Get yours with "lspci -n -v -s 00:00.0": |
| 137 | |
| 138 | 00:00.0 Class 0600: 8086:2570 (rev 02) |
| 139 | Subsystem: 1043:80f2 |
| 140 | Flags: bus master, fast devsel, latency 0 |
| 141 | Memory at fc000000 (32-bit, prefetchable) [size=32M] |
| 142 | Capabilities: [e4] #09 [2106] |
| 143 | Capabilities: [a0] AGP version 3.0 |
| 144 | |
| 145 | Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043 |
| 146 | (Asus) and the subdevice ID is 80f2 (P4P800-X). You can find the symbolic |
| 147 | names for the bridge ID and the subvendor ID in include/linux/pci_ids.h, |
| 148 | and then add a case for your subdevice ID at the right place in |
| 149 | drivers/pci/quirks.c. Then please give it very good testing, to make sure |
| 150 | that the unhidden SMBus doesn't conflict with e.g. ACPI. |
| 151 | |
| 152 | If it works, proves useful (i.e. there are usable chips on the SMBus) |
| 153 | and seems safe, please submit a patch for inclusion into the kernel. |
| 154 | |
| 155 | Note: There's a useful script in lm_sensors 2.10.2 and later, named |
| 156 | unhide_ICH_SMBus (in prog/hotplug), which uses the fakephp driver to |
| 157 | temporarily unhide the SMBus without having to patch and recompile your |
| 158 | kernel. It's very convenient if you just want to check if there's |
| 159 | anything interesting on your hidden ICH SMBus. |
| 160 | |
| 161 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | ********************** |
| 163 | The lm_sensors project gratefully acknowledges the support of Texas |
| 164 | Instruments in the initial development of this driver. |
| 165 | |
| 166 | The lm_sensors project gratefully acknowledges the support of Intel in the |
| 167 | development of SMBus 2.0 / ICH4 features of this driver. |