blob: f295ef0baefee4d6620d01d37d9b32a3eff5b0c5 [file] [log] [blame]
Jack Phamf4baeb12017-02-03 19:01:48 -08001/* Copyright (c) 2016-2017, Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/slab.h>
16#include <linux/regmap.h>
17#include <linux/regulator/consumer.h>
18#include <linux/interrupt.h>
19#include <linux/platform_device.h>
20#include <linux/delay.h>
21#include <linux/of.h>
22#include <linux/irq.h>
23#include <linux/of_irq.h>
24#include <linux/debugfs.h>
25#include <linux/seq_file.h>
26#include <linux/sched.h>
27#include <linux/wait.h>
28#include "usbpd.h"
29
30#define USB_PDPHY_MAX_DATA_OBJ_LEN 28
31#define USB_PDPHY_MSG_HDR_LEN 2
32
33/* PD PHY register offsets and bit fields */
34#define USB_PDPHY_MSG_CONFIG 0x40
35#define MSG_CONFIG_PORT_DATA_ROLE BIT(3)
36#define MSG_CONFIG_PORT_POWER_ROLE BIT(2)
37#define MSG_CONFIG_SPEC_REV_MASK (BIT(1) | BIT(0))
38
39#define USB_PDPHY_EN_CONTROL 0x46
40#define CONTROL_ENABLE BIT(0)
41
42#define USB_PDPHY_RX_STATUS 0x4A
43#define RX_FRAME_TYPE (BIT(0) | BIT(1) | BIT(2))
44
45#define USB_PDPHY_FRAME_FILTER 0x4C
46#define FRAME_FILTER_EN_HARD_RESET BIT(5)
47#define FRAME_FILTER_EN_SOP BIT(0)
48
49#define USB_PDPHY_TX_SIZE 0x42
50#define TX_SIZE_MASK 0xF
51
52#define USB_PDPHY_TX_CONTROL 0x44
53#define TX_CONTROL_RETRY_COUNT (BIT(6) | BIT(5))
54#define TX_CONTROL_FRAME_TYPE (BIT(4) | BIT(3) | BIT(2))
55#define TX_CONTROL_FRAME_TYPE_CABLE_RESET (0x1 << 2)
56#define TX_CONTROL_SEND_SIGNAL BIT(1)
57#define TX_CONTROL_SEND_MSG BIT(0)
58
59#define USB_PDPHY_RX_SIZE 0x48
60
61#define USB_PDPHY_RX_ACKNOWLEDGE 0x4B
62#define RX_BUFFER_TOKEN BIT(0)
63
64#define USB_PDPHY_BIST_MODE 0x4E
65#define BIST_MODE_MASK 0xF
66#define BIST_ENABLE BIT(7)
67#define PD_MSG_BIST 0x3
68#define PD_BIST_TEST_DATA_MODE 0x8
69
70#define USB_PDPHY_TX_BUFFER_HDR 0x60
71#define USB_PDPHY_TX_BUFFER_DATA 0x62
72
73#define USB_PDPHY_RX_BUFFER 0x80
74
75#define USB_PDPHY_SEC_ACCESS 0xD0
76#define USB_PDPHY_TRIM_3 0xF3
77
78/* VDD regulator */
79#define VDD_PDPHY_VOL_MIN 3088000 /* uV */
80#define VDD_PDPHY_VOL_MAX 3088000 /* uV */
81#define VDD_PDPHY_HPM_LOAD 3000 /* uA */
82
83struct usb_pdphy {
84 struct device *dev;
85 struct regmap *regmap;
86
87 u16 base;
88 struct regulator *vdd_pdphy;
89
90 /* irqs */
91 int sig_tx_irq;
92 int sig_rx_irq;
93 int msg_tx_irq;
94 int msg_rx_irq;
95 int msg_tx_failed_irq;
96 int msg_tx_discarded_irq;
97 int msg_rx_discarded_irq;
98
Jack Phame95cfc72017-08-01 17:36:50 -070099 void (*signal_cb)(struct usbpd *pd, enum pd_sig_type sig);
100 void (*msg_rx_cb)(struct usbpd *pd, enum pd_sop_type sop,
Jack Phamf4baeb12017-02-03 19:01:48 -0800101 u8 *buf, size_t len);
102 void (*shutdown_cb)(struct usbpd *pd);
103
104 /* write waitq */
105 wait_queue_head_t tx_waitq;
106
107 bool is_opened;
108 int tx_status;
109 u8 frame_filter_val;
110 bool in_test_data_mode;
Jack Phame24693c2017-06-06 22:30:47 -0700111 bool rx_busy;
Jack Phamf4baeb12017-02-03 19:01:48 -0800112
113 enum data_role data_role;
114 enum power_role power_role;
115
116 struct usbpd *usbpd;
117
118 /* debug */
119 struct dentry *debug_root;
120 unsigned int tx_bytes; /* hdr + data */
121 unsigned int rx_bytes; /* hdr + data */
122 unsigned int sig_tx_cnt;
123 unsigned int sig_rx_cnt;
124 unsigned int msg_tx_cnt;
125 unsigned int msg_rx_cnt;
126 unsigned int msg_tx_failed_cnt;
127 unsigned int msg_tx_discarded_cnt;
128 unsigned int msg_rx_discarded_cnt;
129};
130
131static struct usb_pdphy *__pdphy;
132
133static int pdphy_dbg_status(struct seq_file *s, void *p)
134{
135 struct usb_pdphy *pdphy = s->private;
136
137 seq_printf(s,
138 "PD Phy driver status\n"
139 "==================================================\n");
140 seq_printf(s, "opened: %10d\n", pdphy->is_opened);
141 seq_printf(s, "tx status: %10d\n", pdphy->tx_status);
142 seq_printf(s, "tx bytes: %10u\n", pdphy->tx_bytes);
143 seq_printf(s, "rx bytes: %10u\n", pdphy->rx_bytes);
144 seq_printf(s, "data role: %10u\n", pdphy->data_role);
145 seq_printf(s, "power role: %10u\n", pdphy->power_role);
146 seq_printf(s, "frame filter: %10u\n", pdphy->frame_filter_val);
147 seq_printf(s, "sig tx cnt: %10u\n", pdphy->sig_tx_cnt);
148 seq_printf(s, "sig rx cnt: %10u\n", pdphy->sig_rx_cnt);
149 seq_printf(s, "msg tx cnt: %10u\n", pdphy->msg_tx_cnt);
150 seq_printf(s, "msg rx cnt: %10u\n", pdphy->msg_rx_cnt);
151 seq_printf(s, "msg tx failed cnt: %10u\n",
152 pdphy->msg_tx_failed_cnt);
153 seq_printf(s, "msg tx discarded cnt: %10u\n",
154 pdphy->msg_tx_discarded_cnt);
155 seq_printf(s, "msg rx discarded cnt: %10u\n",
156 pdphy->msg_rx_discarded_cnt);
157
158 return 0;
159}
160
161static int pdphy_dbg_status_open(struct inode *inode, struct file *file)
162{
163 return single_open(file, pdphy_dbg_status, inode->i_private);
164}
165
166static const struct file_operations status_ops = {
167 .owner = THIS_MODULE,
168 .open = pdphy_dbg_status_open,
169 .llseek = seq_lseek,
170 .read = seq_read,
171 .release = single_release,
172};
173
174static void pdphy_create_debugfs_entries(struct usb_pdphy *pdphy)
175{
176 struct dentry *ent;
177
178 pdphy->debug_root = debugfs_create_dir("usb-pdphy", NULL);
179 if (!pdphy->debug_root) {
180 dev_warn(pdphy->dev, "Couldn't create debug dir\n");
181 return;
182 }
183
184 ent = debugfs_create_file("status", 0400, pdphy->debug_root, pdphy,
185 &status_ops);
186 if (!ent) {
187 dev_warn(pdphy->dev, "Couldn't create status file\n");
188 debugfs_remove(pdphy->debug_root);
189 }
190}
191
192static int pdphy_enable_power(struct usb_pdphy *pdphy, bool on)
193{
194 int ret = 0;
195
196 dev_dbg(pdphy->dev, "%s turn %s regulator.\n", __func__,
197 on ? "on" : "off");
198
199 if (!on)
200 goto disable_pdphy_vdd;
201
202 ret = regulator_set_load(pdphy->vdd_pdphy, VDD_PDPHY_HPM_LOAD);
203 if (ret < 0) {
204 dev_err(pdphy->dev, "Unable to set HPM of vdd_pdphy:%d\n", ret);
205 return ret;
206 }
207
208 ret = regulator_set_voltage(pdphy->vdd_pdphy, VDD_PDPHY_VOL_MIN,
209 VDD_PDPHY_VOL_MAX);
210 if (ret) {
211 dev_err(pdphy->dev,
212 "set voltage failed for vdd_pdphy:%d\n", ret);
213 goto put_pdphy_vdd_lpm;
214 }
215
216 ret = regulator_enable(pdphy->vdd_pdphy);
217 if (ret) {
218 dev_err(pdphy->dev, "Unable to enable vdd_pdphy:%d\n", ret);
219 goto unset_pdphy_vdd;
220 }
221
222 dev_dbg(pdphy->dev, "%s: PD PHY regulator turned ON.\n", __func__);
223 return ret;
224
225disable_pdphy_vdd:
226 ret = regulator_disable(pdphy->vdd_pdphy);
227 if (ret)
228 dev_err(pdphy->dev, "Unable to disable vdd_pdphy:%d\n", ret);
229
230unset_pdphy_vdd:
231 ret = regulator_set_voltage(pdphy->vdd_pdphy, 0, VDD_PDPHY_VOL_MAX);
232 if (ret)
233 dev_err(pdphy->dev,
234 "Unable to set (0) voltage for vdd_pdphy:%d\n", ret);
235
236put_pdphy_vdd_lpm:
237 ret = regulator_set_load(pdphy->vdd_pdphy, 0);
238 if (ret < 0)
239 dev_err(pdphy->dev, "Unable to set (0) HPM of vdd_pdphy\n");
240
241 return ret;
242}
243
244void pdphy_enable_irq(struct usb_pdphy *pdphy, bool enable)
245{
246 if (enable) {
247 enable_irq(pdphy->sig_tx_irq);
248 enable_irq(pdphy->sig_rx_irq);
249 enable_irq_wake(pdphy->sig_rx_irq);
250 enable_irq(pdphy->msg_tx_irq);
251 if (!pdphy->in_test_data_mode) {
252 enable_irq(pdphy->msg_rx_irq);
253 enable_irq_wake(pdphy->msg_rx_irq);
254 }
255 enable_irq(pdphy->msg_tx_failed_irq);
256 enable_irq(pdphy->msg_tx_discarded_irq);
257 enable_irq(pdphy->msg_rx_discarded_irq);
258 return;
259 }
260
261 disable_irq(pdphy->sig_tx_irq);
262 disable_irq(pdphy->sig_rx_irq);
263 disable_irq_wake(pdphy->sig_rx_irq);
264 disable_irq(pdphy->msg_tx_irq);
265 if (!pdphy->in_test_data_mode) {
266 disable_irq(pdphy->msg_rx_irq);
267 disable_irq_wake(pdphy->msg_rx_irq);
268 }
269 disable_irq(pdphy->msg_tx_failed_irq);
270 disable_irq(pdphy->msg_tx_discarded_irq);
271 disable_irq(pdphy->msg_rx_discarded_irq);
272}
273
274static int pdphy_reg_read(struct usb_pdphy *pdphy, u8 *val, u16 addr, int count)
275{
276 int ret;
277
278 ret = regmap_bulk_read(pdphy->regmap, pdphy->base + addr, val, count);
279 if (ret) {
280 dev_err(pdphy->dev, "read failed: addr=0x%04x, ret=%d\n",
281 pdphy->base + addr, ret);
282 return ret;
283 }
284
285 return 0;
286}
287
288/* Write multiple registers to device with block of data */
289static int pdphy_bulk_reg_write(struct usb_pdphy *pdphy, u16 addr,
290 const void *val, u8 val_cnt)
291{
292 int ret;
293
294 ret = regmap_bulk_write(pdphy->regmap, pdphy->base + addr,
295 val, val_cnt);
296 if (ret) {
297 dev_err(pdphy->dev, "bulk write failed: addr=0x%04x, ret=%d\n",
298 pdphy->base + addr, ret);
299 return ret;
300 }
301
302 return 0;
303}
304
305/* Writes a single byte to the specified register */
306static inline int pdphy_reg_write(struct usb_pdphy *pdphy, u16 addr, u8 val)
307{
308 return pdphy_bulk_reg_write(pdphy, addr, &val, 1);
309}
310
311/* Writes to the specified register limited by the bit mask */
312static int pdphy_masked_write(struct usb_pdphy *pdphy, u16 addr,
313 u8 mask, u8 val)
314{
315 int ret;
316
317 ret = regmap_update_bits(pdphy->regmap, pdphy->base + addr, mask, val);
318 if (ret) {
319 dev_err(pdphy->dev, "write failed: addr=0x%04x, ret=%d\n",
320 pdphy->base + addr, ret);
321 return ret;
322 }
323
324 return 0;
325}
326
327int pd_phy_update_roles(enum data_role dr, enum power_role pr)
328{
329 struct usb_pdphy *pdphy = __pdphy;
330
331 return pdphy_masked_write(pdphy, USB_PDPHY_MSG_CONFIG,
332 (MSG_CONFIG_PORT_DATA_ROLE | MSG_CONFIG_PORT_POWER_ROLE),
333 ((dr == DR_DFP ? MSG_CONFIG_PORT_DATA_ROLE : 0) |
334 (pr == PR_SRC ? MSG_CONFIG_PORT_POWER_ROLE : 0)));
335}
336EXPORT_SYMBOL(pd_phy_update_roles);
337
Jack Phamf4baeb12017-02-03 19:01:48 -0800338int pd_phy_open(struct pd_phy_params *params)
339{
340 int ret;
341 struct usb_pdphy *pdphy = __pdphy;
342
343 if (!pdphy) {
344 pr_err("%s: pdphy not found\n", __func__);
345 return -ENODEV;
346 }
347
348 if (pdphy->is_opened) {
349 dev_err(pdphy->dev, "%s: already opened\n", __func__);
350 return -EBUSY;
351 }
352
353 pdphy->signal_cb = params->signal_cb;
354 pdphy->msg_rx_cb = params->msg_rx_cb;
355 pdphy->shutdown_cb = params->shutdown_cb;
356 pdphy->data_role = params->data_role;
357 pdphy->power_role = params->power_role;
358 pdphy->frame_filter_val = params->frame_filter_val;
359
360 dev_dbg(pdphy->dev, "%s: DR %x PR %x frame filter val %x\n", __func__,
361 pdphy->data_role, pdphy->power_role, pdphy->frame_filter_val);
362
363 ret = pdphy_enable_power(pdphy, true);
364 if (ret)
365 return ret;
366
367 /* update data and power role to be used in GoodCRC generation */
368 ret = pd_phy_update_roles(pdphy->data_role, pdphy->power_role);
369 if (ret)
370 return ret;
371
Hemant Kumar796534e2017-05-30 15:54:55 -0700372 /* PD 2.0 phy */
373 ret = pdphy_masked_write(pdphy, USB_PDPHY_MSG_CONFIG,
374 MSG_CONFIG_SPEC_REV_MASK, USBPD_REV_20);
Jack Phamf4baeb12017-02-03 19:01:48 -0800375 if (ret)
376 return ret;
377
378 ret = pdphy_reg_write(pdphy, USB_PDPHY_EN_CONTROL, 0);
379 if (ret)
380 return ret;
381
382 ret = pdphy_reg_write(pdphy, USB_PDPHY_EN_CONTROL, CONTROL_ENABLE);
383 if (ret)
384 return ret;
385
386 /* update frame filter */
387 ret = pdphy_reg_write(pdphy, USB_PDPHY_FRAME_FILTER,
388 pdphy->frame_filter_val);
389 if (ret)
390 return ret;
391
392 /* initialize Rx buffer ownership to PDPHY HW */
393 ret = pdphy_reg_write(pdphy, USB_PDPHY_RX_ACKNOWLEDGE, 0);
394 if (ret)
395 return ret;
396
397 pdphy->is_opened = true;
398 pdphy_enable_irq(pdphy, true);
399
400 return ret;
401}
402EXPORT_SYMBOL(pd_phy_open);
403
Jack Phame95cfc72017-08-01 17:36:50 -0700404int pd_phy_signal(enum pd_sig_type sig, unsigned int timeout_ms)
Jack Phamf4baeb12017-02-03 19:01:48 -0800405{
406 u8 val;
407 int ret;
408 struct usb_pdphy *pdphy = __pdphy;
409
Jack Phame95cfc72017-08-01 17:36:50 -0700410 dev_dbg(pdphy->dev, "%s: type %d timeout %u\n", __func__, sig,
Jack Phamf4baeb12017-02-03 19:01:48 -0800411 timeout_ms);
412
413 if (!pdphy) {
414 pr_err("%s: pdphy not found\n", __func__);
415 return -ENODEV;
416 }
417
418 if (!pdphy->is_opened) {
419 dev_dbg(pdphy->dev, "%s: pdphy disabled\n", __func__);
420 return -ENODEV;
421 }
422
423 pdphy->tx_status = -EINPROGRESS;
424
425 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, 0);
426 if (ret)
427 return ret;
428
429 usleep_range(2, 3);
430
Jack Phame95cfc72017-08-01 17:36:50 -0700431 val = (sig == CABLE_RESET_SIG ? TX_CONTROL_FRAME_TYPE_CABLE_RESET : 0)
Jack Phamf4baeb12017-02-03 19:01:48 -0800432 | TX_CONTROL_SEND_SIGNAL;
433
434 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, val);
435 if (ret)
436 return ret;
437
438 ret = wait_event_interruptible_timeout(pdphy->tx_waitq,
439 pdphy->tx_status != -EINPROGRESS, msecs_to_jiffies(timeout_ms));
440 if (ret <= 0) {
441 dev_err(pdphy->dev, "%s: failed ret %d", __func__, ret);
442 return ret ? ret : -ETIMEDOUT;
443 }
444
445 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, 0);
446
447 if (pdphy->tx_status)
448 return pdphy->tx_status;
449
Jack Phame95cfc72017-08-01 17:36:50 -0700450 if (sig == HARD_RESET_SIG)
Jack Phamf4baeb12017-02-03 19:01:48 -0800451 /* Frame filter is reconfigured in pd_phy_open() */
452 return pdphy_reg_write(pdphy, USB_PDPHY_FRAME_FILTER, 0);
453
454 return 0;
455}
456EXPORT_SYMBOL(pd_phy_signal);
457
458int pd_phy_write(u16 hdr, const u8 *data, size_t data_len,
Jack Phame95cfc72017-08-01 17:36:50 -0700459 enum pd_sop_type sop, unsigned int timeout_ms)
Jack Phamf4baeb12017-02-03 19:01:48 -0800460{
461 u8 val;
462 int ret;
463 size_t total_len = data_len + USB_PDPHY_MSG_HDR_LEN;
464 struct usb_pdphy *pdphy = __pdphy;
465
Jack Phame95cfc72017-08-01 17:36:50 -0700466 dev_dbg(pdphy->dev, "%s: hdr %x frame sop_type %d timeout %u\n",
467 __func__, hdr, sop, timeout_ms);
Jack Phamf4baeb12017-02-03 19:01:48 -0800468
469 if (data && data_len)
470 print_hex_dump_debug("tx data obj:", DUMP_PREFIX_NONE, 32, 4,
471 data, data_len, false);
472
473 if (!pdphy) {
474 pr_err("%s: pdphy not found\n", __func__);
475 return -ENODEV;
476 }
477
478 if (!pdphy->is_opened) {
479 dev_dbg(pdphy->dev, "%s: pdphy disabled\n", __func__);
480 return -ENODEV;
481 }
482
483 if (data_len > USB_PDPHY_MAX_DATA_OBJ_LEN) {
484 dev_err(pdphy->dev, "%s: invalid data object len %zu\n",
485 __func__, data_len);
486 return -EINVAL;
487 }
488
Jack Phame24693c2017-06-06 22:30:47 -0700489 ret = pdphy_reg_read(pdphy, &val, USB_PDPHY_RX_ACKNOWLEDGE, 1);
490 if (ret || val || pdphy->rx_busy) {
491 dev_err(pdphy->dev, "%s: RX message pending\n", __func__);
492 return -EBUSY;
493 }
494
Jack Phamf4baeb12017-02-03 19:01:48 -0800495 pdphy->tx_status = -EINPROGRESS;
496
497 /* write 2 byte SOP message header */
498 ret = pdphy_bulk_reg_write(pdphy, USB_PDPHY_TX_BUFFER_HDR, (u8 *)&hdr,
499 USB_PDPHY_MSG_HDR_LEN);
500 if (ret)
501 return ret;
502
503 if (data && data_len) {
504 /* write data objects of SOP message */
505 ret = pdphy_bulk_reg_write(pdphy, USB_PDPHY_TX_BUFFER_DATA,
506 data, data_len);
507 if (ret)
508 return ret;
509 }
510
511 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_SIZE, total_len - 1);
512 if (ret)
513 return ret;
514
515 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, 0);
516 if (ret)
517 return ret;
518
519 usleep_range(2, 3);
520
Jack Phame95cfc72017-08-01 17:36:50 -0700521 val = TX_CONTROL_RETRY_COUNT | (sop << 2) | TX_CONTROL_SEND_MSG;
Jack Phamf4baeb12017-02-03 19:01:48 -0800522
523 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, val);
524 if (ret)
525 return ret;
526
527 ret = wait_event_interruptible_timeout(pdphy->tx_waitq,
528 pdphy->tx_status != -EINPROGRESS, msecs_to_jiffies(timeout_ms));
529 if (ret <= 0) {
530 dev_err(pdphy->dev, "%s: failed ret %d", __func__, ret);
531 return ret ? ret : -ETIMEDOUT;
532 }
533
534 if (hdr && !pdphy->tx_status)
535 pdphy->tx_bytes += data_len + USB_PDPHY_MSG_HDR_LEN;
536
537 return pdphy->tx_status ? pdphy->tx_status : data_len;
538}
539EXPORT_SYMBOL(pd_phy_write);
540
541void pd_phy_close(void)
542{
543 int ret;
544 struct usb_pdphy *pdphy = __pdphy;
545
546 if (!pdphy) {
547 pr_err("%s: pdphy not found\n", __func__);
548 return;
549 }
550
551 if (!pdphy->is_opened) {
552 dev_err(pdphy->dev, "%s: not opened\n", __func__);
553 return;
554 }
555
556 pdphy->is_opened = false;
557 pdphy_enable_irq(pdphy, false);
558
559 pdphy->tx_status = -ESHUTDOWN;
560
561 wake_up_all(&pdphy->tx_waitq);
562
563 pdphy_reg_write(pdphy, USB_PDPHY_BIST_MODE, 0);
564 pdphy->in_test_data_mode = false;
565
566 ret = pdphy_reg_write(pdphy, USB_PDPHY_TX_CONTROL, 0);
567 if (ret)
568 return;
569
570 ret = pdphy_reg_write(pdphy, USB_PDPHY_EN_CONTROL, 0);
571 if (ret)
572 return;
573
574 pdphy_enable_power(pdphy, false);
575}
576EXPORT_SYMBOL(pd_phy_close);
577
578static irqreturn_t pdphy_msg_tx_irq(int irq, void *data)
579{
580 struct usb_pdphy *pdphy = data;
581
582 if (irq == pdphy->msg_tx_irq) {
583 pdphy->msg_tx_cnt++;
584 pdphy->tx_status = 0;
585 } else if (irq == pdphy->msg_tx_discarded_irq) {
586 pdphy->msg_tx_discarded_cnt++;
587 pdphy->tx_status = -EBUSY;
588 } else if (irq == pdphy->msg_tx_failed_irq) {
589 pdphy->msg_tx_failed_cnt++;
590 pdphy->tx_status = -EFAULT;
591 } else {
592 dev_err(pdphy->dev, "spurious irq #%d received\n", irq);
593 return IRQ_NONE;
594 }
595
596 wake_up(&pdphy->tx_waitq);
597
598 return IRQ_HANDLED;
599}
600
601static irqreturn_t pdphy_msg_rx_discarded_irq(int irq, void *data)
602{
603 struct usb_pdphy *pdphy = data;
604
605 pdphy->msg_rx_discarded_cnt++;
606
607 return IRQ_HANDLED;
608}
609
610static irqreturn_t pdphy_sig_rx_irq_thread(int irq, void *data)
611{
612 u8 rx_status, frame_type;
613 int ret;
614 struct usb_pdphy *pdphy = data;
615
616 pdphy->sig_rx_cnt++;
617
618 ret = pdphy_reg_read(pdphy, &rx_status, USB_PDPHY_RX_STATUS, 1);
619 if (ret)
620 goto done;
621
622 frame_type = rx_status & RX_FRAME_TYPE;
623 if (frame_type != HARD_RESET_SIG) {
624 dev_err(pdphy->dev, "%s:unsupported frame type %d\n",
625 __func__, frame_type);
626 goto done;
627 }
628
629 /* Frame filter is reconfigured in pd_phy_open() */
630 ret = pdphy_reg_write(pdphy, USB_PDPHY_FRAME_FILTER, 0);
631
632 if (pdphy->signal_cb)
633 pdphy->signal_cb(pdphy->usbpd, frame_type);
634
635done:
636 return IRQ_HANDLED;
637}
638
639static irqreturn_t pdphy_sig_tx_irq_thread(int irq, void *data)
640{
641 struct usb_pdphy *pdphy = data;
642
643 /* in case of exit from BIST Carrier Mode 2, clear BIST_MODE */
644 pdphy_reg_write(pdphy, USB_PDPHY_BIST_MODE, 0);
645
646 pdphy->sig_tx_cnt++;
647 pdphy->tx_status = 0;
648 wake_up(&pdphy->tx_waitq);
649
650 return IRQ_HANDLED;
651}
652
653static int pd_phy_bist_mode(u8 bist_mode)
654{
655 struct usb_pdphy *pdphy = __pdphy;
656
657 dev_dbg(pdphy->dev, "%s: enter BIST mode %d\n", __func__, bist_mode);
658
659 pdphy_reg_write(pdphy, USB_PDPHY_BIST_MODE, 0);
660
661 udelay(5);
662
663 return pdphy_masked_write(pdphy, USB_PDPHY_BIST_MODE,
664 BIST_MODE_MASK | BIST_ENABLE, bist_mode | BIST_ENABLE);
665}
666
Jack Phame24693c2017-06-06 22:30:47 -0700667static irqreturn_t pdphy_msg_rx_irq(int irq, void *data)
668{
669 struct usb_pdphy *pdphy = data;
670
671 pdphy->rx_busy = true;
672
673 return IRQ_WAKE_THREAD;
674}
675
Jack Phamf4baeb12017-02-03 19:01:48 -0800676static irqreturn_t pdphy_msg_rx_irq_thread(int irq, void *data)
677{
678 u8 size, rx_status, frame_type;
679 u8 buf[32];
680 int ret;
681 struct usb_pdphy *pdphy = data;
682
683 pdphy->msg_rx_cnt++;
684
685 ret = pdphy_reg_read(pdphy, &size, USB_PDPHY_RX_SIZE, 1);
686 if (ret)
687 goto done;
688
689 if (!size || size > 31) {
690 dev_err(pdphy->dev, "%s: invalid size %d\n", __func__, size);
691 goto done;
692 }
693
694 ret = pdphy_reg_read(pdphy, &rx_status, USB_PDPHY_RX_STATUS, 1);
695 if (ret)
696 goto done;
697
698 frame_type = rx_status & RX_FRAME_TYPE;
699 if (frame_type != SOP_MSG) {
700 dev_err(pdphy->dev, "%s:unsupported frame type %d\n",
701 __func__, frame_type);
702 goto done;
703 }
704
705 ret = pdphy_reg_read(pdphy, buf, USB_PDPHY_RX_BUFFER, size + 1);
706 if (ret)
707 goto done;
708
709 /* ack to change ownership of rx buffer back to PDPHY RX HW */
710 pdphy_reg_write(pdphy, USB_PDPHY_RX_ACKNOWLEDGE, 0);
711
712 if (((buf[0] & 0xf) == PD_MSG_BIST) && size >= 5) { /* BIST */
713 u8 mode = buf[5] >> 4; /* [31:28] of 1st data object */
714
715 pd_phy_bist_mode(mode);
716 pdphy_reg_write(pdphy, USB_PDPHY_RX_ACKNOWLEDGE, 0);
717
718 if (mode == PD_BIST_TEST_DATA_MODE) {
719 pdphy->in_test_data_mode = true;
720 disable_irq_nosync(irq);
721 }
722 goto done;
723 }
724
725 if (pdphy->msg_rx_cb)
726 pdphy->msg_rx_cb(pdphy->usbpd, frame_type, buf, size + 1);
727
728 print_hex_dump_debug("rx msg:", DUMP_PREFIX_NONE, 32, 4, buf, size + 1,
729 false);
730 pdphy->rx_bytes += size + 1;
731done:
Jack Phame24693c2017-06-06 22:30:47 -0700732 pdphy->rx_busy = false;
Jack Phamf4baeb12017-02-03 19:01:48 -0800733 return IRQ_HANDLED;
734}
735
736static int pdphy_request_irq(struct usb_pdphy *pdphy,
737 struct device_node *node,
738 int *irq_num, const char *irq_name,
739 irqreturn_t (irq_handler)(int irq, void *data),
740 irqreturn_t (thread_fn)(int irq, void *data),
741 int flags)
742{
743 int ret;
744
745 *irq_num = of_irq_get_byname(node, irq_name);
746 if (*irq_num < 0) {
747 dev_err(pdphy->dev, "Unable to get %s irqn", irq_name);
748 ret = -ENXIO;
749 }
750
751 irq_set_status_flags(*irq_num, IRQ_NOAUTOEN);
752 ret = devm_request_threaded_irq(pdphy->dev, *irq_num, irq_handler,
753 thread_fn, flags, irq_name, pdphy);
754 if (ret < 0) {
755 dev_err(pdphy->dev, "Unable to request %s irq: %dn",
756 irq_name, ret);
757 ret = -ENXIO;
758 }
759
760 return 0;
761}
762
763static int pdphy_probe(struct platform_device *pdev)
764{
765 int ret;
766 unsigned int base;
767 struct usb_pdphy *pdphy;
768
769 pdphy = devm_kzalloc(&pdev->dev, sizeof(*pdphy), GFP_KERNEL);
770 if (!pdphy)
771 return -ENOMEM;
772
773 pdphy->regmap = dev_get_regmap(pdev->dev.parent, NULL);
774 if (!pdphy->regmap) {
775 dev_err(&pdev->dev, "Couldn't get parent's regmap\n");
776 return -EINVAL;
777 }
778
779 dev_set_drvdata(&pdev->dev, pdphy);
780
781 ret = of_property_read_u32(pdev->dev.of_node, "reg", &base);
782 if (ret < 0) {
783 dev_err(&pdev->dev, "failed to get reg base address ret = %d\n",
784 ret);
785 return ret;
786 }
787
788 pdphy->base = base;
789 pdphy->dev = &pdev->dev;
790
791 init_waitqueue_head(&pdphy->tx_waitq);
792
793 pdphy->vdd_pdphy = devm_regulator_get(&pdev->dev, "vdd-pdphy");
794 if (IS_ERR(pdphy->vdd_pdphy)) {
795 dev_err(&pdev->dev, "unable to get vdd-pdphy\n");
796 return PTR_ERR(pdphy->vdd_pdphy);
797 }
798
799 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
800 &pdphy->sig_tx_irq, "sig-tx", NULL,
801 pdphy_sig_tx_irq_thread, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
802 if (ret < 0)
803 return ret;
804
805 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
806 &pdphy->sig_rx_irq, "sig-rx", NULL,
807 pdphy_sig_rx_irq_thread, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
808 if (ret < 0)
809 return ret;
810
811 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
812 &pdphy->msg_tx_irq, "msg-tx", pdphy_msg_tx_irq,
813 NULL, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
814 if (ret < 0)
815 return ret;
816
817 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
Jack Phame24693c2017-06-06 22:30:47 -0700818 &pdphy->msg_rx_irq, "msg-rx", pdphy_msg_rx_irq,
Jack Phamf4baeb12017-02-03 19:01:48 -0800819 pdphy_msg_rx_irq_thread, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
820 if (ret < 0)
821 return ret;
822
823 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
824 &pdphy->msg_tx_failed_irq, "msg-tx-failed", pdphy_msg_tx_irq,
825 NULL, (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
826 if (ret < 0)
827 return ret;
828
829 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
830 &pdphy->msg_tx_discarded_irq, "msg-tx-discarded",
831 pdphy_msg_tx_irq, NULL,
832 (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
833 if (ret < 0)
834 return ret;
835
836 ret = pdphy_request_irq(pdphy, pdev->dev.of_node,
837 &pdphy->msg_rx_discarded_irq, "msg-rx-discarded",
838 pdphy_msg_rx_discarded_irq, NULL,
839 (IRQF_TRIGGER_RISING | IRQF_ONESHOT));
840 if (ret < 0)
841 return ret;
842
843 ret = pdphy_reg_write(pdphy, USB_PDPHY_SEC_ACCESS, 0xA5);
844 if (ret)
845 return ret;
846
847 ret = pdphy_reg_write(pdphy, USB_PDPHY_TRIM_3, 0x2);
848 if (ret)
849 return ret;
850
851 /* usbpd_create() could call back to us, so have __pdphy ready */
852 __pdphy = pdphy;
853
854 pdphy->usbpd = usbpd_create(&pdev->dev);
855 if (IS_ERR(pdphy->usbpd)) {
856 dev_err(&pdev->dev, "usbpd_create failed: %ld\n",
857 PTR_ERR(pdphy->usbpd));
858 __pdphy = NULL;
859 return PTR_ERR(pdphy->usbpd);
860 }
861
862 pdphy_create_debugfs_entries(pdphy);
863
864 return 0;
865}
866
867static int pdphy_remove(struct platform_device *pdev)
868{
869 struct usb_pdphy *pdphy = platform_get_drvdata(pdev);
870
871 debugfs_remove_recursive(pdphy->debug_root);
872 usbpd_destroy(pdphy->usbpd);
873
874 if (pdphy->is_opened)
875 pd_phy_close();
876
877 __pdphy = NULL;
878
879 return 0;
880}
881
882static void pdphy_shutdown(struct platform_device *pdev)
883{
884 struct usb_pdphy *pdphy = platform_get_drvdata(pdev);
885
886 /* let protocol engine shutdown the pdphy synchronously */
887 if (pdphy->shutdown_cb)
888 pdphy->shutdown_cb(pdphy->usbpd);
889}
890
891static const struct of_device_id pdphy_match_table[] = {
892 {
893 .compatible = "qcom,qpnp-pdphy",
894 },
895 { },
896};
897MODULE_DEVICE_TABLE(of, pdphy_match_table);
898
899static struct platform_driver pdphy_driver = {
900 .driver = {
901 .name = "qpnp-pdphy",
902 .of_match_table = pdphy_match_table,
903 },
904 .probe = pdphy_probe,
905 .remove = pdphy_remove,
906 .shutdown = pdphy_shutdown,
907};
908
909module_platform_driver(pdphy_driver);
910
911MODULE_DESCRIPTION("QPNP PD PHY Driver");
912MODULE_LICENSE("GPL v2");
913MODULE_ALIAS("platform:qpnp-pdphy");