Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (c) 1997, 1999 by Ralf Baechle |
| 7 | * Copyright (c) 1999 Silicon Graphics, Inc. |
| 8 | */ |
| 9 | #ifndef _ASM_BCACHE_H |
| 10 | #define _ASM_BCACHE_H |
| 11 | |
Paul Burton | 37f2a17 | 2015-09-22 10:10:53 -0700 | [diff] [blame] | 12 | #include <linux/types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | |
| 14 | /* Some R4000 / R4400 / R4600 / R5000 machines may have a non-dma-coherent, |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 15 | chipset implemented caches. On machines with other CPUs the CPU does the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | cache thing itself. */ |
| 17 | struct bcache_ops { |
| 18 | void (*bc_enable)(void); |
| 19 | void (*bc_disable)(void); |
| 20 | void (*bc_wback_inv)(unsigned long page, unsigned long size); |
| 21 | void (*bc_inv)(unsigned long page, unsigned long size); |
Paul Burton | 37f2a17 | 2015-09-22 10:10:53 -0700 | [diff] [blame] | 22 | void (*bc_prefetch_enable)(void); |
| 23 | void (*bc_prefetch_disable)(void); |
| 24 | bool (*bc_prefetch_is_enabled)(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | }; |
| 26 | |
| 27 | extern void indy_sc_init(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | |
| 29 | #ifdef CONFIG_BOARD_SCACHE |
| 30 | |
| 31 | extern struct bcache_ops *bcops; |
| 32 | |
| 33 | static inline void bc_enable(void) |
| 34 | { |
| 35 | bcops->bc_enable(); |
| 36 | } |
| 37 | |
| 38 | static inline void bc_disable(void) |
| 39 | { |
| 40 | bcops->bc_disable(); |
| 41 | } |
| 42 | |
| 43 | static inline void bc_wback_inv(unsigned long page, unsigned long size) |
| 44 | { |
| 45 | bcops->bc_wback_inv(page, size); |
| 46 | } |
| 47 | |
| 48 | static inline void bc_inv(unsigned long page, unsigned long size) |
| 49 | { |
| 50 | bcops->bc_inv(page, size); |
| 51 | } |
| 52 | |
Paul Burton | 37f2a17 | 2015-09-22 10:10:53 -0700 | [diff] [blame] | 53 | static inline void bc_prefetch_enable(void) |
| 54 | { |
| 55 | if (bcops->bc_prefetch_enable) |
| 56 | bcops->bc_prefetch_enable(); |
| 57 | } |
| 58 | |
| 59 | static inline void bc_prefetch_disable(void) |
| 60 | { |
| 61 | if (bcops->bc_prefetch_disable) |
| 62 | bcops->bc_prefetch_disable(); |
| 63 | } |
| 64 | |
| 65 | static inline bool bc_prefetch_is_enabled(void) |
| 66 | { |
| 67 | if (bcops->bc_prefetch_is_enabled) |
| 68 | return bcops->bc_prefetch_is_enabled(); |
| 69 | |
| 70 | return false; |
| 71 | } |
| 72 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | #else /* !defined(CONFIG_BOARD_SCACHE) */ |
| 74 | |
| 75 | /* Not R4000 / R4400 / R4600 / R5000. */ |
| 76 | |
| 77 | #define bc_enable() do { } while (0) |
| 78 | #define bc_disable() do { } while (0) |
| 79 | #define bc_wback_inv(page, size) do { } while (0) |
| 80 | #define bc_inv(page, size) do { } while (0) |
Paul Burton | 37f2a17 | 2015-09-22 10:10:53 -0700 | [diff] [blame] | 81 | #define bc_prefetch_enable() do { } while (0) |
| 82 | #define bc_prefetch_disable() do { } while (0) |
| 83 | #define bc_prefetch_is_enabled() 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | |
| 85 | #endif /* !defined(CONFIG_BOARD_SCACHE) */ |
| 86 | |
| 87 | #endif /* _ASM_BCACHE_H */ |