Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 1 | /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*- |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | */ |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 3 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 5 | * All Rights Reserved. |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 8 | * copy of this software and associated documentation files (the |
| 9 | * "Software"), to deal in the Software without restriction, including |
| 10 | * without limitation the rights to use, copy, modify, merge, publish, |
| 11 | * distribute, sub license, and/or sell copies of the Software, and to |
| 12 | * permit persons to whom the Software is furnished to do so, subject to |
| 13 | * the following conditions: |
| 14 | * |
| 15 | * The above copyright notice and this permission notice (including the |
| 16 | * next paragraph) shall be included in all copies or substantial portions |
| 17 | * of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 22 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 23 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 24 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 25 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 26 | * |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 27 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | |
| 29 | #include "drmP.h" |
| 30 | #include "drm.h" |
| 31 | #include "i915_drm.h" |
| 32 | #include "i915_drv.h" |
| 33 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #define MAX_NOPID ((u32)~0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 36 | /** These are the interrupts used by the driver */ |
| 37 | #define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT | \ |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 38 | I915_ASLE_INTERRUPT | \ |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 39 | I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \ |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 40 | I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 41 | |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 42 | void |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 43 | i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask) |
| 44 | { |
| 45 | if ((dev_priv->irq_mask_reg & mask) != 0) { |
| 46 | dev_priv->irq_mask_reg &= ~mask; |
| 47 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 48 | (void) I915_READ(IMR); |
| 49 | } |
| 50 | } |
| 51 | |
| 52 | static inline void |
| 53 | i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask) |
| 54 | { |
| 55 | if ((dev_priv->irq_mask_reg & mask) != mask) { |
| 56 | dev_priv->irq_mask_reg |= mask; |
| 57 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 58 | (void) I915_READ(IMR); |
| 59 | } |
| 60 | } |
| 61 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 62 | /** |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 63 | * i915_get_pipe - return the the pipe associated with a given plane |
| 64 | * @dev: DRM device |
| 65 | * @plane: plane to look for |
| 66 | * |
| 67 | * The Intel Mesa & 2D drivers call the vblank routines with a plane number |
| 68 | * rather than a pipe number, since they may not always be equal. This routine |
| 69 | * maps the given @plane back to a pipe number. |
| 70 | */ |
| 71 | static int |
| 72 | i915_get_pipe(struct drm_device *dev, int plane) |
| 73 | { |
| 74 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 75 | u32 dspcntr; |
| 76 | |
| 77 | dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR); |
| 78 | |
| 79 | return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0; |
| 80 | } |
| 81 | |
| 82 | /** |
| 83 | * i915_get_plane - return the the plane associated with a given pipe |
| 84 | * @dev: DRM device |
| 85 | * @pipe: pipe to look for |
| 86 | * |
| 87 | * The Intel Mesa & 2D drivers call the vblank routines with a plane number |
| 88 | * rather than a plane number, since they may not always be equal. This routine |
| 89 | * maps the given @pipe back to a plane number. |
| 90 | */ |
| 91 | static int |
| 92 | i915_get_plane(struct drm_device *dev, int pipe) |
| 93 | { |
| 94 | if (i915_get_pipe(dev, 0) == pipe) |
| 95 | return 0; |
| 96 | return 1; |
| 97 | } |
| 98 | |
| 99 | /** |
| 100 | * i915_pipe_enabled - check if a pipe is enabled |
| 101 | * @dev: DRM device |
| 102 | * @pipe: pipe to check |
| 103 | * |
| 104 | * Reading certain registers when the pipe is disabled can hang the chip. |
| 105 | * Use this routine to make sure the PLL is running and the pipe is active |
| 106 | * before reading such registers if unsure. |
| 107 | */ |
| 108 | static int |
| 109 | i915_pipe_enabled(struct drm_device *dev, int pipe) |
| 110 | { |
| 111 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 112 | unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF; |
| 113 | |
| 114 | if (I915_READ(pipeconf) & PIPEACONF_ENABLE) |
| 115 | return 1; |
| 116 | |
| 117 | return 0; |
| 118 | } |
| 119 | |
| 120 | /** |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 121 | * Emit blits for scheduled buffer swaps. |
| 122 | * |
| 123 | * This function will be called with the HW lock held. |
| 124 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 125 | static void i915_vblank_tasklet(struct drm_device *dev) |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 126 | { |
| 127 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 128 | unsigned long irqflags; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 129 | struct list_head *list, *tmp, hits, *hit; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 130 | int nhits, nrects, slice[2], upper[2], lower[2], i; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 131 | unsigned counter[2]; |
Dave Airlie | c60ce62 | 2007-07-11 15:27:12 +1000 | [diff] [blame] | 132 | struct drm_drawable_info *drw; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 133 | drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 134 | u32 cpp = dev_priv->cpp; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 135 | u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD | |
| 136 | XY_SRC_COPY_BLT_WRITE_ALPHA | |
| 137 | XY_SRC_COPY_BLT_WRITE_RGB) |
| 138 | : XY_SRC_COPY_BLT_CMD; |
Keith Packard | 7b832b5 | 2008-04-21 16:31:10 +1000 | [diff] [blame] | 139 | u32 src_pitch = sarea_priv->pitch * cpp; |
| 140 | u32 dst_pitch = sarea_priv->pitch * cpp; |
| 141 | u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24); |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 142 | RING_LOCALS; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 143 | |
Jesse Barnes | 3d25802 | 2008-07-01 12:32:52 -0700 | [diff] [blame] | 144 | if (IS_I965G(dev) && sarea_priv->front_tiled) { |
Keith Packard | 7b832b5 | 2008-04-21 16:31:10 +1000 | [diff] [blame] | 145 | cmd |= XY_SRC_COPY_BLT_DST_TILED; |
| 146 | dst_pitch >>= 2; |
| 147 | } |
Jesse Barnes | 3d25802 | 2008-07-01 12:32:52 -0700 | [diff] [blame] | 148 | if (IS_I965G(dev) && sarea_priv->back_tiled) { |
Keith Packard | 7b832b5 | 2008-04-21 16:31:10 +1000 | [diff] [blame] | 149 | cmd |= XY_SRC_COPY_BLT_SRC_TILED; |
| 150 | src_pitch >>= 2; |
| 151 | } |
| 152 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 153 | counter[0] = drm_vblank_count(dev, 0); |
| 154 | counter[1] = drm_vblank_count(dev, 1); |
| 155 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 156 | DRM_DEBUG("\n"); |
| 157 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 158 | INIT_LIST_HEAD(&hits); |
| 159 | |
| 160 | nhits = nrects = 0; |
| 161 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 162 | spin_lock_irqsave(&dev_priv->swaps_lock, irqflags); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 163 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 164 | /* Find buffer swaps scheduled for this vertical blank */ |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 165 | list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) { |
| 166 | drm_i915_vbl_swap_t *vbl_swap = |
| 167 | list_entry(list, drm_i915_vbl_swap_t, head); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 168 | int pipe = i915_get_pipe(dev, vbl_swap->plane); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 169 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 170 | if ((counter[pipe] - vbl_swap->sequence) > (1<<23)) |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 171 | continue; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 172 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 173 | list_del(list); |
| 174 | dev_priv->swaps_pending--; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 175 | drm_vblank_put(dev, pipe); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 176 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 177 | spin_unlock(&dev_priv->swaps_lock); |
| 178 | spin_lock(&dev->drw_lock); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 179 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 180 | drw = drm_get_drawable_info(dev, vbl_swap->drw_id); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 181 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 182 | if (!drw) { |
| 183 | spin_unlock(&dev->drw_lock); |
| 184 | drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER); |
| 185 | spin_lock(&dev_priv->swaps_lock); |
| 186 | continue; |
| 187 | } |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 188 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 189 | list_for_each(hit, &hits) { |
| 190 | drm_i915_vbl_swap_t *swap_cmp = |
| 191 | list_entry(hit, drm_i915_vbl_swap_t, head); |
Dave Airlie | c60ce62 | 2007-07-11 15:27:12 +1000 | [diff] [blame] | 192 | struct drm_drawable_info *drw_cmp = |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 193 | drm_get_drawable_info(dev, swap_cmp->drw_id); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 194 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 195 | if (drw_cmp && |
| 196 | drw_cmp->rects[0].y1 > drw->rects[0].y1) { |
| 197 | list_add_tail(list, hit); |
| 198 | break; |
| 199 | } |
| 200 | } |
| 201 | |
| 202 | spin_unlock(&dev->drw_lock); |
| 203 | |
| 204 | /* List of hits was empty, or we reached the end of it */ |
| 205 | if (hit == &hits) |
| 206 | list_add_tail(list, hits.prev); |
| 207 | |
| 208 | nhits++; |
| 209 | |
| 210 | spin_lock(&dev_priv->swaps_lock); |
| 211 | } |
| 212 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 213 | if (nhits == 0) { |
| 214 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 215 | return; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 216 | } |
| 217 | |
| 218 | spin_unlock(&dev_priv->swaps_lock); |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 219 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 220 | i915_kernel_lost_context(dev); |
| 221 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 222 | if (IS_I965G(dev)) { |
| 223 | BEGIN_LP_RING(4); |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 224 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 225 | OUT_RING(GFX_OP_DRAWRECT_INFO_I965); |
| 226 | OUT_RING(0); |
| 227 | OUT_RING(((sarea_priv->width - 1) & 0xffff) | ((sarea_priv->height - 1) << 16)); |
| 228 | OUT_RING(0); |
| 229 | ADVANCE_LP_RING(); |
| 230 | } else { |
| 231 | BEGIN_LP_RING(6); |
| 232 | |
| 233 | OUT_RING(GFX_OP_DRAWRECT_INFO); |
| 234 | OUT_RING(0); |
| 235 | OUT_RING(0); |
| 236 | OUT_RING(sarea_priv->width | sarea_priv->height << 16); |
| 237 | OUT_RING(sarea_priv->width | sarea_priv->height << 16); |
| 238 | OUT_RING(0); |
| 239 | |
| 240 | ADVANCE_LP_RING(); |
| 241 | } |
| 242 | |
| 243 | sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT; |
| 244 | |
| 245 | upper[0] = upper[1] = 0; |
| 246 | slice[0] = max(sarea_priv->pipeA_h / nhits, 1); |
| 247 | slice[1] = max(sarea_priv->pipeB_h / nhits, 1); |
| 248 | lower[0] = sarea_priv->pipeA_y + slice[0]; |
| 249 | lower[1] = sarea_priv->pipeB_y + slice[0]; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 250 | |
| 251 | spin_lock(&dev->drw_lock); |
| 252 | |
| 253 | /* Emit blits for buffer swaps, partitioning both outputs into as many |
| 254 | * slices as there are buffer swaps scheduled in order to avoid tearing |
| 255 | * (based on the assumption that a single buffer swap would always |
| 256 | * complete before scanout starts). |
| 257 | */ |
| 258 | for (i = 0; i++ < nhits; |
| 259 | upper[0] = lower[0], lower[0] += slice[0], |
| 260 | upper[1] = lower[1], lower[1] += slice[1]) { |
| 261 | if (i == nhits) |
| 262 | lower[0] = lower[1] = sarea_priv->height; |
| 263 | |
| 264 | list_for_each(hit, &hits) { |
| 265 | drm_i915_vbl_swap_t *swap_hit = |
| 266 | list_entry(hit, drm_i915_vbl_swap_t, head); |
Dave Airlie | c60ce62 | 2007-07-11 15:27:12 +1000 | [diff] [blame] | 267 | struct drm_clip_rect *rect; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 268 | int num_rects, plane; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 269 | unsigned short top, bottom; |
| 270 | |
| 271 | drw = drm_get_drawable_info(dev, swap_hit->drw_id); |
| 272 | |
| 273 | if (!drw) |
| 274 | continue; |
| 275 | |
| 276 | rect = drw->rects; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 277 | plane = swap_hit->plane; |
| 278 | top = upper[plane]; |
| 279 | bottom = lower[plane]; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 280 | |
| 281 | for (num_rects = drw->num_rects; num_rects--; rect++) { |
| 282 | int y1 = max(rect->y1, top); |
| 283 | int y2 = min(rect->y2, bottom); |
| 284 | |
| 285 | if (y1 >= y2) |
| 286 | continue; |
| 287 | |
| 288 | BEGIN_LP_RING(8); |
| 289 | |
| 290 | OUT_RING(cmd); |
Keith Packard | 7b832b5 | 2008-04-21 16:31:10 +1000 | [diff] [blame] | 291 | OUT_RING(ropcpp | dst_pitch); |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 292 | OUT_RING((y1 << 16) | rect->x1); |
| 293 | OUT_RING((y2 << 16) | rect->x2); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 294 | OUT_RING(sarea_priv->front_offset); |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 295 | OUT_RING((y1 << 16) | rect->x1); |
Keith Packard | 7b832b5 | 2008-04-21 16:31:10 +1000 | [diff] [blame] | 296 | OUT_RING(src_pitch); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 297 | OUT_RING(sarea_priv->back_offset); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 298 | |
| 299 | ADVANCE_LP_RING(); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 300 | } |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 301 | } |
| 302 | } |
| 303 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 304 | spin_unlock_irqrestore(&dev->drw_lock, irqflags); |
=?utf-8?q?Michel_D=C3=A4nzer?= | 3188a24 | 2006-12-11 18:32:27 +1100 | [diff] [blame] | 305 | |
| 306 | list_for_each_safe(hit, tmp, &hits) { |
| 307 | drm_i915_vbl_swap_t *swap_hit = |
| 308 | list_entry(hit, drm_i915_vbl_swap_t, head); |
| 309 | |
| 310 | list_del(hit); |
| 311 | |
| 312 | drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER); |
| 313 | } |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 314 | } |
| 315 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 316 | u32 i915_get_vblank_counter(struct drm_device *dev, int plane) |
| 317 | { |
| 318 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 319 | unsigned long high_frame; |
| 320 | unsigned long low_frame; |
| 321 | u32 high1, high2, low, count; |
| 322 | int pipe; |
| 323 | |
| 324 | pipe = i915_get_pipe(dev, plane); |
| 325 | high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH; |
| 326 | low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL; |
| 327 | |
| 328 | if (!i915_pipe_enabled(dev, pipe)) { |
| 329 | DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe); |
| 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | /* |
| 334 | * High & low register fields aren't synchronized, so make sure |
| 335 | * we get a low value that's stable across two reads of the high |
| 336 | * register. |
| 337 | */ |
| 338 | do { |
| 339 | high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >> |
| 340 | PIPE_FRAME_HIGH_SHIFT); |
| 341 | low = ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >> |
| 342 | PIPE_FRAME_LOW_SHIFT); |
| 343 | high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >> |
| 344 | PIPE_FRAME_HIGH_SHIFT); |
| 345 | } while (high1 != high2); |
| 346 | |
| 347 | count = (high1 << 8) | low; |
| 348 | |
| 349 | return count; |
| 350 | } |
| 351 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 352 | void |
| 353 | i915_gem_vblank_work_handler(struct work_struct *work) |
| 354 | { |
| 355 | drm_i915_private_t *dev_priv; |
| 356 | struct drm_device *dev; |
| 357 | |
| 358 | dev_priv = container_of(work, drm_i915_private_t, |
| 359 | mm.vblank_work); |
| 360 | dev = dev_priv->dev; |
| 361 | |
| 362 | mutex_lock(&dev->struct_mutex); |
| 363 | i915_vblank_tasklet(dev); |
| 364 | mutex_unlock(&dev->struct_mutex); |
| 365 | } |
| 366 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) |
| 368 | { |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 369 | struct drm_device *dev = (struct drm_device *) arg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 371 | u32 iir; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 372 | u32 pipea_stats, pipeb_stats; |
| 373 | int vblank = 0; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 374 | |
Eric Anholt | 630681d | 2008-10-06 15:14:12 -0700 | [diff] [blame] | 375 | atomic_inc(&dev_priv->irq_received); |
| 376 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 377 | if (dev->pdev->msi_enabled) |
| 378 | I915_WRITE(IMR, ~0); |
| 379 | iir = I915_READ(IIR); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 380 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 381 | if (iir == 0) { |
| 382 | if (dev->pdev->msi_enabled) { |
| 383 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 384 | (void) I915_READ(IMR); |
| 385 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | return IRQ_NONE; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 387 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 389 | /* |
| 390 | * Clear the PIPE(A|B)STAT regs before the IIR otherwise |
| 391 | * we may get extra interrupts. |
| 392 | */ |
| 393 | if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) { |
| 394 | pipea_stats = I915_READ(PIPEASTAT); |
| 395 | if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A)) |
| 396 | pipea_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE | |
| 397 | PIPE_VBLANK_INTERRUPT_ENABLE); |
| 398 | else if (pipea_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS| |
| 399 | PIPE_VBLANK_INTERRUPT_STATUS)) { |
| 400 | vblank++; |
| 401 | drm_handle_vblank(dev, i915_get_plane(dev, 0)); |
| 402 | } |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 403 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 404 | I915_WRITE(PIPEASTAT, pipea_stats); |
| 405 | } |
| 406 | if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) { |
| 407 | pipeb_stats = I915_READ(PIPEBSTAT); |
| 408 | /* Ack the event */ |
| 409 | I915_WRITE(PIPEBSTAT, pipeb_stats); |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 410 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 411 | /* The vblank interrupt gets enabled even if we didn't ask for |
| 412 | it, so make sure it's shut down again */ |
| 413 | if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)) |
| 414 | pipeb_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE | |
| 415 | PIPE_VBLANK_INTERRUPT_ENABLE); |
| 416 | else if (pipeb_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS| |
| 417 | PIPE_VBLANK_INTERRUPT_STATUS)) { |
| 418 | vblank++; |
| 419 | drm_handle_vblank(dev, i915_get_plane(dev, 1)); |
| 420 | } |
Dave Airlie | 6e5fca5 | 2006-03-20 18:34:29 +1100 | [diff] [blame] | 421 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 422 | if (pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS) |
| 423 | opregion_asle_intr(dev); |
| 424 | I915_WRITE(PIPEBSTAT, pipeb_stats); |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 425 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 426 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 427 | I915_WRITE(IIR, iir); |
| 428 | if (dev->pdev->msi_enabled) |
| 429 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 430 | (void) I915_READ(IIR); /* Flush posted writes */ |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 431 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 432 | if (dev_priv->sarea_priv) |
| 433 | dev_priv->sarea_priv->last_dispatch = |
| 434 | READ_BREADCRUMB(dev_priv); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 435 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 436 | if (iir & I915_USER_INTERRUPT) { |
| 437 | dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev); |
| 438 | DRM_WAKEUP(&dev_priv->irq_queue); |
| 439 | } |
| 440 | |
| 441 | if (iir & I915_ASLE_INTERRUPT) |
| 442 | opregion_asle_intr(dev); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 443 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 444 | if (vblank && dev_priv->swaps_pending > 0) { |
| 445 | if (dev_priv->ring.ring_obj == NULL) |
| 446 | drm_locked_tasklet(dev, i915_vblank_tasklet); |
| 447 | else |
| 448 | schedule_work(&dev_priv->mm.vblank_work); |
| 449 | } |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 450 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | return IRQ_HANDLED; |
| 452 | } |
| 453 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 454 | static int i915_emit_irq(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | { |
| 456 | drm_i915_private_t *dev_priv = dev->dev_private; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | RING_LOCALS; |
| 458 | |
| 459 | i915_kernel_lost_context(dev); |
| 460 | |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 461 | DRM_DEBUG("\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 463 | dev_priv->counter++; |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 464 | if (dev_priv->counter > 0x7FFFFFFFUL) |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 465 | dev_priv->counter = 1; |
| 466 | if (dev_priv->sarea_priv) |
| 467 | dev_priv->sarea_priv->last_enqueue = dev_priv->counter; |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 468 | |
| 469 | BEGIN_LP_RING(6); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 470 | OUT_RING(MI_STORE_DWORD_INDEX); |
| 471 | OUT_RING(5 << MI_STORE_DWORD_INDEX_SHIFT); |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 472 | OUT_RING(dev_priv->counter); |
| 473 | OUT_RING(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 474 | OUT_RING(0); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 475 | OUT_RING(MI_USER_INTERRUPT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | ADVANCE_LP_RING(); |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 477 | |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 478 | return dev_priv->counter; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | } |
| 480 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 481 | void i915_user_irq_get(struct drm_device *dev) |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 482 | { |
| 483 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 484 | unsigned long irqflags; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 485 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 486 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 487 | if (dev->irq_enabled && (++dev_priv->user_irq_refcount == 1)) |
| 488 | i915_enable_irq(dev_priv, I915_USER_INTERRUPT); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 489 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 490 | } |
| 491 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 492 | void i915_user_irq_put(struct drm_device *dev) |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 493 | { |
| 494 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 495 | unsigned long irqflags; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 496 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 497 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 498 | BUG_ON(dev->irq_enabled && dev_priv->user_irq_refcount <= 0); |
| 499 | if (dev->irq_enabled && (--dev_priv->user_irq_refcount == 0)) |
| 500 | i915_disable_irq(dev_priv, I915_USER_INTERRUPT); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 501 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 502 | } |
| 503 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 504 | static int i915_wait_irq(struct drm_device * dev, int irq_nr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | { |
| 506 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 507 | int ret = 0; |
| 508 | |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 509 | DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | READ_BREADCRUMB(dev_priv)); |
| 511 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 512 | if (READ_BREADCRUMB(dev_priv) >= irq_nr) { |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 513 | if (dev_priv->sarea_priv) { |
| 514 | dev_priv->sarea_priv->last_dispatch = |
| 515 | READ_BREADCRUMB(dev_priv); |
| 516 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | return 0; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 518 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 520 | if (dev_priv->sarea_priv) |
| 521 | dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 523 | i915_user_irq_get(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ, |
| 525 | READ_BREADCRUMB(dev_priv) >= irq_nr); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 526 | i915_user_irq_put(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 528 | if (ret == -EBUSY) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 529 | DRM_ERROR("EBUSY -- rec: %d emitted: %d\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 530 | READ_BREADCRUMB(dev_priv), (int)dev_priv->counter); |
| 531 | } |
| 532 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 533 | if (dev_priv->sarea_priv) |
| 534 | dev_priv->sarea_priv->last_dispatch = |
| 535 | READ_BREADCRUMB(dev_priv); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 536 | |
| 537 | return ret; |
| 538 | } |
| 539 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | /* Needs the lock as it touches the ring. |
| 541 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 542 | int i915_irq_emit(struct drm_device *dev, void *data, |
| 543 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 545 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 546 | drm_i915_irq_emit_t *emit = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 547 | int result; |
| 548 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 549 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 550 | |
| 551 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 552 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 553 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 554 | } |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 555 | mutex_lock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 556 | result = i915_emit_irq(dev); |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 557 | mutex_unlock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 559 | if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | DRM_ERROR("copy_to_user\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 561 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 562 | } |
| 563 | |
| 564 | return 0; |
| 565 | } |
| 566 | |
| 567 | /* Doesn't need the hardware lock. |
| 568 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 569 | int i915_irq_wait(struct drm_device *dev, void *data, |
| 570 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 571 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 573 | drm_i915_irq_wait_t *irqwait = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 574 | |
| 575 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 576 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 577 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | } |
| 579 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 580 | return i915_wait_irq(dev, irqwait->irq_seq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | } |
| 582 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 583 | int i915_enable_vblank(struct drm_device *dev, int plane) |
| 584 | { |
| 585 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 586 | int pipe = i915_get_pipe(dev, plane); |
| 587 | u32 pipestat_reg = 0; |
| 588 | u32 pipestat; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 589 | u32 interrupt = 0; |
| 590 | unsigned long irqflags; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 591 | |
| 592 | switch (pipe) { |
| 593 | case 0: |
| 594 | pipestat_reg = PIPEASTAT; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 595 | interrupt = I915_DISPLAY_PIPE_A_EVENT_INTERRUPT; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 596 | break; |
| 597 | case 1: |
| 598 | pipestat_reg = PIPEBSTAT; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 599 | interrupt = I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 600 | break; |
| 601 | default: |
| 602 | DRM_ERROR("tried to enable vblank on non-existent pipe %d\n", |
| 603 | pipe); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 604 | return 0; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 605 | } |
| 606 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 607 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
| 608 | pipestat = I915_READ(pipestat_reg); |
| 609 | if (IS_I965G(dev)) |
| 610 | pipestat |= PIPE_START_VBLANK_INTERRUPT_ENABLE; |
| 611 | else |
| 612 | pipestat |= PIPE_VBLANK_INTERRUPT_ENABLE; |
| 613 | /* Clear any stale interrupt status */ |
| 614 | pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS | |
| 615 | PIPE_VBLANK_INTERRUPT_STATUS); |
| 616 | I915_WRITE(pipestat_reg, pipestat); |
| 617 | (void) I915_READ(pipestat_reg); /* Posting read */ |
| 618 | i915_enable_irq(dev_priv, interrupt); |
| 619 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 620 | |
| 621 | return 0; |
| 622 | } |
| 623 | |
| 624 | void i915_disable_vblank(struct drm_device *dev, int plane) |
| 625 | { |
| 626 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 627 | int pipe = i915_get_pipe(dev, plane); |
| 628 | u32 pipestat_reg = 0; |
| 629 | u32 pipestat; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 630 | u32 interrupt = 0; |
| 631 | unsigned long irqflags; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 632 | |
| 633 | switch (pipe) { |
| 634 | case 0: |
| 635 | pipestat_reg = PIPEASTAT; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 636 | interrupt = I915_DISPLAY_PIPE_A_EVENT_INTERRUPT; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 637 | break; |
| 638 | case 1: |
| 639 | pipestat_reg = PIPEBSTAT; |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 640 | interrupt = I915_DISPLAY_PIPE_B_EVENT_INTERRUPT; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 641 | break; |
| 642 | default: |
| 643 | DRM_ERROR("tried to disable vblank on non-existent pipe %d\n", |
| 644 | pipe); |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 645 | return; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 646 | break; |
| 647 | } |
| 648 | |
Keith Packard | e9d21d7 | 2008-10-16 11:31:38 -0700 | [diff] [blame^] | 649 | spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); |
| 650 | i915_disable_irq(dev_priv, interrupt); |
| 651 | pipestat = I915_READ(pipestat_reg); |
| 652 | pipestat &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE | |
| 653 | PIPE_VBLANK_INTERRUPT_ENABLE); |
| 654 | /* Clear any stale interrupt status */ |
| 655 | pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS | |
| 656 | PIPE_VBLANK_INTERRUPT_STATUS); |
| 657 | I915_WRITE(pipestat_reg, pipestat); |
| 658 | (void) I915_READ(pipestat_reg); /* Posting read */ |
| 659 | spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 660 | } |
| 661 | |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 662 | /* Set the vblank monitor pipe |
| 663 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 664 | int i915_vblank_pipe_set(struct drm_device *dev, void *data, |
| 665 | struct drm_file *file_priv) |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 666 | { |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 667 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 668 | |
| 669 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 670 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 671 | return -EINVAL; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 672 | } |
| 673 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 5b51694 | 2006-10-25 00:08:23 +1000 | [diff] [blame] | 674 | return 0; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 675 | } |
| 676 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 677 | int i915_vblank_pipe_get(struct drm_device *dev, void *data, |
| 678 | struct drm_file *file_priv) |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 679 | { |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 680 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 681 | drm_i915_vblank_pipe_t *pipe = data; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 682 | |
| 683 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 684 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 685 | return -EINVAL; |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 686 | } |
| 687 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 688 | pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 689 | |
Dave Airlie | 702880f | 2006-06-24 17:07:34 +1000 | [diff] [blame] | 690 | return 0; |
| 691 | } |
| 692 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 693 | /** |
| 694 | * Schedule buffer swap at given vertical blank. |
| 695 | */ |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 696 | int i915_vblank_swap(struct drm_device *dev, void *data, |
| 697 | struct drm_file *file_priv) |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 698 | { |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 699 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 700 | drm_i915_vblank_swap_t *swap = data; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 701 | drm_i915_vbl_swap_t *vbl_swap; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 702 | unsigned int pipe, seqtype, curseq, plane; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a0b136b | 2006-10-25 00:12:52 +1000 | [diff] [blame] | 703 | unsigned long irqflags; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 704 | struct list_head *list; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 705 | int ret; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 706 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 707 | if (!dev_priv || !dev_priv->sarea_priv) { |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 708 | DRM_ERROR("%s called with no initialization\n", __func__); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 709 | return -EINVAL; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 710 | } |
| 711 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 712 | if (dev_priv->sarea_priv->rotation) { |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 713 | DRM_DEBUG("Rotation not supported\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 714 | return -EINVAL; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 715 | } |
| 716 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 717 | if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 718 | _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)) { |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 719 | DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 720 | return -EINVAL; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 541f29a | 2006-10-24 23:38:54 +1000 | [diff] [blame] | 721 | } |
| 722 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 723 | plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0; |
| 724 | pipe = i915_get_pipe(dev, plane); |
=?utf-8?q?Michel_D=C3=A4nzer?= | 541f29a | 2006-10-24 23:38:54 +1000 | [diff] [blame] | 725 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 726 | seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE); |
=?utf-8?q?Michel_D=C3=A4nzer?= | 541f29a | 2006-10-24 23:38:54 +1000 | [diff] [blame] | 727 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 541f29a | 2006-10-24 23:38:54 +1000 | [diff] [blame] | 728 | if (!(dev_priv->vblank_pipe & (1 << pipe))) { |
| 729 | DRM_ERROR("Invalid pipe %d\n", pipe); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 730 | return -EINVAL; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 731 | } |
| 732 | |
| 733 | spin_lock_irqsave(&dev->drw_lock, irqflags); |
| 734 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 735 | if (!drm_get_drawable_info(dev, swap->drawable)) { |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 736 | spin_unlock_irqrestore(&dev->drw_lock, irqflags); |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 737 | DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 738 | return -EINVAL; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 739 | } |
| 740 | |
| 741 | spin_unlock_irqrestore(&dev->drw_lock, irqflags); |
| 742 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 743 | /* |
| 744 | * We take the ref here and put it when the swap actually completes |
| 745 | * in the tasklet. |
| 746 | */ |
| 747 | ret = drm_vblank_get(dev, pipe); |
| 748 | if (ret) |
| 749 | return ret; |
| 750 | curseq = drm_vblank_count(dev, pipe); |
=?utf-8?q?Michel_D=C3=A4nzer?= | 541f29a | 2006-10-24 23:38:54 +1000 | [diff] [blame] | 751 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 2228ed6 | 2006-10-25 01:05:09 +1000 | [diff] [blame] | 752 | if (seqtype == _DRM_VBLANK_RELATIVE) |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 753 | swap->sequence += curseq; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 2228ed6 | 2006-10-25 01:05:09 +1000 | [diff] [blame] | 754 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 755 | if ((curseq - swap->sequence) <= (1<<23)) { |
| 756 | if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) { |
| 757 | swap->sequence = curseq + 1; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 2228ed6 | 2006-10-25 01:05:09 +1000 | [diff] [blame] | 758 | } else { |
=?utf-8?q?Michel_D=C3=A4nzer?= | 541f29a | 2006-10-24 23:38:54 +1000 | [diff] [blame] | 759 | DRM_DEBUG("Missed target sequence\n"); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 760 | drm_vblank_put(dev, pipe); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 761 | return -EINVAL; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 541f29a | 2006-10-24 23:38:54 +1000 | [diff] [blame] | 762 | } |
=?utf-8?q?Michel_D=C3=A4nzer?= | 541f29a | 2006-10-24 23:38:54 +1000 | [diff] [blame] | 763 | } |
| 764 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 2228ed6 | 2006-10-25 01:05:09 +1000 | [diff] [blame] | 765 | spin_lock_irqsave(&dev_priv->swaps_lock, irqflags); |
| 766 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 767 | list_for_each(list, &dev_priv->vbl_swaps.head) { |
| 768 | vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head); |
| 769 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 770 | if (vbl_swap->drw_id == swap->drawable && |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 771 | vbl_swap->plane == plane && |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 772 | vbl_swap->sequence == swap->sequence) { |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 773 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); |
| 774 | DRM_DEBUG("Already scheduled\n"); |
| 775 | return 0; |
| 776 | } |
| 777 | } |
| 778 | |
| 779 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); |
| 780 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | 21fa60e | 2006-10-25 00:10:59 +1000 | [diff] [blame] | 781 | if (dev_priv->swaps_pending >= 100) { |
| 782 | DRM_DEBUG("Too many swaps queued\n"); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 783 | drm_vblank_put(dev, pipe); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 784 | return -EBUSY; |
=?utf-8?q?Michel_D=C3=A4nzer?= | 21fa60e | 2006-10-25 00:10:59 +1000 | [diff] [blame] | 785 | } |
| 786 | |
Dave Airlie | 54583bf | 2007-10-14 21:21:30 +1000 | [diff] [blame] | 787 | vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 788 | |
| 789 | if (!vbl_swap) { |
| 790 | DRM_ERROR("Failed to allocate memory to queue swap\n"); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 791 | drm_vblank_put(dev, pipe); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 792 | return -ENOMEM; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 793 | } |
| 794 | |
| 795 | DRM_DEBUG("\n"); |
| 796 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 797 | vbl_swap->drw_id = swap->drawable; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 798 | vbl_swap->plane = plane; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 799 | vbl_swap->sequence = swap->sequence; |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 800 | |
| 801 | spin_lock_irqsave(&dev_priv->swaps_lock, irqflags); |
| 802 | |
Li Zefan | d5b0d1b | 2007-12-17 09:47:19 +1000 | [diff] [blame] | 803 | list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 804 | dev_priv->swaps_pending++; |
| 805 | |
| 806 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); |
| 807 | |
| 808 | return 0; |
| 809 | } |
| 810 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 811 | /* drm_dma.h hooks |
| 812 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 813 | void i915_driver_irq_preinstall(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 814 | { |
| 815 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 816 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 817 | I915_WRITE(HWSTAM, 0xeffe); |
| 818 | I915_WRITE(IMR, 0xffffffff); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 819 | I915_WRITE(IER, 0x0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | } |
| 821 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 822 | int i915_driver_irq_postinstall(struct drm_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 823 | { |
| 824 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 825 | int ret, num_pipes = 2; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 826 | |
Thomas Gleixner | a6399bd | 2007-05-26 05:56:14 +1000 | [diff] [blame] | 827 | spin_lock_init(&dev_priv->swaps_lock); |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 828 | INIT_LIST_HEAD(&dev_priv->vbl_swaps.head); |
| 829 | dev_priv->swaps_pending = 0; |
| 830 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 831 | /* Set initial unmasked IRQs to just the selected vblank pipes. */ |
| 832 | dev_priv->irq_mask_reg = ~0; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 833 | |
| 834 | ret = drm_vblank_init(dev, num_pipes); |
| 835 | if (ret) |
| 836 | return ret; |
| 837 | |
| 838 | dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; |
| 839 | dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT; |
| 840 | dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT; |
| 841 | |
| 842 | dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 843 | |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 844 | dev_priv->irq_mask_reg &= I915_INTERRUPT_ENABLE_MASK; |
| 845 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 846 | I915_WRITE(IMR, dev_priv->irq_mask_reg); |
| 847 | I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK); |
| 848 | (void) I915_READ(IER); |
| 849 | |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 850 | opregion_enable_asle(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 851 | DRM_INIT_WAITQUEUE(&dev_priv->irq_queue); |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 852 | |
| 853 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 854 | } |
| 855 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 856 | void i915_driver_irq_uninstall(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | { |
| 858 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 859 | u32 temp; |
Dave Airlie | 91e3738 | 2006-02-18 15:17:04 +1100 | [diff] [blame] | 860 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | if (!dev_priv) |
| 862 | return; |
| 863 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 864 | dev_priv->vblank_pipe = 0; |
| 865 | |
| 866 | I915_WRITE(HWSTAM, 0xffffffff); |
| 867 | I915_WRITE(IMR, 0xffffffff); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 868 | I915_WRITE(IER, 0x0); |
Dave Airlie | 91e3738 | 2006-02-18 15:17:04 +1100 | [diff] [blame] | 869 | |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 870 | temp = I915_READ(PIPEASTAT); |
| 871 | I915_WRITE(PIPEASTAT, temp); |
| 872 | temp = I915_READ(PIPEBSTAT); |
| 873 | I915_WRITE(PIPEBSTAT, temp); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 874 | temp = I915_READ(IIR); |
| 875 | I915_WRITE(IIR, temp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 876 | } |