blob: 3295ea63f3eb5d53bcafabc39a372846ba0610b3 [file] [log] [blame]
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001/*
2 * lirc_serial.c
3 *
4 * lirc_serial - Device driver that records pulse- and pause-lengths
5 * (space-lengths) between DDCD event on a serial port.
6 *
7 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
8 * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
9 * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
10 * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
11 * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28/*
29 * Steve's changes to improve transmission fidelity:
30 * - for systems with the rdtsc instruction and the clock counter, a
31 * send_pule that times the pulses directly using the counter.
32 * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
33 * not needed. Measurement shows very stable waveform, even where
34 * PCI activity slows the access to the UART, which trips up other
35 * versions.
36 * - For other system, non-integer-microsecond pulse/space lengths,
37 * done using fixed point binary. So, much more accurate carrier
38 * frequency.
39 * - fine tuned transmitter latency, taking advantage of fractional
40 * microseconds in previous change
41 * - Fixed bug in the way transmitter latency was accounted for by
42 * tuning the pulse lengths down - the send_pulse routine ignored
43 * this overhead as it timed the overall pulse length - so the
44 * pulse frequency was right but overall pulse length was too
45 * long. Fixed by accounting for latency on each pulse/space
46 * iteration.
47 *
48 * Steve Davies <steve@daviesfam.org> July 2001
49 */
50
51#include <linux/module.h>
52#include <linux/errno.h>
53#include <linux/signal.h>
54#include <linux/sched.h>
55#include <linux/fs.h>
56#include <linux/interrupt.h>
57#include <linux/ioport.h>
58#include <linux/kernel.h>
59#include <linux/serial_reg.h>
60#include <linux/time.h>
61#include <linux/string.h>
62#include <linux/types.h>
63#include <linux/wait.h>
64#include <linux/mm.h>
65#include <linux/delay.h>
66#include <linux/poll.h>
67#include <linux/platform_device.h>
68
Jarod Wilson1beef3c2010-07-26 20:31:45 -030069#include <linux/io.h>
70#include <linux/irq.h>
71#include <linux/fcntl.h>
72#include <linux/spinlock.h>
73
74#ifdef CONFIG_LIRC_SERIAL_NSLU2
75#include <asm/hardware.h>
76#endif
77/* From Intel IXP42X Developer's Manual (#252480-005): */
78/* ftp://download.intel.com/design/network/manuals/25248005.pdf */
79#define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */
80#define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
81
82#include <media/lirc.h>
83#include <media/lirc_dev.h>
84
85#define LIRC_DRIVER_NAME "lirc_serial"
86
87struct lirc_serial {
88 int signal_pin;
89 int signal_pin_change;
90 u8 on;
91 u8 off;
92 long (*send_pulse)(unsigned long length);
93 void (*send_space)(long length);
94 int features;
95 spinlock_t lock;
96};
97
98#define LIRC_HOMEBREW 0
99#define LIRC_IRDEO 1
100#define LIRC_IRDEO_REMOTE 2
101#define LIRC_ANIMAX 3
102#define LIRC_IGOR 4
103#define LIRC_NSLU2 5
104
105/*** module parameters ***/
106static int type;
107static int io;
108static int irq;
Rusty Russell90ab5ee2012-01-13 09:32:20 +1030109static bool iommap;
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300110static int ioshift;
Rusty Russell90ab5ee2012-01-13 09:32:20 +1030111static bool softcarrier = 1;
112static bool share_irq;
113static bool debug;
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300114static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
Rusty Russell90ab5ee2012-01-13 09:32:20 +1030115static bool txsense; /* 0 = active high, 1 = active low */
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300116
117#define dprintk(fmt, args...) \
118 do { \
119 if (debug) \
120 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
121 fmt, ## args); \
122 } while (0)
123
124/* forward declarations */
125static long send_pulse_irdeo(unsigned long length);
126static long send_pulse_homebrew(unsigned long length);
127static void send_space_irdeo(long length);
128static void send_space_homebrew(long length);
129
130static struct lirc_serial hardware[] = {
131 [LIRC_HOMEBREW] = {
132 .signal_pin = UART_MSR_DCD,
133 .signal_pin_change = UART_MSR_DDCD,
134 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
135 .off = (UART_MCR_RTS | UART_MCR_OUT2),
136 .send_pulse = send_pulse_homebrew,
137 .send_space = send_space_homebrew,
138#ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
139 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
140 LIRC_CAN_SET_SEND_CARRIER |
141 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
142#else
143 .features = LIRC_CAN_REC_MODE2
144#endif
145 },
146
147 [LIRC_IRDEO] = {
148 .signal_pin = UART_MSR_DSR,
149 .signal_pin_change = UART_MSR_DDSR,
150 .on = UART_MCR_OUT2,
151 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
152 .send_pulse = send_pulse_irdeo,
153 .send_space = send_space_irdeo,
154 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
155 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
156 },
157
158 [LIRC_IRDEO_REMOTE] = {
159 .signal_pin = UART_MSR_DSR,
160 .signal_pin_change = UART_MSR_DDSR,
161 .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
162 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
163 .send_pulse = send_pulse_irdeo,
164 .send_space = send_space_irdeo,
165 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
166 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
167 },
168
169 [LIRC_ANIMAX] = {
170 .signal_pin = UART_MSR_DCD,
171 .signal_pin_change = UART_MSR_DDCD,
172 .on = 0,
173 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
174 .send_pulse = NULL,
175 .send_space = NULL,
176 .features = LIRC_CAN_REC_MODE2
177 },
178
179 [LIRC_IGOR] = {
180 .signal_pin = UART_MSR_DSR,
181 .signal_pin_change = UART_MSR_DDSR,
182 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
183 .off = (UART_MCR_RTS | UART_MCR_OUT2),
184 .send_pulse = send_pulse_homebrew,
185 .send_space = send_space_homebrew,
186#ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
187 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
188 LIRC_CAN_SET_SEND_CARRIER |
189 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
190#else
191 .features = LIRC_CAN_REC_MODE2
192#endif
193 },
194
195#ifdef CONFIG_LIRC_SERIAL_NSLU2
196 /*
197 * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
198 * We receive on CTS of the 2nd serial port (R142,LHS), we
199 * transmit with a IR diode between GPIO[1] (green status LED),
200 * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
201 * See also http://www.nslu2-linux.org for this device
202 */
203 [LIRC_NSLU2] = {
204 .signal_pin = UART_MSR_CTS,
205 .signal_pin_change = UART_MSR_DCTS,
206 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
207 .off = (UART_MCR_RTS | UART_MCR_OUT2),
208 .send_pulse = send_pulse_homebrew,
209 .send_space = send_space_homebrew,
210#ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
211 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
212 LIRC_CAN_SET_SEND_CARRIER |
213 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
214#else
215 .features = LIRC_CAN_REC_MODE2
216#endif
217 },
218#endif
219
220};
221
222#define RS_ISR_PASS_LIMIT 256
223
224/*
225 * A long pulse code from a remote might take up to 300 bytes. The
226 * daemon should read the bytes as soon as they are generated, so take
227 * the number of keys you think you can push before the daemon runs
228 * and multiply by 300. The driver will warn you if you overrun this
229 * buffer. If you have a slow computer or non-busmastering IDE disks,
230 * maybe you will need to increase this.
231 */
232
233/* This MUST be a power of two! It has to be larger than 1 as well. */
234
235#define RBUF_LEN 256
236
237static struct timeval lasttv = {0, 0};
238
239static struct lirc_buffer rbuf;
240
241static unsigned int freq = 38000;
242static unsigned int duty_cycle = 50;
243
244/* Initialized in init_timing_params() */
245static unsigned long period;
246static unsigned long pulse_width;
247static unsigned long space_width;
248
249#if defined(__i386__)
250/*
251 * From:
252 * Linux I/O port programming mini-HOWTO
253 * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
254 * v, 28 December 1997
255 *
256 * [...]
257 * Actually, a port I/O instruction on most ports in the 0-0x3ff range
258 * takes almost exactly 1 microsecond, so if you're, for example, using
259 * the parallel port directly, just do additional inb()s from that port
260 * to delay.
261 * [...]
262 */
263/* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
264 * comment above plus trimming to match actual measured frequency.
265 * This will be sensitive to cpu speed, though hopefully most of the 1.5us
266 * is spent in the uart access. Still - for reference test machine was a
267 * 1.13GHz Athlon system - Steve
268 */
269
270/*
271 * changed from 400 to 450 as this works better on slower machines;
272 * faster machines will use the rdtsc code anyway
273 */
274#define LIRC_SERIAL_TRANSMITTER_LATENCY 450
275
276#else
277
278/* does anybody have information on other platforms ? */
279/* 256 = 1<<8 */
280#define LIRC_SERIAL_TRANSMITTER_LATENCY 256
281
282#endif /* __i386__ */
283/*
284 * FIXME: should we be using hrtimers instead of this
285 * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
286 */
287
288/* fetch serial input packet (1 byte) from register offset */
289static u8 sinp(int offset)
290{
291 if (iommap != 0)
292 /* the register is memory-mapped */
293 offset <<= ioshift;
294
295 return inb(io + offset);
296}
297
298/* write serial output packet (1 byte) of value to register offset */
299static void soutp(int offset, u8 value)
300{
301 if (iommap != 0)
302 /* the register is memory-mapped */
303 offset <<= ioshift;
304
305 outb(value, io + offset);
306}
307
308static void on(void)
309{
310#ifdef CONFIG_LIRC_SERIAL_NSLU2
311 /*
312 * On NSLU2, we put the transmit diode between the output of the green
313 * status LED and ground
314 */
315 if (type == LIRC_NSLU2) {
316 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW);
317 return;
318 }
319#endif
320 if (txsense)
321 soutp(UART_MCR, hardware[type].off);
322 else
323 soutp(UART_MCR, hardware[type].on);
324}
325
326static void off(void)
327{
328#ifdef CONFIG_LIRC_SERIAL_NSLU2
329 if (type == LIRC_NSLU2) {
330 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH);
331 return;
332 }
333#endif
334 if (txsense)
335 soutp(UART_MCR, hardware[type].on);
336 else
337 soutp(UART_MCR, hardware[type].off);
338}
339
340#ifndef MAX_UDELAY_MS
341#define MAX_UDELAY_US 5000
342#else
343#define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
344#endif
345
346static void safe_udelay(unsigned long usecs)
347{
348 while (usecs > MAX_UDELAY_US) {
349 udelay(MAX_UDELAY_US);
350 usecs -= MAX_UDELAY_US;
351 }
352 udelay(usecs);
353}
354
355#ifdef USE_RDTSC
356/*
357 * This is an overflow/precision juggle, complicated in that we can't
358 * do long long divide in the kernel
359 */
360
361/*
362 * When we use the rdtsc instruction to measure clocks, we keep the
363 * pulse and space widths as clock cycles. As this is CPU speed
364 * dependent, the widths must be calculated in init_port and ioctl
365 * time
366 */
367
368/* So send_pulse can quickly convert microseconds to clocks */
369static unsigned long conv_us_to_clocks;
370
371static int init_timing_params(unsigned int new_duty_cycle,
372 unsigned int new_freq)
373{
Jarod Wilsona1266812010-10-08 17:35:09 -0300374 __u64 loops_per_sec, work;
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300375
376 duty_cycle = new_duty_cycle;
377 freq = new_freq;
378
Tejun Heo7b543a52010-12-18 16:30:05 +0100379 loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300380 loops_per_sec *= HZ;
381
382 /* How many clocks in a microsecond?, avoiding long long divide */
383 work = loops_per_sec;
384 work *= 4295; /* 4295 = 2^32 / 1e6 */
385 conv_us_to_clocks = (work >> 32);
386
387 /*
388 * Carrier period in clocks, approach good up to 32GHz clock,
389 * gets carrier frequency within 8Hz
390 */
391 period = loops_per_sec >> 3;
392 period /= (freq >> 3);
393
394 /* Derive pulse and space from the period */
395 pulse_width = period * duty_cycle / 100;
396 space_width = period - pulse_width;
397 dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
398 "clk/jiffy=%ld, pulse=%ld, space=%ld, "
399 "conv_us_to_clocks=%ld\n",
Tejun Heo7b543a52010-12-18 16:30:05 +0100400 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300401 pulse_width, space_width, conv_us_to_clocks);
402 return 0;
403}
404#else /* ! USE_RDTSC */
405static int init_timing_params(unsigned int new_duty_cycle,
406 unsigned int new_freq)
407{
408/*
409 * period, pulse/space width are kept with 8 binary places -
410 * IE multiplied by 256.
411 */
412 if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
413 LIRC_SERIAL_TRANSMITTER_LATENCY)
414 return -EINVAL;
415 if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
416 LIRC_SERIAL_TRANSMITTER_LATENCY)
417 return -EINVAL;
418 duty_cycle = new_duty_cycle;
419 freq = new_freq;
420 period = 256 * 1000000L / freq;
421 pulse_width = period * duty_cycle / 100;
422 space_width = period - pulse_width;
423 dprintk("in init_timing_params, freq=%d pulse=%ld, "
424 "space=%ld\n", freq, pulse_width, space_width);
425 return 0;
426}
427#endif /* USE_RDTSC */
428
429
430/* return value: space length delta */
431
432static long send_pulse_irdeo(unsigned long length)
433{
434 long rawbits, ret;
435 int i;
436 unsigned char output;
437 unsigned char chunk, shifted;
438
439 /* how many bits have to be sent ? */
440 rawbits = length * 1152 / 10000;
441 if (duty_cycle > 50)
442 chunk = 3;
443 else
444 chunk = 1;
445 for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
446 shifted = chunk << (i * 3);
447 shifted >>= 1;
448 output &= (~shifted);
449 i++;
450 if (i == 3) {
451 soutp(UART_TX, output);
452 while (!(sinp(UART_LSR) & UART_LSR_THRE))
453 ;
454 output = 0x7f;
455 i = 0;
456 }
457 }
458 if (i != 0) {
459 soutp(UART_TX, output);
460 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
461 ;
462 }
463
464 if (i == 0)
465 ret = (-rawbits) * 10000 / 1152;
466 else
467 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
468
469 return ret;
470}
471
472#ifdef USE_RDTSC
473/* Version that uses Pentium rdtsc instruction to measure clocks */
474
475/*
476 * This version does sub-microsecond timing using rdtsc instruction,
477 * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
478 * Implicitly i586 architecture... - Steve
479 */
480
481static long send_pulse_homebrew_softcarrier(unsigned long length)
482{
483 int flag;
484 unsigned long target, start, now;
485
486 /* Get going quick as we can */
487 rdtscl(start);
488 on();
489 /* Convert length from microseconds to clocks */
490 length *= conv_us_to_clocks;
491 /* And loop till time is up - flipping at right intervals */
492 now = start;
493 target = pulse_width;
494 flag = 1;
495 /*
496 * FIXME: This looks like a hard busy wait, without even an occasional,
497 * polite, cpu_relax() call. There's got to be a better way?
498 *
499 * The i2c code has the result of a lot of bit-banging work, I wonder if
500 * there's something there which could be helpful here.
501 */
502 while ((now - start) < length) {
503 /* Delay till flip time */
504 do {
505 rdtscl(now);
506 } while ((now - start) < target);
507
508 /* flip */
509 if (flag) {
510 rdtscl(now);
511 off();
512 target += space_width;
513 } else {
514 rdtscl(now); on();
515 target += pulse_width;
516 }
517 flag = !flag;
518 }
519 rdtscl(now);
520 return ((now - start) - length) / conv_us_to_clocks;
521}
522#else /* ! USE_RDTSC */
523/* Version using udelay() */
524
525/*
526 * here we use fixed point arithmetic, with 8
527 * fractional bits. that gets us within 0.1% or so of the right average
528 * frequency, albeit with some jitter in pulse length - Steve
529 */
530
531/* To match 8 fractional bits used for pulse/space length */
532
533static long send_pulse_homebrew_softcarrier(unsigned long length)
534{
535 int flag;
536 unsigned long actual, target, d;
537 length <<= 8;
538
539 actual = 0; target = 0; flag = 0;
540 while (actual < length) {
541 if (flag) {
542 off();
543 target += space_width;
544 } else {
545 on();
546 target += pulse_width;
547 }
548 d = (target - actual -
549 LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
550 /*
551 * Note - we've checked in ioctl that the pulse/space
552 * widths are big enough so that d is > 0
553 */
554 udelay(d);
555 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
556 flag = !flag;
557 }
558 return (actual-length) >> 8;
559}
560#endif /* USE_RDTSC */
561
562static long send_pulse_homebrew(unsigned long length)
563{
564 if (length <= 0)
565 return 0;
566
567 if (softcarrier)
568 return send_pulse_homebrew_softcarrier(length);
569 else {
570 on();
571 safe_udelay(length);
572 return 0;
573 }
574}
575
576static void send_space_irdeo(long length)
577{
578 if (length <= 0)
579 return;
580
581 safe_udelay(length);
582}
583
584static void send_space_homebrew(long length)
585{
586 off();
587 if (length <= 0)
588 return;
589 safe_udelay(length);
590}
591
592static void rbwrite(int l)
593{
594 if (lirc_buffer_full(&rbuf)) {
595 /* no new signals will be accepted */
596 dprintk("Buffer overrun\n");
597 return;
598 }
599 lirc_buffer_write(&rbuf, (void *)&l);
600}
601
602static void frbwrite(int l)
603{
604 /* simple noise filter */
605 static int pulse, space;
606 static unsigned int ptr;
607
608 if (ptr > 0 && (l & PULSE_BIT)) {
609 pulse += l & PULSE_MASK;
610 if (pulse > 250) {
611 rbwrite(space);
612 rbwrite(pulse | PULSE_BIT);
613 ptr = 0;
614 pulse = 0;
615 }
616 return;
617 }
618 if (!(l & PULSE_BIT)) {
619 if (ptr == 0) {
620 if (l > 20000) {
621 space = l;
622 ptr++;
623 return;
624 }
625 } else {
626 if (l > 20000) {
627 space += pulse;
628 if (space > PULSE_MASK)
629 space = PULSE_MASK;
630 space += l;
631 if (space > PULSE_MASK)
632 space = PULSE_MASK;
633 pulse = 0;
634 return;
635 }
636 rbwrite(space);
637 rbwrite(pulse | PULSE_BIT);
638 ptr = 0;
639 pulse = 0;
640 }
641 }
642 rbwrite(l);
643}
644
645static irqreturn_t irq_handler(int i, void *blah)
646{
647 struct timeval tv;
648 int counter, dcd;
649 u8 status;
650 long deltv;
651 int data;
652 static int last_dcd = -1;
653
654 if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
655 /* not our interrupt */
656 return IRQ_NONE;
657 }
658
659 counter = 0;
660 do {
661 counter++;
662 status = sinp(UART_MSR);
663 if (counter > RS_ISR_PASS_LIMIT) {
664 printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: "
665 "We're caught!\n");
666 break;
667 }
668 if ((status & hardware[type].signal_pin_change)
669 && sense != -1) {
670 /* get current time */
671 do_gettimeofday(&tv);
672
673 /* New mode, written by Trent Piepho
674 <xyzzy@u.washington.edu>. */
675
676 /*
677 * The old format was not very portable.
678 * We now use an int to pass pulses
679 * and spaces to user space.
680 *
681 * If PULSE_BIT is set a pulse has been
682 * received, otherwise a space has been
683 * received. The driver needs to know if your
684 * receiver is active high or active low, or
685 * the space/pulse sense could be
686 * inverted. The bits denoted by PULSE_MASK are
687 * the length in microseconds. Lengths greater
688 * than or equal to 16 seconds are clamped to
689 * PULSE_MASK. All other bits are unused.
690 * This is a much simpler interface for user
691 * programs, as well as eliminating "out of
692 * phase" errors with space/pulse
693 * autodetection.
694 */
695
696 /* calc time since last interrupt in microseconds */
697 dcd = (status & hardware[type].signal_pin) ? 1 : 0;
698
699 if (dcd == last_dcd) {
700 printk(KERN_WARNING LIRC_DRIVER_NAME
701 ": ignoring spike: %d %d %lx %lx %lx %lx\n",
702 dcd, sense,
703 tv.tv_sec, lasttv.tv_sec,
704 tv.tv_usec, lasttv.tv_usec);
705 continue;
706 }
707
708 deltv = tv.tv_sec-lasttv.tv_sec;
709 if (tv.tv_sec < lasttv.tv_sec ||
710 (tv.tv_sec == lasttv.tv_sec &&
711 tv.tv_usec < lasttv.tv_usec)) {
712 printk(KERN_WARNING LIRC_DRIVER_NAME
713 ": AIEEEE: your clock just jumped "
714 "backwards\n");
715 printk(KERN_WARNING LIRC_DRIVER_NAME
716 ": %d %d %lx %lx %lx %lx\n",
717 dcd, sense,
718 tv.tv_sec, lasttv.tv_sec,
719 tv.tv_usec, lasttv.tv_usec);
720 data = PULSE_MASK;
721 } else if (deltv > 15) {
722 data = PULSE_MASK; /* really long time */
723 if (!(dcd^sense)) {
724 /* sanity check */
725 printk(KERN_WARNING LIRC_DRIVER_NAME
726 ": AIEEEE: "
727 "%d %d %lx %lx %lx %lx\n",
728 dcd, sense,
729 tv.tv_sec, lasttv.tv_sec,
730 tv.tv_usec, lasttv.tv_usec);
731 /*
732 * detecting pulse while this
733 * MUST be a space!
734 */
735 sense = sense ? 0 : 1;
736 }
737 } else
738 data = (int) (deltv*1000000 +
739 tv.tv_usec -
740 lasttv.tv_usec);
741 frbwrite(dcd^sense ? data : (data|PULSE_BIT));
742 lasttv = tv;
743 last_dcd = dcd;
744 wake_up_interruptible(&rbuf.wait_poll);
745 }
746 } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
747 return IRQ_HANDLED;
748}
749
750
751static int hardware_init_port(void)
752{
753 u8 scratch, scratch2, scratch3;
754
755 /*
756 * This is a simple port existence test, borrowed from the autoconfig
757 * function in drivers/serial/8250.c
758 */
759 scratch = sinp(UART_IER);
760 soutp(UART_IER, 0);
761#ifdef __i386__
762 outb(0xff, 0x080);
763#endif
764 scratch2 = sinp(UART_IER) & 0x0f;
765 soutp(UART_IER, 0x0f);
766#ifdef __i386__
767 outb(0x00, 0x080);
768#endif
769 scratch3 = sinp(UART_IER) & 0x0f;
770 soutp(UART_IER, scratch);
771 if (scratch2 != 0 || scratch3 != 0x0f) {
772 /* we fail, there's nothing here */
773 printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test "
774 "failed, cannot continue\n");
Ben Hutchings9b98d602011-11-16 01:53:35 -0300775 return -ENODEV;
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300776 }
777
778
779
780 /* Set DLAB 0. */
781 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
782
783 /* First of all, disable all interrupts */
784 soutp(UART_IER, sinp(UART_IER) &
785 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
786
787 /* Clear registers. */
788 sinp(UART_LSR);
789 sinp(UART_RX);
790 sinp(UART_IIR);
791 sinp(UART_MSR);
792
793#ifdef CONFIG_LIRC_SERIAL_NSLU2
794 if (type == LIRC_NSLU2) {
795 /* Setup NSLU2 UART */
796
797 /* Enable UART */
798 soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE);
799 /* Disable Receiver data Time out interrupt */
800 soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE);
801 /* set out2 = interrupt unmask; off() doesn't set MCR
802 on NSLU2 */
803 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
804 }
805#endif
806
807 /* Set line for power source */
808 off();
809
810 /* Clear registers again to be sure. */
811 sinp(UART_LSR);
812 sinp(UART_RX);
813 sinp(UART_IIR);
814 sinp(UART_MSR);
815
816 switch (type) {
817 case LIRC_IRDEO:
818 case LIRC_IRDEO_REMOTE:
819 /* setup port to 7N1 @ 115200 Baud */
820 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
821
822 /* Set DLAB 1. */
823 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
824 /* Set divisor to 1 => 115200 Baud */
825 soutp(UART_DLM, 0);
826 soutp(UART_DLL, 1);
827 /* Set DLAB 0 + 7N1 */
828 soutp(UART_LCR, UART_LCR_WLEN7);
829 /* THR interrupt already disabled at this point */
830 break;
831 default:
832 break;
833 }
834
835 return 0;
836}
837
Ben Hutchings9105b8b2011-11-16 01:49:41 -0300838static int __devinit lirc_serial_probe(struct platform_device *dev)
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300839{
Jarod Wilsonc4b0afe2011-06-13 15:32:26 -0300840 int i, nlow, nhigh, result;
841
842 result = request_irq(irq, irq_handler,
Yong Zhang18e93512011-09-07 16:10:22 +0800843 (share_irq ? IRQF_SHARED : 0),
Jarod Wilsonc4b0afe2011-06-13 15:32:26 -0300844 LIRC_DRIVER_NAME, (void *)&hardware);
Ben Hutchingsaffc9a02011-11-16 01:54:04 -0300845 if (result < 0) {
846 if (result == -EBUSY)
847 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n",
848 irq);
849 else if (result == -EINVAL)
850 printk(KERN_ERR LIRC_DRIVER_NAME
851 ": Bad irq number or handler\n");
852 return result;
853 }
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300854
855 /* Reserve io region. */
856 /*
857 * Future MMAP-Developers: Attention!
858 * For memory mapped I/O you *might* need to use ioremap() first,
859 * for the NSLU2 it's done in boot code.
860 */
861 if (((iommap != 0)
862 && (request_mem_region(iommap, 8 << ioshift,
863 LIRC_DRIVER_NAME) == NULL))
864 || ((iommap == 0)
865 && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) {
866 printk(KERN_ERR LIRC_DRIVER_NAME
867 ": port %04x already in use\n", io);
868 printk(KERN_WARNING LIRC_DRIVER_NAME
869 ": use 'setserial /dev/ttySX uart none'\n");
870 printk(KERN_WARNING LIRC_DRIVER_NAME
871 ": or compile the serial port driver as module and\n");
872 printk(KERN_WARNING LIRC_DRIVER_NAME
873 ": make sure this module is loaded first\n");
Ben Hutchingsc8e57e12011-11-16 01:52:11 -0300874 result = -EBUSY;
875 goto exit_free_irq;
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300876 }
877
Ben Hutchings9b98d602011-11-16 01:53:35 -0300878 result = hardware_init_port();
879 if (result < 0)
Ben Hutchingsc8e57e12011-11-16 01:52:11 -0300880 goto exit_release_region;
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300881
882 /* Initialize pulse/space widths */
883 init_timing_params(duty_cycle, freq);
884
885 /* If pin is high, then this must be an active low receiver. */
886 if (sense == -1) {
887 /* wait 1/2 sec for the power supply */
888 msleep(500);
889
890 /*
891 * probe 9 times every 0.04s, collect "votes" for
892 * active high/low
893 */
894 nlow = 0;
895 nhigh = 0;
896 for (i = 0; i < 9; i++) {
897 if (sinp(UART_MSR) & hardware[type].signal_pin)
898 nlow++;
899 else
900 nhigh++;
901 msleep(40);
902 }
903 sense = (nlow >= nhigh ? 1 : 0);
904 printk(KERN_INFO LIRC_DRIVER_NAME ": auto-detected active "
905 "%s receiver\n", sense ? "low" : "high");
906 } else
907 printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active "
908 "%s receiver\n", sense ? "low" : "high");
909
Jarod Wilsonc4b0afe2011-06-13 15:32:26 -0300910 dprintk("Interrupt %d, port %04x obtained\n", irq, io);
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300911 return 0;
Ben Hutchingsc8e57e12011-11-16 01:52:11 -0300912
913exit_release_region:
914 if (iommap != 0)
915 release_mem_region(iommap, 8 << ioshift);
916 else
917 release_region(io, 8);
918exit_free_irq:
919 free_irq(irq, (void *)&hardware);
920
921 return result;
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300922}
923
Ben Hutchings9105b8b2011-11-16 01:49:41 -0300924static int __devexit lirc_serial_remove(struct platform_device *dev)
925{
926 free_irq(irq, (void *)&hardware);
927
928 if (iommap != 0)
929 release_mem_region(iommap, 8 << ioshift);
930 else
931 release_region(io, 8);
932
933 return 0;
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300934}
935
936static int set_use_inc(void *data)
937{
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300938 unsigned long flags;
939
940 /* initialize timestamp */
941 do_gettimeofday(&lasttv);
942
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300943 spin_lock_irqsave(&hardware[type].lock, flags);
944
945 /* Set DLAB 0. */
946 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
947
948 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
949
950 spin_unlock_irqrestore(&hardware[type].lock, flags);
951
952 return 0;
953}
954
955static void set_use_dec(void *data)
956{ unsigned long flags;
957
958 spin_lock_irqsave(&hardware[type].lock, flags);
959
960 /* Set DLAB 0. */
961 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
962
963 /* First of all, disable all interrupts */
964 soutp(UART_IER, sinp(UART_IER) &
965 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
966 spin_unlock_irqrestore(&hardware[type].lock, flags);
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300967}
968
969static ssize_t lirc_write(struct file *file, const char *buf,
970 size_t n, loff_t *ppos)
971{
972 int i, count;
973 unsigned long flags;
974 long delta = 0;
975 int *wbuf;
976
977 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
Ben Hutchings9b98d602011-11-16 01:53:35 -0300978 return -EPERM;
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300979
980 count = n / sizeof(int);
981 if (n % sizeof(int) || count % 2 == 0)
982 return -EINVAL;
983 wbuf = memdup_user(buf, n);
Jarod Wilson88914bd2011-01-17 16:02:00 -0300984 if (IS_ERR(wbuf))
Jarod Wilson1beef3c2010-07-26 20:31:45 -0300985 return PTR_ERR(wbuf);
986 spin_lock_irqsave(&hardware[type].lock, flags);
987 if (type == LIRC_IRDEO) {
988 /* DTR, RTS down */
989 on();
990 }
991 for (i = 0; i < count; i++) {
992 if (i%2)
993 hardware[type].send_space(wbuf[i] - delta);
994 else
995 delta = hardware[type].send_pulse(wbuf[i]);
996 }
997 off();
998 spin_unlock_irqrestore(&hardware[type].lock, flags);
Jarod Wilson88914bd2011-01-17 16:02:00 -0300999 kfree(wbuf);
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001000 return n;
1001}
1002
1003static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
1004{
1005 int result;
Jarod Wilsona1266812010-10-08 17:35:09 -03001006 __u32 value;
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001007
1008 switch (cmd) {
1009 case LIRC_GET_SEND_MODE:
1010 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1011 return -ENOIOCTLCMD;
1012
1013 result = put_user(LIRC_SEND2MODE
1014 (hardware[type].features&LIRC_CAN_SEND_MASK),
Jarod Wilsona1266812010-10-08 17:35:09 -03001015 (__u32 *) arg);
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001016 if (result)
1017 return result;
1018 break;
1019
1020 case LIRC_SET_SEND_MODE:
1021 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1022 return -ENOIOCTLCMD;
1023
Jarod Wilsona1266812010-10-08 17:35:09 -03001024 result = get_user(value, (__u32 *) arg);
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001025 if (result)
1026 return result;
1027 /* only LIRC_MODE_PULSE supported */
1028 if (value != LIRC_MODE_PULSE)
Ben Hutchings9b98d602011-11-16 01:53:35 -03001029 return -EINVAL;
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001030 break;
1031
1032 case LIRC_GET_LENGTH:
Ben Hutchings9b98d602011-11-16 01:53:35 -03001033 return -ENOIOCTLCMD;
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001034 break;
1035
1036 case LIRC_SET_SEND_DUTY_CYCLE:
1037 dprintk("SET_SEND_DUTY_CYCLE\n");
1038 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
1039 return -ENOIOCTLCMD;
1040
Jarod Wilsona1266812010-10-08 17:35:09 -03001041 result = get_user(value, (__u32 *) arg);
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001042 if (result)
1043 return result;
Jarod Wilsona1266812010-10-08 17:35:09 -03001044 if (value <= 0 || value > 100)
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001045 return -EINVAL;
Jarod Wilsona1266812010-10-08 17:35:09 -03001046 return init_timing_params(value, freq);
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001047 break;
1048
1049 case LIRC_SET_SEND_CARRIER:
1050 dprintk("SET_SEND_CARRIER\n");
1051 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
1052 return -ENOIOCTLCMD;
1053
Jarod Wilsona1266812010-10-08 17:35:09 -03001054 result = get_user(value, (__u32 *) arg);
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001055 if (result)
1056 return result;
Jarod Wilsona1266812010-10-08 17:35:09 -03001057 if (value > 500000 || value < 20000)
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001058 return -EINVAL;
Jarod Wilsona1266812010-10-08 17:35:09 -03001059 return init_timing_params(duty_cycle, value);
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001060 break;
1061
1062 default:
1063 return lirc_dev_fop_ioctl(filep, cmd, arg);
1064 }
1065 return 0;
1066}
1067
Mauro Carvalho Chehab0f9313a2010-07-27 18:44:45 -03001068static const struct file_operations lirc_fops = {
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001069 .owner = THIS_MODULE,
1070 .write = lirc_write,
1071 .unlocked_ioctl = lirc_ioctl,
Jarod Wilson8be292c2010-10-09 15:07:06 -03001072#ifdef CONFIG_COMPAT
1073 .compat_ioctl = lirc_ioctl,
1074#endif
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001075 .read = lirc_dev_fop_read,
1076 .poll = lirc_dev_fop_poll,
1077 .open = lirc_dev_fop_open,
1078 .release = lirc_dev_fop_close,
Arnd Bergmannd9d2e9d2010-08-15 18:51:56 +02001079 .llseek = no_llseek,
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001080};
1081
1082static struct lirc_driver driver = {
1083 .name = LIRC_DRIVER_NAME,
1084 .minor = -1,
1085 .code_length = 1,
1086 .sample_rate = 0,
1087 .data = NULL,
1088 .add_to_buf = NULL,
1089 .rbuf = &rbuf,
1090 .set_use_inc = set_use_inc,
1091 .set_use_dec = set_use_dec,
1092 .fops = &lirc_fops,
1093 .dev = NULL,
1094 .owner = THIS_MODULE,
1095};
1096
1097static struct platform_device *lirc_serial_dev;
1098
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001099static int lirc_serial_suspend(struct platform_device *dev,
1100 pm_message_t state)
1101{
1102 /* Set DLAB 0. */
1103 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1104
1105 /* Disable all interrupts */
1106 soutp(UART_IER, sinp(UART_IER) &
1107 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
1108
1109 /* Clear registers. */
1110 sinp(UART_LSR);
1111 sinp(UART_RX);
1112 sinp(UART_IIR);
1113 sinp(UART_MSR);
1114
1115 return 0;
1116}
1117
1118/* twisty maze... need a forward-declaration here... */
1119static void lirc_serial_exit(void);
1120
1121static int lirc_serial_resume(struct platform_device *dev)
1122{
1123 unsigned long flags;
Ben Hutchings9b98d602011-11-16 01:53:35 -03001124 int result;
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001125
Ben Hutchings9b98d602011-11-16 01:53:35 -03001126 result = hardware_init_port();
1127 if (result < 0)
1128 return result;
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001129
1130 spin_lock_irqsave(&hardware[type].lock, flags);
1131 /* Enable Interrupt */
1132 do_gettimeofday(&lasttv);
1133 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
1134 off();
1135
1136 lirc_buffer_clear(&rbuf);
1137
1138 spin_unlock_irqrestore(&hardware[type].lock, flags);
1139
1140 return 0;
1141}
1142
1143static struct platform_driver lirc_serial_driver = {
1144 .probe = lirc_serial_probe,
1145 .remove = __devexit_p(lirc_serial_remove),
1146 .suspend = lirc_serial_suspend,
1147 .resume = lirc_serial_resume,
1148 .driver = {
1149 .name = "lirc_serial",
1150 .owner = THIS_MODULE,
1151 },
1152};
1153
1154static int __init lirc_serial_init(void)
1155{
1156 int result;
1157
1158 /* Init read buffer. */
1159 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1160 if (result < 0)
Ben Hutchings9b98d602011-11-16 01:53:35 -03001161 return result;
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001162
1163 result = platform_driver_register(&lirc_serial_driver);
1164 if (result) {
1165 printk("lirc register returned %d\n", result);
1166 goto exit_buffer_free;
1167 }
1168
1169 lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1170 if (!lirc_serial_dev) {
1171 result = -ENOMEM;
1172 goto exit_driver_unregister;
1173 }
1174
1175 result = platform_device_add(lirc_serial_dev);
1176 if (result)
1177 goto exit_device_put;
1178
1179 return 0;
1180
1181exit_device_put:
1182 platform_device_put(lirc_serial_dev);
1183exit_driver_unregister:
1184 platform_driver_unregister(&lirc_serial_driver);
1185exit_buffer_free:
1186 lirc_buffer_free(&rbuf);
1187 return result;
1188}
1189
1190static void lirc_serial_exit(void)
1191{
1192 platform_device_unregister(lirc_serial_dev);
1193 platform_driver_unregister(&lirc_serial_driver);
1194 lirc_buffer_free(&rbuf);
1195}
1196
1197static int __init lirc_serial_init_module(void)
1198{
1199 int result;
1200
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001201 switch (type) {
1202 case LIRC_HOMEBREW:
1203 case LIRC_IRDEO:
1204 case LIRC_IRDEO_REMOTE:
1205 case LIRC_ANIMAX:
1206 case LIRC_IGOR:
1207 /* if nothing specified, use ttyS0/com1 and irq 4 */
1208 io = io ? io : 0x3f8;
1209 irq = irq ? irq : 4;
1210 break;
1211#ifdef CONFIG_LIRC_SERIAL_NSLU2
1212 case LIRC_NSLU2:
1213 io = io ? io : IRQ_IXP4XX_UART2;
1214 irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET);
1215 iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS;
1216 ioshift = ioshift ? ioshift : 2;
1217 break;
1218#endif
1219 default:
Ben Hutchings9105b8b2011-11-16 01:49:41 -03001220 return -EINVAL;
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001221 }
1222 if (!softcarrier) {
1223 switch (type) {
1224 case LIRC_HOMEBREW:
1225 case LIRC_IGOR:
1226#ifdef CONFIG_LIRC_SERIAL_NSLU2
1227 case LIRC_NSLU2:
1228#endif
1229 hardware[type].features &=
1230 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1231 LIRC_CAN_SET_SEND_CARRIER);
1232 break;
1233 }
1234 }
1235
Ben Hutchings9105b8b2011-11-16 01:49:41 -03001236 result = lirc_serial_init();
1237 if (result)
1238 return result;
1239
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001240 driver.features = hardware[type].features;
1241 driver.dev = &lirc_serial_dev->dev;
1242 driver.minor = lirc_register_driver(&driver);
1243 if (driver.minor < 0) {
1244 printk(KERN_ERR LIRC_DRIVER_NAME
1245 ": register_chrdev failed!\n");
Ben Hutchings9105b8b2011-11-16 01:49:41 -03001246 lirc_serial_exit();
Ben Hutchings9b98d602011-11-16 01:53:35 -03001247 return driver.minor;
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001248 }
1249 return 0;
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001250}
1251
1252static void __exit lirc_serial_exit_module(void)
1253{
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001254 lirc_unregister_driver(driver.minor);
Ben Hutchings9105b8b2011-11-16 01:49:41 -03001255 lirc_serial_exit();
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001256 dprintk("cleaned up module\n");
1257}
1258
1259
1260module_init(lirc_serial_init_module);
1261module_exit(lirc_serial_exit_module);
1262
1263MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1264MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1265 "Christoph Bartelmus, Andrei Tanas");
1266MODULE_LICENSE("GPL");
1267
1268module_param(type, int, S_IRUGO);
1269MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1270 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1271 " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1272
1273module_param(io, int, S_IRUGO);
1274MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1275
1276/* some architectures (e.g. intel xscale) have memory mapped registers */
1277module_param(iommap, bool, S_IRUGO);
1278MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1279 " (0 = no memory mapped io)");
1280
1281/*
1282 * some architectures (e.g. intel xscale) align the 8bit serial registers
1283 * on 32bit word boundaries.
Justin P. Mattockb47acf22012-03-05 11:49:26 -03001284 * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
Jarod Wilson1beef3c2010-07-26 20:31:45 -03001285 */
1286module_param(ioshift, int, S_IRUGO);
1287MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1288
1289module_param(irq, int, S_IRUGO);
1290MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1291
1292module_param(share_irq, bool, S_IRUGO);
1293MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1294
1295module_param(sense, bool, S_IRUGO);
1296MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1297 " (0 = active high, 1 = active low )");
1298
1299#ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1300module_param(txsense, bool, S_IRUGO);
1301MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1302 " (0 = active high, 1 = active low )");
1303#endif
1304
1305module_param(softcarrier, bool, S_IRUGO);
1306MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
1307
1308module_param(debug, bool, S_IRUGO | S_IWUSR);
1309MODULE_PARM_DESC(debug, "Enable debugging messages");