Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * Copyright (C) 2000 YAEGASHI Takeshi |
| 3 | * Hitachi HD64461 companion chip support |
| 4 | */ |
| 5 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | #include <linux/sched.h> |
| 7 | #include <linux/module.h> |
| 8 | #include <linux/kernel.h> |
| 9 | #include <linux/param.h> |
| 10 | #include <linux/interrupt.h> |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/irq.h> |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 13 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <asm/irq.h> |
Paul Mundt | 6d75e65 | 2006-09-27 13:42:57 +0900 | [diff] [blame] | 15 | #include <asm/hd64461.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | |
Kristoffer Ericson | f138230 | 2007-09-11 12:48:45 +0900 | [diff] [blame] | 17 | /* This belongs in cpu specific */ |
| 18 | #define INTC_ICR1 0xA4140010UL |
| 19 | |
Paul Mundt | 19add7e | 2010-10-27 15:18:15 +0900 | [diff] [blame] | 20 | static void hd64461_mask_irq(struct irq_data *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | { |
Paul Mundt | 19add7e | 2010-10-27 15:18:15 +0900 | [diff] [blame] | 22 | unsigned int irq = data->irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | unsigned short nimr; |
| 24 | unsigned short mask = 1 << (irq - HD64461_IRQBASE); |
| 25 | |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 26 | nimr = __raw_readw(HD64461_NIMR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | nimr |= mask; |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 28 | __raw_writew(nimr, HD64461_NIMR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | } |
| 30 | |
Paul Mundt | 19add7e | 2010-10-27 15:18:15 +0900 | [diff] [blame] | 31 | static void hd64461_unmask_irq(struct irq_data *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | { |
Paul Mundt | 19add7e | 2010-10-27 15:18:15 +0900 | [diff] [blame] | 33 | unsigned int irq = data->irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | unsigned short nimr; |
| 35 | unsigned short mask = 1 << (irq - HD64461_IRQBASE); |
| 36 | |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 37 | nimr = __raw_readw(HD64461_NIMR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | nimr &= ~mask; |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 39 | __raw_writew(nimr, HD64461_NIMR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | } |
| 41 | |
Paul Mundt | 19add7e | 2010-10-27 15:18:15 +0900 | [diff] [blame] | 42 | static void hd64461_mask_and_ack_irq(struct irq_data *data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | { |
Paul Mundt | 19add7e | 2010-10-27 15:18:15 +0900 | [diff] [blame] | 44 | hd64461_mask_irq(data); |
| 45 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | #ifdef CONFIG_HD64461_ENABLER |
Paul Mundt | 19add7e | 2010-10-27 15:18:15 +0900 | [diff] [blame] | 47 | if (data->irq == HD64461_IRQBASE + 13) |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 48 | __raw_writeb(0x00, HD64461_PCC1CSCR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | #endif |
| 50 | } |
| 51 | |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 52 | static struct irq_chip hd64461_irq_chip = { |
| 53 | .name = "HD64461-IRQ", |
Paul Mundt | 19add7e | 2010-10-27 15:18:15 +0900 | [diff] [blame] | 54 | .irq_mask = hd64461_mask_irq, |
| 55 | .irq_mask_ack = hd64461_mask_and_ack_irq, |
| 56 | .irq_unmask = hd64461_unmask_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | }; |
| 58 | |
Thomas Gleixner | bd0b9ac | 2015-09-14 10:42:37 +0200 | [diff] [blame] | 59 | static void hd64461_irq_demux(struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | { |
Paul Mundt | 9d56dd3 | 2010-01-26 12:58:40 +0900 | [diff] [blame] | 61 | unsigned short intv = __raw_readw(HD64461_NIRR); |
Rafael Ignacio Zurita | 3bf5092 | 2009-03-20 02:08:22 +0000 | [diff] [blame] | 62 | unsigned int ext_irq = HD64461_IRQBASE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
Rafael Ignacio Zurita | 3bf5092 | 2009-03-20 02:08:22 +0000 | [diff] [blame] | 64 | intv &= (1 << HD64461_IRQ_NUM) - 1; |
| 65 | |
Paul Mundt | b06ede8 | 2010-02-05 17:45:14 +0900 | [diff] [blame] | 66 | for (; intv; intv >>= 1, ext_irq++) { |
| 67 | if (!(intv & 1)) |
| 68 | continue; |
| 69 | |
| 70 | generic_handle_irq(ext_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | } |
| 73 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | int __init setup_hd64461(void) |
| 75 | { |
Paul Mundt | 051f923 | 2012-05-18 23:20:09 +0900 | [diff] [blame] | 76 | int irq_base, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | |
| 78 | printk(KERN_INFO |
| 79 | "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n", |
Paul Mundt | 62669e6 | 2009-05-20 11:27:13 +0900 | [diff] [blame] | 80 | HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | HD64461_IRQBASE + 15); |
| 82 | |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 83 | /* Should be at processor specific part.. */ |
| 84 | #if defined(CONFIG_CPU_SUBTYPE_SH7709) |
| 85 | __raw_writew(0x2240, INTC_ICR1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | #endif |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 87 | __raw_writew(0xffff, HD64461_NIMR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 88 | |
Paul Mundt | 051f923 | 2012-05-18 23:20:09 +0900 | [diff] [blame] | 89 | irq_base = irq_alloc_descs(HD64461_IRQBASE, HD64461_IRQBASE, 16, -1); |
| 90 | if (IS_ERR_VALUE(irq_base)) { |
| 91 | pr_err("%s: failed hooking irqs for HD64461\n", __func__); |
| 92 | return irq_base; |
Paul Mundt | 6eb6f98 | 2010-02-02 17:48:17 +0900 | [diff] [blame] | 93 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | |
Paul Mundt | 051f923 | 2012-05-18 23:20:09 +0900 | [diff] [blame] | 95 | for (i = 0; i < 16; i++) |
| 96 | irq_set_chip_and_handler(irq_base + i, &hd64461_irq_chip, |
| 97 | handle_level_irq); |
| 98 | |
Thomas Gleixner | fcb8918 | 2011-03-24 16:31:17 +0100 | [diff] [blame] | 99 | irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux); |
| 100 | irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW); |
Rafael Ignacio Zurita | 3bf5092 | 2009-03-20 02:08:22 +0000 | [diff] [blame] | 101 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | #ifdef CONFIG_HD64461_ENABLER |
| 103 | printk(KERN_INFO "HD64461: enabling PCMCIA devices\n"); |
Matt Fleming | 135210b | 2008-11-28 08:58:30 +0000 | [diff] [blame] | 104 | __raw_writeb(0x4c, HD64461_PCC1CSCIER); |
| 105 | __raw_writeb(0x00, HD64461_PCC1CSCR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | #endif |
| 107 | |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | module_init(setup_hd64461); |