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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (C) 2000 YAEGASHI Takeshi
3 * Hitachi HD64461 companion chip support
4 */
5
Linus Torvalds1da177e2005-04-16 15:20:36 -07006#include <linux/sched.h>
7#include <linux/module.h>
8#include <linux/kernel.h>
9#include <linux/param.h>
10#include <linux/interrupt.h>
11#include <linux/init.h>
12#include <linux/irq.h>
Matt Fleming135210b2008-11-28 08:58:30 +000013#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <asm/irq.h>
Paul Mundt6d75e652006-09-27 13:42:57 +090015#include <asm/hd64461.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016
Kristoffer Ericsonf1382302007-09-11 12:48:45 +090017/* This belongs in cpu specific */
18#define INTC_ICR1 0xA4140010UL
19
Paul Mundt19add7e2010-10-27 15:18:15 +090020static void hd64461_mask_irq(struct irq_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -070021{
Paul Mundt19add7e2010-10-27 15:18:15 +090022 unsigned int irq = data->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 unsigned short nimr;
24 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
25
Matt Fleming135210b2008-11-28 08:58:30 +000026 nimr = __raw_readw(HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 nimr |= mask;
Matt Fleming135210b2008-11-28 08:58:30 +000028 __raw_writew(nimr, HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070029}
30
Paul Mundt19add7e2010-10-27 15:18:15 +090031static void hd64461_unmask_irq(struct irq_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -070032{
Paul Mundt19add7e2010-10-27 15:18:15 +090033 unsigned int irq = data->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -070034 unsigned short nimr;
35 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
36
Matt Fleming135210b2008-11-28 08:58:30 +000037 nimr = __raw_readw(HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 nimr &= ~mask;
Matt Fleming135210b2008-11-28 08:58:30 +000039 __raw_writew(nimr, HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070040}
41
Paul Mundt19add7e2010-10-27 15:18:15 +090042static void hd64461_mask_and_ack_irq(struct irq_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -070043{
Paul Mundt19add7e2010-10-27 15:18:15 +090044 hd64461_mask_irq(data);
45
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#ifdef CONFIG_HD64461_ENABLER
Paul Mundt19add7e2010-10-27 15:18:15 +090047 if (data->irq == HD64461_IRQBASE + 13)
Matt Fleming135210b2008-11-28 08:58:30 +000048 __raw_writeb(0x00, HD64461_PCC1CSCR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070049#endif
50}
51
Matt Fleming135210b2008-11-28 08:58:30 +000052static struct irq_chip hd64461_irq_chip = {
53 .name = "HD64461-IRQ",
Paul Mundt19add7e2010-10-27 15:18:15 +090054 .irq_mask = hd64461_mask_irq,
55 .irq_mask_ack = hd64461_mask_and_ack_irq,
56 .irq_unmask = hd64461_unmask_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -070057};
58
Thomas Gleixnerbd0b9ac2015-09-14 10:42:37 +020059static void hd64461_irq_demux(struct irq_desc *desc)
Linus Torvalds1da177e2005-04-16 15:20:36 -070060{
Paul Mundt9d56dd32010-01-26 12:58:40 +090061 unsigned short intv = __raw_readw(HD64461_NIRR);
Rafael Ignacio Zurita3bf50922009-03-20 02:08:22 +000062 unsigned int ext_irq = HD64461_IRQBASE;
Linus Torvalds1da177e2005-04-16 15:20:36 -070063
Rafael Ignacio Zurita3bf50922009-03-20 02:08:22 +000064 intv &= (1 << HD64461_IRQ_NUM) - 1;
65
Paul Mundtb06ede82010-02-05 17:45:14 +090066 for (; intv; intv >>= 1, ext_irq++) {
67 if (!(intv & 1))
68 continue;
69
70 generic_handle_irq(ext_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070072}
73
Linus Torvalds1da177e2005-04-16 15:20:36 -070074int __init setup_hd64461(void)
75{
Paul Mundt051f9232012-05-18 23:20:09 +090076 int irq_base, i;
Linus Torvalds1da177e2005-04-16 15:20:36 -070077
78 printk(KERN_INFO
79 "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
Paul Mundt62669e62009-05-20 11:27:13 +090080 HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
Linus Torvalds1da177e2005-04-16 15:20:36 -070081 HD64461_IRQBASE + 15);
82
Matt Fleming135210b2008-11-28 08:58:30 +000083/* Should be at processor specific part.. */
84#if defined(CONFIG_CPU_SUBTYPE_SH7709)
85 __raw_writew(0x2240, INTC_ICR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -070086#endif
Matt Fleming135210b2008-11-28 08:58:30 +000087 __raw_writew(0xffff, HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
Paul Mundt051f9232012-05-18 23:20:09 +090089 irq_base = irq_alloc_descs(HD64461_IRQBASE, HD64461_IRQBASE, 16, -1);
90 if (IS_ERR_VALUE(irq_base)) {
91 pr_err("%s: failed hooking irqs for HD64461\n", __func__);
92 return irq_base;
Paul Mundt6eb6f982010-02-02 17:48:17 +090093 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
Paul Mundt051f9232012-05-18 23:20:09 +090095 for (i = 0; i < 16; i++)
96 irq_set_chip_and_handler(irq_base + i, &hd64461_irq_chip,
97 handle_level_irq);
98
Thomas Gleixnerfcb89182011-03-24 16:31:17 +010099 irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
100 irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
Rafael Ignacio Zurita3bf50922009-03-20 02:08:22 +0000101
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102#ifdef CONFIG_HD64461_ENABLER
103 printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
Matt Fleming135210b2008-11-28 08:58:30 +0000104 __raw_writeb(0x4c, HD64461_PCC1CSCIER);
105 __raw_writeb(0x00, HD64461_PCC1CSCR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106#endif
107
108 return 0;
109}
110
111module_init(setup_hd64461);