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Donggeun Kim9d97e5c2011-09-07 18:49:08 +09001/*
Amit Daniel Kachhap0c1836a2013-06-24 16:20:27 +05302 * exynos_tmu.h - Samsung EXYNOS TMU (Thermal Management Unit)
Donggeun Kim9d97e5c2011-09-07 18:49:08 +09003 *
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
Amit Daniel Kachhap0c1836a2013-06-24 16:20:27 +05306 * Amit Daniel Kachhap <amit.daniel@samsung.com>
Donggeun Kim9d97e5c2011-09-07 18:49:08 +09007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
Amit Daniel Kachhap0c1836a2013-06-24 16:20:27 +053023#ifndef _EXYNOS_TMU_H
24#define _EXYNOS_TMU_H
Amit Daniel Kachhap7e0b55e2012-08-16 17:11:43 +053025#include <linux/cpu_cooling.h>
Lukasz Majewski3b6a1a82015-01-23 13:10:08 +010026#include <dt-bindings/thermal/thermal_exynos.h>
Amit Daniel Kachhap0c1836a2013-06-24 16:20:27 +053027
Amit Daniel Kachhapf22d9c02012-08-16 17:11:42 +053028enum soc_type {
Chanwoo Choi1fe56dc2014-07-01 09:33:19 +090029 SOC_ARCH_EXYNOS3250 = 1,
30 SOC_ARCH_EXYNOS4210,
Lukasz Majewski14ddfae2013-10-09 08:29:51 +020031 SOC_ARCH_EXYNOS4412,
32 SOC_ARCH_EXYNOS5250,
Naveen Krishna Chatradhi923488a2013-12-20 17:49:10 +053033 SOC_ARCH_EXYNOS5260,
Bartlomiej Zolnierkiewicz1e04ee82014-11-13 16:01:10 +010034 SOC_ARCH_EXYNOS5420,
Naveen Krishna Chatradhi14a11dc2013-12-19 11:36:31 +053035 SOC_ARCH_EXYNOS5420_TRIMINFO,
Chanwoo Choi488c7452015-03-10 11:23:44 +090036 SOC_ARCH_EXYNOS5433,
Amit Daniel Kachhapa0395ee2013-06-24 16:20:43 +053037 SOC_ARCH_EXYNOS5440,
Abhilash Kesavan6c247392015-01-27 11:18:22 +053038 SOC_ARCH_EXYNOS7,
Amit Daniel Kachhapf22d9c02012-08-16 17:11:42 +053039};
Amit Daniel Kachhap7e0b55e2012-08-16 17:11:43 +053040
41/**
Amit Daniel Kachhapf22d9c02012-08-16 17:11:42 +053042 * struct exynos_tmu_platform_data
Donggeun Kim9d97e5c2011-09-07 18:49:08 +090043 * @gain: gain of amplifier in the positive-TC generator block
Bartlomiej Zolnierkiewicz9c7a87f2014-07-31 19:11:05 +020044 * 0 < gain <= 15
Donggeun Kim9d97e5c2011-09-07 18:49:08 +090045 * @reference_voltage: reference voltage of amplifier
46 * in the positive-TC generator block
Bartlomiej Zolnierkiewicz9c7a87f2014-07-31 19:11:05 +020047 * 0 < reference_voltage <= 31
Amit Daniel Kachhapf22d9c02012-08-16 17:11:42 +053048 * @noise_cancel_mode: noise cancellation mode
49 * 000, 100, 101, 110 and 111 can be different modes
50 * @type: determines the type of SOC
51 * @efuse_value: platform defined fuse value
Amit Daniel Kachhapbb34b4c2013-06-24 16:20:30 +053052 * @min_efuse_value: minimum valid trimming data
53 * @max_efuse_value: maximum valid trimming data
Amit Daniel Kachhapbb34b4c2013-06-24 16:20:30 +053054 * @default_temp_offset: default temperature offset in case of no trimming
Donggeun Kim9d97e5c2011-09-07 18:49:08 +090055 * @cal_type: calibration type for temperature
56 *
Amit Daniel Kachhapf22d9c02012-08-16 17:11:42 +053057 * This structure is required for configuration of exynos_tmu driver.
Donggeun Kim9d97e5c2011-09-07 18:49:08 +090058 */
Amit Daniel Kachhapf22d9c02012-08-16 17:11:42 +053059struct exynos_tmu_platform_data {
Donggeun Kim9d97e5c2011-09-07 18:49:08 +090060 u8 gain;
61 u8 reference_voltage;
Amit Daniel Kachhapf22d9c02012-08-16 17:11:42 +053062 u8 noise_cancel_mode;
Amit Daniel Kachhapbb34b4c2013-06-24 16:20:30 +053063
Amit Daniel Kachhapf22d9c02012-08-16 17:11:42 +053064 u32 efuse_value;
Amit Daniel Kachhapbb34b4c2013-06-24 16:20:30 +053065 u32 min_efuse_value;
66 u32 max_efuse_value;
67 u8 first_point_trim;
68 u8 second_point_trim;
69 u8 default_temp_offset;
Donggeun Kim9d97e5c2011-09-07 18:49:08 +090070
Amit Daniel Kachhapf22d9c02012-08-16 17:11:42 +053071 enum soc_type type;
Lukasz Majewskif5576e32015-01-23 13:09:55 +010072 u32 cal_type;
73 u32 cal_mode;
Donggeun Kim9d97e5c2011-09-07 18:49:08 +090074};
Amit Daniel Kachhapcebe7372013-06-24 16:20:39 +053075
Amit Daniel Kachhap0c1836a2013-06-24 16:20:27 +053076#endif /* _EXYNOS_TMU_H */