Shawn Guo | a1f1c7e | 2011-09-06 15:08:40 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/io.h> |
| 15 | #include <linux/of.h> |
| 16 | #include <linux/suspend.h> |
| 17 | #include <asm/cacheflush.h> |
| 18 | #include <asm/proc-fns.h> |
| 19 | #include <asm/suspend.h> |
| 20 | #include <asm/hardware/cache-l2x0.h> |
Shawn Guo | a1f1c7e | 2011-09-06 15:08:40 +0800 | [diff] [blame] | 21 | |
Shawn Guo | e337247 | 2012-09-13 21:01:00 +0800 | [diff] [blame] | 22 | #include "common.h" |
Shawn Guo | 50f2de6 | 2012-09-14 14:14:45 +0800 | [diff] [blame] | 23 | #include "hardware.h" |
Shawn Guo | e337247 | 2012-09-13 21:01:00 +0800 | [diff] [blame] | 24 | |
Shawn Guo | a1f1c7e | 2011-09-06 15:08:40 +0800 | [diff] [blame] | 25 | extern unsigned long phys_l2x0_saved_regs; |
| 26 | |
| 27 | static int imx6q_suspend_finish(unsigned long val) |
| 28 | { |
| 29 | cpu_do_idle(); |
| 30 | return 0; |
| 31 | } |
| 32 | |
| 33 | static int imx6q_pm_enter(suspend_state_t state) |
| 34 | { |
| 35 | switch (state) { |
| 36 | case PM_SUSPEND_MEM: |
| 37 | imx6q_set_lpm(STOP_POWER_OFF); |
| 38 | imx_gpc_pre_suspend(); |
| 39 | imx_set_cpu_jump(0, v7_cpu_resume); |
| 40 | /* Zzz ... */ |
| 41 | cpu_suspend(0, imx6q_suspend_finish); |
| 42 | imx_smp_prepare(); |
| 43 | imx_gpc_post_resume(); |
| 44 | break; |
| 45 | default: |
| 46 | return -EINVAL; |
| 47 | } |
| 48 | |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | static const struct platform_suspend_ops imx6q_pm_ops = { |
| 53 | .enter = imx6q_pm_enter, |
| 54 | .valid = suspend_valid_only_mem, |
| 55 | }; |
| 56 | |
| 57 | void __init imx6q_pm_init(void) |
| 58 | { |
| 59 | /* |
| 60 | * The l2x0 core code provides an infrastucture to save and restore |
| 61 | * l2x0 registers across suspend/resume cycle. But because imx6q |
| 62 | * retains L2 content during suspend and needs to resume L2 before |
| 63 | * MMU is enabled, it can only utilize register saving support and |
| 64 | * have to take care of restoring on its own. So we save physical |
| 65 | * address of the data structure used by l2x0 core to save registers, |
| 66 | * and later restore the necessary ones in imx6q resume entry. |
| 67 | */ |
Eric Miao | 733d172 | 2011-12-22 11:55:01 +0800 | [diff] [blame] | 68 | #ifdef CONFIG_CACHE_L2X0 |
Shawn Guo | a1f1c7e | 2011-09-06 15:08:40 +0800 | [diff] [blame] | 69 | phys_l2x0_saved_regs = __pa(&l2x0_saved_regs); |
Eric Miao | 733d172 | 2011-12-22 11:55:01 +0800 | [diff] [blame] | 70 | #endif |
Shawn Guo | a1f1c7e | 2011-09-06 15:08:40 +0800 | [diff] [blame] | 71 | |
| 72 | suspend_set_ops(&imx6q_pm_ops); |
| 73 | } |