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Maxime Ripard8f1ae772013-09-24 11:07:43 +03001/*
2 * Allwinner SoCs Reset Controller driver
3 *
4 * Copyright 2013 Maxime Ripard
5 *
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/err.h>
15#include <linux/io.h>
16#include <linux/module.h>
17#include <linux/of.h>
18#include <linux/of_address.h>
19#include <linux/platform_device.h>
20#include <linux/reset-controller.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
23#include <linux/types.h>
24
25struct sunxi_reset_data {
26 spinlock_t lock;
27 void __iomem *membase;
28 struct reset_controller_dev rcdev;
29};
30
31static int sunxi_reset_assert(struct reset_controller_dev *rcdev,
32 unsigned long id)
33{
34 struct sunxi_reset_data *data = container_of(rcdev,
35 struct sunxi_reset_data,
36 rcdev);
37 int bank = id / BITS_PER_LONG;
38 int offset = id % BITS_PER_LONG;
39 unsigned long flags;
40 u32 reg;
41
42 spin_lock_irqsave(&data->lock, flags);
43
44 reg = readl(data->membase + (bank * 4));
45 writel(reg & ~BIT(offset), data->membase + (bank * 4));
46
47 spin_unlock_irqrestore(&data->lock, flags);
48
49 return 0;
50}
51
52static int sunxi_reset_deassert(struct reset_controller_dev *rcdev,
53 unsigned long id)
54{
55 struct sunxi_reset_data *data = container_of(rcdev,
56 struct sunxi_reset_data,
57 rcdev);
58 int bank = id / BITS_PER_LONG;
59 int offset = id % BITS_PER_LONG;
60 unsigned long flags;
61 u32 reg;
62
63 spin_lock_irqsave(&data->lock, flags);
64
65 reg = readl(data->membase + (bank * 4));
66 writel(reg | BIT(offset), data->membase + (bank * 4));
67
68 spin_unlock_irqrestore(&data->lock, flags);
69
70 return 0;
71}
72
Philipp Zabel01501d52016-01-17 15:14:32 +010073static const struct reset_control_ops sunxi_reset_ops = {
Maxime Ripard8f1ae772013-09-24 11:07:43 +030074 .assert = sunxi_reset_assert,
75 .deassert = sunxi_reset_deassert,
76};
77
78static int sunxi_reset_init(struct device_node *np)
79{
80 struct sunxi_reset_data *data;
81 struct resource res;
82 resource_size_t size;
83 int ret;
84
85 data = kzalloc(sizeof(*data), GFP_KERNEL);
86 if (!data)
87 return -ENOMEM;
88
89 ret = of_address_to_resource(np, 0, &res);
90 if (ret)
91 goto err_alloc;
92
93 size = resource_size(&res);
94 if (!request_mem_region(res.start, size, np->name)) {
95 ret = -EBUSY;
96 goto err_alloc;
97 }
98
99 data->membase = ioremap(res.start, size);
100 if (!data->membase) {
101 ret = -ENOMEM;
102 goto err_alloc;
103 }
104
Tyler Baker41544f92015-01-12 07:54:46 -0800105 spin_lock_init(&data->lock);
106
Maxime Ripard8f1ae772013-09-24 11:07:43 +0300107 data->rcdev.owner = THIS_MODULE;
108 data->rcdev.nr_resets = size * 32;
109 data->rcdev.ops = &sunxi_reset_ops;
110 data->rcdev.of_node = np;
Maxime Ripard8f1ae772013-09-24 11:07:43 +0300111
Masahiro Yamadad1f15aa2015-11-05 14:54:56 +0900112 return reset_controller_register(&data->rcdev);
Maxime Ripard8f1ae772013-09-24 11:07:43 +0300113
114err_alloc:
115 kfree(data);
116 return ret;
117};
118
119/*
120 * These are the reset controller we need to initialize early on in
121 * our system, before we can even think of using a regular device
122 * driver for it.
123 */
Philipp Zabelfddad172015-10-29 09:59:34 +0100124static const struct of_device_id sunxi_early_reset_dt_ids[] __initconst = {
Maxime Ripard8f1ae772013-09-24 11:07:43 +0300125 { .compatible = "allwinner,sun6i-a31-ahb1-reset", },
126 { /* sentinel */ },
127};
128
129void __init sun6i_reset_init(void)
130{
131 struct device_node *np;
132
133 for_each_matching_node(np, sunxi_early_reset_dt_ids)
134 sunxi_reset_init(np);
135}
136
137/*
138 * And these are the controllers we can register through the regular
139 * device model.
140 */
141static const struct of_device_id sunxi_reset_dt_ids[] = {
142 { .compatible = "allwinner,sun6i-a31-clock-reset", },
143 { /* sentinel */ },
144};
145MODULE_DEVICE_TABLE(of, sunxi_reset_dt_ids);
146
147static int sunxi_reset_probe(struct platform_device *pdev)
148{
Boris BREZILLONcd90f0c2014-05-14 14:38:16 +0200149 struct sunxi_reset_data *data;
150 struct resource *res;
151
152 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
153 if (!data)
154 return -ENOMEM;
155
156 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
157 data->membase = devm_ioremap_resource(&pdev->dev, res);
158 if (IS_ERR(data->membase))
159 return PTR_ERR(data->membase);
160
Tyler Baker41544f92015-01-12 07:54:46 -0800161 spin_lock_init(&data->lock);
162
Boris BREZILLONcd90f0c2014-05-14 14:38:16 +0200163 data->rcdev.owner = THIS_MODULE;
164 data->rcdev.nr_resets = resource_size(res) * 32;
165 data->rcdev.ops = &sunxi_reset_ops;
166 data->rcdev.of_node = pdev->dev.of_node;
167
168 return reset_controller_register(&data->rcdev);
Maxime Ripard8f1ae772013-09-24 11:07:43 +0300169}
170
171static int sunxi_reset_remove(struct platform_device *pdev)
172{
173 struct sunxi_reset_data *data = platform_get_drvdata(pdev);
174
175 reset_controller_unregister(&data->rcdev);
Maxime Ripard8f1ae772013-09-24 11:07:43 +0300176
177 return 0;
178}
179
180static struct platform_driver sunxi_reset_driver = {
181 .probe = sunxi_reset_probe,
182 .remove = sunxi_reset_remove,
183 .driver = {
184 .name = "sunxi-reset",
Maxime Ripard8f1ae772013-09-24 11:07:43 +0300185 .of_match_table = sunxi_reset_dt_ids,
186 },
187};
188module_platform_driver(sunxi_reset_driver);
189
190MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
191MODULE_DESCRIPTION("Allwinner SoCs Reset Controller Driver");
192MODULE_LICENSE("GPL");