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SAN People73a59c12006-01-09 17:05:41 +00001/*
Andrew Victor9d041262007-02-05 11:42:07 +01002 * linux/arch/arm/mach-at91/generic.h
SAN People73a59c12006-01-09 17:05:41 +00003 *
4 * Copyright (C) 2005 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
Jean-Christophe PLAGNIOL-VILLARDbd602992011-02-02 07:27:07 +010011#include <linux/clkdev.h>
Nicolas Ferre8014d6f2012-02-14 18:08:14 +010012#include <linux/of.h>
Jean-Christophe PLAGNIOL-VILLARDbd602992011-02-02 07:27:07 +010013
Jean-Christophe PLAGNIOL-VILLARD1b021a32011-04-28 20:19:32 +080014 /* Map io */
Jean-Christophe PLAGNIOL-VILLARD21d08b92011-04-23 15:28:34 +080015extern void __init at91_map_io(void);
Jean-Christophe PLAGNIOL-VILLARDf0051d82011-05-10 03:20:09 +080016extern void __init at91_init_sram(int bank, unsigned long base,
17 unsigned int length);
Jean-Christophe PLAGNIOL-VILLARD1b021a32011-04-28 20:19:32 +080018
Andrew Victor2eeaaa22006-09-27 10:50:59 +010019 /* Processors */
Jean-Christophe PLAGNIOL-VILLARDe57556e32011-04-24 11:40:22 +080020extern void __init at91rm9200_set_type(int type);
Jean-Christophe PLAGNIOL-VILLARD21d08b92011-04-23 15:28:34 +080021extern void __init at91_initialize(unsigned long main_clock);
Greg Ungerer9a7e2462007-07-30 02:39:02 +010022extern void __init at91x40_initialize(unsigned long main_clock);
Jean-Christophe PLAGNIOL-VILLARD2b11ea52012-02-28 13:57:51 +080023extern void __init at91_dt_initialize(void);
Andrew Victor2eeaaa22006-09-27 10:50:59 +010024
Andrew Victorba854e12006-07-05 17:22:52 +010025 /* Interrupts */
Jean-Christophe PLAGNIOL-VILLARD92100c12011-04-23 15:28:34 +080026extern void __init at91_init_irq_default(void);
27extern void __init at91_init_interrupts(unsigned int priority[]);
Greg Ungerer9a7e2462007-07-30 02:39:02 +010028extern void __init at91x40_init_interrupts(unsigned int priority[]);
Andrew Victorba854e12006-07-05 17:22:52 +010029extern void __init at91_aic_init(unsigned int priority[]);
Nicolas Ferre8014d6f2012-02-14 18:08:14 +010030extern int __init at91_aic_of_init(struct device_node *node,
31 struct device_node *parent);
32
SAN People73a59c12006-01-09 17:05:41 +000033
Andrew Victorba854e12006-07-05 17:22:52 +010034 /* Timer */
SAN People73a59c12006-01-09 17:05:41 +000035struct sys_timer;
Jean-Christophe PLAGNIOL-VILLARD5e9cf5e2012-02-20 11:07:39 +010036extern void at91rm9200_ioremap_st(u32 addr);
SAN People73a59c12006-01-09 17:05:41 +000037extern struct sys_timer at91rm9200_timer;
Jean-Christophe PLAGNIOL-VILLARD4ab0c5992011-09-18 22:29:50 +080038extern void at91sam926x_ioremap_pit(u32 addr);
Andrew Victor62c16602006-11-30 12:27:38 +010039extern struct sys_timer at91sam926x_timer;
Greg Ungerer9a7e2462007-07-30 02:39:02 +010040extern struct sys_timer at91x40_timer;
SAN People73a59c12006-01-09 17:05:41 +000041
Andrew Victorba854e12006-07-05 17:22:52 +010042 /* Clocks */
Jean-Christophe PLAGNIOL-VILLARDbd602992011-02-02 07:27:07 +010043/*
44 * function to specify the clock of the default console. As we do not
45 * use the device/driver bus, the dev_name is not intialize. So we need
46 * to link the clock to a specific con_id only "usart"
47 */
48extern void __init at91rm9200_set_console_clock(int id);
49extern void __init at91sam9260_set_console_clock(int id);
50extern void __init at91sam9261_set_console_clock(int id);
51extern void __init at91sam9263_set_console_clock(int id);
52extern void __init at91sam9rl_set_console_clock(int id);
53extern void __init at91sam9g45_set_console_clock(int id);
Jean-Christophe PLAGNIOL-VILLARD46539372011-04-24 18:20:28 +080054#ifdef CONFIG_AT91_PMC_UNIT
55extern int __init at91_clock_init(unsigned long main_clock);
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +080056extern int __init at91_dt_clock_init(void);
Jean-Christophe PLAGNIOL-VILLARD46539372011-04-24 18:20:28 +080057#else
58static int inline at91_clock_init(unsigned long main_clock) { return 0; }
59#endif
Andrew Victor907d6de2006-06-20 19:30:19 +010060struct device;
Andrew Victor907d6de2006-06-20 19:30:19 +010061
62 /* Power Management */
63extern void at91_irq_suspend(void);
64extern void at91_irq_resume(void);
65
Jean-Christophe PLAGNIOL-VILLARD0d781712012-02-05 20:25:32 +080066/* idle */
67extern void at91sam9_idle(void);
68
Nicolas Ferrebb413db2010-10-14 19:14:00 +020069/* reset */
Jean-Christophe PLAGNIOL-VILLARDe9f68b52011-11-18 01:25:52 +080070extern void at91_ioremap_rstc(u32 base_addr);
Russell King1b2073e2011-11-03 09:53:29 +000071extern void at91sam9_alt_restart(char, const char *);
Jean-Christophe PLAGNIOL-VILLARD14f991a2011-11-18 01:41:28 +080072extern void at91sam9g45_restart(char, const char *);
Nicolas Ferrebb413db2010-10-14 19:14:00 +020073
Jean-Christophe PLAGNIOL-VILLARDf22deee2011-11-01 01:23:20 +080074/* shutdown */
75extern void at91_ioremap_shdwc(u32 base_addr);
76
Jean-Christophe PLAGNIOL-VILLARD4342d642011-11-27 23:15:50 +080077/* Matrix */
78extern void at91_ioremap_matrix(u32 base_addr);
79
Jean-Christophe PLAGNIOL-VILLARDf363c402012-02-13 12:58:53 +080080/* Ram Controler */
81extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
82
Andrew Victorf2173832006-09-27 13:23:00 +010083 /* GPIO */
84#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
85#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
86
87struct at91_gpio_bank {
88 unsigned short id; /* peripheral ID */
Jean-Christophe PLAGNIOL-VILLARD80e91cb2011-09-16 23:37:50 +080089 unsigned long regbase; /* offset from system peripheral base */
Andrew Victorf2173832006-09-27 13:23:00 +010090};
91extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
92extern void __init at91_gpio_irq_setup(void);
Nicolas Ferre8014d6f2012-02-14 18:08:14 +010093extern int __init at91_gpio_of_irq_setup(struct device_node *node,
94 struct device_node *parent);
Andrew Victor1f4fd0a2006-11-30 10:01:47 +010095
Andrew Victor1f4fd0a2006-11-30 10:01:47 +010096extern int at91_extern_irq;