Sascha Sommer | 6a36913 | 2008-07-15 14:21:29 +0200 | [diff] [blame] | 1 | /* |
| 2 | * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be |
| 3 | * found on some Ricoh RL5c476 II cardbus bridge |
| 4 | * |
| 5 | * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | * |
| 21 | */ |
| 22 | |
| 23 | /* |
| 24 | #define DEBUG |
| 25 | #define VERBOSE_DEBUG |
| 26 | */ |
| 27 | #include <linux/delay.h> |
| 28 | #include <linux/highmem.h> |
| 29 | #include <linux/pci.h> |
| 30 | #include <linux/ioport.h> |
| 31 | #include <linux/scatterlist.h> |
Sascha Sommer | 6a36913 | 2008-07-15 14:21:29 +0200 | [diff] [blame] | 32 | |
| 33 | #include <pcmcia/cs_types.h> |
| 34 | #include <pcmcia/cs.h> |
| 35 | #include <pcmcia/cistpl.h> |
| 36 | #include <pcmcia/ds.h> |
| 37 | #include <linux/io.h> |
| 38 | |
| 39 | #include <linux/mmc/host.h> |
| 40 | |
| 41 | #define DRIVER_NAME "sdricoh_cs" |
| 42 | |
| 43 | static unsigned int switchlocked; |
| 44 | |
| 45 | /* i/o region */ |
| 46 | #define SDRICOH_PCI_REGION 0 |
| 47 | #define SDRICOH_PCI_REGION_SIZE 0x1000 |
| 48 | |
| 49 | /* registers */ |
| 50 | #define R104_VERSION 0x104 |
| 51 | #define R200_CMD 0x200 |
| 52 | #define R204_CMD_ARG 0x204 |
| 53 | #define R208_DATAIO 0x208 |
| 54 | #define R20C_RESP 0x20c |
| 55 | #define R21C_STATUS 0x21c |
| 56 | #define R2E0_INIT 0x2e0 |
| 57 | #define R2E4_STATUS_RESP 0x2e4 |
| 58 | #define R2F0_RESET 0x2f0 |
| 59 | #define R224_MODE 0x224 |
| 60 | #define R226_BLOCKSIZE 0x226 |
| 61 | #define R228_POWER 0x228 |
| 62 | #define R230_DATA 0x230 |
| 63 | |
| 64 | /* flags for the R21C_STATUS register */ |
| 65 | #define STATUS_CMD_FINISHED 0x00000001 |
| 66 | #define STATUS_TRANSFER_FINISHED 0x00000004 |
| 67 | #define STATUS_CARD_INSERTED 0x00000020 |
| 68 | #define STATUS_CARD_LOCKED 0x00000080 |
| 69 | #define STATUS_CMD_TIMEOUT 0x00400000 |
| 70 | #define STATUS_READY_TO_READ 0x01000000 |
| 71 | #define STATUS_READY_TO_WRITE 0x02000000 |
| 72 | #define STATUS_BUSY 0x40000000 |
| 73 | |
| 74 | /* timeouts */ |
| 75 | #define INIT_TIMEOUT 100 |
| 76 | #define CMD_TIMEOUT 100000 |
| 77 | #define TRANSFER_TIMEOUT 100000 |
| 78 | #define BUSY_TIMEOUT 32767 |
| 79 | |
| 80 | /* list of supported pcmcia devices */ |
| 81 | static struct pcmcia_device_id pcmcia_ids[] = { |
| 82 | /* vendor and device strings followed by their crc32 hashes */ |
| 83 | PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed, |
| 84 | 0xc3901202), |
Sascha Sommer | 98444d3 | 2008-11-29 07:51:19 +0100 | [diff] [blame] | 85 | PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed, |
| 86 | 0xace80909), |
Sascha Sommer | 6a36913 | 2008-07-15 14:21:29 +0200 | [diff] [blame] | 87 | PCMCIA_DEVICE_NULL, |
| 88 | }; |
| 89 | |
| 90 | MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids); |
| 91 | |
| 92 | /* mmc privdata */ |
| 93 | struct sdricoh_host { |
| 94 | struct device *dev; |
| 95 | struct mmc_host *mmc; /* MMC structure */ |
| 96 | unsigned char __iomem *iobase; |
| 97 | struct pci_dev *pci_dev; |
| 98 | int app_cmd; |
| 99 | }; |
| 100 | |
| 101 | /***************** register i/o helper functions *****************************/ |
| 102 | |
| 103 | static inline unsigned int sdricoh_readl(struct sdricoh_host *host, |
| 104 | unsigned int reg) |
| 105 | { |
| 106 | unsigned int value = readl(host->iobase + reg); |
| 107 | dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value); |
| 108 | return value; |
| 109 | } |
| 110 | |
| 111 | static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg, |
| 112 | unsigned int value) |
| 113 | { |
| 114 | writel(value, host->iobase + reg); |
| 115 | dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value); |
| 116 | |
| 117 | } |
| 118 | |
| 119 | static inline unsigned int sdricoh_readw(struct sdricoh_host *host, |
| 120 | unsigned int reg) |
| 121 | { |
| 122 | unsigned int value = readw(host->iobase + reg); |
| 123 | dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value); |
| 124 | return value; |
| 125 | } |
| 126 | |
| 127 | static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg, |
| 128 | unsigned short value) |
| 129 | { |
| 130 | writew(value, host->iobase + reg); |
| 131 | dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value); |
| 132 | } |
| 133 | |
| 134 | static inline unsigned int sdricoh_readb(struct sdricoh_host *host, |
| 135 | unsigned int reg) |
| 136 | { |
| 137 | unsigned int value = readb(host->iobase + reg); |
| 138 | dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value); |
| 139 | return value; |
| 140 | } |
| 141 | |
| 142 | static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted, |
| 143 | unsigned int timeout){ |
| 144 | unsigned int loop; |
| 145 | unsigned int status = 0; |
| 146 | struct device *dev = host->dev; |
| 147 | for (loop = 0; loop < timeout; loop++) { |
| 148 | status = sdricoh_readl(host, R21C_STATUS); |
| 149 | sdricoh_writel(host, R2E4_STATUS_RESP, status); |
| 150 | if (status & wanted) |
| 151 | break; |
| 152 | } |
| 153 | |
| 154 | if (loop == timeout) { |
| 155 | dev_err(dev, "query_status: timeout waiting for %x\n", wanted); |
| 156 | return -ETIMEDOUT; |
| 157 | } |
| 158 | |
| 159 | /* do not do this check in the loop as some commands fail otherwise */ |
| 160 | if (status & 0x7F0000) { |
| 161 | dev_err(dev, "waiting for status bit %x failed\n", wanted); |
| 162 | return -EINVAL; |
| 163 | } |
| 164 | return 0; |
| 165 | |
| 166 | } |
| 167 | |
| 168 | static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode, |
| 169 | unsigned int arg) |
| 170 | { |
| 171 | unsigned int status; |
| 172 | int result = 0; |
| 173 | unsigned int loop = 0; |
| 174 | /* reset status reg? */ |
| 175 | sdricoh_writel(host, R21C_STATUS, 0x18); |
| 176 | /* fill parameters */ |
| 177 | sdricoh_writel(host, R204_CMD_ARG, arg); |
| 178 | sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode); |
| 179 | /* wait for command completion */ |
| 180 | if (opcode) { |
| 181 | for (loop = 0; loop < CMD_TIMEOUT; loop++) { |
| 182 | status = sdricoh_readl(host, R21C_STATUS); |
| 183 | sdricoh_writel(host, R2E4_STATUS_RESP, status); |
| 184 | if (status & STATUS_CMD_FINISHED) |
| 185 | break; |
| 186 | } |
| 187 | /* don't check for timeout in the loop it is not always |
| 188 | reset correctly |
| 189 | */ |
| 190 | if (loop == CMD_TIMEOUT || status & STATUS_CMD_TIMEOUT) |
| 191 | result = -ETIMEDOUT; |
| 192 | |
| 193 | } |
| 194 | |
| 195 | return result; |
| 196 | |
| 197 | } |
| 198 | |
| 199 | static int sdricoh_reset(struct sdricoh_host *host) |
| 200 | { |
| 201 | dev_dbg(host->dev, "reset\n"); |
| 202 | sdricoh_writel(host, R2F0_RESET, 0x10001); |
| 203 | sdricoh_writel(host, R2E0_INIT, 0x10000); |
| 204 | if (sdricoh_readl(host, R2E0_INIT) != 0x10000) |
| 205 | return -EIO; |
| 206 | sdricoh_writel(host, R2E0_INIT, 0x10007); |
| 207 | |
| 208 | sdricoh_writel(host, R224_MODE, 0x2000000); |
| 209 | sdricoh_writel(host, R228_POWER, 0xe0); |
| 210 | |
| 211 | |
| 212 | /* status register ? */ |
| 213 | sdricoh_writel(host, R21C_STATUS, 0x18); |
| 214 | |
| 215 | return 0; |
| 216 | } |
| 217 | |
| 218 | static int sdricoh_blockio(struct sdricoh_host *host, int read, |
| 219 | u8 *buf, int len) |
| 220 | { |
| 221 | int size; |
| 222 | u32 data = 0; |
| 223 | /* wait until the data is available */ |
| 224 | if (read) { |
| 225 | if (sdricoh_query_status(host, STATUS_READY_TO_READ, |
| 226 | TRANSFER_TIMEOUT)) |
| 227 | return -ETIMEDOUT; |
| 228 | sdricoh_writel(host, R21C_STATUS, 0x18); |
| 229 | /* read data */ |
| 230 | while (len) { |
| 231 | data = sdricoh_readl(host, R230_DATA); |
| 232 | size = min(len, 4); |
| 233 | len -= size; |
| 234 | while (size) { |
| 235 | *buf = data & 0xFF; |
| 236 | buf++; |
| 237 | data >>= 8; |
| 238 | size--; |
| 239 | } |
| 240 | } |
| 241 | } else { |
| 242 | if (sdricoh_query_status(host, STATUS_READY_TO_WRITE, |
| 243 | TRANSFER_TIMEOUT)) |
| 244 | return -ETIMEDOUT; |
| 245 | sdricoh_writel(host, R21C_STATUS, 0x18); |
| 246 | /* write data */ |
| 247 | while (len) { |
| 248 | size = min(len, 4); |
| 249 | len -= size; |
| 250 | while (size) { |
| 251 | data >>= 8; |
| 252 | data |= (u32)*buf << 24; |
| 253 | buf++; |
| 254 | size--; |
| 255 | } |
| 256 | sdricoh_writel(host, R230_DATA, data); |
| 257 | } |
| 258 | } |
| 259 | |
| 260 | if (len) |
| 261 | return -EIO; |
| 262 | |
| 263 | return 0; |
| 264 | } |
| 265 | |
| 266 | static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq) |
| 267 | { |
| 268 | struct sdricoh_host *host = mmc_priv(mmc); |
| 269 | struct mmc_command *cmd = mrq->cmd; |
| 270 | struct mmc_data *data = cmd->data; |
| 271 | struct device *dev = host->dev; |
| 272 | unsigned char opcode = cmd->opcode; |
| 273 | int i; |
| 274 | |
| 275 | dev_dbg(dev, "=============================\n"); |
| 276 | dev_dbg(dev, "sdricoh_request opcode=%i\n", opcode); |
| 277 | |
| 278 | sdricoh_writel(host, R21C_STATUS, 0x18); |
| 279 | |
| 280 | /* MMC_APP_CMDs need some special handling */ |
| 281 | if (host->app_cmd) { |
| 282 | opcode |= 64; |
| 283 | host->app_cmd = 0; |
| 284 | } else if (opcode == 55) |
| 285 | host->app_cmd = 1; |
| 286 | |
| 287 | /* read/write commands seem to require this */ |
| 288 | if (data) { |
| 289 | sdricoh_writew(host, R226_BLOCKSIZE, data->blksz); |
| 290 | sdricoh_writel(host, R208_DATAIO, 0); |
| 291 | } |
| 292 | |
| 293 | cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg); |
| 294 | |
| 295 | /* read response buffer */ |
| 296 | if (cmd->flags & MMC_RSP_PRESENT) { |
| 297 | if (cmd->flags & MMC_RSP_136) { |
| 298 | /* CRC is stripped so we need to do some shifting. */ |
| 299 | for (i = 0; i < 4; i++) { |
| 300 | cmd->resp[i] = |
| 301 | sdricoh_readl(host, |
| 302 | R20C_RESP + (3 - i) * 4) << 8; |
| 303 | if (i != 3) |
| 304 | cmd->resp[i] |= |
| 305 | sdricoh_readb(host, R20C_RESP + |
| 306 | (3 - i) * 4 - 1); |
| 307 | } |
| 308 | } else |
| 309 | cmd->resp[0] = sdricoh_readl(host, R20C_RESP); |
| 310 | } |
| 311 | |
| 312 | /* transfer data */ |
| 313 | if (data && cmd->error == 0) { |
| 314 | dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i " |
| 315 | "sg length %i\n", data->blksz, data->blocks, |
| 316 | data->sg_len, data->sg->length); |
| 317 | |
| 318 | /* enter data reading mode */ |
| 319 | sdricoh_writel(host, R21C_STATUS, 0x837f031e); |
| 320 | for (i = 0; i < data->blocks; i++) { |
| 321 | size_t len = data->blksz; |
| 322 | u8 *buf; |
| 323 | struct page *page; |
| 324 | int result; |
| 325 | page = sg_page(data->sg); |
| 326 | |
| 327 | buf = kmap(page) + data->sg->offset + (len * i); |
| 328 | result = |
| 329 | sdricoh_blockio(host, |
| 330 | data->flags & MMC_DATA_READ, buf, len); |
| 331 | kunmap(page); |
| 332 | flush_dcache_page(page); |
| 333 | if (result) { |
| 334 | dev_err(dev, "sdricoh_request: cmd %i " |
| 335 | "block transfer failed\n", cmd->opcode); |
| 336 | cmd->error = result; |
| 337 | break; |
| 338 | } else |
| 339 | data->bytes_xfered += len; |
| 340 | } |
| 341 | |
| 342 | sdricoh_writel(host, R208_DATAIO, 1); |
| 343 | |
| 344 | if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED, |
| 345 | TRANSFER_TIMEOUT)) { |
| 346 | dev_err(dev, "sdricoh_request: transfer end error\n"); |
| 347 | cmd->error = -EINVAL; |
| 348 | } |
| 349 | } |
| 350 | /* FIXME check busy flag */ |
| 351 | |
| 352 | mmc_request_done(mmc, mrq); |
| 353 | dev_dbg(dev, "=============================\n"); |
| 354 | } |
| 355 | |
| 356 | static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 357 | { |
| 358 | struct sdricoh_host *host = mmc_priv(mmc); |
| 359 | dev_dbg(host->dev, "set_ios\n"); |
| 360 | |
| 361 | if (ios->power_mode == MMC_POWER_ON) { |
| 362 | sdricoh_writel(host, R228_POWER, 0xc0e0); |
| 363 | |
| 364 | if (ios->bus_width == MMC_BUS_WIDTH_4) { |
| 365 | sdricoh_writel(host, R224_MODE, 0x2000300); |
| 366 | sdricoh_writel(host, R228_POWER, 0x40e0); |
| 367 | } else { |
| 368 | sdricoh_writel(host, R224_MODE, 0x2000340); |
| 369 | } |
| 370 | |
| 371 | } else if (ios->power_mode == MMC_POWER_UP) { |
| 372 | sdricoh_writel(host, R224_MODE, 0x2000320); |
| 373 | sdricoh_writel(host, R228_POWER, 0xe0); |
| 374 | } |
| 375 | } |
| 376 | |
| 377 | static int sdricoh_get_ro(struct mmc_host *mmc) |
| 378 | { |
| 379 | struct sdricoh_host *host = mmc_priv(mmc); |
| 380 | unsigned int status; |
| 381 | |
| 382 | status = sdricoh_readl(host, R21C_STATUS); |
| 383 | sdricoh_writel(host, R2E4_STATUS_RESP, status); |
| 384 | |
| 385 | /* some notebooks seem to have the locked flag switched */ |
| 386 | if (switchlocked) |
| 387 | return !(status & STATUS_CARD_LOCKED); |
| 388 | |
| 389 | return (status & STATUS_CARD_LOCKED); |
| 390 | } |
| 391 | |
| 392 | static struct mmc_host_ops sdricoh_ops = { |
| 393 | .request = sdricoh_request, |
| 394 | .set_ios = sdricoh_set_ios, |
| 395 | .get_ro = sdricoh_get_ro, |
| 396 | }; |
| 397 | |
| 398 | /* initialize the control and register it to the mmc framework */ |
| 399 | static int sdricoh_init_mmc(struct pci_dev *pci_dev, |
| 400 | struct pcmcia_device *pcmcia_dev) |
| 401 | { |
| 402 | int result = 0; |
| 403 | void __iomem *iobase = NULL; |
| 404 | struct mmc_host *mmc = NULL; |
| 405 | struct sdricoh_host *host = NULL; |
| 406 | struct device *dev = &pcmcia_dev->dev; |
| 407 | /* map iomem */ |
| 408 | if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) != |
| 409 | SDRICOH_PCI_REGION_SIZE) { |
| 410 | dev_dbg(dev, "unexpected pci resource len\n"); |
| 411 | return -ENODEV; |
| 412 | } |
| 413 | iobase = |
| 414 | pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE); |
| 415 | if (!iobase) { |
| 416 | dev_err(dev, "unable to map iobase\n"); |
| 417 | return -ENODEV; |
| 418 | } |
| 419 | /* check version? */ |
| 420 | if (readl(iobase + R104_VERSION) != 0x4000) { |
| 421 | dev_dbg(dev, "no supported mmc controller found\n"); |
| 422 | result = -ENODEV; |
| 423 | goto err; |
| 424 | } |
| 425 | /* allocate privdata */ |
| 426 | mmc = pcmcia_dev->priv = |
| 427 | mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev); |
| 428 | if (!mmc) { |
| 429 | dev_err(dev, "mmc_alloc_host failed\n"); |
| 430 | result = -ENOMEM; |
| 431 | goto err; |
| 432 | } |
| 433 | host = mmc_priv(mmc); |
| 434 | |
| 435 | host->iobase = iobase; |
| 436 | host->dev = dev; |
| 437 | host->pci_dev = pci_dev; |
| 438 | |
| 439 | mmc->ops = &sdricoh_ops; |
| 440 | |
| 441 | /* FIXME: frequency and voltage handling is done by the controller |
| 442 | */ |
| 443 | mmc->f_min = 450000; |
| 444 | mmc->f_max = 24000000; |
| 445 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
| 446 | mmc->caps |= MMC_CAP_4_BIT_DATA; |
| 447 | |
| 448 | mmc->max_seg_size = 1024 * 512; |
| 449 | mmc->max_blk_size = 512; |
| 450 | |
| 451 | /* reset the controler */ |
| 452 | if (sdricoh_reset(host)) { |
| 453 | dev_dbg(dev, "could not reset\n"); |
| 454 | result = -EIO; |
| 455 | goto err; |
| 456 | |
| 457 | } |
| 458 | |
| 459 | result = mmc_add_host(mmc); |
| 460 | |
| 461 | if (!result) { |
| 462 | dev_dbg(dev, "mmc host registered\n"); |
| 463 | return 0; |
| 464 | } |
| 465 | |
| 466 | err: |
| 467 | if (iobase) |
Roel Kluin | ca4f105 | 2008-12-13 21:21:33 +0100 | [diff] [blame] | 468 | pci_iounmap(pci_dev, iobase); |
Sascha Sommer | 6a36913 | 2008-07-15 14:21:29 +0200 | [diff] [blame] | 469 | if (mmc) |
| 470 | mmc_free_host(mmc); |
| 471 | |
| 472 | return result; |
| 473 | } |
| 474 | |
| 475 | /* search for supported mmc controllers */ |
| 476 | static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev) |
| 477 | { |
| 478 | struct pci_dev *pci_dev = NULL; |
| 479 | |
| 480 | dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device" |
| 481 | " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]); |
| 482 | |
| 483 | /* search pci cardbus bridge that contains the mmc controler */ |
| 484 | /* the io region is already claimed by yenta_socket... */ |
| 485 | while ((pci_dev = |
| 486 | pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, |
| 487 | pci_dev))) { |
| 488 | /* try to init the device */ |
| 489 | if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) { |
| 490 | dev_info(&pcmcia_dev->dev, "MMC controller found\n"); |
| 491 | return 0; |
| 492 | } |
| 493 | |
| 494 | } |
| 495 | dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n"); |
| 496 | return -ENODEV; |
| 497 | } |
| 498 | |
| 499 | static void sdricoh_pcmcia_detach(struct pcmcia_device *link) |
| 500 | { |
| 501 | struct mmc_host *mmc = link->priv; |
| 502 | |
| 503 | dev_dbg(&link->dev, "detach\n"); |
| 504 | |
| 505 | /* remove mmc host */ |
| 506 | if (mmc) { |
| 507 | struct sdricoh_host *host = mmc_priv(mmc); |
| 508 | mmc_remove_host(mmc); |
| 509 | pci_iounmap(host->pci_dev, host->iobase); |
| 510 | pci_dev_put(host->pci_dev); |
| 511 | mmc_free_host(mmc); |
| 512 | } |
| 513 | pcmcia_disable_device(link); |
| 514 | |
| 515 | } |
| 516 | |
| 517 | #ifdef CONFIG_PM |
| 518 | static int sdricoh_pcmcia_suspend(struct pcmcia_device *link) |
| 519 | { |
| 520 | struct mmc_host *mmc = link->priv; |
| 521 | dev_dbg(&link->dev, "suspend\n"); |
Matt Fleming | 1a13f8f | 2010-05-26 14:42:08 -0700 | [diff] [blame] | 522 | mmc_suspend_host(mmc); |
Sascha Sommer | 6a36913 | 2008-07-15 14:21:29 +0200 | [diff] [blame] | 523 | return 0; |
| 524 | } |
| 525 | |
| 526 | static int sdricoh_pcmcia_resume(struct pcmcia_device *link) |
| 527 | { |
| 528 | struct mmc_host *mmc = link->priv; |
| 529 | dev_dbg(&link->dev, "resume\n"); |
| 530 | sdricoh_reset(mmc_priv(mmc)); |
| 531 | mmc_resume_host(mmc); |
| 532 | return 0; |
| 533 | } |
| 534 | #else |
| 535 | #define sdricoh_pcmcia_suspend NULL |
| 536 | #define sdricoh_pcmcia_resume NULL |
| 537 | #endif |
| 538 | |
| 539 | static struct pcmcia_driver sdricoh_driver = { |
| 540 | .drv = { |
| 541 | .name = DRIVER_NAME, |
| 542 | }, |
| 543 | .probe = sdricoh_pcmcia_probe, |
| 544 | .remove = sdricoh_pcmcia_detach, |
| 545 | .id_table = pcmcia_ids, |
| 546 | .suspend = sdricoh_pcmcia_suspend, |
| 547 | .resume = sdricoh_pcmcia_resume, |
| 548 | }; |
| 549 | |
| 550 | /*****************************************************************************\ |
| 551 | * * |
| 552 | * Driver init/exit * |
| 553 | * * |
| 554 | \*****************************************************************************/ |
| 555 | |
| 556 | static int __init sdricoh_drv_init(void) |
| 557 | { |
| 558 | return pcmcia_register_driver(&sdricoh_driver); |
| 559 | } |
| 560 | |
| 561 | static void __exit sdricoh_drv_exit(void) |
| 562 | { |
| 563 | pcmcia_unregister_driver(&sdricoh_driver); |
| 564 | } |
| 565 | |
| 566 | module_init(sdricoh_drv_init); |
| 567 | module_exit(sdricoh_drv_exit); |
| 568 | |
| 569 | module_param(switchlocked, uint, 0444); |
| 570 | |
| 571 | MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>"); |
| 572 | MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver"); |
| 573 | MODULE_LICENSE("GPL"); |
| 574 | |
| 575 | MODULE_PARM_DESC(switchlocked, "Switch the cards locked status." |
| 576 | "Use this when unlocked cards are shown readonly (default 0)"); |